Crate atsam4e16c_pac[−][src]
Peripheral access API for ATSAM4E16C microcontrollers (generated using svd2rust v0.17.0 (2bbb605 2020-05-16))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open
.
Re-exports
pub use self::Interrupt as interrupt; |
Modules
acc | Analog Comparator Controller |
aes | Advanced Encryption Standard |
afec0 | Analog-Front-End Controller 0 |
afec1 | Analog-Front-End Controller 1 |
can0 | Controller Area Network 0 |
can1 | Controller Area Network 1 |
chipid | Chip Identifier |
cmcc | Cortex M Cache Controller |
crccu | Cyclic Redundancy Check Calculation Unit |
dacc | Digital-to-Analog Converter Controller |
dmac | DMA Controller |
efc | Embedded Flash Controller |
generic | Common register and bit access and modify traits |
gmac | Gigabit Ethernet MAC |
gpbr | General Purpose Backup Register |
hsmci | High Speed MultiMedia Card Interface |
matrix | AHB Bus Matrix |
pioa | Parallel Input/Output Controller A |
piob | Parallel Input/Output Controller B |
pioc | Parallel Input/Output Controller C |
piod | Parallel Input/Output Controller D |
pioe | Parallel Input/Output Controller E |
pmc | Power Management Controller |
pwm | Pulse Width Modulation Controller |
rstc | Reset Controller |
rtc | Real-time Clock |
rtt | Real-time Timer |
spi | Serial Peripheral Interface |
supc | Supply Controller |
tc0 | Timer Counter 0 |
tc1 | Timer Counter 1 |
tc2 | Timer Counter 2 |
twi0 | Two-wire Interface 0 |
twi1 | Two-wire Interface 1 |
uart0 | Universal Asynchronous Receiver Transmitter 0 |
uart1 | Universal Asynchronous Receiver Transmitter 1 |
udp | USB Device Port |
usart0 | Universal Synchronous Asynchronous Receiver Transmitter 0 |
usart1 | Universal Synchronous Asynchronous Receiver Transmitter 1 |
wdt | Watchdog Timer |
Structs
ACC | Analog Comparator Controller |
AES | Advanced Encryption Standard |
AFEC0 | Analog-Front-End Controller 0 |
AFEC1 | Analog-Front-End Controller 1 |
CAN0 | Controller Area Network 0 |
CAN1 | Controller Area Network 1 |
CBP | Cache and branch predictor maintenance operations |
CHIPID | Chip Identifier |
CMCC | Cortex M Cache Controller |
CPUID | CPUID |
CRCCU | Cyclic Redundancy Check Calculation Unit |
CorePeripherals | Core peripherals |
DACC | Digital-to-Analog Converter Controller |
DCB | Debug Control Block |
DMAC | DMA Controller |
DWT | Data Watchpoint and Trace unit |
EFC | Embedded Flash Controller |
FPB | Flash Patch and Breakpoint unit |
FPU | Floating Point Unit |
GMAC | Gigabit Ethernet MAC |
GPBR | General Purpose Backup Register |
HSMCI | High Speed MultiMedia Card Interface |
ITM | Instrumentation Trace Macrocell |
MATRIX | AHB Bus Matrix |
MPU | Memory Protection Unit |
NVIC | Nested Vector Interrupt Controller |
PIOA | Parallel Input/Output Controller A |
PIOB | Parallel Input/Output Controller B |
PIOC | Parallel Input/Output Controller C |
PIOD | Parallel Input/Output Controller D |
PIOE | Parallel Input/Output Controller E |
PMC | Power Management Controller |
PWM | Pulse Width Modulation Controller |
Peripherals | All the peripherals |
RSTC | Reset Controller |
RTC | Real-time Clock |
RTT | Real-time Timer |
SCB | System Control Block |
SPI | Serial Peripheral Interface |
SUPC | Supply Controller |
SYST | SysTick: System Timer |
TC0 | Timer Counter 0 |
TC1 | Timer Counter 1 |
TC2 | Timer Counter 2 |
TPIU | Trace Port Interface Unit |
TWI0 | Two-wire Interface 0 |
TWI1 | Two-wire Interface 1 |
UART0 | Universal Asynchronous Receiver Transmitter 0 |
UART1 | Universal Asynchronous Receiver Transmitter 1 |
UDP | USB Device Port |
USART0 | Universal Synchronous Asynchronous Receiver Transmitter 0 |
USART1 | Universal Synchronous Asynchronous Receiver Transmitter 1 |
WDT | Watchdog Timer |
Enums
Interrupt | Enumeration of all the interrupts |
Constants
NVIC_PRIO_BITS | Number available in the NVIC for configuring priority |
Attribute Macros
interrupt | Attribute to declare an interrupt (AKA device-specific exception) handler |