atsam3x8c/pwm/
dis.rs

1#[doc = "Register `DIS` writer"]
2pub type W = crate::W<DisSpec>;
3#[doc = "Field `CHID0` writer - Channel ID"]
4pub type Chid0W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `CHID1` writer - Channel ID"]
6pub type Chid1W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `CHID2` writer - Channel ID"]
8pub type Chid2W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CHID3` writer - Channel ID"]
10pub type Chid3W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `CHID4` writer - Channel ID"]
12pub type Chid4W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CHID5` writer - Channel ID"]
14pub type Chid5W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `CHID6` writer - Channel ID"]
16pub type Chid6W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CHID7` writer - Channel ID"]
18pub type Chid7W<'a, REG> = crate::BitWriter<'a, REG>;
19impl W {
20    #[doc = "Bit 0 - Channel ID"]
21    #[inline(always)]
22    #[must_use]
23    pub fn chid0(&mut self) -> Chid0W<DisSpec> {
24        Chid0W::new(self, 0)
25    }
26    #[doc = "Bit 1 - Channel ID"]
27    #[inline(always)]
28    #[must_use]
29    pub fn chid1(&mut self) -> Chid1W<DisSpec> {
30        Chid1W::new(self, 1)
31    }
32    #[doc = "Bit 2 - Channel ID"]
33    #[inline(always)]
34    #[must_use]
35    pub fn chid2(&mut self) -> Chid2W<DisSpec> {
36        Chid2W::new(self, 2)
37    }
38    #[doc = "Bit 3 - Channel ID"]
39    #[inline(always)]
40    #[must_use]
41    pub fn chid3(&mut self) -> Chid3W<DisSpec> {
42        Chid3W::new(self, 3)
43    }
44    #[doc = "Bit 4 - Channel ID"]
45    #[inline(always)]
46    #[must_use]
47    pub fn chid4(&mut self) -> Chid4W<DisSpec> {
48        Chid4W::new(self, 4)
49    }
50    #[doc = "Bit 5 - Channel ID"]
51    #[inline(always)]
52    #[must_use]
53    pub fn chid5(&mut self) -> Chid5W<DisSpec> {
54        Chid5W::new(self, 5)
55    }
56    #[doc = "Bit 6 - Channel ID"]
57    #[inline(always)]
58    #[must_use]
59    pub fn chid6(&mut self) -> Chid6W<DisSpec> {
60        Chid6W::new(self, 6)
61    }
62    #[doc = "Bit 7 - Channel ID"]
63    #[inline(always)]
64    #[must_use]
65    pub fn chid7(&mut self) -> Chid7W<DisSpec> {
66        Chid7W::new(self, 7)
67    }
68}
69#[doc = "PWM Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dis::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
70pub struct DisSpec;
71impl crate::RegisterSpec for DisSpec {
72    type Ux = u32;
73}
74#[doc = "`write(|w| ..)` method takes [`dis::W`](W) writer structure"]
75impl crate::Writable for DisSpec {
76    type Safety = crate::Unsafe;
77    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
78    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
79}
atsam3x8c/pwm/dis.rs

atsam3x8c/pwm/
dis.rs
