atsam3s8c/pioc/
pcier.rs

1#[doc = "Register `PCIER` writer"]
2pub type W = crate::W<PcierSpec>;
3#[doc = "Field `DRDY` writer - Parallel Capture Mode Data Ready Interrupt Enable"]
4pub type DrdyW<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `OVRE` writer - Parallel Capture Mode Overrun Error Interrupt Enable"]
6pub type OvreW<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `ENDRX` writer - End of Reception Transfer Interrupt Enable"]
8pub type EndrxW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RXBUFF` writer - Reception Buffer Full Interrupt Enable"]
10pub type RxbuffW<'a, REG> = crate::BitWriter<'a, REG>;
11impl W {
12    #[doc = "Bit 0 - Parallel Capture Mode Data Ready Interrupt Enable"]
13    #[inline(always)]
14    #[must_use]
15    pub fn drdy(&mut self) -> DrdyW<PcierSpec> {
16        DrdyW::new(self, 0)
17    }
18    #[doc = "Bit 1 - Parallel Capture Mode Overrun Error Interrupt Enable"]
19    #[inline(always)]
20    #[must_use]
21    pub fn ovre(&mut self) -> OvreW<PcierSpec> {
22        OvreW::new(self, 1)
23    }
24    #[doc = "Bit 2 - End of Reception Transfer Interrupt Enable"]
25    #[inline(always)]
26    #[must_use]
27    pub fn endrx(&mut self) -> EndrxW<PcierSpec> {
28        EndrxW::new(self, 2)
29    }
30    #[doc = "Bit 3 - Reception Buffer Full Interrupt Enable"]
31    #[inline(always)]
32    #[must_use]
33    pub fn rxbuff(&mut self) -> RxbuffW<PcierSpec> {
34        RxbuffW::new(self, 3)
35    }
36}
37#[doc = "Parallel Capture Interrupt Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcier::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
38pub struct PcierSpec;
39impl crate::RegisterSpec for PcierSpec {
40    type Ux = u32;
41}
42#[doc = "`write(|w| ..)` method takes [`pcier::W`](W) writer structure"]
43impl crate::Writable for PcierSpec {
44    type Safety = crate::Unsafe;
45    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
46    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
47}
atsam3s8c/pioc/pcier.rs

atsam3s8c/pioc/
pcier.rs
