atsam3s2c/pmc/
pmc_pcer0.rs1#[doc = "Register `PMC_PCER0` writer"]
2pub type W = crate::W<PmcPcer0Spec>;
3#[doc = "Field `PID8` writer - Peripheral Clock 8 Enable"]
4pub type Pid8W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `PID9` writer - Peripheral Clock 9 Enable"]
6pub type Pid9W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `PID10` writer - Peripheral Clock 10 Enable"]
8pub type Pid10W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PID11` writer - Peripheral Clock 11 Enable"]
10pub type Pid11W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `PID12` writer - Peripheral Clock 12 Enable"]
12pub type Pid12W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PID13` writer - Peripheral Clock 13 Enable"]
14pub type Pid13W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `PID14` writer - Peripheral Clock 14 Enable"]
16pub type Pid14W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `PID15` writer - Peripheral Clock 15 Enable"]
18pub type Pid15W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `PID18` writer - Peripheral Clock 18 Enable"]
20pub type Pid18W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PID19` writer - Peripheral Clock 19 Enable"]
22pub type Pid19W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `PID20` writer - Peripheral Clock 20 Enable"]
24pub type Pid20W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `PID21` writer - Peripheral Clock 21 Enable"]
26pub type Pid21W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `PID22` writer - Peripheral Clock 22 Enable"]
28pub type Pid22W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `PID23` writer - Peripheral Clock 23 Enable"]
30pub type Pid23W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `PID24` writer - Peripheral Clock 24 Enable"]
32pub type Pid24W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `PID25` writer - Peripheral Clock 25 Enable"]
34pub type Pid25W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `PID26` writer - Peripheral Clock 26 Enable"]
36pub type Pid26W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `PID27` writer - Peripheral Clock 27 Enable"]
38pub type Pid27W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `PID28` writer - Peripheral Clock 28 Enable"]
40pub type Pid28W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `PID29` writer - Peripheral Clock 29 Enable"]
42pub type Pid29W<'a, REG> = crate::BitWriter<'a, REG>;
43#[doc = "Field `PID30` writer - Peripheral Clock 30 Enable"]
44pub type Pid30W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `PID31` writer - Peripheral Clock 31 Enable"]
46pub type Pid31W<'a, REG> = crate::BitWriter<'a, REG>;
47impl W {
48 #[doc = "Bit 8 - Peripheral Clock 8 Enable"]
49 #[inline(always)]
50 #[must_use]
51 pub fn pid8(&mut self) -> Pid8W<PmcPcer0Spec> {
52 Pid8W::new(self, 8)
53 }
54 #[doc = "Bit 9 - Peripheral Clock 9 Enable"]
55 #[inline(always)]
56 #[must_use]
57 pub fn pid9(&mut self) -> Pid9W<PmcPcer0Spec> {
58 Pid9W::new(self, 9)
59 }
60 #[doc = "Bit 10 - Peripheral Clock 10 Enable"]
61 #[inline(always)]
62 #[must_use]
63 pub fn pid10(&mut self) -> Pid10W<PmcPcer0Spec> {
64 Pid10W::new(self, 10)
65 }
66 #[doc = "Bit 11 - Peripheral Clock 11 Enable"]
67 #[inline(always)]
68 #[must_use]
69 pub fn pid11(&mut self) -> Pid11W<PmcPcer0Spec> {
70 Pid11W::new(self, 11)
71 }
72 #[doc = "Bit 12 - Peripheral Clock 12 Enable"]
73 #[inline(always)]
74 #[must_use]
75 pub fn pid12(&mut self) -> Pid12W<PmcPcer0Spec> {
76 Pid12W::new(self, 12)
77 }
78 #[doc = "Bit 13 - Peripheral Clock 13 Enable"]
79 #[inline(always)]
80 #[must_use]
81 pub fn pid13(&mut self) -> Pid13W<PmcPcer0Spec> {
82 Pid13W::new(self, 13)
83 }
84 #[doc = "Bit 14 - Peripheral Clock 14 Enable"]
85 #[inline(always)]
86 #[must_use]
87 pub fn pid14(&mut self) -> Pid14W<PmcPcer0Spec> {
88 Pid14W::new(self, 14)
89 }
90 #[doc = "Bit 15 - Peripheral Clock 15 Enable"]
91 #[inline(always)]
92 #[must_use]
93 pub fn pid15(&mut self) -> Pid15W<PmcPcer0Spec> {
94 Pid15W::new(self, 15)
95 }
96 #[doc = "Bit 18 - Peripheral Clock 18 Enable"]
97 #[inline(always)]
98 #[must_use]
99 pub fn pid18(&mut self) -> Pid18W<PmcPcer0Spec> {
100 Pid18W::new(self, 18)
101 }
102 #[doc = "Bit 19 - Peripheral Clock 19 Enable"]
103 #[inline(always)]
104 #[must_use]
105 pub fn pid19(&mut self) -> Pid19W<PmcPcer0Spec> {
106 Pid19W::new(self, 19)
107 }
108 #[doc = "Bit 20 - Peripheral Clock 20 Enable"]
109 #[inline(always)]
110 #[must_use]
111 pub fn pid20(&mut self) -> Pid20W<PmcPcer0Spec> {
112 Pid20W::new(self, 20)
113 }
114 #[doc = "Bit 21 - Peripheral Clock 21 Enable"]
115 #[inline(always)]
116 #[must_use]
117 pub fn pid21(&mut self) -> Pid21W<PmcPcer0Spec> {
118 Pid21W::new(self, 21)
119 }
120 #[doc = "Bit 22 - Peripheral Clock 22 Enable"]
121 #[inline(always)]
122 #[must_use]
123 pub fn pid22(&mut self) -> Pid22W<PmcPcer0Spec> {
124 Pid22W::new(self, 22)
125 }
126 #[doc = "Bit 23 - Peripheral Clock 23 Enable"]
127 #[inline(always)]
128 #[must_use]
129 pub fn pid23(&mut self) -> Pid23W<PmcPcer0Spec> {
130 Pid23W::new(self, 23)
131 }
132 #[doc = "Bit 24 - Peripheral Clock 24 Enable"]
133 #[inline(always)]
134 #[must_use]
135 pub fn pid24(&mut self) -> Pid24W<PmcPcer0Spec> {
136 Pid24W::new(self, 24)
137 }
138 #[doc = "Bit 25 - Peripheral Clock 25 Enable"]
139 #[inline(always)]
140 #[must_use]
141 pub fn pid25(&mut self) -> Pid25W<PmcPcer0Spec> {
142 Pid25W::new(self, 25)
143 }
144 #[doc = "Bit 26 - Peripheral Clock 26 Enable"]
145 #[inline(always)]
146 #[must_use]
147 pub fn pid26(&mut self) -> Pid26W<PmcPcer0Spec> {
148 Pid26W::new(self, 26)
149 }
150 #[doc = "Bit 27 - Peripheral Clock 27 Enable"]
151 #[inline(always)]
152 #[must_use]
153 pub fn pid27(&mut self) -> Pid27W<PmcPcer0Spec> {
154 Pid27W::new(self, 27)
155 }
156 #[doc = "Bit 28 - Peripheral Clock 28 Enable"]
157 #[inline(always)]
158 #[must_use]
159 pub fn pid28(&mut self) -> Pid28W<PmcPcer0Spec> {
160 Pid28W::new(self, 28)
161 }
162 #[doc = "Bit 29 - Peripheral Clock 29 Enable"]
163 #[inline(always)]
164 #[must_use]
165 pub fn pid29(&mut self) -> Pid29W<PmcPcer0Spec> {
166 Pid29W::new(self, 29)
167 }
168 #[doc = "Bit 30 - Peripheral Clock 30 Enable"]
169 #[inline(always)]
170 #[must_use]
171 pub fn pid30(&mut self) -> Pid30W<PmcPcer0Spec> {
172 Pid30W::new(self, 30)
173 }
174 #[doc = "Bit 31 - Peripheral Clock 31 Enable"]
175 #[inline(always)]
176 #[must_use]
177 pub fn pid31(&mut self) -> Pid31W<PmcPcer0Spec> {
178 Pid31W::new(self, 31)
179 }
180}
181#[doc = "Peripheral Clock Enable Register 0\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmc_pcer0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
182pub struct PmcPcer0Spec;
183impl crate::RegisterSpec for PmcPcer0Spec {
184 type Ux = u32;
185}
186#[doc = "`write(|w| ..)` method takes [`pmc_pcer0::W`](W) writer structure"]
187impl crate::Writable for PmcPcer0Spec {
188 type Safety = crate::Unsafe;
189 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
190 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
191}