atsam3s2a/pwm/
osc.rs

1#[doc = "Register `OSC` writer"]
2pub type W = crate::W<OscSpec>;
3#[doc = "Field `OSCH0` writer - Output Selection Clear for PWMH output of the channel 0"]
4pub type Osch0W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `OSCH1` writer - Output Selection Clear for PWMH output of the channel 1"]
6pub type Osch1W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `OSCH2` writer - Output Selection Clear for PWMH output of the channel 2"]
8pub type Osch2W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `OSCH3` writer - Output Selection Clear for PWMH output of the channel 3"]
10pub type Osch3W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `OSCL0` writer - Output Selection Clear for PWML output of the channel 0"]
12pub type Oscl0W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `OSCL1` writer - Output Selection Clear for PWML output of the channel 1"]
14pub type Oscl1W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `OSCL2` writer - Output Selection Clear for PWML output of the channel 2"]
16pub type Oscl2W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `OSCL3` writer - Output Selection Clear for PWML output of the channel 3"]
18pub type Oscl3W<'a, REG> = crate::BitWriter<'a, REG>;
19impl W {
20    #[doc = "Bit 0 - Output Selection Clear for PWMH output of the channel 0"]
21    #[inline(always)]
22    #[must_use]
23    pub fn osch0(&mut self) -> Osch0W<OscSpec> {
24        Osch0W::new(self, 0)
25    }
26    #[doc = "Bit 1 - Output Selection Clear for PWMH output of the channel 1"]
27    #[inline(always)]
28    #[must_use]
29    pub fn osch1(&mut self) -> Osch1W<OscSpec> {
30        Osch1W::new(self, 1)
31    }
32    #[doc = "Bit 2 - Output Selection Clear for PWMH output of the channel 2"]
33    #[inline(always)]
34    #[must_use]
35    pub fn osch2(&mut self) -> Osch2W<OscSpec> {
36        Osch2W::new(self, 2)
37    }
38    #[doc = "Bit 3 - Output Selection Clear for PWMH output of the channel 3"]
39    #[inline(always)]
40    #[must_use]
41    pub fn osch3(&mut self) -> Osch3W<OscSpec> {
42        Osch3W::new(self, 3)
43    }
44    #[doc = "Bit 16 - Output Selection Clear for PWML output of the channel 0"]
45    #[inline(always)]
46    #[must_use]
47    pub fn oscl0(&mut self) -> Oscl0W<OscSpec> {
48        Oscl0W::new(self, 16)
49    }
50    #[doc = "Bit 17 - Output Selection Clear for PWML output of the channel 1"]
51    #[inline(always)]
52    #[must_use]
53    pub fn oscl1(&mut self) -> Oscl1W<OscSpec> {
54        Oscl1W::new(self, 17)
55    }
56    #[doc = "Bit 18 - Output Selection Clear for PWML output of the channel 2"]
57    #[inline(always)]
58    #[must_use]
59    pub fn oscl2(&mut self) -> Oscl2W<OscSpec> {
60        Oscl2W::new(self, 18)
61    }
62    #[doc = "Bit 19 - Output Selection Clear for PWML output of the channel 3"]
63    #[inline(always)]
64    #[must_use]
65    pub fn oscl3(&mut self) -> Oscl3W<OscSpec> {
66        Oscl3W::new(self, 19)
67    }
68}
69#[doc = "PWM Output Selection Clear Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`osc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
70pub struct OscSpec;
71impl crate::RegisterSpec for OscSpec {
72    type Ux = u32;
73}
74#[doc = "`write(|w| ..)` method takes [`osc::W`](W) writer structure"]
75impl crate::Writable for OscSpec {
76    type Safety = crate::Unsafe;
77    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
78    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
79}
atsam3s2a/pwm/osc.rs

atsam3s2a/pwm/
osc.rs
