1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 ccr0: Ccr0,
5 _reserved_1_cmr0: [u8; 0x04],
6 smmr0: Smmr0,
7 _reserved3: [u8; 0x04],
8 cv0: Cv0,
9 ra0: Ra0,
10 rb0: Rb0,
11 rc0: Rc0,
12 sr0: Sr0,
13 ier0: Ier0,
14 idr0: Idr0,
15 imr0: Imr0,
16 _reserved11: [u8; 0x10],
17 ccr1: Ccr1,
18 _reserved_12_cmr1: [u8; 0x04],
19 smmr1: Smmr1,
20 _reserved14: [u8; 0x04],
21 cv1: Cv1,
22 ra1: Ra1,
23 rb1: Rb1,
24 rc1: Rc1,
25 sr1: Sr1,
26 ier1: Ier1,
27 idr1: Idr1,
28 imr1: Imr1,
29 _reserved22: [u8; 0x10],
30 ccr2: Ccr2,
31 _reserved_23_cmr2: [u8; 0x04],
32 smmr2: Smmr2,
33 _reserved25: [u8; 0x04],
34 cv2: Cv2,
35 ra2: Ra2,
36 rb2: Rb2,
37 rc2: Rc2,
38 sr2: Sr2,
39 ier2: Ier2,
40 idr2: Idr2,
41 imr2: Imr2,
42 _reserved33: [u8; 0x10],
43 bcr: Bcr,
44 bmr: Bmr,
45 qier: Qier,
46 qidr: Qidr,
47 qimr: Qimr,
48 qisr: Qisr,
49 _reserved39: [u8; 0x0c],
50 wpmr: Wpmr,
51}
52impl RegisterBlock {
53 #[doc = "0x00 - Channel Control Register (channel = 0)"]
54 #[inline(always)]
55 pub const fn ccr0(&self) -> &Ccr0 {
56 &self.ccr0
57 }
58 #[doc = "0x04 - Channel Mode Register (channel = 0)"]
59 #[inline(always)]
60 pub const fn waveform_mode_cmr0_waveform_mode(&self) -> &WaveformModeCmr0WaveformMode {
61 unsafe { &*(self as *const Self).cast::<u8>().add(4).cast() }
62 }
63 #[doc = "0x04 - Channel Mode Register (channel = 0)"]
64 #[inline(always)]
65 pub const fn cmr0(&self) -> &Cmr0 {
66 unsafe { &*(self as *const Self).cast::<u8>().add(4).cast() }
67 }
68 #[doc = "0x08 - Stepper Motor Mode Register (channel = 0)"]
69 #[inline(always)]
70 pub const fn smmr0(&self) -> &Smmr0 {
71 &self.smmr0
72 }
73 #[doc = "0x10 - Counter Value (channel = 0)"]
74 #[inline(always)]
75 pub const fn cv0(&self) -> &Cv0 {
76 &self.cv0
77 }
78 #[doc = "0x14 - Register A (channel = 0)"]
79 #[inline(always)]
80 pub const fn ra0(&self) -> &Ra0 {
81 &self.ra0
82 }
83 #[doc = "0x18 - Register B (channel = 0)"]
84 #[inline(always)]
85 pub const fn rb0(&self) -> &Rb0 {
86 &self.rb0
87 }
88 #[doc = "0x1c - Register C (channel = 0)"]
89 #[inline(always)]
90 pub const fn rc0(&self) -> &Rc0 {
91 &self.rc0
92 }
93 #[doc = "0x20 - Status Register (channel = 0)"]
94 #[inline(always)]
95 pub const fn sr0(&self) -> &Sr0 {
96 &self.sr0
97 }
98 #[doc = "0x24 - Interrupt Enable Register (channel = 0)"]
99 #[inline(always)]
100 pub const fn ier0(&self) -> &Ier0 {
101 &self.ier0
102 }
103 #[doc = "0x28 - Interrupt Disable Register (channel = 0)"]
104 #[inline(always)]
105 pub const fn idr0(&self) -> &Idr0 {
106 &self.idr0
107 }
108 #[doc = "0x2c - Interrupt Mask Register (channel = 0)"]
109 #[inline(always)]
110 pub const fn imr0(&self) -> &Imr0 {
111 &self.imr0
112 }
113 #[doc = "0x40 - Channel Control Register (channel = 1)"]
114 #[inline(always)]
115 pub const fn ccr1(&self) -> &Ccr1 {
116 &self.ccr1
117 }
118 #[doc = "0x44 - Channel Mode Register (channel = 1)"]
119 #[inline(always)]
120 pub const fn waveform_mode_cmr1_waveform_mode(&self) -> &WaveformModeCmr1WaveformMode {
121 unsafe { &*(self as *const Self).cast::<u8>().add(68).cast() }
122 }
123 #[doc = "0x44 - Channel Mode Register (channel = 1)"]
124 #[inline(always)]
125 pub const fn cmr1(&self) -> &Cmr1 {
126 unsafe { &*(self as *const Self).cast::<u8>().add(68).cast() }
127 }
128 #[doc = "0x48 - Stepper Motor Mode Register (channel = 1)"]
129 #[inline(always)]
130 pub const fn smmr1(&self) -> &Smmr1 {
131 &self.smmr1
132 }
133 #[doc = "0x50 - Counter Value (channel = 1)"]
134 #[inline(always)]
135 pub const fn cv1(&self) -> &Cv1 {
136 &self.cv1
137 }
138 #[doc = "0x54 - Register A (channel = 1)"]
139 #[inline(always)]
140 pub const fn ra1(&self) -> &Ra1 {
141 &self.ra1
142 }
143 #[doc = "0x58 - Register B (channel = 1)"]
144 #[inline(always)]
145 pub const fn rb1(&self) -> &Rb1 {
146 &self.rb1
147 }
148 #[doc = "0x5c - Register C (channel = 1)"]
149 #[inline(always)]
150 pub const fn rc1(&self) -> &Rc1 {
151 &self.rc1
152 }
153 #[doc = "0x60 - Status Register (channel = 1)"]
154 #[inline(always)]
155 pub const fn sr1(&self) -> &Sr1 {
156 &self.sr1
157 }
158 #[doc = "0x64 - Interrupt Enable Register (channel = 1)"]
159 #[inline(always)]
160 pub const fn ier1(&self) -> &Ier1 {
161 &self.ier1
162 }
163 #[doc = "0x68 - Interrupt Disable Register (channel = 1)"]
164 #[inline(always)]
165 pub const fn idr1(&self) -> &Idr1 {
166 &self.idr1
167 }
168 #[doc = "0x6c - Interrupt Mask Register (channel = 1)"]
169 #[inline(always)]
170 pub const fn imr1(&self) -> &Imr1 {
171 &self.imr1
172 }
173 #[doc = "0x80 - Channel Control Register (channel = 2)"]
174 #[inline(always)]
175 pub const fn ccr2(&self) -> &Ccr2 {
176 &self.ccr2
177 }
178 #[doc = "0x84 - Channel Mode Register (channel = 2)"]
179 #[inline(always)]
180 pub const fn waveform_mode_cmr2_waveform_mode(&self) -> &WaveformModeCmr2WaveformMode {
181 unsafe { &*(self as *const Self).cast::<u8>().add(132).cast() }
182 }
183 #[doc = "0x84 - Channel Mode Register (channel = 2)"]
184 #[inline(always)]
185 pub const fn cmr2(&self) -> &Cmr2 {
186 unsafe { &*(self as *const Self).cast::<u8>().add(132).cast() }
187 }
188 #[doc = "0x88 - Stepper Motor Mode Register (channel = 2)"]
189 #[inline(always)]
190 pub const fn smmr2(&self) -> &Smmr2 {
191 &self.smmr2
192 }
193 #[doc = "0x90 - Counter Value (channel = 2)"]
194 #[inline(always)]
195 pub const fn cv2(&self) -> &Cv2 {
196 &self.cv2
197 }
198 #[doc = "0x94 - Register A (channel = 2)"]
199 #[inline(always)]
200 pub const fn ra2(&self) -> &Ra2 {
201 &self.ra2
202 }
203 #[doc = "0x98 - Register B (channel = 2)"]
204 #[inline(always)]
205 pub const fn rb2(&self) -> &Rb2 {
206 &self.rb2
207 }
208 #[doc = "0x9c - Register C (channel = 2)"]
209 #[inline(always)]
210 pub const fn rc2(&self) -> &Rc2 {
211 &self.rc2
212 }
213 #[doc = "0xa0 - Status Register (channel = 2)"]
214 #[inline(always)]
215 pub const fn sr2(&self) -> &Sr2 {
216 &self.sr2
217 }
218 #[doc = "0xa4 - Interrupt Enable Register (channel = 2)"]
219 #[inline(always)]
220 pub const fn ier2(&self) -> &Ier2 {
221 &self.ier2
222 }
223 #[doc = "0xa8 - Interrupt Disable Register (channel = 2)"]
224 #[inline(always)]
225 pub const fn idr2(&self) -> &Idr2 {
226 &self.idr2
227 }
228 #[doc = "0xac - Interrupt Mask Register (channel = 2)"]
229 #[inline(always)]
230 pub const fn imr2(&self) -> &Imr2 {
231 &self.imr2
232 }
233 #[doc = "0xc0 - Block Control Register"]
234 #[inline(always)]
235 pub const fn bcr(&self) -> &Bcr {
236 &self.bcr
237 }
238 #[doc = "0xc4 - Block Mode Register"]
239 #[inline(always)]
240 pub const fn bmr(&self) -> &Bmr {
241 &self.bmr
242 }
243 #[doc = "0xc8 - QDEC Interrupt Enable Register"]
244 #[inline(always)]
245 pub const fn qier(&self) -> &Qier {
246 &self.qier
247 }
248 #[doc = "0xcc - QDEC Interrupt Disable Register"]
249 #[inline(always)]
250 pub const fn qidr(&self) -> &Qidr {
251 &self.qidr
252 }
253 #[doc = "0xd0 - QDEC Interrupt Mask Register"]
254 #[inline(always)]
255 pub const fn qimr(&self) -> &Qimr {
256 &self.qimr
257 }
258 #[doc = "0xd4 - QDEC Interrupt Status Register"]
259 #[inline(always)]
260 pub const fn qisr(&self) -> &Qisr {
261 &self.qisr
262 }
263 #[doc = "0xe4 - Write Protection Mode Register"]
264 #[inline(always)]
265 pub const fn wpmr(&self) -> &Wpmr {
266 &self.wpmr
267 }
268}
269#[doc = "CCR0 (w) register accessor: Channel Control Register (channel = 0)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr0`]
270module"]
271#[doc(alias = "CCR0")]
272pub type Ccr0 = crate::Reg<ccr0::Ccr0Spec>;
273#[doc = "Channel Control Register (channel = 0)"]
274pub mod ccr0;
275#[doc = "CMR0 (rw) register accessor: Channel Mode Register (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmr0`]
276module"]
277#[doc(alias = "CMR0")]
278pub type Cmr0 = crate::Reg<cmr0::Cmr0Spec>;
279#[doc = "Channel Mode Register (channel = 0)"]
280pub mod cmr0;
281#[doc = "WAVEFORM_MODE_CMR0_WAVEFORM_MODE (rw) register accessor: Channel Mode Register (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waveform_mode_cmr0_waveform_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`waveform_mode_cmr0_waveform_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waveform_mode_cmr0_waveform_mode`]
282module"]
283#[doc(alias = "WAVEFORM_MODE_CMR0_WAVEFORM_MODE")]
284pub type WaveformModeCmr0WaveformMode =
285 crate::Reg<waveform_mode_cmr0_waveform_mode::WaveformModeCmr0WaveformModeSpec>;
286#[doc = "Channel Mode Register (channel = 0)"]
287pub mod waveform_mode_cmr0_waveform_mode;
288#[doc = "SMMR0 (rw) register accessor: Stepper Motor Mode Register (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`smmr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`smmr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@smmr0`]
289module"]
290#[doc(alias = "SMMR0")]
291pub type Smmr0 = crate::Reg<smmr0::Smmr0Spec>;
292#[doc = "Stepper Motor Mode Register (channel = 0)"]
293pub mod smmr0;
294#[doc = "CV0 (r) register accessor: Counter Value (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cv0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cv0`]
295module"]
296#[doc(alias = "CV0")]
297pub type Cv0 = crate::Reg<cv0::Cv0Spec>;
298#[doc = "Counter Value (channel = 0)"]
299pub mod cv0;
300#[doc = "RA0 (rw) register accessor: Register A (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ra0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ra0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra0`]
301module"]
302#[doc(alias = "RA0")]
303pub type Ra0 = crate::Reg<ra0::Ra0Spec>;
304#[doc = "Register A (channel = 0)"]
305pub mod ra0;
306#[doc = "RB0 (rw) register accessor: Register B (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rb0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rb0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rb0`]
307module"]
308#[doc(alias = "RB0")]
309pub type Rb0 = crate::Reg<rb0::Rb0Spec>;
310#[doc = "Register B (channel = 0)"]
311pub mod rb0;
312#[doc = "RC0 (rw) register accessor: Register C (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rc0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rc0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rc0`]
313module"]
314#[doc(alias = "RC0")]
315pub type Rc0 = crate::Reg<rc0::Rc0Spec>;
316#[doc = "Register C (channel = 0)"]
317pub mod rc0;
318#[doc = "SR0 (r) register accessor: Status Register (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sr0`]
319module"]
320#[doc(alias = "SR0")]
321pub type Sr0 = crate::Reg<sr0::Sr0Spec>;
322#[doc = "Status Register (channel = 0)"]
323pub mod sr0;
324#[doc = "IER0 (w) register accessor: Interrupt Enable Register (channel = 0)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ier0`]
325module"]
326#[doc(alias = "IER0")]
327pub type Ier0 = crate::Reg<ier0::Ier0Spec>;
328#[doc = "Interrupt Enable Register (channel = 0)"]
329pub mod ier0;
330#[doc = "IDR0 (w) register accessor: Interrupt Disable Register (channel = 0)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idr0`]
331module"]
332#[doc(alias = "IDR0")]
333pub type Idr0 = crate::Reg<idr0::Idr0Spec>;
334#[doc = "Interrupt Disable Register (channel = 0)"]
335pub mod idr0;
336#[doc = "IMR0 (r) register accessor: Interrupt Mask Register (channel = 0)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr0`]
337module"]
338#[doc(alias = "IMR0")]
339pub type Imr0 = crate::Reg<imr0::Imr0Spec>;
340#[doc = "Interrupt Mask Register (channel = 0)"]
341pub mod imr0;
342#[doc = "CCR1 (w) register accessor: Channel Control Register (channel = 1)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr1`]
343module"]
344#[doc(alias = "CCR1")]
345pub type Ccr1 = crate::Reg<ccr1::Ccr1Spec>;
346#[doc = "Channel Control Register (channel = 1)"]
347pub mod ccr1;
348#[doc = "CMR1 (rw) register accessor: Channel Mode Register (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmr1`]
349module"]
350#[doc(alias = "CMR1")]
351pub type Cmr1 = crate::Reg<cmr1::Cmr1Spec>;
352#[doc = "Channel Mode Register (channel = 1)"]
353pub mod cmr1;
354#[doc = "WAVEFORM_MODE_CMR1_WAVEFORM_MODE (rw) register accessor: Channel Mode Register (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waveform_mode_cmr1_waveform_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`waveform_mode_cmr1_waveform_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waveform_mode_cmr1_waveform_mode`]
355module"]
356#[doc(alias = "WAVEFORM_MODE_CMR1_WAVEFORM_MODE")]
357pub type WaveformModeCmr1WaveformMode =
358 crate::Reg<waveform_mode_cmr1_waveform_mode::WaveformModeCmr1WaveformModeSpec>;
359#[doc = "Channel Mode Register (channel = 1)"]
360pub mod waveform_mode_cmr1_waveform_mode;
361#[doc = "SMMR1 (rw) register accessor: Stepper Motor Mode Register (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`smmr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`smmr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@smmr1`]
362module"]
363#[doc(alias = "SMMR1")]
364pub type Smmr1 = crate::Reg<smmr1::Smmr1Spec>;
365#[doc = "Stepper Motor Mode Register (channel = 1)"]
366pub mod smmr1;
367#[doc = "CV1 (r) register accessor: Counter Value (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cv1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cv1`]
368module"]
369#[doc(alias = "CV1")]
370pub type Cv1 = crate::Reg<cv1::Cv1Spec>;
371#[doc = "Counter Value (channel = 1)"]
372pub mod cv1;
373#[doc = "RA1 (rw) register accessor: Register A (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ra1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ra1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra1`]
374module"]
375#[doc(alias = "RA1")]
376pub type Ra1 = crate::Reg<ra1::Ra1Spec>;
377#[doc = "Register A (channel = 1)"]
378pub mod ra1;
379#[doc = "RB1 (rw) register accessor: Register B (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rb1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rb1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rb1`]
380module"]
381#[doc(alias = "RB1")]
382pub type Rb1 = crate::Reg<rb1::Rb1Spec>;
383#[doc = "Register B (channel = 1)"]
384pub mod rb1;
385#[doc = "RC1 (rw) register accessor: Register C (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rc1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rc1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rc1`]
386module"]
387#[doc(alias = "RC1")]
388pub type Rc1 = crate::Reg<rc1::Rc1Spec>;
389#[doc = "Register C (channel = 1)"]
390pub mod rc1;
391#[doc = "SR1 (r) register accessor: Status Register (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sr1`]
392module"]
393#[doc(alias = "SR1")]
394pub type Sr1 = crate::Reg<sr1::Sr1Spec>;
395#[doc = "Status Register (channel = 1)"]
396pub mod sr1;
397#[doc = "IER1 (w) register accessor: Interrupt Enable Register (channel = 1)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ier1`]
398module"]
399#[doc(alias = "IER1")]
400pub type Ier1 = crate::Reg<ier1::Ier1Spec>;
401#[doc = "Interrupt Enable Register (channel = 1)"]
402pub mod ier1;
403#[doc = "IDR1 (w) register accessor: Interrupt Disable Register (channel = 1)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idr1`]
404module"]
405#[doc(alias = "IDR1")]
406pub type Idr1 = crate::Reg<idr1::Idr1Spec>;
407#[doc = "Interrupt Disable Register (channel = 1)"]
408pub mod idr1;
409#[doc = "IMR1 (r) register accessor: Interrupt Mask Register (channel = 1)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr1`]
410module"]
411#[doc(alias = "IMR1")]
412pub type Imr1 = crate::Reg<imr1::Imr1Spec>;
413#[doc = "Interrupt Mask Register (channel = 1)"]
414pub mod imr1;
415#[doc = "CCR2 (w) register accessor: Channel Control Register (channel = 2)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr2`]
416module"]
417#[doc(alias = "CCR2")]
418pub type Ccr2 = crate::Reg<ccr2::Ccr2Spec>;
419#[doc = "Channel Control Register (channel = 2)"]
420pub mod ccr2;
421#[doc = "CMR2 (rw) register accessor: Channel Mode Register (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmr2`]
422module"]
423#[doc(alias = "CMR2")]
424pub type Cmr2 = crate::Reg<cmr2::Cmr2Spec>;
425#[doc = "Channel Mode Register (channel = 2)"]
426pub mod cmr2;
427#[doc = "WAVEFORM_MODE_CMR2_WAVEFORM_MODE (rw) register accessor: Channel Mode Register (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waveform_mode_cmr2_waveform_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`waveform_mode_cmr2_waveform_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waveform_mode_cmr2_waveform_mode`]
428module"]
429#[doc(alias = "WAVEFORM_MODE_CMR2_WAVEFORM_MODE")]
430pub type WaveformModeCmr2WaveformMode =
431 crate::Reg<waveform_mode_cmr2_waveform_mode::WaveformModeCmr2WaveformModeSpec>;
432#[doc = "Channel Mode Register (channel = 2)"]
433pub mod waveform_mode_cmr2_waveform_mode;
434#[doc = "SMMR2 (rw) register accessor: Stepper Motor Mode Register (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`smmr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`smmr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@smmr2`]
435module"]
436#[doc(alias = "SMMR2")]
437pub type Smmr2 = crate::Reg<smmr2::Smmr2Spec>;
438#[doc = "Stepper Motor Mode Register (channel = 2)"]
439pub mod smmr2;
440#[doc = "CV2 (r) register accessor: Counter Value (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cv2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cv2`]
441module"]
442#[doc(alias = "CV2")]
443pub type Cv2 = crate::Reg<cv2::Cv2Spec>;
444#[doc = "Counter Value (channel = 2)"]
445pub mod cv2;
446#[doc = "RA2 (rw) register accessor: Register A (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ra2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ra2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ra2`]
447module"]
448#[doc(alias = "RA2")]
449pub type Ra2 = crate::Reg<ra2::Ra2Spec>;
450#[doc = "Register A (channel = 2)"]
451pub mod ra2;
452#[doc = "RB2 (rw) register accessor: Register B (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rb2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rb2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rb2`]
453module"]
454#[doc(alias = "RB2")]
455pub type Rb2 = crate::Reg<rb2::Rb2Spec>;
456#[doc = "Register B (channel = 2)"]
457pub mod rb2;
458#[doc = "RC2 (rw) register accessor: Register C (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rc2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rc2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rc2`]
459module"]
460#[doc(alias = "RC2")]
461pub type Rc2 = crate::Reg<rc2::Rc2Spec>;
462#[doc = "Register C (channel = 2)"]
463pub mod rc2;
464#[doc = "SR2 (r) register accessor: Status Register (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sr2`]
465module"]
466#[doc(alias = "SR2")]
467pub type Sr2 = crate::Reg<sr2::Sr2Spec>;
468#[doc = "Status Register (channel = 2)"]
469pub mod sr2;
470#[doc = "IER2 (w) register accessor: Interrupt Enable Register (channel = 2)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ier2`]
471module"]
472#[doc(alias = "IER2")]
473pub type Ier2 = crate::Reg<ier2::Ier2Spec>;
474#[doc = "Interrupt Enable Register (channel = 2)"]
475pub mod ier2;
476#[doc = "IDR2 (w) register accessor: Interrupt Disable Register (channel = 2)\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idr2`]
477module"]
478#[doc(alias = "IDR2")]
479pub type Idr2 = crate::Reg<idr2::Idr2Spec>;
480#[doc = "Interrupt Disable Register (channel = 2)"]
481pub mod idr2;
482#[doc = "IMR2 (r) register accessor: Interrupt Mask Register (channel = 2)\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr2`]
483module"]
484#[doc(alias = "IMR2")]
485pub type Imr2 = crate::Reg<imr2::Imr2Spec>;
486#[doc = "Interrupt Mask Register (channel = 2)"]
487pub mod imr2;
488#[doc = "BCR (w) register accessor: Block Control Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bcr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bcr`]
489module"]
490#[doc(alias = "BCR")]
491pub type Bcr = crate::Reg<bcr::BcrSpec>;
492#[doc = "Block Control Register"]
493pub mod bcr;
494#[doc = "BMR (rw) register accessor: Block Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bmr`]
495module"]
496#[doc(alias = "BMR")]
497pub type Bmr = crate::Reg<bmr::BmrSpec>;
498#[doc = "Block Mode Register"]
499pub mod bmr;
500#[doc = "QIER (w) register accessor: QDEC Interrupt Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qier::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qier`]
501module"]
502#[doc(alias = "QIER")]
503pub type Qier = crate::Reg<qier::QierSpec>;
504#[doc = "QDEC Interrupt Enable Register"]
505pub mod qier;
506#[doc = "QIDR (w) register accessor: QDEC Interrupt Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qidr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qidr`]
507module"]
508#[doc(alias = "QIDR")]
509pub type Qidr = crate::Reg<qidr::QidrSpec>;
510#[doc = "QDEC Interrupt Disable Register"]
511pub mod qidr;
512#[doc = "QIMR (r) register accessor: QDEC Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qimr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qimr`]
513module"]
514#[doc(alias = "QIMR")]
515pub type Qimr = crate::Reg<qimr::QimrSpec>;
516#[doc = "QDEC Interrupt Mask Register"]
517pub mod qimr;
518#[doc = "QISR (r) register accessor: QDEC Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qisr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qisr`]
519module"]
520#[doc(alias = "QISR")]
521pub type Qisr = crate::Reg<qisr::QisrSpec>;
522#[doc = "QDEC Interrupt Status Register"]
523pub mod qisr;
524#[doc = "WPMR (rw) register accessor: Write Protection Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wpmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wpmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wpmr`]
525module"]
526#[doc(alias = "WPMR")]
527pub type Wpmr = crate::Reg<wpmr::WpmrSpec>;
528#[doc = "Write Protection Mode Register"]
529pub mod wpmr;