atsam3n1a/efc/
fmr.rs

1#[doc = "Register `FMR` reader"]
2pub type R = crate::R<FmrSpec>;
3#[doc = "Register `FMR` writer"]
4pub type W = crate::W<FmrSpec>;
5#[doc = "Field `FRDY` reader - Ready Interrupt Enable"]
6pub type FrdyR = crate::BitReader;
7#[doc = "Field `FRDY` writer - Ready Interrupt Enable"]
8pub type FrdyW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `FWS` reader - Flash Wait State"]
10pub type FwsR = crate::FieldReader;
11#[doc = "Field `FWS` writer - Flash Wait State"]
12pub type FwsW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `SCOD` reader - Sequential Code Optimization Disable"]
14pub type ScodR = crate::BitReader;
15#[doc = "Field `SCOD` writer - Sequential Code Optimization Disable"]
16pub type ScodW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `FAM` reader - Flash Access Mode"]
18pub type FamR = crate::BitReader;
19#[doc = "Field `FAM` writer - Flash Access Mode"]
20pub type FamW<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bit 0 - Ready Interrupt Enable"]
23    #[inline(always)]
24    pub fn frdy(&self) -> FrdyR {
25        FrdyR::new((self.bits & 1) != 0)
26    }
27    #[doc = "Bits 8:11 - Flash Wait State"]
28    #[inline(always)]
29    pub fn fws(&self) -> FwsR {
30        FwsR::new(((self.bits >> 8) & 0x0f) as u8)
31    }
32    #[doc = "Bit 16 - Sequential Code Optimization Disable"]
33    #[inline(always)]
34    pub fn scod(&self) -> ScodR {
35        ScodR::new(((self.bits >> 16) & 1) != 0)
36    }
37    #[doc = "Bit 24 - Flash Access Mode"]
38    #[inline(always)]
39    pub fn fam(&self) -> FamR {
40        FamR::new(((self.bits >> 24) & 1) != 0)
41    }
42}
43impl W {
44    #[doc = "Bit 0 - Ready Interrupt Enable"]
45    #[inline(always)]
46    #[must_use]
47    pub fn frdy(&mut self) -> FrdyW<FmrSpec> {
48        FrdyW::new(self, 0)
49    }
50    #[doc = "Bits 8:11 - Flash Wait State"]
51    #[inline(always)]
52    #[must_use]
53    pub fn fws(&mut self) -> FwsW<FmrSpec> {
54        FwsW::new(self, 8)
55    }
56    #[doc = "Bit 16 - Sequential Code Optimization Disable"]
57    #[inline(always)]
58    #[must_use]
59    pub fn scod(&mut self) -> ScodW<FmrSpec> {
60        ScodW::new(self, 16)
61    }
62    #[doc = "Bit 24 - Flash Access Mode"]
63    #[inline(always)]
64    #[must_use]
65    pub fn fam(&mut self) -> FamW<FmrSpec> {
66        FamW::new(self, 24)
67    }
68}
69#[doc = "EEFC Flash Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fmr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
70pub struct FmrSpec;
71impl crate::RegisterSpec for FmrSpec {
72    type Ux = u32;
73}
74#[doc = "`read()` method returns [`fmr::R`](R) reader structure"]
75impl crate::Readable for FmrSpec {}
76#[doc = "`write(|w| ..)` method takes [`fmr::W`](W) writer structure"]
77impl crate::Writable for FmrSpec {
78    type Safety = crate::Unsafe;
79    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
80    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
81}
82#[doc = "`reset()` method sets FMR to value 0"]
83impl crate::Resettable for FmrSpec {
84    const RESET_VALUE: u32 = 0;
85}
atsam3n1a/efc/fmr.rs

atsam3n1a/efc/
fmr.rs
