1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 per: Per,
5 pdr: Pdr,
6 psr: Psr,
7 _reserved3: [u8; 0x04],
8 oer: Oer,
9 odr: Odr,
10 osr: Osr,
11 _reserved6: [u8; 0x04],
12 ifer: Ifer,
13 ifdr: Ifdr,
14 ifsr: Ifsr,
15 _reserved9: [u8; 0x04],
16 sodr: Sodr,
17 codr: Codr,
18 odsr: Odsr,
19 pdsr: Pdsr,
20 ier: Ier,
21 idr: Idr,
22 imr: Imr,
23 isr: Isr,
24 mder: Mder,
25 mddr: Mddr,
26 mdsr: Mdsr,
27 _reserved20: [u8; 0x04],
28 pudr: Pudr,
29 puer: Puer,
30 pusr: Pusr,
31 _reserved23: [u8; 0x04],
32 abcdsr0: Abcdsr0,
33 abcdsr1: Abcdsr1,
34 _reserved25: [u8; 0x08],
35 ifscdr: Ifscdr,
36 ifscer: Ifscer,
37 ifscsr: Ifscsr,
38 scdr: Scdr,
39 ppddr: Ppddr,
40 ppder: Ppder,
41 ppdsr: Ppdsr,
42 _reserved32: [u8; 0x04],
43 ower: Ower,
44 owdr: Owdr,
45 owsr: Owsr,
46 _reserved35: [u8; 0x04],
47 aimer: Aimer,
48 aimdr: Aimdr,
49 aimmr: Aimmr,
50 _reserved38: [u8; 0x04],
51 esr: Esr,
52 lsr: Lsr,
53 elsr: Elsr,
54 _reserved41: [u8; 0x04],
55 fellsr: Fellsr,
56 rehlsr: Rehlsr,
57 frlhsr: Frlhsr,
58 _reserved44: [u8; 0x04],
59 locksr: Locksr,
60 wpmr: Wpmr,
61 wpsr: Wpsr,
62 _reserved47: [u8; 0x14],
63 schmitt: Schmitt,
64}
65impl RegisterBlock {
66 #[doc = "0x00 - PIO Enable Register"]
67 #[inline(always)]
68 pub const fn per(&self) -> &Per {
69 &self.per
70 }
71 #[doc = "0x04 - PIO Disable Register"]
72 #[inline(always)]
73 pub const fn pdr(&self) -> &Pdr {
74 &self.pdr
75 }
76 #[doc = "0x08 - PIO Status Register"]
77 #[inline(always)]
78 pub const fn psr(&self) -> &Psr {
79 &self.psr
80 }
81 #[doc = "0x10 - Output Enable Register"]
82 #[inline(always)]
83 pub const fn oer(&self) -> &Oer {
84 &self.oer
85 }
86 #[doc = "0x14 - Output Disable Register"]
87 #[inline(always)]
88 pub const fn odr(&self) -> &Odr {
89 &self.odr
90 }
91 #[doc = "0x18 - Output Status Register"]
92 #[inline(always)]
93 pub const fn osr(&self) -> &Osr {
94 &self.osr
95 }
96 #[doc = "0x20 - Glitch Input Filter Enable Register"]
97 #[inline(always)]
98 pub const fn ifer(&self) -> &Ifer {
99 &self.ifer
100 }
101 #[doc = "0x24 - Glitch Input Filter Disable Register"]
102 #[inline(always)]
103 pub const fn ifdr(&self) -> &Ifdr {
104 &self.ifdr
105 }
106 #[doc = "0x28 - Glitch Input Filter Status Register"]
107 #[inline(always)]
108 pub const fn ifsr(&self) -> &Ifsr {
109 &self.ifsr
110 }
111 #[doc = "0x30 - Set Output Data Register"]
112 #[inline(always)]
113 pub const fn sodr(&self) -> &Sodr {
114 &self.sodr
115 }
116 #[doc = "0x34 - Clear Output Data Register"]
117 #[inline(always)]
118 pub const fn codr(&self) -> &Codr {
119 &self.codr
120 }
121 #[doc = "0x38 - Output Data Status Register"]
122 #[inline(always)]
123 pub const fn odsr(&self) -> &Odsr {
124 &self.odsr
125 }
126 #[doc = "0x3c - Pin Data Status Register"]
127 #[inline(always)]
128 pub const fn pdsr(&self) -> &Pdsr {
129 &self.pdsr
130 }
131 #[doc = "0x40 - Interrupt Enable Register"]
132 #[inline(always)]
133 pub const fn ier(&self) -> &Ier {
134 &self.ier
135 }
136 #[doc = "0x44 - Interrupt Disable Register"]
137 #[inline(always)]
138 pub const fn idr(&self) -> &Idr {
139 &self.idr
140 }
141 #[doc = "0x48 - Interrupt Mask Register"]
142 #[inline(always)]
143 pub const fn imr(&self) -> &Imr {
144 &self.imr
145 }
146 #[doc = "0x4c - Interrupt Status Register"]
147 #[inline(always)]
148 pub const fn isr(&self) -> &Isr {
149 &self.isr
150 }
151 #[doc = "0x50 - Multi-driver Enable Register"]
152 #[inline(always)]
153 pub const fn mder(&self) -> &Mder {
154 &self.mder
155 }
156 #[doc = "0x54 - Multi-driver Disable Register"]
157 #[inline(always)]
158 pub const fn mddr(&self) -> &Mddr {
159 &self.mddr
160 }
161 #[doc = "0x58 - Multi-driver Status Register"]
162 #[inline(always)]
163 pub const fn mdsr(&self) -> &Mdsr {
164 &self.mdsr
165 }
166 #[doc = "0x60 - Pull-up Disable Register"]
167 #[inline(always)]
168 pub const fn pudr(&self) -> &Pudr {
169 &self.pudr
170 }
171 #[doc = "0x64 - Pull-up Enable Register"]
172 #[inline(always)]
173 pub const fn puer(&self) -> &Puer {
174 &self.puer
175 }
176 #[doc = "0x68 - Pad Pull-up Status Register"]
177 #[inline(always)]
178 pub const fn pusr(&self) -> &Pusr {
179 &self.pusr
180 }
181 #[doc = "0x70 - Peripheral Select Register 0"]
182 #[inline(always)]
183 pub const fn abcdsr0(&self) -> &Abcdsr0 {
184 &self.abcdsr0
185 }
186 #[doc = "0x74 - Peripheral Select Register 1"]
187 #[inline(always)]
188 pub const fn abcdsr1(&self) -> &Abcdsr1 {
189 &self.abcdsr1
190 }
191 #[doc = "0x80 - Input Filter Slow Clock Disable Register"]
192 #[inline(always)]
193 pub const fn ifscdr(&self) -> &Ifscdr {
194 &self.ifscdr
195 }
196 #[doc = "0x84 - Input Filter Slow Clock Enable Register"]
197 #[inline(always)]
198 pub const fn ifscer(&self) -> &Ifscer {
199 &self.ifscer
200 }
201 #[doc = "0x88 - Input Filter Slow Clock Status Register"]
202 #[inline(always)]
203 pub const fn ifscsr(&self) -> &Ifscsr {
204 &self.ifscsr
205 }
206 #[doc = "0x8c - Slow Clock Divider Debouncing Register"]
207 #[inline(always)]
208 pub const fn scdr(&self) -> &Scdr {
209 &self.scdr
210 }
211 #[doc = "0x90 - Pad Pull-down Disable Register"]
212 #[inline(always)]
213 pub const fn ppddr(&self) -> &Ppddr {
214 &self.ppddr
215 }
216 #[doc = "0x94 - Pad Pull-down Enable Register"]
217 #[inline(always)]
218 pub const fn ppder(&self) -> &Ppder {
219 &self.ppder
220 }
221 #[doc = "0x98 - Pad Pull-down Status Register"]
222 #[inline(always)]
223 pub const fn ppdsr(&self) -> &Ppdsr {
224 &self.ppdsr
225 }
226 #[doc = "0xa0 - Output Write Enable"]
227 #[inline(always)]
228 pub const fn ower(&self) -> &Ower {
229 &self.ower
230 }
231 #[doc = "0xa4 - Output Write Disable"]
232 #[inline(always)]
233 pub const fn owdr(&self) -> &Owdr {
234 &self.owdr
235 }
236 #[doc = "0xa8 - Output Write Status Register"]
237 #[inline(always)]
238 pub const fn owsr(&self) -> &Owsr {
239 &self.owsr
240 }
241 #[doc = "0xb0 - Additional Interrupt Modes Enable Register"]
242 #[inline(always)]
243 pub const fn aimer(&self) -> &Aimer {
244 &self.aimer
245 }
246 #[doc = "0xb4 - Additional Interrupt Modes Disables Register"]
247 #[inline(always)]
248 pub const fn aimdr(&self) -> &Aimdr {
249 &self.aimdr
250 }
251 #[doc = "0xb8 - Additional Interrupt Modes Mask Register"]
252 #[inline(always)]
253 pub const fn aimmr(&self) -> &Aimmr {
254 &self.aimmr
255 }
256 #[doc = "0xc0 - Edge Select Register"]
257 #[inline(always)]
258 pub const fn esr(&self) -> &Esr {
259 &self.esr
260 }
261 #[doc = "0xc4 - Level Select Register"]
262 #[inline(always)]
263 pub const fn lsr(&self) -> &Lsr {
264 &self.lsr
265 }
266 #[doc = "0xc8 - Edge/Level Status Register"]
267 #[inline(always)]
268 pub const fn elsr(&self) -> &Elsr {
269 &self.elsr
270 }
271 #[doc = "0xd0 - Falling Edge/Low Level Select Register"]
272 #[inline(always)]
273 pub const fn fellsr(&self) -> &Fellsr {
274 &self.fellsr
275 }
276 #[doc = "0xd4 - Rising Edge/ High Level Select Register"]
277 #[inline(always)]
278 pub const fn rehlsr(&self) -> &Rehlsr {
279 &self.rehlsr
280 }
281 #[doc = "0xd8 - Fall/Rise - Low/High Status Register"]
282 #[inline(always)]
283 pub const fn frlhsr(&self) -> &Frlhsr {
284 &self.frlhsr
285 }
286 #[doc = "0xe0 - Lock Status"]
287 #[inline(always)]
288 pub const fn locksr(&self) -> &Locksr {
289 &self.locksr
290 }
291 #[doc = "0xe4 - Write Protect Mode Register"]
292 #[inline(always)]
293 pub const fn wpmr(&self) -> &Wpmr {
294 &self.wpmr
295 }
296 #[doc = "0xe8 - Write Protect Status Register"]
297 #[inline(always)]
298 pub const fn wpsr(&self) -> &Wpsr {
299 &self.wpsr
300 }
301 #[doc = "0x100 - Schmitt Trigger Register"]
302 #[inline(always)]
303 pub const fn schmitt(&self) -> &Schmitt {
304 &self.schmitt
305 }
306}
307#[doc = "PER (w) register accessor: PIO Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`per::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@per`]
308module"]
309#[doc(alias = "PER")]
310pub type Per = crate::Reg<per::PerSpec>;
311#[doc = "PIO Enable Register"]
312pub mod per;
313#[doc = "PDR (w) register accessor: PIO Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr`]
314module"]
315#[doc(alias = "PDR")]
316pub type Pdr = crate::Reg<pdr::PdrSpec>;
317#[doc = "PIO Disable Register"]
318pub mod pdr;
319#[doc = "PSR (r) register accessor: PIO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr`]
320module"]
321#[doc(alias = "PSR")]
322pub type Psr = crate::Reg<psr::PsrSpec>;
323#[doc = "PIO Status Register"]
324pub mod psr;
325#[doc = "OER (w) register accessor: Output Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oer::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oer`]
326module"]
327#[doc(alias = "OER")]
328pub type Oer = crate::Reg<oer::OerSpec>;
329#[doc = "Output Enable Register"]
330pub mod oer;
331#[doc = "ODR (w) register accessor: Output Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`odr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@odr`]
332module"]
333#[doc(alias = "ODR")]
334pub type Odr = crate::Reg<odr::OdrSpec>;
335#[doc = "Output Disable Register"]
336pub mod odr;
337#[doc = "OSR (r) register accessor: Output Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osr`]
338module"]
339#[doc(alias = "OSR")]
340pub type Osr = crate::Reg<osr::OsrSpec>;
341#[doc = "Output Status Register"]
342pub mod osr;
343#[doc = "IFER (w) register accessor: Glitch Input Filter Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ifer::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ifer`]
344module"]
345#[doc(alias = "IFER")]
346pub type Ifer = crate::Reg<ifer::IferSpec>;
347#[doc = "Glitch Input Filter Enable Register"]
348pub mod ifer;
349#[doc = "IFDR (w) register accessor: Glitch Input Filter Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ifdr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ifdr`]
350module"]
351#[doc(alias = "IFDR")]
352pub type Ifdr = crate::Reg<ifdr::IfdrSpec>;
353#[doc = "Glitch Input Filter Disable Register"]
354pub mod ifdr;
355#[doc = "IFSR (r) register accessor: Glitch Input Filter Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ifsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ifsr`]
356module"]
357#[doc(alias = "IFSR")]
358pub type Ifsr = crate::Reg<ifsr::IfsrSpec>;
359#[doc = "Glitch Input Filter Status Register"]
360pub mod ifsr;
361#[doc = "SODR (w) register accessor: Set Output Data Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sodr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sodr`]
362module"]
363#[doc(alias = "SODR")]
364pub type Sodr = crate::Reg<sodr::SodrSpec>;
365#[doc = "Set Output Data Register"]
366pub mod sodr;
367#[doc = "CODR (w) register accessor: Clear Output Data Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`codr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@codr`]
368module"]
369#[doc(alias = "CODR")]
370pub type Codr = crate::Reg<codr::CodrSpec>;
371#[doc = "Clear Output Data Register"]
372pub mod codr;
373#[doc = "ODSR (rw) register accessor: Output Data Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`odsr::R`]. You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`odsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@odsr`]
374module"]
375#[doc(alias = "ODSR")]
376pub type Odsr = crate::Reg<odsr::OdsrSpec>;
377#[doc = "Output Data Status Register"]
378pub mod odsr;
379#[doc = "PDSR (r) register accessor: Pin Data Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdsr`]
380module"]
381#[doc(alias = "PDSR")]
382pub type Pdsr = crate::Reg<pdsr::PdsrSpec>;
383#[doc = "Pin Data Status Register"]
384pub mod pdsr;
385#[doc = "IER (w) register accessor: Interrupt Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ier`]
386module"]
387#[doc(alias = "IER")]
388pub type Ier = crate::Reg<ier::IerSpec>;
389#[doc = "Interrupt Enable Register"]
390pub mod ier;
391#[doc = "IDR (w) register accessor: Interrupt Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idr`]
392module"]
393#[doc(alias = "IDR")]
394pub type Idr = crate::Reg<idr::IdrSpec>;
395#[doc = "Interrupt Disable Register"]
396pub mod idr;
397#[doc = "IMR (r) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@imr`]
398module"]
399#[doc(alias = "IMR")]
400pub type Imr = crate::Reg<imr::ImrSpec>;
401#[doc = "Interrupt Mask Register"]
402pub mod imr;
403#[doc = "ISR (r) register accessor: Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@isr`]
404module"]
405#[doc(alias = "ISR")]
406pub type Isr = crate::Reg<isr::IsrSpec>;
407#[doc = "Interrupt Status Register"]
408pub mod isr;
409#[doc = "MDER (w) register accessor: Multi-driver Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mder::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mder`]
410module"]
411#[doc(alias = "MDER")]
412pub type Mder = crate::Reg<mder::MderSpec>;
413#[doc = "Multi-driver Enable Register"]
414pub mod mder;
415#[doc = "MDDR (w) register accessor: Multi-driver Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mddr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mddr`]
416module"]
417#[doc(alias = "MDDR")]
418pub type Mddr = crate::Reg<mddr::MddrSpec>;
419#[doc = "Multi-driver Disable Register"]
420pub mod mddr;
421#[doc = "MDSR (r) register accessor: Multi-driver Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mdsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mdsr`]
422module"]
423#[doc(alias = "MDSR")]
424pub type Mdsr = crate::Reg<mdsr::MdsrSpec>;
425#[doc = "Multi-driver Status Register"]
426pub mod mdsr;
427#[doc = "PUDR (w) register accessor: Pull-up Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pudr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pudr`]
428module"]
429#[doc(alias = "PUDR")]
430pub type Pudr = crate::Reg<pudr::PudrSpec>;
431#[doc = "Pull-up Disable Register"]
432pub mod pudr;
433#[doc = "PUER (w) register accessor: Pull-up Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`puer::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@puer`]
434module"]
435#[doc(alias = "PUER")]
436pub type Puer = crate::Reg<puer::PuerSpec>;
437#[doc = "Pull-up Enable Register"]
438pub mod puer;
439#[doc = "PUSR (r) register accessor: Pad Pull-up Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pusr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pusr`]
440module"]
441#[doc(alias = "PUSR")]
442pub type Pusr = crate::Reg<pusr::PusrSpec>;
443#[doc = "Pad Pull-up Status Register"]
444pub mod pusr;
445#[doc = "ABCDSR0 (rw) register accessor: Peripheral Select Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`abcdsr0::R`]. You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`abcdsr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@abcdsr0`]
446module"]
447#[doc(alias = "ABCDSR0")]
448pub type Abcdsr0 = crate::Reg<abcdsr0::Abcdsr0Spec>;
449#[doc = "Peripheral Select Register 0"]
450pub mod abcdsr0;
451#[doc = "ABCDSR1 (rw) register accessor: Peripheral Select Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`abcdsr1::R`]. You can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`abcdsr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@abcdsr1`]
452module"]
453#[doc(alias = "ABCDSR1")]
454pub type Abcdsr1 = crate::Reg<abcdsr1::Abcdsr1Spec>;
455#[doc = "Peripheral Select Register 1"]
456pub mod abcdsr1;
457#[doc = "IFSCDR (w) register accessor: Input Filter Slow Clock Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ifscdr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ifscdr`]
458module"]
459#[doc(alias = "IFSCDR")]
460pub type Ifscdr = crate::Reg<ifscdr::IfscdrSpec>;
461#[doc = "Input Filter Slow Clock Disable Register"]
462pub mod ifscdr;
463#[doc = "IFSCER (w) register accessor: Input Filter Slow Clock Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ifscer::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ifscer`]
464module"]
465#[doc(alias = "IFSCER")]
466pub type Ifscer = crate::Reg<ifscer::IfscerSpec>;
467#[doc = "Input Filter Slow Clock Enable Register"]
468pub mod ifscer;
469#[doc = "IFSCSR (r) register accessor: Input Filter Slow Clock Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ifscsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ifscsr`]
470module"]
471#[doc(alias = "IFSCSR")]
472pub type Ifscsr = crate::Reg<ifscsr::IfscsrSpec>;
473#[doc = "Input Filter Slow Clock Status Register"]
474pub mod ifscsr;
475#[doc = "SCDR (rw) register accessor: Slow Clock Divider Debouncing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scdr`]
476module"]
477#[doc(alias = "SCDR")]
478pub type Scdr = crate::Reg<scdr::ScdrSpec>;
479#[doc = "Slow Clock Divider Debouncing Register"]
480pub mod scdr;
481#[doc = "PPDDR (w) register accessor: Pad Pull-down Disable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ppddr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppddr`]
482module"]
483#[doc(alias = "PPDDR")]
484pub type Ppddr = crate::Reg<ppddr::PpddrSpec>;
485#[doc = "Pad Pull-down Disable Register"]
486pub mod ppddr;
487#[doc = "PPDER (w) register accessor: Pad Pull-down Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ppder::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppder`]
488module"]
489#[doc(alias = "PPDER")]
490pub type Ppder = crate::Reg<ppder::PpderSpec>;
491#[doc = "Pad Pull-down Enable Register"]
492pub mod ppder;
493#[doc = "PPDSR (r) register accessor: Pad Pull-down Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ppdsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppdsr`]
494module"]
495#[doc(alias = "PPDSR")]
496pub type Ppdsr = crate::Reg<ppdsr::PpdsrSpec>;
497#[doc = "Pad Pull-down Status Register"]
498pub mod ppdsr;
499#[doc = "OWER (w) register accessor: Output Write Enable\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ower::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ower`]
500module"]
501#[doc(alias = "OWER")]
502pub type Ower = crate::Reg<ower::OwerSpec>;
503#[doc = "Output Write Enable"]
504pub mod ower;
505#[doc = "OWDR (w) register accessor: Output Write Disable\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`owdr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@owdr`]
506module"]
507#[doc(alias = "OWDR")]
508pub type Owdr = crate::Reg<owdr::OwdrSpec>;
509#[doc = "Output Write Disable"]
510pub mod owdr;
511#[doc = "OWSR (r) register accessor: Output Write Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`owsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@owsr`]
512module"]
513#[doc(alias = "OWSR")]
514pub type Owsr = crate::Reg<owsr::OwsrSpec>;
515#[doc = "Output Write Status Register"]
516pub mod owsr;
517#[doc = "AIMER (w) register accessor: Additional Interrupt Modes Enable Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aimer::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aimer`]
518module"]
519#[doc(alias = "AIMER")]
520pub type Aimer = crate::Reg<aimer::AimerSpec>;
521#[doc = "Additional Interrupt Modes Enable Register"]
522pub mod aimer;
523#[doc = "AIMDR (w) register accessor: Additional Interrupt Modes Disables Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aimdr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aimdr`]
524module"]
525#[doc(alias = "AIMDR")]
526pub type Aimdr = crate::Reg<aimdr::AimdrSpec>;
527#[doc = "Additional Interrupt Modes Disables Register"]
528pub mod aimdr;
529#[doc = "AIMMR (r) register accessor: Additional Interrupt Modes Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aimmr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aimmr`]
530module"]
531#[doc(alias = "AIMMR")]
532pub type Aimmr = crate::Reg<aimmr::AimmrSpec>;
533#[doc = "Additional Interrupt Modes Mask Register"]
534pub mod aimmr;
535#[doc = "ESR (w) register accessor: Edge Select Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`esr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@esr`]
536module"]
537#[doc(alias = "ESR")]
538pub type Esr = crate::Reg<esr::EsrSpec>;
539#[doc = "Edge Select Register"]
540pub mod esr;
541#[doc = "LSR (w) register accessor: Level Select Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lsr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lsr`]
542module"]
543#[doc(alias = "LSR")]
544pub type Lsr = crate::Reg<lsr::LsrSpec>;
545#[doc = "Level Select Register"]
546pub mod lsr;
547#[doc = "ELSR (r) register accessor: Edge/Level Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`elsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@elsr`]
548module"]
549#[doc(alias = "ELSR")]
550pub type Elsr = crate::Reg<elsr::ElsrSpec>;
551#[doc = "Edge/Level Status Register"]
552pub mod elsr;
553#[doc = "FELLSR (w) register accessor: Falling Edge/Low Level Select Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fellsr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fellsr`]
554module"]
555#[doc(alias = "FELLSR")]
556pub type Fellsr = crate::Reg<fellsr::FellsrSpec>;
557#[doc = "Falling Edge/Low Level Select Register"]
558pub mod fellsr;
559#[doc = "REHLSR (w) register accessor: Rising Edge/ High Level Select Register\n\nYou can [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rehlsr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rehlsr`]
560module"]
561#[doc(alias = "REHLSR")]
562pub type Rehlsr = crate::Reg<rehlsr::RehlsrSpec>;
563#[doc = "Rising Edge/ High Level Select Register"]
564pub mod rehlsr;
565#[doc = "FRLHSR (r) register accessor: Fall/Rise - Low/High Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`frlhsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@frlhsr`]
566module"]
567#[doc(alias = "FRLHSR")]
568pub type Frlhsr = crate::Reg<frlhsr::FrlhsrSpec>;
569#[doc = "Fall/Rise - Low/High Status Register"]
570pub mod frlhsr;
571#[doc = "LOCKSR (r) register accessor: Lock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`locksr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@locksr`]
572module"]
573#[doc(alias = "LOCKSR")]
574pub type Locksr = crate::Reg<locksr::LocksrSpec>;
575#[doc = "Lock Status"]
576pub mod locksr;
577#[doc = "WPMR (rw) register accessor: Write Protect Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wpmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wpmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wpmr`]
578module"]
579#[doc(alias = "WPMR")]
580pub type Wpmr = crate::Reg<wpmr::WpmrSpec>;
581#[doc = "Write Protect Mode Register"]
582pub mod wpmr;
583#[doc = "WPSR (r) register accessor: Write Protect Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wpsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wpsr`]
584module"]
585#[doc(alias = "WPSR")]
586pub type Wpsr = crate::Reg<wpsr::WpsrSpec>;
587#[doc = "Write Protect Status Register"]
588pub mod wpsr;
589#[doc = "SCHMITT (rw) register accessor: Schmitt Trigger Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`schmitt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`schmitt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@schmitt`]
590module"]
591#[doc(alias = "SCHMITT")]
592pub type Schmitt = crate::Reg<schmitt::SchmittSpec>;
593#[doc = "Schmitt Trigger Register"]
594pub mod schmitt;