Expand description

Atomic operations on potentially uninitialized integers.

Motivation

Copying types containing uninitialized bytes (e.g., padding), via the standard library’s atomic types is undefined behavior because the copy goes through integers.

This crate provides a way to soundly perform such operations.

Platform Support

Currently, x86, x86_64, ARM (v6+), AArch64, RISC-V, MIPS32r2, MIPS64r2, PowerPC, s390x, and MSP430 are supported.

target_archprimitivesload/storeswapCAS
x86isize,usize,i8,u8,i16,u16,i32,u32,i64,u64
x86_64isize,usize,i8,u8,i16,u16,i32,u32,i64,u64
x86_64 (+cmpxchg16b)i128,u128
arm (v6+)isize,usize,i8,u8,i16,u16,i32,u32✓[1]✓[1]
arm (v6 except v6-m, v7-a+) [2]i64,u64
aarch64isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128
riscv32isize,usize,i8,u8,i16,u16,i32,u32✓[1]✓[1]
riscv64isize,usize,i8,u8,i16,u16,i32,u32,i64,u64✓[1]✓[1]
mips [3]isize,usize,i8,u8,i16,u16,i32,u32
mips64 [3]isize,usize,i8,u8,i16,u16,i32,u32,i64,u64
powerpc [3]isize,usize,i8,u8,i16,u16,i32,u32
powerpc64 [3]isize,usize,i8,u8,i16,u16,i32,u32,i64,u64
powerpc64 (pwr8+) [3] [4]i128,u128
s390x [3]isize,usize,i8,u8,i16,u16,i32,u32,i64,u64,i128,u128
msp430 [3]isize,usize,i8,u8,i16,u16

[1] ARM’s atomic RMW operations are not available on v6-m (thumbv6m). RISC-V’s atomic RMW operations are not available on targets without the A (or G which means IMAFD) extension such as riscv32i, riscv32imc, etc.
[2] ARMv6 except ARMv6-M, ARMv7+ with A-profile
[3] Requires nightly due to #![feature(asm_experimental_arch)].
[4] target-cpu pwr8, pwr9, or pwr10. powerpc64le is pwr8 by default.

Feel free to submit an issue if your target is not supported yet.

Modules

Low level API.

Structs

A potentially uninitialized integer type which can be safely shared between threads.