at32f4xx_pac/at32f405/acc/
ctrl2.rs

1#[doc = "Register `CTRL2` reader"]
2pub type R = crate::R<CTRL2_SPEC>;
3#[doc = "Register `CTRL2` writer"]
4pub type W = crate::W<CTRL2_SPEC>;
5#[doc = "Field `HICKCAL` reader - Internal high-speed auto clock calibration"]
6pub type HICKCAL_R = crate::FieldReader;
7#[doc = "Field `HICKTRIM` reader - Internal high-speed auto clock trimming"]
8pub type HICKTRIM_R = crate::FieldReader;
9impl R {
10    #[doc = "Bits 0:7 - Internal high-speed auto clock calibration"]
11    #[inline(always)]
12    pub fn hickcal(&self) -> HICKCAL_R {
13        HICKCAL_R::new((self.bits & 0xff) as u8)
14    }
15    #[doc = "Bits 8:13 - Internal high-speed auto clock trimming"]
16    #[inline(always)]
17    pub fn hicktrim(&self) -> HICKTRIM_R {
18        HICKTRIM_R::new(((self.bits >> 8) & 0x3f) as u8)
19    }
20}
21impl core::fmt::Debug for R {
22    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
23        f.debug_struct("CTRL2")
24            .field("hicktrim", &self.hicktrim())
25            .field("hickcal", &self.hickcal())
26            .finish()
27    }
28}
29impl W {}
30#[doc = "control register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
31pub struct CTRL2_SPEC;
32impl crate::RegisterSpec for CTRL2_SPEC {
33    type Ux = u32;
34}
35#[doc = "`read()` method returns [`ctrl2::R`](R) reader structure"]
36impl crate::Readable for CTRL2_SPEC {}
37#[doc = "`write(|w| ..)` method takes [`ctrl2::W`](W) writer structure"]
38impl crate::Writable for CTRL2_SPEC {
39    type Safety = crate::Unsafe;
40    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
41    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42}
43#[doc = "`reset()` method sets CTRL2 to value 0x2080"]
44impl crate::Resettable for CTRL2_SPEC {
45    const RESET_VALUE: u32 = 0x2080;
46}
at32f4xx_pac/at32f405/acc/ctrl2.rs

at32f4xx_pac/at32f405/acc/
ctrl2.rs
