pub struct InstructionStream<'a> { /* private fields */ }
Expand description

An instruction stream.

Has functions for writing x64 instructions, organized by mnemonic and the parameters they need.

When finished, call finish().

When writing 8-bit Jcc (JMP and conditional JMP instructions), a ShortJmpResult is returned in error if the target effective address could be resolved and its displacement exceeds the size of an i8. In this case, the instruction stream is rolled back to point to just before where the instruction started to be emitted. Use this result to try to make a 8-bit JMP and then replace it with a 32-bit one if an error occurs.

Note that unresolved labels (ie those yet to be attached to a location in the instruction stream) will not produce such an error. Instead a panic (in debug builds) or silent error will occur when finish() is called.

Implementations

Resolves all remaining labels and makes code executable.

Will panic in debug builds if labels can not be resolved, 8-bit JMPs are too far away or 32-bit JMPs have displacements of more than 2Gb!

Returns a slice containing just the instructions encoded; useful for testing or for dumping to a file; and hints to use for the next instance.

Creates an unique label and uses it to label the current location.

Creates an unique label, scoped to this instance of the Instruction Stream.

The label is created unattached.

Labels the current location.

It is an error to use the same label to label more than one location (or to label the current location with the same label twice or more).

This only checked for in debug builds where it causes a runtime panic.

Labels should be created using self.create_label(); no checks are made for labels created with another instance and attached to this one.

Emits the 64-bit value of a label at the current location.

Typically used when build jump tables.

It is an error to use the same label to label more than one location (or to label the current location with the same label twice or more).

This only checked for in debug builds where it causes a runtime panic.

Labels should be created using self.create_label(); no checks are made for labels created with another instance and attached to this one.

Emits a non-leaf function prologue suitable for both the System V Application Binary Interface for AMD64 and the Microsoft x64 Calling Convention.

Emits a non-leaf function epilogue (which returns) suitable for both the System V Application Binary Interface for AMD64 and the Microsoft x64 Calling Convention.

Zeroes the RAX register using the most efficient code (XOR RAX, RAX, although could just as easily be SUB RAX, RAX).

Also equivalent to a C _Bool’s false value.

Sets the RAX register to be equivalent to a C _Bool’s false value using the most efficient code (MOV AL, 0x00).

Note that this is not necessarily 0x00000000_00000001, just that the bottom eight bits of RAX are 0x00.

Sets the RAX register to be equivalent to a C _Bool’s true value using the most efficient code (MOV AL, 0x01).

Note that this is not necessarily 0x00000000_00000001, just that the bottom eight bits of RAX are 0x01.

Creates a function pointer to the current location that takes no arguments and returns a result of type R.

Resultant function will not execute (and in all likelihood cause an uncaught signal to occur) until self.finish() is called.

Creates a function pointer to the current location that takes one argument of type A and returns a result of type R.

Resultant function will not execute (and in all likelihood cause an uncaught signal to occur) until self.finish() is called.

Creates a function pointer to the current location that takes two argument of types A and B and returns a result of type R.

Resultant function will not execute (and in all likelihood cause an uncaught signal to occur) until self.finish() is called.

Creates a function pointer to the current location that takes three argument of types A, B and C and returns a result of type R.

Resultant function will not execute (and in all likelihood cause an uncaught signal to occur) until self.finish() is called.

Creates a function pointer to the current location that takes four argument of types A, B, C and D and returns a result of type R.

Resultant function will not execute (and in all likelihood cause an uncaught signal to occur) until self.finish() is called.

Creates a function pointer to the current location that takes five argument of types A, B, C, D and E and returns a result of type R.

Resultant function will not execute (and in all likelihood cause an uncaught signal to occur) until self.finish() is called.

Creates a function pointer to the current location that takes six argument of types A, B, C, D, E and F and returns a result of type R.

Resultant function will not execute (and in all likelihood cause an uncaught signal to occur) until self.finish() is called.

Emits (pushes) a byte into the instruction stream at the current location.

The byte can be data or instructions.

Emits (pushes) a word (2 bytes) into the instruction stream at the current location.

The word can be data or instructions.

The word will be swapped into the little endian form (a no-op on x64 platforms).

Emits (pushes) a double word (4 bytes) into the instruction stream at the current location.

The word can be data or instructions.

The word will be swapped into the little endian form (a no-op on x64 platforms).

Emits (pushes) a quad word (8 bytes) into the instruction stream at the current location.

The word can be data or instructions.

The word will be swapped into the little endian form (a no-op on x64 platforms).

Emits (pushes) a double quad word (16 bytes) into the instruction stream at the current location.

The word can be data or instructions.

The word will be swapped into the little endian form (a no-op on x64 platforms).

Emits (pushes) zero or more bytes into the instruction stream at the current location.

Bytes can be data or instructions.

Rewinds by the length of a byte (1 byte) and then emits byte.

Rewinds by the length of a double word (4 bytes) and then emits double_word.

Skips over zero or more count bytes in the instruction stream at the current location.

Emits (pushes) NOPs (No Operation) opcodes into the instruction stream at the current location to ensure the desired alignment.

Efficient for alignments up to 32 (needed for AVX-2).

Emits (pushes) NOPs (No Operation) opcodes into the instruction stream at the current location to ensure the desired alignment.

Efficient for alignments up to 32 (needed for AVX-2).

The current instruction pointer.

The location of the start of instructions.

Attempts to calculate a Jump destination which uses an index register and scale but an absolute offset from address 0.

Typically used for when building jump tables and for other uses of ‘computed jumps’ (also known as indirect branches, indirect jumps and register-indirect jumps).

Will try to use a form that does not need a register first (See Agner Fog’s Optimizing Volume 2 (Optimizing subroutines in assembly language) § 3.3 Addressing Modes - Addressing static arrays in 64 bit mode, Example 3.11b).

If this is not possible, then falls back to Agner Fog’s Optimizing Volume 2 (Optimizing subroutines in assembly language) § 3.3 Addressing Modes - Addressing static arrays in 64 bit mode, Example 3.11c using the value in base_register_holding_start_of_instructions_pointer.

A typically register to use for base_register_holding_start_of_instructions_pointer would be RBX.

The fallback approach will panic if base_register_holding_start_of_instructions_pointer is None, or if the required Jump is more than 2Gb relatively (unlikely).

Ideally, make sure the argument allocate_in_first_2Gb to ExecutableAnonymousMemoryMap::new() is true (or test that the start of instructions is below 0x80000000 (2^31 bytes)) and then base_register_holding_start_of_instructions_pointer can be None safely.

Typically used for when trying to reference static (global) arrays in memory using an index with instructions such as MOV or VPTEST.

Can be used with jmp_Any64BitMemory(), but only if the start of the jump table is known in advance.

If it is not, use the method jmp_Any64BitMemory_accounting_for_first_2Gb().

The result is only valid as long as an instruction is not written into this instruction stream.

Will try to use a form that does not need a register first (See Agner Fog’s Optimizing Volume 2 (Optimizing subroutines in assembly language) § 3.3 Addressing Modes - Addressing static arrays in 64 bit mode, Example 3.11b).

If this is not possible, then falls back to Agner Fog’s Optimizing Volume 2 (Optimizing subroutines in assembly language) § 3.3 Addressing Modes - Addressing static arrays in 64 bit mode, Example 3.11c using the value in base_register_holding_start_of_instructions_pointer.

A typically register to use for base_register_holding_start_of_instructions_pointer would be RBX.

The fallback approach will panic if the required Jump is more than 2Gb relatively (unlikely).

If the result is None, one can apply Agner Fog’s Optimizing Volume 2 (Optimizing subroutines in assembly language) § 3.3 Addressing Modes - Addressing static arrays in 64 bit mode, Example 3.11e (this will require a LEA Register, [array_location_in_memory] prior to this instruction).

Ideally, make sure the argument allocate_in_first_2Gb to ExecutableAnonymousMemoryMap::new() is true (or test that the start of instructions is below 0x80000000 (2^31 bytes)) and then base_register_holding_start_of_instructions_pointer can be None safely.

Use as follows with Memory::relative_instruction_pointer_relative():-

instruction_stream.vmovdqa_YMM_Any256BitMemory(ymm_register, Any256BitMemory::relative_instruction_pointer_relative());
instruction_stream.overwrite_last_displacement_with_relative_address_to(absolute_address);

Will panic in debug builds if the required displacement is more than 2Gb (such a displacement is extremely unlikely).

Emits a block of a fixed size (blocks are padded to the desired size).

Panics in debug builds if the block is too large.

Typically used for jump table blocks.

Size is actually specified as a scale (power of two); use a u8 or IndexScale.

Add with carry imm8 to AL.

Add with carry imm16 to AX.

Add with carry imm32 to EAX.

Add with carry imm16 to r/m16.

Add with Carry Flag (CF) sign-extended imm8 to r/m16.

Add with carry r16 to r/m16.

Add with Carry Flag (CF) imm32 to r/m32.

Add with Carry Flag (CF) sign-extended imm8 into r/m32.

Add with Carry Flag (CF) r32 to r/m32.

Add with Carry Flag (CF) imm32 sign extended to 64-bits to r/m64.

Add with Carry Flag (CF) sign-extended imm8 into r/m64.

Add with Carry Flag (CF) r64 to r/m64.

Add with carry imm8 to r/m8.

Add with carry byte register to r/m8.

Add with carry byte register to r/m8.

Add with carry imm16 to r/m16.

Add with Carry Flag (CF) sign-extended imm8 to r/m16.

Add with carry r/m16 to r16.

Add with carry r16 to r/m16.

Add with carry r/m16 to r16.

Add with Carry Flag (CF) imm32 to r/m32.

Add with Carry Flag (CF) sign-extended imm8 into r/m32.

Add with Carry Flag (CF) r/m32 to r32.

Add with Carry Flag (CF) r32 to r/m32.

Add with Carry Flag (CF) r/m32 to r32.

Add with Carry Flag (CF) imm32 sign extended to 64-bits to r/m64.

Add with Carry Flag (CF) sign-extended imm8 into r/m64.

Add with Carry Flag (CF) r/m64 to r64.

Add with Carry Flag (CF) r64 to r/m64.

Add with Carry Flag (CF) r/m64 to r64.

Add with carry imm8 to r/m8.

Add with carry r/m8 to byte register.

Add with carry byte register to r/m8.

Add with carry r/m8 to byte register.

Add with carry byte register to r/m8.

Add with carry r/m8 to byte register.

Add with carry imm32 sign extended to 64-bits to RAX.

Add with carry imm8 to r/m8.

Add with carry r/m8 to byte register.

Add with carry byte register to r/m8.

Add with carry r/m8 to byte register.

Add with carry byte register to r/m8.

Add with carry r/m8 to byte register.

Add imm8 to AL.

Add imm16 to AX.

Add imm32 to EAX.

Add imm16 to r/m16.

Add sign-extended imm8 to r/m16.

Add r16 to r/m16.

Add imm32 to r/m32.

Add sign-extended imm8 to r/m32.

Add r32 to r/m32.

Add imm32 sign-extended to 64-bits to r/m64.

Add sign-extended imm8 to r/m64.

Add r64 to r/m64.

Add imm8 to r/m8.

Add r8 to r/m8.

Add r8 to r/m8.

Add imm16 to r/m16.

Add sign-extended imm8 to r/m16.

Add r/m16 to r16.

Add r16 to r/m16.

Add r/m16 to r16.

Add imm32 to r/m32.

Add sign-extended imm8 to r/m32.

Add r/m32 to r32.

Add r32 to r/m32.

Add r/m32 to r32.

Add imm32 sign-extended to 64-bits to r/m64.

Add sign-extended imm8 to r/m64.

Add r/m64 to r64.

Add r64 to r/m64.

Add r/m64 to r64.

Add imm8 to r/m8.

Add r/m8 to r8.

Add r8 to r/m8.

Add r/m8 to r8.

Add r8 to r/m8.

Add r/m8 to r8.

Add imm32 sign-extended to 64-bits to RAX.

Add imm8 to r/m8.

Add r/m8 to r8.

Add r8 to r/m8.

Add r/m8 to r8.

Add r8 to r/m8.

Add r/m8 to r8.

Add packed double-precision floating-point values from xmm2/m128 to xmm1.

Add packed double-precision floating-point values from xmm2/m128 to xmm1.

Add packed single-precision floating-point values from xmm2/m128 to xmm1 and stores result in xmm1.

Add packed single-precision floating-point values from xmm2/m128 to xmm1 and stores result in xmm1.

Add the low double-precision floating-point value from xmm2/m64 to xmm1.

Add the low double-precision floating-point value from xmm2/m64 to xmm1.

Add the low single-precision floating-point value from xmm2/m32 to xmm1.

Add the low single-precision floating-point value from xmm2/m32 to xmm1.

Add/subtract double-precision floating-point values from xmm2/m128 to xmm1.

Add/subtract double-precision floating-point values from xmm2/m128 to xmm1.

Add/subtract single-precision floating-point values from xmm2/m128 to xmm1.

Add/subtract single-precision floating-point values from xmm2/m128 to xmm1.

Perform one round of an AES decryption flow, using the Equivalent Inverse Cipher, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Perform one round of an AES decryption flow, using the Equivalent Inverse Cipher, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Perform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Perform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Perform one round of an AES encryption flow, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Perform one round of an AES encryption flow, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Perform the last round of an AES encryption flow, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Perform the last round of an AES encryption flow, operating on a 128-bit data (state) from xmm1 with a 128-bit round key from xmm2/m128.

Perform the InvMixColumn transformation on a 128-bit round key from xmm2/m128 and store the result in xmm1.

Perform the InvMixColumn transformation on a 128-bit round key from xmm2/m128 and store the result in xmm1.

Assist in AES round key generation using an 8 bits Round Constant (RCON) specified in the imm8, operating on 128 bits of data specified in xmm2/m128 and stores the result in xmm1.

Assist in AES round key generation using an 8 bits Round Constant (RCON) specified in the imm8, operating on 128 bits of data specified in xmm2/m128 and stores the result in xmm1.

AL && imm8.

AX && imm16.

EAX && imm32.

r/m16 && imm16.

r/m16 && imm8 (sign-extended).

r/m16 && r16.

r/m32 && imm32.

r/m32 && imm8 (sign-extended).

r/m32 && r32.

r/m64 && imm32 sign extended to 64-bits.

r/m64 && imm8 (sign-extended).

r/m64 && r32.

r/m8 && imm8.

r/m8 && r8.

r/m8 && r8.

r/m16 && imm16.

r/m16 && imm8 (sign-extended).

r16 && r/m16.

r/m16 && r16.

r16 && r/m16.

r/m32 && imm32.

r/m32 && imm8 (sign-extended).

r32 && r/m32.

r/m32 && r32.

r32 && r/m32.

r/m64 && imm32 sign extended to 64-bits.

r/m64 && imm8 (sign-extended).

r64 && r/m64.

r/m64 && r32.

r64 && r/m64.

r/m8 && imm8.

r8 && r/m8.

r/m8 && r8.

r8 && r/m8.

r/m8 && r8.

r8 && r/m8.

RAX AND imm32 sign-extended to 64-bits.

r/m8 && imm8.

r8 && r/m8.

r/m8 && r8.

r8 && r/m8.

r/m8 && r8.

r8 && r/m8.

Bitwise AND of inverted r32b with r/m32 with result stored in in r32a.

Bitwise AND of inverted r32b with r/m32 with result stored in in r32a.

Bitwise AND of inverted r64b with r/m64 with result stored in in r64a.

Bitwise AND of inverted r64b with r/m64 with result stored in in r64a.

Bitwise logical AND NOT of xmm2/m128 and xmm1.

Bitwise logical AND NOT of xmm2/m128 and xmm1.

Bitwise logical AND NOT of xmm2/m128 and xmm1.

Bitwise logical AND NOT of xmm2/m128 and xmm1.

Return the bitwise logical AND of packed double-precision floating-point values in xmm1 and xmm2/m128.

Return the bitwise logical AND of packed double-precision floating-point values in xmm1 and xmm2/m128.

Bitwise logical AND of xmm2/m128 and xmm1.

Bitwise logical AND of xmm2/m128 and xmm1.

Contiguous bitwise extract from r/m32 using r32b as control.

Stores result in r32a.

Contiguous bitwise extract from r/m32 using r32b as control.

Stores result in r32a.

Contiguous bitwise extract from r/m64 using r64b as control.

Stores result in r64a.

Contiguous bitwise extract from r/m64 using r64b as control.

Stores result in r64a.

Select packed DP-FP values from xmm1 and xmm2/m128 from mask specified in imm8 and store the values into xmm1.

Select packed DP-FP values from xmm1 and xmm2/m128 from mask specified in imm8 and store the values into xmm1.

Select packed single-precision floating-point values from xmm1 and xmm2/m128 from mask specified in imm8 and store the values into xmm1.

Select packed single-precision floating-point values from xmm1 and xmm2/m128 from mask specified in imm8 and store the values into xmm1.

Select packed DP FP values from xmm1 and xmm2 from mask specified in XMM0 and store the values in xmm1.

Select packed DP FP values from xmm1 and xmm2 from mask specified in XMM0 and store the values in xmm1.

Select packed single-precision floating-point values from xmm1 and xmm2/m128 from mask specified in XMM0 and store the values into xmm1.

Select packed single-precision floating-point values from xmm1 and xmm2/m128 from mask specified in XMM0 and store the values into xmm1.

Extract lowest set bit from r/m32 and set that bit in r32.

Extract lowest set bit from r/m32 and set that bit in r32.

Extract lowest set bit from r/m64, and set that bit in r64.

Extract lowest set bit from r/m64, and set that bit in r64.

Set all lower bits in r32 to 1 starting from bit 0 to lowest set bit in r/m32.

Set all lower bits in r32 to 1 starting from bit 0 to lowest set bit in r/m32.

Set all lower bits in r64 to 1 starting from bit 0 to lowest set bit in r/m64.

Set all lower bits in r64 to 1 starting from bit 0 to lowest set bit in r/m64.

Reset lowest set bit of r/m32, keep all other bits of r/m32 and write result to r32.

Reset lowest set bit of r/m32, keep all other bits of r/m32 and write result to r32.

Reset lowest set bit of r/m64, keep all other bits of r/m64 and write result to r64.

Reset lowest set bit of r/m64, keep all other bits of r/m64 and write result to r64.

Bit scan forward on r/m16.

Bit scan forward on r/m16.

Bit scan forward on r/m32.

Bit scan forward on r/m32.

Bit scan forward on r/m64.

Bit scan forward on r/m64.

Bit scan reverse on r/m16.

Bit scan reverse on r/m16.

Bit scan reverse on r/m32.

Bit scan reverse on r/m32.

Bit scan reverse on r/m64.

Bit scan reverse on r/m64.

Reverses the byte order of a 32-bit register.

Reverses the byte order of a 64-bit register.

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF).

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and complement.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and clear.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Store selected bit in Carry Flag (CF) and set.

Zero bits in r/m32 starting with the position in r32b, write result to r32a.

Zero bits in r/m32 starting with the position in r32b, write result to r32a.

Zero bits in r/m64 starting with the position in r64b, write result to r64a.

Zero bits in r/m64 starting with the position in r64b, write result to r64a.

Call far, absolute indirect address given in m16:16.

In 32-bit mode: if selector points to a gate, then RIP = 32-bit zero extended displacement taken from gate else RIP = zero extended 16-bit offset from far pointer referenced in the instruction.

Call far, absolute indirect address given in m16:32.

In 64-bit mode: If selector points to a gate, then RIP = 64-bit displacement taken from gate else RIP = zero extended 32-bit offset from far pointer referenced in the instruction.

Call far, absolute indirect address given in m16:64.

In 64-bit mode: If selector points to a gate, then RIP = 64-bit displacement taken from gate else RIP = 64-bit offset from far pointer referenced in the instruction.

Call near, relative, displacement relative to next instruction.

32-bit displacement sign extended to 64-bits in 64-bit mode.

Identical encoding to call_function and call_RelativeAddress32Bit.

Call near, absolute indirect, address given in r/m64.

Call near, absolute indirect, address given in r64.

Call near, relative, displacement relative to next instruction.

32-bit displacement sign extended to 64-bits in 64-bit mode.

Identical encoding to call_Label and call_RelativeAddress32Bit.

WARNING: The location of emitted code may be such that if it is more than 2Gb away from common library function calls (eg printf); it may be preferrable to use an absolute address indirectly in this case, eg call_Register64Bit or call_Any64BitMemory.

WARNING: No checks are made for addresses that would exceed the boundaries of signed integers…

WARNING: In Kernel-model code, addresses are in the top half of the address space and so this function will be invalid.

Call near, relative, displacement relative to next instruction.

32-bit displacement sign extended to 64-bits in 64-bit mode.

Identical encoding to call_Label and call_function.

AX = sign-extend of AL.

EDX:EAX = sign-extend of EAX.

RAX = sign-extend of EAX.

Clear Carry Flag (CF).

Clear Direction Flag (DF).

Flushes cache line containing m8.

Clear interrupt flag; interrupts disabled when interrupt flag cleared.

Complement Carry Flag (CF).

Move if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if above or equal (Carry Flag (CF) is 0).

Move if above or equal (Carry Flag (CF) is 0).

Move if above or equal (Carry Flag (CF) is 0).

Move if above or equal (Carry Flag (CF) is 0).

Move if above or equal (Carry Flag (CF) is 0).

Move if above or equal (Carry Flag (CF) is 0).

Move if below (Carry Flag (CF) is 1).

Move if below (Carry Flag (CF) is 1).

Move if below (Carry Flag (CF) is 1).

Move if below (Carry Flag (CF) is 1).

Move if below (Carry Flag (CF) is 1).

Move if below (Carry Flag (CF) is 1).

Move if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if carry (Carry Flag (CF) is 1).

Move if carry (Carry Flag (CF) is 1).

Move if carry (Carry Flag (CF) is 1).

Move if carry (Carry Flag (CF) is 1).

Move if carry (Carry Flag (CF) is 1).

Move if carry (Carry Flag (CF) is 1).

Move if equal (Zero Flag (ZF) is 1).

Move if equal (Zero Flag (ZF) is 1).

Move if equal (Zero Flag (ZF) is 1).

Move if equal (Zero Flag (ZF) is 1).

Move if equal (Zero Flag (ZF) is 1).

Move if equal (Zero Flag (ZF) is 1).

Move if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Move if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Move if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Move if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Move if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Move if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Move if less (Sign Flag (SF) != Overflow Flag (OF)).

Move if less (Sign Flag (SF) != Overflow Flag (OF)).

Move if less (Sign Flag (SF) != Overflow Flag (OF)).

Move if less (Sign Flag (SF) != Overflow Flag (OF)).

Move if less (Sign Flag (SF) != Overflow Flag (OF)).

Move if less (Sign Flag (SF) != Overflow Flag (OF)).

Move if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if not above or equal (Carry Flag (CF) is 1).

Move if not above or equal (Carry Flag (CF) is 1).

Move if not above or equal (Carry Flag (CF) is 1).

Move if not above or equal (Carry Flag (CF) is 1).

Move if not above or equal (Carry Flag (CF) is 1).

Move if not above or equal (Carry Flag (CF) is 1).

Move if not below (Carry Flag (CF) is 0).

Move if not below (Carry Flag (CF) is 0).

Move if not below (Carry Flag (CF) is 0).

Move if not below (Carry Flag (CF) is 0).

Move if not below (Carry Flag (CF) is 0).

Move if not below (Carry Flag (CF) is 0).

Move if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if not carry (Carry Flag (CF) is 0).

Move if not carry (Carry Flag (CF) is 0).

Move if not carry (Carry Flag (CF) is 0).

Move if not carry (Carry Flag (CF) is 0).

Move if not carry (Carry Flag (CF) is 0).

Move if not carry (Carry Flag (CF) is 0).

Move if not equal (Zero Flag (ZF) is 0).

Move if not equal (Zero Flag (ZF) is 0).

Move if not equal (Zero Flag (ZF) is 0).

Move if not equal (Zero Flag (ZF) is 0).

Move if not equal (Zero Flag (ZF) is 0).

Move if not equal (Zero Flag (ZF) is 0).

Move if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Move if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Move if not less (Sign Flag (SF) == Overflow Flag (OF)).

Move if not less (Sign Flag (SF) == Overflow Flag (OF)).

Move if not less (Sign Flag (SF) == Overflow Flag (OF)).

Move if not less (Sign Flag (SF) == Overflow Flag (OF)).

Move if not less (Sign Flag (SF) == Overflow Flag (OF)).

Move if not less (Sign Flag (SF) == Overflow Flag (OF)).

Move if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Move if not overflow (Overflow Flag (OF) is 0).

Move if not overflow (Overflow Flag (OF) is 0).

Move if not overflow (Overflow Flag (OF) is 0).

Move if not overflow (Overflow Flag (OF) is 0).

Move if not overflow (Overflow Flag (OF) is 0).

Move if not overflow (Overflow Flag (OF) is 0).

Move if not parity (Parity Flag (PF) is 0).

Move if not parity (Parity Flag (PF) is 0).

Move if not parity (Parity Flag (PF) is 0).

Move if not parity (Parity Flag (PF) is 0).

Move if not parity (Parity Flag (PF) is 0).

Move if not parity (Parity Flag (PF) is 0).

Move if not sign (Sign Flag (SF) is 0).

Move if not sign (Sign Flag (SF) is 0).

Move if not sign (Sign Flag (SF) is 0).

Move if not sign (Sign Flag (SF) is 0).

Move if not sign (Sign Flag (SF) is 0).

Move if not sign (Sign Flag (SF) is 0).

Move if not zero (Zero Flag (ZF) is 0).

Move if not zero (Zero Flag (ZF) is 0).

Move if not zero (Zero Flag (ZF) is 0).

Move if not zero (Zero Flag (ZF) is 0).

Move if not zero (Zero Flag (ZF) is 0).

Move if not zero (Zero Flag (ZF) is 0).

Move if overflow (Overflow Flag (OF) is 1).

Move if overflow (Overflow Flag (OF) is 1).

Move if overflow (Overflow Flag (OF) is 1).

Move if overflow (Overflow Flag (OF) is 1).

Move if overflow (Overflow Flag (OF) is 1).

Move if overflow (Overflow Flag (OF) is 1).

Move if parity (Parity Flag (PF) is 1).

Move if parity (Parity Flag (PF) is 1).

Move if parity (Parity Flag (PF) is 1).

Move if parity (Parity Flag (PF) is 1).

Move if parity (Parity Flag (PF) is 1).

Move if parity (Parity Flag (PF) is 1).

Move if parity even (Parity Flag (PF) is 1).

Move if parity even (Parity Flag (PF) is 1).

Move if parity even (Parity Flag (PF) is 1).

Move if parity even (Parity Flag (PF) is 1).

Move if parity even (Parity Flag (PF) is 1).

Move if parity even (Parity Flag (PF) is 1).

Move if parity odd (Parity Flag (PF) is 0).

Move if parity odd (Parity Flag (PF) is 0).

Move if parity odd (Parity Flag (PF) is 0).

Move if parity odd (Parity Flag (PF) is 0).

Move if parity odd (Parity Flag (PF) is 0).

Move if parity odd (Parity Flag (PF) is 0).

Move if sign (Sign Flag (SF) is 1).

Move if sign (Sign Flag (SF) is 1).

Move if sign (Sign Flag (SF) is 1).

Move if sign (Sign Flag (SF) is 1).

Move if sign (Sign Flag (SF) is 1).

Move if sign (Sign Flag (SF) is 1).

Move if zero (Zero Flag (ZF) is 1).

Move if zero (Zero Flag (ZF) is 1).

Move if zero (Zero Flag (ZF) is 1).

Move if zero (Zero Flag (ZF) is 1).

Move if zero (Zero Flag (ZF) is 1).

Move if zero (Zero Flag (ZF) is 1).

Compare imm8 with AL.

Compare imm16 with AX.

Compare imm32 with EAX.

Compare imm16 with r/m16.

Compare imm8 with r/m16.

Compare r16 with r/m16.

Compare imm32 with r/m32.

Compare imm8 with r/m32.

Compare r32 with r/m32.

Compare imm32 sign-extended to 64-bits with r/m64.

Compare imm8 with r/m64.

Compare r64 with r/m64.

Compare imm8 with r/m8.

Compare r8 with r/m8.

Compare r8 with r/m8.

Compare imm16 with r/m16.

Compare imm8 with r/m16.

Compare r/m16 with r16.

Compare r16 with r/m16.

Compare r/m16 with r16.

Compare imm32 with r/m32.

Compare imm8 with r/m32.

Compare r/m32 with r32.

Compare r32 with r/m32.

Compare r/m32 with r32.

Compare imm32 sign-extended to 64-bits with r/m64.

Compare imm8 with r/m64.

Compare r/m64 with r64.

Compare r64 with r/m64.

Compare r/m64 with r64.

Compare imm8 with r/m8.

Compare r/m8 with r8.

Compare r8 with r/m8.

Compare r/m8 with r8.

Compare r8 with r/m8.

Compare r/m8 with r8.

Compare imm32 sign-extended to 64-bits with RAX.

Compare imm8 with r/m8.

Compare r/m8 with r8.

Compare r8 with r/m8.

Compare r/m8 with r8.

Compare r8 with r/m8.

Compare r/m8 with r8.

Compare packed double-precision floating-point values in xmm2/m128 and xmm1 using imm8 as comparison predicate.

Compare packed double-precision floating-point values in xmm2/m128 and xmm1 using imm8 as comparison predicate.

Compare packed single-precision floating-point values in xmm2/mem and xmm1 using imm8 as comparison predicate.

Compare packed single-precision floating-point values in xmm2/mem and xmm1 using imm8 as comparison predicate.

For legacy mode, compare word at address DS:(E)SI with word at address ES:(E)DI.

For 64-bit mode compare word at address (R E)SI with word at address (R E)DI.

The status flags are set accordingly.

For legacy mode, compare dword at address DS:(E)SI at dword at address ES:(E)DI.

For 64-bit mode compare dword at address (R E)SI at dword at address (R E)DI.

The status flags are set accordingly.

Compares quadword at address (R E)SI with quadword at address (R E)DI and sets the status flags accordingly.

For legacy mode, compare byte at address DS:(E)SI with byte at address ES:(E)DI.

For 64-bit mode compare byte at address (R E)SI to byte at address (R E)DI.

The status flags are set accordingly.

For legacy mode, compare byte at address DS:(E)SI with byte at address ES:(E)DI.

For 64-bit mode compare byte at address (R E)SI with byte at address (R E)DI.

The status flags are set accordingly.

For legacy mode, compare dword at address DS:(E)SI with dword at address ES:(E)DI.

For 64-bit mode compare dword at address (R E)SI with dword at address (R E)DI.

The status flags are set accordingly.

Compare low double-precision floating-point value in xmm2/m64 and xmm1 using imm8 as comparison predicate.

Compare low double-precision floating-point value in xmm2/m64 and xmm1 using imm8 as comparison predicate.

Compares quadword at address (R E)SI with quadword at address (R E)DI and sets the status flags accordingly.

Compare low single-precision floating-point value in xmm2/m32 and xmm1 using imm8 as comparison predicate.

Compare low single-precision floating-point value in xmm2/m32 and xmm1 using imm8 as comparison predicate.

For legacy mode, compare word at address DS:(E)SI with word at address ES:(E)DI.

For 64-bit mode compare word at address (R E)SI with word at address (R E)DI.

The status flags are set accordingly.

Compare AX with r/m16.

If equal the Zero Flag (ZF) is set and r16 is loaded into r/m16.

Otherwise clears the Zero Flag (ZF) and loads r/m16 into AX.

Compare EAX with r/m32.

If equal the Zero Flag (ZF) is set and r32 is loaded into r/m32.

Otherwise clears the Zero Flag (ZF) and loads r/m32 into EAX.

Compare RAX with r/m64.

If equal the Zero Flag (ZF) is set and r64 is loaded into r/m64.

Otherwise clears the Zero Flag (ZF) and loads r/m64 into RAX.

Compare AL with r/m8.

If equal the Zero Flag (ZF) is set and r8 is loaded into r/m8.

Otherwise clears the Zero Flag (ZF) and loads r/m8 into AL.

Compare AL with r/m8.

If equal the Zero Flag (ZF) is set and r8 is loaded into r/m8.

Otherwise clears the Zero Flag (ZF) and loads r/m8 into AL.

Compare AX with r/m16.

If equal the Zero Flag (ZF) is set and r16 is loaded into r/m16.

Otherwise clears the Zero Flag (ZF) and loads r/m16 into AX.

Compare EAX with r/m32.

If equal the Zero Flag (ZF) is set and r32 is loaded into r/m32.

Otherwise clears the Zero Flag (ZF) and loads r/m32 into EAX.

Compare RAX with r/m64.

If equal the Zero Flag (ZF) is set and r64 is loaded into r/m64.

Otherwise clears the Zero Flag (ZF) and loads r/m64 into RAX.

Compare AL with r/m8.

If equal the Zero Flag (ZF) is set and r8 is loaded into r/m8.

Otherwise clears the Zero Flag (ZF) and loads r/m8 into AL.

Compare AL with r/m8.

If equal the Zero Flag (ZF) is set and r8 is loaded into r/m8.

Otherwise clears the Zero Flag (ZF) and loads r/m8 into AL.

Compare AL with r/m8.

If equal the Zero Flag (ZF) is set and r8 is loaded into r/m8.

Otherwise clears the Zero Flag (ZF) and loads r/m8 into AL.

Compare AL with r/m8.

If equal the Zero Flag (ZF) is set and r8 is loaded into r/m8.

Otherwise clears the Zero Flag (ZF) and loads r/m8 into AL.

Compare RDX:RAX with m128.

If equal, set ZF and load RCX:RBX into m128.

Otherwise clears the Zero Flag (ZF) and loads m128 into RDX:RAX.

Compare EDX:EAX with m64.

If equal, set ZF and load ECX:EBX into m64.

Otherwise clears the Zero Flag (ZF) and loads m64 into EDX:EAX.

Compare low double-precision floating-point values in xmm1 and xmm2/mem64 and sets the appropriate flags in EFLAGS accordingly.

Compare low double-precision floating-point values in xmm1 and xmm2/mem64 and sets the appropriate flags in EFLAGS accordingly.

Compare low single-precision floating-point values in xmm1 and xmm2/mem32 and sets the appropriate flags in EFLAGS accordingly.

Compare low single-precision floating-point values in xmm1 and xmm2/mem32 and sets the appropriate flags in EFLAGS accordingly.

Returns processor identification and feature information into the EAX, EBX, ECX, and EDX registers as determined by the value in EAX, and, in some cases, ECX as well.

RDX:RAX = sign-extend of RAX.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m16.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m32.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m8.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m16.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m32.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m8.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m8.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m64.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m8.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m64.

Accumulate Cyclic Redundancy Check 32 (CRC32) on r/m8.

Convert two packed signed doubleword integers from xmm2/m128 to two packed double-precision floating-point values in xmm1.

Convert two packed signed doubleword integers from xmm2/m128 to two packed double-precision floating-point values in xmm1.

Convert four packed signed doubleword integers from xmm2/m128 to four packed single-precision floating-point values in xmm1.

Convert four packed signed doubleword integers from xmm2/m128 to four packed single-precision floating-point values in xmm1.

Convert two packed double-precision floating-point values from xmm2/m128 to two packed signed doubleword integers in xmm1.

Convert two packed double-precision floating-point values from xmm2/m128 to two packed signed doubleword integers in xmm1.

Convert two packed double-precision floating-point values from xmm/m32 to two packed signed doubleword integers in mm.

Convert two packed double-precision floating-point values from xmm/m32 to two packed signed doubleword integers in mm.

Convert two packed double-precision floating-point values in xmm2/m128 to two packed single-precision floating-point values in xmm1.

Convert two packed double-precision floating-point values in xmm2/m128 to two packed single-precision floating-point values in xmm1.

Convert two packed signed doubleword integers from mm/mem64 to two packed double-precision floating-point values in xmm.

Convert two packed signed doubleword integers from mm/mem64 to two packed double-precision floating-point values in xmm.

Convert two signed doubleword integers from mm/m64 to two single-precision floating-point values in xmm.

Convert two signed doubleword integers from mm/m64 to two single-precision floating-point values in xmm.

Convert four packed single-precision floating-point values from xmm2/m128 to four packed signed doubleword integers in xmm1.

Convert four packed single-precision floating-point values from xmm2/m128 to four packed signed doubleword integers in xmm1.

Convert two packed single-precision floating-point values in xmm2/m64 to two packed double-precision floating-point values in xmm1.

Convert two packed single-precision floating-point values in xmm2/m64 to two packed double-precision floating-point values in xmm1.

Convert two packed single-precision floating-point values from xmm/m64 to two packed signed doubleword integers in mm.

Convert two packed single-precision floating-point values from xmm/m64 to two packed signed doubleword integers in mm.

Convert one double-precision floating-point value from xmm/m64 to one signed doubleword integer r32.

Convert one double-precision floating-point value from xmm/m64 to one signed doubleword integer r32.

Convert one double-precision floating-point value from xmm/m64 to one signed quadword integer sign-extended into r64.

Convert one double-precision floating-point value from xmm/m64 to one signed quadword integer sign-extended into r64.

Convert one double-precision floating-point value in xmm2/m64 to one single-precision floating-point value in xmm1.

Convert one double-precision floating-point value in xmm2/m64 to one single-precision floating-point value in xmm1.

Convert one signed doubleword integer from r/m32 to one double-precision floating-point value in xmm.

Convert one signed quadword integer from r/m64 to one double-precision floating-point value in xmm.

Convert one signed doubleword integer from r/m32 to one double-precision floating-point value in xmm.

Convert one signed quadword integer from r/m64 to one double-precision floating-point value in xmm.

Convert one signed doubleword integer from r/m32 to one single-precision floating-point value in xmm.

Convert one signed quadword integer from r/m64 to one single-precision floating-point value in xmm.

Convert one signed doubleword integer from r/m32 to one single-precision floating-point value in xmm.

Convert one signed quadword integer from r/m64 to one single-precision floating-point value in xmm.

Convert one single-precision floating-point value in xmm2/m32 to one double-precision floating-point value in xmm1.

Convert one single-precision floating-point value in xmm2/m32 to one double-precision floating-point value in xmm1.

Convert one single-precision floating-point value from xmm/m32 to one signed doubleword integer in r32.

Convert one single-precision floating-point value from xmm/m32 to one signed doubleword integer in r32.

Convert one single-precision floating-point value from xmm/m32 to one signed quadword integer in r64.

Convert one single-precision floating-point value from xmm/m32 to one signed quadword integer in r64.

Convert two packed double-precision floating-point values from xmm2/m128 to two packed signed doubleword integers in xmm1 using truncation.

Convert two packed double-precision floating-point values from xmm2/m128 to two packed signed doubleword integers in xmm1 using truncation.

Convert two packer double-precision floating-point values from xmm/m32 to two packed signed doubleword integers in mm using truncation.

Convert two packer double-precision floating-point values from xmm/m32 to two packed signed doubleword integers in mm using truncation.

Convert four single-precision floating-point values from xmm2/m128 to four signed doubleword integers in xmm1 using truncation.

Convert four single-precision floating-point values from xmm2/m128 to four signed doubleword integers in xmm1 using truncation.

Convert two single-precision floating-point values from xmm/m64 to two signed doubleword signed integers in mm using truncation.

Convert two single-precision floating-point values from xmm/m64 to two signed doubleword signed integers in mm using truncation.

Convert one double-precision floating-point value from xmm/m64 to one signed doubleword integer in r32 using truncation.

Convert one double-precision floating-point value from xmm/m64 to one signed doubleword integer in r32 using truncation.

Convert one double-precision floating-point value from xmm/m64 to one signedquadword integer in r64 using truncation.

Convert one double-precision floating-point value from xmm/m64 to one signedquadword integer in r64 using truncation.

Convert one single-precision floating-point value from xmm/m32 to one signed doubleword integer in r32 using truncation.

Convert one single-precision floating-point value from xmm/m32 to one signed doubleword integer in r32 using truncation.

Convert one single-precision floating-point value from xmm/m32 to one signed quadword integer in r64 using truncation.

Convert one single-precision floating-point value from xmm/m32 to one signed quadword integer in r64 using truncation.

DX:AX = sign-extend of AX.

EAX = sign-extend of AX.

Decrement r/m16 by 1.

Decrement r/m32 by 1.

Decrement r/m64 by 1.

Decrement r/m8 by 1.

Decrement r/m16 by 1.

Decrement r/m32 by 1.

Decrement r/m64 by 1.

Decrement r/m8 by 1.

Decrement r/m8 by 1.

Unsigned divide DX:AX by r/m16, with result stored in AX (Quotient) and DX (Remainder).

Unsigned divide EDX:EAX by r/m32, with result stored in EAX (Quotient) and EDX (Remainder).

Unsigned divide RDX:RAX by r/m64, with result stored in RAX (Quotient) and RDX (Remainder).

Unsigned divide AX by r/m8, with result stored in AL (Quotient) and AH (Remainder).

Unsigned divide DX:AX by r/m16, with result stored in AX (Quotient) and DX (Remainder).

Unsigned divide EDX:EAX by r/m32, with result stored in EAX (Quotient) and EDX (Remainder).

Unsigned divide RDX:RAX by r/m64, with result stored in RAX (Quotient) and RDX (Remainder).

Unsigned divide AX by r/m8, with result stored in AL (Quotient) and AH (Remainder).

Unsigned divide AX by r/m8, with result stored in AL (Quotient) and AH (Remainder).

Divide packed double-precision floating-point values in xmm1 by packed double-precision floating-point values xmm2/m128.

Divide packed double-precision floating-point values in xmm1 by packed double-precision floating-point values xmm2/m128.

Divide packed single-precision floating-point values in xmm1 by packed single-precision floating-point values xmm2/m128.

Divide packed single-precision floating-point values in xmm1 by packed single-precision floating-point values xmm2/m128.

Divide low double-precision floating-point value in xmm1 by low double-precision floating-point value in xmm2/mem64.

Divide low double-precision floating-point value in xmm1 by low double-precision floating-point value in xmm2/mem64.

Divide low single-precision floating-point value in xmm1 by low single-precision floating-point value in xmm2/m32.

Divide low single-precision floating-point value in xmm1 by low single-precision floating-point value in xmm2/m32.

Selectively multiply packed double-precision floating-point values from xmm1 with packed double-precision floating-point values from xmm2. add and selectively store the packed double-precision floating-point values to xmm1.

Selectively multiply packed double-precision floating-point values from xmm1 with packed double-precision floating-point values from xmm2. add and selectively store the packed double-precision floating-point values to xmm1.

Selectively multiply packed single-precision floating-point values from xmm1 with packed single-precision floating-point values from xmm2. add and selectively store the packed single-precision floating-point values or zero values to xmm1.

Selectively multiply packed single-precision floating-point values from xmm1 with packed single-precision floating-point values from xmm2. add and selectively store the packed single-precision floating-point values or zero values to xmm1.

Set the x87 Floating Point Unit (FPU) tag word to empty.

Create a nested stack frame for a procedure.

Create a nested stack frame for a procedure.

Create a stack frame for a procedure.

Extract a single-precision floating-point value from xmm2 at the source offset specified by imm8 and store the result to reg or m32.

The upper 32 bits of r64 is zeroed if reg is r64.

Extract a single-precision floating-point value from xmm2 at the source offset specified by imm8 and store the result to reg or m32.

The upper 32 bits of r64 is zeroed if reg is r64.

Extract a single-precision floating-point value from xmm2 at the source offset specified by imm8 and store the result to reg or m32.

The upper 32 bits of r64 is zeroed if reg is r64.

Replace ST(0) with (2^(ST(0)) - 1).

Replace ST with its absolute value.

Add m32fp to ST(0) and store result in ST(0).

Add m64fp to ST(0) and store result in ST(0).

Add ST(i) to ST(0) and store result in ST(i).

Add ST(0) to ST(i) and store result in ST(0).

Add ST(0) to ST(1) with result stored in in ST(1), and pop the register stack.

Add ST(0) to ST(i) with result stored in in ST(i), and pop the register stack.

Convert binary coded decimal value to floating-point and push onto the Floating Point Unit (FPU) stack.

Store ST(0) in arg0 and pop ST(0).

Complements sign of ST(0).

Clear floating-point exception flags after checking for pending unmasked floating-point exceptions.

Move if below (Carry Flag (CF) is 1).

Move if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Move if equal (Zero Flag (ZF) is 1).

Move if not below (Carry Flag (CF) is 0).

Move if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Move if not equal (Zero Flag (ZF) is 0).

Move if not unordered (Parity Flag (PF) is 0).

Move if unordered (Parity Flag (PF) is 1).

Compare ST(0) with ST(1).

Compare ST(0) with m32fp.

Compare ST(0) with m64fp.

Compare ST(0) with ST(i).

Compare ST(0) with ST(i) and set status flags accordingly.

Compare ST(0) with ST(i), set status flags accordingly, and pop register stack.

Compare ST(0) with ST(1) and pop register stack.

Compare ST(0) with m32fp and pop register stack.

Compare ST(0) with m64fp and pop register stack.

Compare ST(0) with ST(i) and pop register stack.

Compare ST(0) with ST(1) and pop register stack twice.

Replace ST(0) with its cosine.

Decrement TOP field in Floating Point Unit (FPU) status word.

Divide ST(0) by m32fp and store result in ST(0).

Compare ST(0) with ST(i), set status flags accordingly, and pop register stack.

Divide ST(i) by ST(0) and store result in ST(i).

Divide ST(0) by ST(i) and store result in ST(0).

Divide ST(1) by ST(0) with result stored in in ST(1), and pop the register stack.

Divide ST(i) by ST(0) with result stored in in ST(i), and pop the register stack.

Divide m32fp by ST(0) and store result in ST(0).

Divide m64fp by ST(0) and store result in ST(0).

Divide ST(0) by ST(i) and store result in ST(i).

Divide ST(i) by ST(0) and store result in ST(0).

Divide ST(0) by ST(1) with result stored in in ST(1), and pop the register stack.

Divide ST(0) by ST(i) with result stored in in ST(i), and pop the register stack.

Sets tag for ST(i) to empty.

Add m16int to ST(0) and store result in ST(0).

Add m32int to ST(0) and store result in ST(0).

Compare ST(0) with m16int.

Compare ST(0) with m32int.

Compare ST(0) with m16int and pop stack register.

Compare ST(0) with m32int and pop stack register.

Divide ST(0) by m64int and store result in ST(0).

Divide ST(0) by m32int and store result in ST(0).

Divide m16int by ST(0) and store result in ST(0).

Divide m32int by ST(0) and store result in ST(0).

Push m16int onto the Floating Point Unit (FPU) register stack.

Push m32int onto the Floating Point Unit (FPU) register stack.

Push m64int onto the Floating Point Unit (FPU) register stack.

Multiply ST(0) by m16int and store result in ST(0).

Multiply ST(0) by m32int and store result in ST(0).

Increment the TOP field in the Floating Point Unit (FPU) status register.

Initialize Floating Point Unit (FPU) after checking for pending unmasked floating-point exceptions.

Store ST(0) in m16int.

Store ST(0) in m32int.

Store ST(0) in m16int and pop register stack.

Store ST(0) in m32int and pop register stack.

Store ST(0) in m64int and pop register stack.

Store ST(0) in m16int with truncation.

Store ST(0) in m32int with truncation.

Store ST(0) in m64int with truncation.

Subtract m16int from ST(0) and store result in ST(0).

Subtract m32int from ST(0) and store result in ST(0).

Subtract ST(0) from m16int and store result in ST(0).

Subtract ST(0) from m32int and store result in ST(0).

Push m32fp onto the Floating Point Unit (FPU) register stack.

Push m64fp onto the Floating Point Unit (FPU) register stack.

Push m80fp onto the Floating Point Unit (FPU) register stack.

Push ST(i) onto the Floating Point Unit (FPU) register stack.

Push +1.0 onto the Floating Point Unit (FPU) register stack.

Load Floating Point Unit (FPU) control word from m2byte.

Load Floating Point Unit (FPU) environment from m14byte or m28byte.

Push log2e onto the Floating Point Unit (FPU) register stack.

Push log210 onto the Floating Point Unit (FPU) register stack.

Push log102 onto the Floating Point Unit (FPU) register stack.

Push loge2 onto the Floating Point Unit (FPU) register stack.

Push pi onto the Floating Point Unit (FPU) register stack.

Push +0.0 onto the Floating Point Unit (FPU) register stack.

Multiply ST(0) by m32fp and store result in ST(0).

Multiply ST(0) by m64fp and store result in ST(0).

Multiply ST(i) by ST(0) and store result in ST(i).

Multiply ST(0) by ST(i) and store result in ST(0).

Multiply ST(1) by ST(0) with result stored in in ST(1), and pop the register stack.

Multiply ST(i) by ST(0) with result stored in in ST(i), and pop the register stack.

Clear floating-point exception flags without checking for pending unmasked floating-point exceptions.

Initialize Floating Point Unit (FPU) without checking for pending unmasked floating-point exceptions.

No operation is performed.

Store Floating Point Unit (FPU) environment to m94byte or m108byte without checking for pending unmasked floating-point exceptions.

Then re-initialize the Floating Point Unit (FPU).

Store Floating Point Unit (FPU) control word to m2byte without checking for pending unmasked floating-point exceptions.

Store Floating Point Unit (FPU) environment to m14byte or m28byte without checking for pending unmasked floating-point exceptions.

Then mask all floating-point exceptions.

Store Floating Point Unit (FPU) status word in AX register without checking for pending unmasked floating-point exceptions.

Store Floating Point Unit (FPU) status word at m2byte without checking for pending unmasked floating-point exceptions.

Replace ST(1) with arctan(ST(1)/ST(0)) and pop the register stack.

Replace ST(0) with the remainder obtained from dividing ST(0) by ST(1).

Replace ST(0) with the IEEE remainder obtained from dividing ST(0) by ST(1).

Replace ST(0) with its tangent and push 1 onto the Floating Point Unit (FPU) stack.

Round ST(0) to an integer.

Load Floating Point Unit (FPU) state from m94byte or m108byte.

Store Floating Point Unit (FPU) state to m94byte or m108byte after checking for pending unmasked floating-point exceptions.

Then re-initialize the Floating Point Unit (FPU).

Scale ST(0) by ST(1).

Replace ST(0) with its sine.

Compute the sine and cosine of ST(0); replace ST(0) with the sine, and push the cosine onto the register stack.

Computes square root of ST(0) and stores the result in ST(0).

Copy ST(0) to m32fp.

Copy ST(0) to m64fp.

Copy ST(0) to ST(i).

Store Floating Point Unit (FPU) control word to m2byte after checking for pending unmasked floating-point exceptions.

Store Floating Point Unit (FPU) environment to m14byte or m28byte after checking for pending unmasked floating-point exceptions.

Then mask all floating-point exceptions.

Copy ST(0) to m32fp and pop register stack.

Copy ST(0) to m64fp and pop register stack.

Copy ST(0) to m80fp and pop register stack.

Copy ST(0) to ST(i) and pop register stack.

Store Floating Point Unit (FPU) status word in AX register after checking for pending unmasked floating-point exceptions.

Store Floating Point Unit (FPU) status word at m2byte after checking for pending unmasked floating-point exceptions.

Subtract m32fp from ST(0) and store result in ST(0).

Subtract m64fp from ST(0) and store result in ST(0).

Subtract ST(0) from ST(i) and store result in ST(i).

Subtract ST(i) from ST(0) and store result in ST(0).

Subtract ST(0) from ST(1) with result stored in in ST(1), and pop register stack.

Subtract ST(0) from ST(i) with result stored in in ST(i), and pop register stack.

Subtract ST(0) from m32fp and store result in ST(0).

Subtract ST(0) from m64fp and store result in ST(0).

Subtract ST(i) from ST(0) and store result in ST(i).

Subtract ST(0) from ST(i) and store result in ST(0).

Subtract ST(1) from ST(0) with result stored in in ST(1), and pop register stack.

Subtract ST(i) from ST(0) with result stored in in ST(i), and pop register stack.

Compare ST(0) with 0.0.

Compare ST(0) with ST(1).

Compare ST(0) with ST(i).

Compare ST(0) with ST(i), check for ordered values, and set status flags accordingly.

Compare ST(0) with ST(i), check for ordered values, set status flags accordingly, and pop register stack.

Compare ST(0) with ST(1) and pop register stack.

Compare ST(0) with ST(i) and pop register stack.

Compare ST(0) with ST(1) and pop register stack twice.

Check pending unmasked floating-point exceptions.

Classify value or number in ST(0).

Exchange the contents of ST(0) and ST(1).

Exchange the contents of ST(0) and ST(i).

Restore the x87 Floating Point Unit (FPU), MMX, XMM, and MXCSR register state from m512byte.

Restore the x87 Floating Point Unit (FPU), MMX, XMM, and MXCSR register state from m512byte.

Save the x87 Floating Point Unit (FPU), MMX, XMM, and MXCSR register state to m512byte.

Save the x87 Floating Point Unit (FPU), MMX, XMM, and MXCSR register state to m512byte.

Separate value in ST(0) into exponent and significand, store exponent in ST(0), and push the significand onto the register stack.

Replace ST(1) with (ST(1) * log2ST(0)) and pop the register stack.

Replace ST(1) with ST(1) * log2(ST(0) + 1.0) and pop the register stack.

Horizontal add packed double-precision floating-point values from xmm2/m128 to xmm1.

Horizontal add packed double-precision floating-point values from xmm2/m128 to xmm1.

Horizontal add packed single-precision floating-point values from xmm2/m128 to xmm1.

Horizontal add packed single-precision floating-point values from xmm2/m128 to xmm1.

Horizontal subtract packed double-precision floating-point values from xmm2/m128 to xmm1.

Horizontal subtract packed double-precision floating-point values from xmm2/m128 to xmm1.

Horizontal subtract packed single-precision floating-point values from xmm2/m128 to xmm1.

Horizontal subtract packed single-precision floating-point values from xmm2/m128 to xmm1.

Signed divide DX:AX by r/m16, with result stored in AX (Quotient) and DX (Remainder).

Signed divide EDX:EAX by r/m32, with result stored in EAX (Quotient) and EDX (Remainder).

Signed divide RDX:RAX by r/m64, with result stored in RAX (Quotient) and RDX (Remainder).

Signed divide AX by r/m8, with result stored in AL (Quotient) and AH (Remainder).

Signed divide DX:AX by r/m16, with result stored in AX (Quotient) and DX (Remainder).

Signed divide EDX:EAX by r/m32, with result stored in EAX (Quotient) and EDX (Remainder).

Signed divide RDX:RAX by r/m64, with result stored in RAX (Quotient) and RDX (Remainder).

Signed divide AX by r/m8, with result stored in AL (Quotient) and AH (Remainder).

Signed divide AX by r/m8, with result stored in AL (Quotient) and AH (Remainder).

DX:AX = AX * r/m16.

EDX:EAX = EAX * r/m32.

RDX:RAX = RAX * r/m64.

AX = AL * r/m8.

DX:AX = AX * r/m16.

word register = word register * r/m16.

word register = r/m16 * immediate word.

word register = r/m16 * sign-extended imm8.

word register = word register * r/m16.

word register = r/m16 * immediate word.

word register = r/m16 * sign-extended imm8.

EDX:EAX = EAX * r/m32.

doubleword register = doubleword register * r/m32.

doubleword register = r/m32 * imm32.

doubleword register = r/m32 * sign-extended imm8.

doubleword register = doubleword register * r/m32.

doubleword register = r/m32 * imm32.

doubleword register = r/m32 * sign-extended imm8.

RDX:RAX = RAX * r/m64.

Quadword register = Quadword register * r/m64.

Quadword register = r/m64 * imm32.

Quadword register = r/m64 * sign-extended imm8.

Quadword register = Quadword register * r/m64.

Quadword register = r/m64 * imm32.

Quadword register = r/m64 * sign-extended imm8.

AX = AL * r/m8.

AX = AL * r/m8.

Input byte from I/O port in DX into AL.

Input byte from imm8 I/O port address into AL.

Input word from I/O port in DX into AX.

Input word from imm8 I/O port address into AX.

Input doubleword from I/O port in DX into EAX.

Input dword from imm8 I/O port address into EAX.

Increment r/m16 by 1.

Increment r/m32 by 1.

Increment r/m64 by 1.

Increment r/m8 by 1.

Increment r/m16 by 1.

Increment r/m32 by 1.

Increment r/m64 by 1.

Increment r/m8 by 1.

Increment r/m8 by 1.

Input word from I/O port specified in DX into memory location specified in ES:(E)DI or RDI.

Input doubleword from I/O port specified in DX into memory location specified in ES:(E)DI or RDI.

Input byte from I/O port specified in DX into memory location specified in ES:(E)DI or RDI.

Input byte from I/O port specified in DX into memory location specified with ES:(E)DI or RDI.

Input doubleword from I/O port specified in DX into memory location specified in ES:(E)DI or RDI.

Insert a single-precision floating-point value selected by imm8 from xmm2/m32 into xmm1 at the specified destination element specified by imm8 and zero out destination elements in xmm1 as indicated in imm8.

Insert a single-precision floating-point value selected by imm8 from xmm2/m32 into xmm1 at the specified destination element specified by imm8 and zero out destination elements in xmm1 as indicated in imm8.

Input word from I/O port specified in DX into memory location specified in ES:(E)DI or RDI.

Interrupt vector number specified by imm8.

Interrupt 3-trap to debugger.

Invalidates entries in the TLBs and paging-structure caches based on invalidation type in r64 and descriptor in m128.

Interrupt return (16-bit operand size).

Interrupt return (32-bit operand size).

Interrupt return (64-bit operand size).

Jump short if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump near if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump short if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump near if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump near if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump near if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump short if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump short if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump short if above or equal (Carry Flag (CF) is 0).

Jump near if above or equal (Carry Flag (CF) is 0).

Jump short if above or equal (Carry Flag (CF) is 0).

Jump near if above or equal (Carry Flag (CF) is 0).

Jump near if above or equal (Carry Flag (CF) is 0).

Jump near if above or equal (Carry Flag (CF) is 0).

Jump short if above or equal (Carry Flag (CF) is 0).

Jump short if above or equal (Carry Flag (CF) is 0).

Jump short if below (Carry Flag (CF) is 1).

Jump near if below (Carry Flag (CF) is 1).

Jump short if below (Carry Flag (CF) is 1).

Jump near if below (Carry Flag (CF) is 1).

Jump near if below (Carry Flag (CF) is 1).

Jump near if below (Carry Flag (CF) is 1).

Jump short if below (Carry Flag (CF) is 1).

Jump short if below (Carry Flag (CF) is 1).

Jump short if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump near if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump short if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump near if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump near if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump near if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump short if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump short if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump short if carry (Carry Flag (CF) is 1).

Jump near if carry (Carry Flag (CF) is 1).

Jump short if carry (Carry Flag (CF) is 1).

Jump near if carry (Carry Flag (CF) is 1).

Jump near if carry (Carry Flag (CF) is 1).

Jump near if carry (Carry Flag (CF) is 1).

Jump short if carry (Carry Flag (CF) is 1).

Jump short if carry (Carry Flag (CF) is 1).

Jump short if equal (Zero Flag (ZF) is 1).

Jump near if 0 (Zero Flag (ZF) is 1).

Jump short if equal (Zero Flag (ZF) is 1).

Jump near if 0 (Zero Flag (ZF) is 1).

Jump near if 0 (Zero Flag (ZF) is 1).

Jump near if 0 (Zero Flag (ZF) is 1).

Jump short if equal (Zero Flag (ZF) is 1).

Jump short if equal (Zero Flag (ZF) is 1).

Jump short if ECX register is 0.

Jump short if ECX register is 0.

Jump short if ECX register is 0.

Jump short if ECX register is 0.

Jump short if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump near if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump short if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump near if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump near if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump near if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump short if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump short if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump short if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Jump near if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Jump short if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Jump near if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Jump near if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Jump near if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Jump short if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Jump short if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Jump short if less (Sign Flag (SF) != Overflow Flag (OF)).

Jump near if less (Sign Flag (SF) != Overflow Flag (OF)).

Jump short if less (Sign Flag (SF) != Overflow Flag (OF)).

Jump near if less (Sign Flag (SF) != Overflow Flag (OF)).

Jump near if less (Sign Flag (SF) != Overflow Flag (OF)).

Jump near if less (Sign Flag (SF) != Overflow Flag (OF)).

Jump short if less (Sign Flag (SF) != Overflow Flag (OF)).

Jump short if less (Sign Flag (SF) != Overflow Flag (OF)).

Jump short if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump near if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump short if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump near if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump near if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump near if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump short if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump short if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump far, absolute indirect, address given in m16:16.

Jump far, absolute indirect, address given in m16:32.

Jump far, absolute indirect, address given in m16:64.

Jump short, RIP = RIP + 8-bit displacement sign extended to 64-bits.

Jump near, relative, RIP = RIP + 32-bit displacement sign extended to 64-bits.

Jump near, absolute indirect, RIP = 64-Bit offset from register or memory.

Jump near, absolute indirect, RIP = 64-Bit offset from register or memory.

Jump near, relative, RIP = RIP + 32-bit displacement sign extended to 64-bits.

Jump short, RIP = RIP + 8-bit displacement sign extended to 64-bits.

Jump short if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump near if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump short if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump near if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump near if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump near if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump short if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump short if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Jump short if not above or equal (Carry Flag (CF) is 1).

Jump near if not above or equal (Carry Flag (CF) is 1).

Jump short if not above or equal (Carry Flag (CF) is 1).

Jump near if not above or equal (Carry Flag (CF) is 1).

Jump near if not above or equal (Carry Flag (CF) is 1).

Jump near if not above or equal (Carry Flag (CF) is 1).

Jump short if not above or equal (Carry Flag (CF) is 1).

Jump short if not above or equal (Carry Flag (CF) is 1).

Jump short if not below (Carry Flag (CF) is 0).

Jump near if not below (Carry Flag (CF) is 0).

Jump short if not below (Carry Flag (CF) is 0).

Jump near if not below (Carry Flag (CF) is 0).

Jump near if not below (Carry Flag (CF) is 0).

Jump near if not below (Carry Flag (CF) is 0).

Jump short if not below (Carry Flag (CF) is 0).

Jump short if not below (Carry Flag (CF) is 0).

Jump short if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump near if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump short if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump near if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump near if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump near if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump short if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump short if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Jump short if not carry (Carry Flag (CF) is 0).

Jump near if not carry (Carry Flag (CF) is 0).

Jump short if not carry (Carry Flag (CF) is 0).

Jump near if not carry (Carry Flag (CF) is 0).

Jump near if not carry (Carry Flag (CF) is 0).

Jump near if not carry (Carry Flag (CF) is 0).

Jump short if not carry (Carry Flag (CF) is 0).

Jump short if not carry (Carry Flag (CF) is 0).

Jump short if not equal (Zero Flag (ZF) is 0).

Jump near if not equal (Zero Flag (ZF) is 0).

Jump short if not equal (Zero Flag (ZF) is 0).

Jump near if not equal (Zero Flag (ZF) is 0).

Jump near if not equal (Zero Flag (ZF) is 0).

Jump near if not equal (Zero Flag (ZF) is 0).

Jump short if not equal (Zero Flag (ZF) is 0).

Jump short if not equal (Zero Flag (ZF) is 0).

Jump short if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump near if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump short if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump near if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump near if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump near if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump short if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump short if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Jump short if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Jump near if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Jump short if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Jump near if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Jump near if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Jump near if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Jump short if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Jump short if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Jump short if not less (Sign Flag (SF) == Overflow Flag (OF)).

Jump near if not less (Sign Flag (SF) == Overflow Flag (OF)).

Jump short if not less (Sign Flag (SF) == Overflow Flag (OF)).

Jump near if not less (Sign Flag (SF) == Overflow Flag (OF)).

Jump near if not less (Sign Flag (SF) == Overflow Flag (OF)).

Jump near if not less (Sign Flag (SF) == Overflow Flag (OF)).

Jump short if not less (Sign Flag (SF) == Overflow Flag (OF)).

Jump short if not less (Sign Flag (SF) == Overflow Flag (OF)).

Jump short if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump near if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump short if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump near if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump near if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump near if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump short if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump short if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Jump short if not overflow (Overflow Flag (OF) is 0).

Jump near if not overflow (Overflow Flag (OF) is 0).

Jump short if not overflow (Overflow Flag (OF) is 0).

Jump near if not overflow (Overflow Flag (OF) is 0).

Jump near if not overflow (Overflow Flag (OF) is 0).

Jump near if not overflow (Overflow Flag (OF) is 0).

Jump short if not overflow (Overflow Flag (OF) is 0).

Jump short if not overflow (Overflow Flag (OF) is 0).

Jump short if not parity (Parity Flag (PF) is 0).

Jump near if not parity (Parity Flag (PF) is 0).

Jump short if not parity (Parity Flag (PF) is 0).

Jump near if not parity (Parity Flag (PF) is 0).

Jump near if not parity (Parity Flag (PF) is 0).

Jump near if not parity (Parity Flag (PF) is 0).

Jump short if not parity (Parity Flag (PF) is 0).

Jump short if not parity (Parity Flag (PF) is 0).

Jump short if not sign (Sign Flag (SF) is 0).

Jump near if not sign (Sign Flag (SF) is 0).

Jump short if not sign (Sign Flag (SF) is 0).

Jump near if not sign (Sign Flag (SF) is 0).

Jump near if not sign (Sign Flag (SF) is 0).

Jump near if not sign (Sign Flag (SF) is 0).

Jump short if not sign (Sign Flag (SF) is 0).

Jump short if not sign (Sign Flag (SF) is 0).

Jump short if not zero (Zero Flag (ZF) is 0).

Jump near if not zero (Zero Flag (ZF) is 0).

Jump short if not zero (Zero Flag (ZF) is 0).

Jump near if not zero (Zero Flag (ZF) is 0).

Jump near if not zero (Zero Flag (ZF) is 0).

Jump near if not zero (Zero Flag (ZF) is 0).

Jump short if not zero (Zero Flag (ZF) is 0).

Jump short if not zero (Zero Flag (ZF) is 0).

Jump short if overflow (Overflow Flag (OF) is 1).

Jump near if overflow (Overflow Flag (OF) is 1).

Jump short if overflow (Overflow Flag (OF) is 1).

Jump near if overflow (Overflow Flag (OF) is 1).

Jump near if overflow (Overflow Flag (OF) is 1).

Jump near if overflow (Overflow Flag (OF) is 1).

Jump short if overflow (Overflow Flag (OF) is 1).

Jump short if overflow (Overflow Flag (OF) is 1).

Jump short if parity (Parity Flag (PF) is 1).

Jump near if parity (Parity Flag (PF) is 1).

Jump short if parity (Parity Flag (PF) is 1).

Jump near if parity (Parity Flag (PF) is 1).

Jump near if parity (Parity Flag (PF) is 1).

Jump near if parity (Parity Flag (PF) is 1).

Jump short if parity (Parity Flag (PF) is 1).

Jump short if parity (Parity Flag (PF) is 1).

Jump short if parity even (Parity Flag (PF) is 1).

Jump near if parity even (Parity Flag (PF) is 1).

Jump short if parity even (Parity Flag (PF) is 1).

Jump near if parity even (Parity Flag (PF) is 1).

Jump near if parity even (Parity Flag (PF) is 1).

Jump near if parity even (Parity Flag (PF) is 1).

Jump short if parity even (Parity Flag (PF) is 1).

Jump short if parity even (Parity Flag (PF) is 1).

Jump short if parity odd (Parity Flag (PF) is 0).

Jump near if parity odd (Parity Flag (PF) is 0).

Jump short if parity odd (Parity Flag (PF) is 0).

Jump near if parity odd (Parity Flag (PF) is 0).

Jump near if parity odd (Parity Flag (PF) is 0).

Jump near if parity odd (Parity Flag (PF) is 0).

Jump short if parity odd (Parity Flag (PF) is 0).

Jump short if parity odd (Parity Flag (PF) is 0).

Jump short if RCX register is 0.

Jump short if RCX register is 0.

Jump short if RCX register is 0.

Jump short if RCX register is 0.

Jump short if sign (Sign Flag (SF) is 1).

Jump near if sign (Sign Flag (SF) is 1).

Jump short if sign (Sign Flag (SF) is 1).

Jump near if sign (Sign Flag (SF) is 1).

Jump near if sign (Sign Flag (SF) is 1).

Jump near if sign (Sign Flag (SF) is 1).

Jump short if sign (Sign Flag (SF) is 1).

Jump short if sign (Sign Flag (SF) is 1).

Jump short if zero (Zero Flag (ZF) is 1).

Jump near if 0 (Zero Flag (ZF) is 1).

Jump short if zero (Zero Flag (ZF) is 1).

Jump near if 0 (Zero Flag (ZF) is 1).

Jump near if 0 (Zero Flag (ZF) is 1).

Jump near if 0 (Zero Flag (ZF) is 1).

Jump short if zero (Zero Flag (ZF) is 1).

Jump short if zero (Zero Flag (ZF) is 1).

Load: AH = EFLAGS(SF:ZF:0:AF:0:PF:1:CF).

r16 = access rights referenced by r16/m16.

r16 = access rights referenced by r16/m16.

reg = access rights referenced by r32/m16.

reg = access rights referenced by r32/m16.

reg = access rights referenced by r32/m16.

reg = access rights referenced by r32/m16.

Load unaligned data from mem and return double quadword in xmm1.

Load MXCSR register from m32.

Store effective address for m16 in register r16.

Store effective address for m32 in register r16.

Store effective address for m64 in register r16.

Store effective address for m16 in register r32.

Store effective address for m32 in register r32.

Store effective address for m64 in register r32.

Store effective address for m16 in register r64.

Store effective address for m32 in register r64.

Store effective address for m64 in register r64.

Set RSP to RBP, then pop RBP.

Set SP to BP, then pop BP.

Serializes load operations.

Load FS:r16 with far pointer from memory.

Load FS:r32 with far pointer from memory.

Load FS:r64 with far pointer from memory.

Load GS:r16 with far pointer from memory.

Load GS:r32 with far pointer from memory.

Load GS:r64 with far pointer from memory.

Asserts LOCK# signal for duration of the accompanying instruction.

For legacy mode load word at address DS:(E)SI into AX.

For 64-bit mode load word at address (R)SI into AX.

For legacy mode load dword at address DS:(E)SI into EAX.

For 64-bit mode load dword at address (R)SI into EAX.

Load qword at address (R)SI into RAX.

For legacy mode load byte at address DS:(E)SI into AL.

For 64-bit mode load byte at address (R)SI into AL.

For legacy mode load byte at address DS:(E)SI into AL.

For 64-bit mode load byte at address (R)SI into AL.

For legacy mode load dword at address DS:(E)SI into EAX.

For 64-bit mode load dword at address (R)SI into EAX.

Load qword at address (R)SI into RAX.

For legacy mode load word at address DS:(E)SI into AX.

For 64-bit mode load word at address (R)SI into AX.

Decrement count; jump short if count != 0.

Decrement count; jump short if count != 0.

Decrement count; jump short if count != 0 and Zero Flag (ZF) is 1.

Decrement count; jump short if count != 0 and Zero Flag (ZF) is 1.

Decrement count; jump short if count != 0 and Zero Flag (ZF) is 0.

Decrement count; jump short if count != 0 and Zero Flag (ZF) is 0.

Load: r16 = segment limit, selector r16/m16.

Load: r16 = segment limit, selector r16/m16.

Load: r32 = segment limit, selector r32/m16.

Load: r32 = segment limit, selector r32/m16.

Load: r64 = segment limit, selector r32/m16.

Load: r64 = segment limit, selector r32/m16.

Load SS:r16 with far pointer from memory.

Load SS:r32 with far pointer from memory.

Load SS:r64 with far pointer from memory.

Count the number of leading zero bits in r/m16 and return result in r16.

Count the number of leading zero bits in r/m16 and return result in r16.

Count the number of leading zero bits in r/m32 and return result in r32.

Count the number of leading zero bits in r/m32 and return result in r32.

Count the number of leading zero bits in r/m64 and return result in r64.

Count the number of leading zero bits in r/m64 and return result in r64.

Selectively write bytes from xmm1 to memory location using the byte mask in xmm2.

The default memory location is specified by DS:DI, EDI or RDI.

Selectively write bytes from mm1 to memory location using the byte mask in mm2.

The default memory location is specified by DS:DI, EDI or RDI.

Return the maximum double-precision floating-point values between xmm2/m128 and xmm1.

Return the maximum double-precision floating-point values between xmm2/m128 and xmm1.

Return the maximum single-precision floating-point values between xmm2/m128 and xmm1.

Return the maximum single-precision floating-point values between xmm2/m128 and xmm1.

Return the maximum scalar double-precision floating-point value between xmm2/mem64 and xmm1.

Return the maximum scalar double-precision floating-point value between xmm2/mem64 and xmm1.

Return the maximum scalar single-precision floating-point value between xmm2/mem32 and xmm1.

Return the maximum scalar single-precision floating-point value between xmm2/mem32 and xmm1.

Serializes load and store operations.

Return the minimum double-precision floating-point values between xmm2/m128 and xmm1.

Return the minimum double-precision floating-point values between xmm2/m128 and xmm1.

Return the minimum single-precision floating-point values between xmm2/m128 and xmm1.

Return the minimum single-precision floating-point values between xmm2/m128 and xmm1.

Return the minimum scalar double-precision floating-point value between xmm2/mem64 and xmm1.

Return the minimum scalar double-precision floating-point value between xmm2/mem64 and xmm1.

Return the minimum scalar single-precision floating-point value between xmm2/mem32 and xmm1.

Return the minimum scalar single-precision floating-point value between xmm2/mem32 and xmm1.

Sets up a linear address range to be monitored by hardware and activates the monitor.

The address range should be a write-back memory caching type.

The address is DS:EAX (DS:RAX in 64-bit mode).

Move byte at segment:offset to AL.

Move byte at offset to AL.

Move word at segment:offset to AX.

Move doubleword at segment:offset to EAX.

Move imm16 to r/m16.

Move r16 to r/m16.

Move segment register to r/m16.

Move imm32 to r/m32.

Move r32 to r/m32.

Move imm32 sign extended to 64-bits to r/m64.

Move r64 to r/m64.

Move zero extended 16-bit segment register to r/m64.

Move imm8 to r/m8.

Move r8 to r/m8.

Move r8 to r/m8.

Move AX to segment:offset.

Move EAX to segment:offset.

Move RAX to offset.

Move AL to segment:offset.

Move AL to offset.

Move imm16 to r16.

Move imm16 to r/m16.

Move r/m16 to r16.

Move r16 to r/m16.

Move r/m16 to r16.

Move segment register to r/m16.

Move imm32 to r32.

Move imm32 to r/m32.

Move r/m32 to r32.

Move r32 to r/m32.

Move r/m32 to r32.

Move imm32 sign extended to 64-bits to r/m64.

Move imm64 to r64.

Move r/m64 to r64.

Move r64 to r/m64.

Move r/m64 to r64.

Move zero extended 16-bit segment register to r/m64.

Move imm8 to r8.

Move imm8 to r/m8.

Move r/m8 to r8.

Move r8 to r/m8.

Move r/m8 to r8.

Move r8 to r/m8.

Move r/m8 to r8.

Move quadword at offset to RAX.

Move imm8 to r8.

Move imm8 to r/m8.

Move r/m8 to r8.

Move r8 to r/m8.

Move r/m8 to r8.

Move r8 to r/m8.

Move r/m8 to r8.

Move r/m16 to segment register.

Move lower 16 bits of r/m64 to segment register.

Move r/m16 to segment register.

Move lower 16 bits of r/m64 to segment register.

Move packed double-precision floating-point values from xmm1 to xmm2/m128.

Move packed double-precision floating-point values from xmm2/m128 to xmm1.

Move packed double-precision floating-point values from xmm2/m128 to xmm1.

Move packed double-precision floating-point values from xmm1 to xmm2/m128.

Move packed single-precision floating-point values from xmm1 to xmm2/m128.

Move packed single-precision floating-point values from xmm2/m128 to xmm1.

Move packed single-precision floating-point values from xmm2/m128 to xmm1.

Move packed single-precision floating-point values from xmm1 to xmm2/m128.

Reverse byte order in r16 and move to m16.

Reverse byte order in r32 and move to m32.

Reverse byte order in r64 and move to m64.

Reverse byte order in m16 and move to r16.

Reverse byte order in m32 and move to r32.

Reverse byte order in m64 and move to r64.

Move doubleword from mm to r/m32.

Move doubleword from xmm register to r/m32.

Move doubleword from r/m32 to mm.

Move doubleword from r/m32 to mm.

Move doubleword from mm to r/m32.

Move doubleword from xmm register to r/m32.

Move doubleword from r/m32 to xmm.

Move doubleword from r/m32 to xmm.

Move one double-precision floating-point value from the lower 64-bit operand in xmm2/m64 to xmm1 and duplicate.

Move one double-precision floating-point value from the lower 64-bit operand in xmm2/m64 to xmm1 and duplicate.

Move low quadword from xmm to mm.

Move aligned double quadword from xmm1 to xmm2/m128.

Move aligned double quadword from xmm2/m128 to xmm1.

Move aligned double quadword from xmm2/m128 to xmm1.

Move aligned double quadword from xmm1 to xmm2/m128.

Move unaligned double quadword from xmm1 to xmm2/m128.

Move unaligned double quadword from xmm2/m128 to xmm1.

Move unaligned double quadword from xmm2/m128 to xmm1.

Move unaligned double quadword from xmm1 to xmm2/m128.

Move two packed single-precision floating-point values from high quadword of xmm2 to low quadword of xmm1.

Move double-precision floating-point value from high quadword of xmm to m64.

Move double-precision floating-point value from m64 to high quadword of xmm.

Move two packed single-precision floating-point values from high quadword of xmm to m64.

Move two packed single-precision floating-point values from m64 to high quadword of xmm.

Move two packed single-precision floating-point values from low quadword of xmm2 to high quadword of xmm1.

Move double-precision floating-point nvalue from low quadword of xmm register to m64.

Move double-precision floating-point value from m64 to low quadword of xmm register.

Move two packed single-precision floating-point values from low quadword of xmm to m64.

Move two packed single-precision floating-point values from m64 to low quadword of xmm.

Extract 2-bit sign mask from xmm and store in r32.

The upper bits of r32 or r64 are filled with zeros.

Extract 2-bit sign mask from xmm and store in r64.

The upper bits of r32 or r64 are filled with zeros.

Extract 4-bit sign mask from xmm and store in r32.

The upper bits of r32 or r64 are filled with zeros.

Extract 4-bit sign mask from xmm and store in r64.

The upper bits of r32 or r64 are filled with zeros.

Move double quadword from xmm to m128 using non-temporal hint.

Move double quadword from m128 to xmm using non-temporal hint if Write Commit (WC) memory type.

Move doubleword from r32 to m32 using non-temporal hint.

Move quadword from r64 to m64 using non-temporal hint.

Move packed double-precision floating-point values from xmm to m128 using non-temporal hint.

Move packed single-precision floating-point values from xmm to m128 using non-temporal hint.

Move quadword from mm to m64 using non-temporal hint.

Move quadword from mm to r/m64.

Move quadword from mm to mm/m64.

Move quadword from xmm register to r/m64.

Move quadword from xmm1 to xmm2/mem64.

Move quadword from r/m64 to mm.

Move quadword from mm/m64 to mm.

Move quadword from mm/m64 to mm.

Move quadword from mm to mm/m64.

Move quadword from r/m64 to mm.

Move quadword from mm to r/m64.

Move quadword from xmm register to r/m64.

Move quadword from r/m64 to xmm.

Move quadword from xmm2/mem64 to xmm1.

Move quadword from r/m64 to xmm.

Move quadword from xmm2/mem64 to xmm1.

Move quadword from xmm1 to xmm2/mem64.

Move quadword from mmx to low quadword of xmm.

For legacy mode, move word from address DS:(E)SI to ES:(E)DI.

For 64-bit mode move word at address (R|E)SI to (R|E)DI.

For legacy mode, move dword from address DS:(E)SI to ES:(E)DI.

For 64-bit mode move dword from address (R|E)SI to (R|E)DI.

Move qword from address (R|E)SI to (R|E)DI.

For legacy mode, Move byte from address DS:(E)SI to ES:(E)DI.

For 64-bit mode move byte from address (R|E)SI to (R|E)DI.

For legacy mode, Move byte from address DS:(E)SI to ES:(E)DI.

For 64-bit mode move byte from address (R|E)SI to (R|E)DI.

For legacy mode, move dword from address DS:(E)SI to ES:(E)DI.

For 64-bit mode move dword from address (R|E)SI to (R|E)DI.

Move scalar double-precision floating-point value from xmm1 register to xmm2/m64.

Move scalar double-precision floating-point value from xmm2/m64 to xmm1.

Move scalar double-precision floating-point value from xmm2/m64 to xmm1.

Move scalar double-precision floating-point value from xmm1 register to xmm2/m64.

Move two single-precision floating-point values from the higher 32-bit operand of each qword in xmm2/m128 to xmm1 and duplicate each 32-bit operand to the lower 32-bits of each qword.

Move two single-precision floating-point values from the higher 32-bit operand of each qword in xmm2/m128 to xmm1 and duplicate each 32-bit operand to the lower 32-bits of each qword.

Move two single-precision floating-point values from the lower 32-bit operand of each qword in xmm2/m128 to xmm1 and duplicate each 32-bit operand to the higher 32-bits of each qword.

Move two single-precision floating-point values from the lower 32-bit operand of each qword in xmm2/m128 to xmm1 and duplicate each 32-bit operand to the higher 32-bits of each qword.

Move qword from address (R|E)SI to (R|E)DI.

Move scalar single-precision floating-point value from xmm1 register to xmm2/m32.

Move scalar single-precision floating-point value from xmm2/m32 to xmm1.

Move scalar single-precision floating-point value from xmm2/m32 to xmm1.

Move scalar single-precision floating-point value from xmm1 register to xmm2/m32.

For legacy mode, move word from address DS:(E)SI to ES:(E)DI.

For 64-bit mode move word at address (R|E)SI to (R|E)DI.

Move r/m8 to r16 with sign-extension.

Move r8 to r16 with sign-extension.

Move r/m8 to r16 with sign-extension.

Move r/m16 to r32, with sign-extension.

Move r/m8 to r32 with sign-extension.

Move r16 to r32, with sign-extension.

Move r8 to r32 with sign-extension.

Move r/m8 to r32 with sign-extension.

Move r/m16 to r64 with sign-extension.

Move r/m8 to r64 with sign-extension.

Move r16 to r64 with sign-extension.

Move r8 to r64 with sign-extension.

Move r/m32 to r64 with sign-extension.

Move r32 to r64 with sign-extension.

Move packed double-precision floating-point values from xmm1 to xmm2/m128.

Move packed double-precision floating-point values from xmm2/m128 to xmm1.

Move packed double-precision floating-point values from xmm2/m128 to xmm1.

Move packed double-precision floating-point values from xmm1 to xmm2/m128.

Move packed single-precision floating-point values from xmm1 to xmm2/m128.

Move packed single-precision floating-point values from xmm2/m128 to xmm1.

Move packed single-precision floating-point values from xmm2/m128 to xmm1.

Move packed single-precision floating-point values from xmm1 to xmm2/m128.

Move r/m8 to r16 with zero-extension.

Move r/m8 to r16 with zero-extension.

Move r/m8 to r16 with zero-extension.

Move r/m16 to r32 with zero-extension.

Move r/m8 to r32 with zero-extension.

Move r/m16 to r32 with zero-extension.

Move r/m8 to r32 with zero-extension.

Move r/m8 to r32 with zero-extension.

Move r/m16 to r64 with zero-extension.

Move r/m8 to r64 with zero-extension.

Move r/m16 to r64 with zero-extension.

Move r/m8 to r64 with zero-extension.

Sums absolute 8-bit integer difference of adjacent groups of 4 byte integers in xmm1 and xmm2/m128 and writes the results in xmm1.

Starting offsets within xmm1 and xmm2/m128 are determined by imm8.

Sums absolute 8-bit integer difference of adjacent groups of 4 byte integers in xmm1 and xmm2/m128 and writes the results in xmm1.

Starting offsets within xmm1 and xmm2/m128 are determined by imm8.

Unsigned multiply (DX:AX = AX * r/m16).

Unsigned multiply (EDX:EAX = EAX * r/m32).

Unsigned multiply (RDX:RAX = RAX * r/m64.

Unsigned multiply (AX = AL * r/m8).

Unsigned multiply (DX:AX = AX * r/m16).

Unsigned multiply (EDX:EAX = EAX * r/m32).

Unsigned multiply (RDX:RAX = RAX * r/m64.

Unsigned multiply (AX = AL * r/m8).

Unsigned multiply (AX = AL * r/m8).

Multiply packed double-precision floating-point values in xmm2/m128 by xmm1.

Multiply packed double-precision floating-point values in xmm2/m128 by xmm1.

Multiply packed single-precision floating-point values in xmm2/mem by xmm1.

Multiply packed single-precision floating-point values in xmm2/mem by xmm1.

Multiply the low double-precision floating-point value in xmm2/mem64 by low double-precision floating-point value in xmm1.

Multiply the low double-precision floating-point value in xmm2/mem64 by low double-precision floating-point value in xmm1.

Multiply the low single-precision floating-point value in xmm2/mem by the low single-precision floating-point value in xmm1.

Multiply the low single-precision floating-point value in xmm2/mem by the low single-precision floating-point value in xmm1.

Unsigned multiply of r/m32 with EDX without affecting arithmetic flags.

Unsigned multiply of r/m32 with EDX without affecting arithmetic flags.

Unsigned multiply of r/m64 with RDX without affecting arithmetic flags.

Unsigned multiply of r/m64 with RDX without affecting arithmetic flags.

A hint that allow the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events.

Two’s complement negate r/m16.

Two’s complement negate r/m32.

Two’s complement negate r/m64.

Two’s complement negate r/m8.

Two’s complement negate r/m16.

Two’s complement negate r/m32.

Two’s complement negate r/m64.

Two’s complement negate r/m8.

Two’s complement negate r/m8.

One byte no-operation instruction.

Multi-byte no-operation instruction.

Multi-byte no-operation instruction.

Multi-byte no-operation instruction.

Multi-byte no-operation instruction.

Reverse each bit of r/m16.

Reverse each bit of r/m32.

Reverse each bit of r/m64.

Reverse each bit of r/m8.

Reverse each bit of r/m16.

Reverse each bit of r/m32.

Reverse each bit of r/m64.

Reverse each bit of r/m8.

Reverse each bit of r/m8.

AL OR imm8.

AX OR imm16.

EAX OR imm32.

r/m16 OR imm16.

r/m16 OR imm8 (sign-extended).

r/m16 OR r16.

r/m32 OR imm32.

r/m32 OR imm8 (sign-extended).

r/m32 OR r32.

r/m64 OR imm32 (sign-extended).

r/m64 OR imm8 (sign-extended).

r/m64 OR r64.

r/m8 OR imm8.

r/m8 OR r8.

r/m8 OR r8.

r/m16 OR imm16.

r/m16 OR imm8 (sign-extended).

r16 OR r/m16.

r/m16 OR r16.

r16 OR r/m16.

r/m32 OR imm32.

r/m32 OR imm8 (sign-extended).

r32 OR r/m32.

r/m32 OR r32.

r32 OR r/m32.

r/m64 OR imm32 (sign-extended).

r/m64 OR imm8 (sign-extended).

r64 OR r/m64.

r/m64 OR r64.

r64 OR r/m64.

r/m8 OR imm8.

r8 OR r/m8.

r/m8 OR r8.

r8 OR r/m8.

r/m8 OR r8.

r8 OR r/m8.

RAX OR imm32 (sign-extended).

r/m8 OR imm8.

r8 OR r/m8.

r/m8 OR r8.

r8 OR r/m8.

r/m8 OR r8.

r8 OR r/m8.

Bitwise OR of xmm2/m128 and xmm1.

Bitwise OR of xmm2/m128 and xmm1.

Bitwise OR of xmm1 and xmm2/m128.

Bitwise OR of xmm1 and xmm2/m128.

Output byte in AL to I/O port address in DX.

Output word in AX to I/O port address in DX.

Output doubleword in EAX to I/O port address in DX.

Output byte in AL to I/O port address imm8.

Output word in AX to I/O port address imm8.

Output doubleword in EAX to I/O port address imm8.

Output word from memory location specified in DS:(E)SI or RSI to I/O port specified in DX.

Output doubleword from memory location specified in DS:(E)SI or RSI to I/O port specified in DX.

Output byte from memory location specified in DS:(E)SI or RSI to I/O port specified in DX.

Output byte from memory location specified in DS:(E)SI or RSI to I/O port specified in DX.

Output doubleword from memory location specified in DS:(E)SI or RSI to I/O port specified in DX.

Output word from memory location specified in DS:(E)SI or RSI to I/O port specified in DX.

Compute the absolute value of bytes in mm2/m64 and store unsigned result in mm1.

Compute the absolute value of bytes in mm2/m64 and store unsigned result in mm1.

Compute the absolute value of bytes in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of bytes in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of 32-bit integers in mm2/m64 and store unsigned result in mm1.

Compute the absolute value of 32-bit integers in mm2/m64 and store unsigned result in mm1.

Compute the absolute value of 32-bit integers in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of 32-bit integers in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of 16-bit integers in mm2/m64 and store unsigned result in mm1.

Compute the absolute value of 16-bit integers in mm2/m64 and store unsigned result in mm1.

Compute the absolute value of 16-bit integers in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of 16-bit integers in xmm2/m128 and store unsigned result in xmm1.

Converts 2 packed signed doubleword integers from mm1 and from mm2/m64 into 4 packed signed word integers in mm1 using signed saturation.

Converts 2 packed signed doubleword integers from mm1 and from mm2/m64 into 4 packed signed word integers in mm1 using signed saturation.

Converts 4 packed signed doubleword integers from xmm1 and from xmm2/m128 into 8 packed signed word integers in xmm1 using signed saturation.

Converts 4 packed signed doubleword integers from xmm1 and from xmm2/m128 into 8 packed signed word integers in xmm1 using signed saturation.

Converts 4 packed signed word integers from mm1 and from mm2/m64 into 8 packed signed byte integers in mm1 using signed saturation.

Converts 4 packed signed word integers from mm1 and from mm2/m64 into 8 packed signed byte integers in mm1 using signed saturation.

Converts 8 packed signed word integers from xmm1 and from xmm2/m128 into 16 packed signed byte integers in xmm1 using signed saturation.

Converts 8 packed signed word integers from xmm1 and from xmm2/m128 into 16 packed signed byte integers in xmm1 using signed saturation.

Convert 4 packed signed doubleword integers from xmm1 and 4 packed signed doubleword integers from xmm2/m128 into 8 packed unsigned word integers in xmm1 using unsigned saturation.

Convert 4 packed signed doubleword integers from xmm1 and 4 packed signed doubleword integers from xmm2/m128 into 8 packed unsigned word integers in xmm1 using unsigned saturation.

Converts 4 signed word integers from mm and 4 signed word integers from mm/m64 into 8 unsigned byte integers in mm using unsigned saturation.

Converts 4 signed word integers from mm and 4 signed word integers from mm/m64 into 8 unsigned byte integers in mm using unsigned saturation.

Converts 8 signed word integers from xmm1 and 8 signed word integers from xmm2/m128 into 16 unsigned byte integers in xmm1 using unsigned saturation.

Converts 8 signed word integers from xmm1 and 8 signed word integers from xmm2/m128 into 16 unsigned byte integers in xmm1 using unsigned saturation.

Add packed byte integers from mm/m64 and mm.

Add packed byte integers from mm/m64 and mm.

Add packed byte integers from xmm2/m128 and xmm1.

Add packed byte integers from xmm2/m128 and xmm1.

Add packed doubleword integers from mm/m64 and mm.

Add packed doubleword integers from mm/m64 and mm.

Add packed doubleword integers from xmm2/m128 and xmm1.

Add packed doubleword integers from xmm2/m128 and xmm1.

Add quadword integer mm2/m64 to mm1.

Add quadword integer mm2/m64 to mm1.

Add packed quadword integers xmm2/m128 to xmm1.

Add packed quadword integers xmm2/m128 to xmm1.

Add packed signed byte integers from mm/m64 and mm and saturate the results.

Add packed signed byte integers from mm/m64 and mm and saturate the results.

Add packed signed byte integers from xmm2/m128 and xmm1 saturate the results.

Add packed signed byte integers from xmm2/m128 and xmm1 saturate the results.

Add packed signed word integers from mm/m64 and mm and saturate the results.

Add packed signed word integers from mm/m64 and mm and saturate the results.

Add packed signed word integers from xmm2/m128 and xmm1 and saturate the results.

Add packed signed word integers from xmm2/m128 and xmm1 and saturate the results.

Add packed unsigned byte integers from mm/m64 and mm and saturate the results.

Add packed unsigned byte integers from mm/m64 and mm and saturate the results.

Add packed unsigned byte integers from xmm2/m128 and xmm1 saturate the results.

Add packed unsigned byte integers from xmm2/m128 and xmm1 saturate the results.

Add packed unsigned word integers from mm/m64 and mm and saturate the results.

Add packed unsigned word integers from mm/m64 and mm and saturate the results.

Add packed unsigned word integers from xmm2/m128 to xmm1 and saturate the results.

Add packed unsigned word integers from xmm2/m128 to xmm1 and saturate the results.

Add packed word integers from mm/m64 and mm.

Add packed word integers from mm/m64 and mm.

Add packed word integers from xmm2/m128 and xmm1.

Add packed word integers from xmm2/m128 and xmm1.

Concatenate destination and source operands, extract byte-aligned result shifted to the right by constant value in imm8 into mm1.

Concatenate destination and source operands, extract byte-aligned result shifted to the right by constant value in imm8 into mm1.

Concatenate destination and source operands, extract byte-aligned result shifted to the right by constant value in imm8 into xmm1.

Concatenate destination and source operands, extract byte-aligned result shifted to the right by constant value in imm8 into xmm1.

Bitwise AND mm/m64 and mm.

Bitwise AND mm/m64 and mm.

Bitwise AND of xmm2/m128 and xmm1.

Bitwise AND of xmm2/m128 and xmm1.

Bitwise AND NOT of mm/m64 and mm.

Bitwise AND NOT of mm/m64 and mm.

Bitwise AND NOT of xmm2/m128 and xmm1.

Bitwise AND NOT of xmm2/m128 and xmm1.

Gives hint to processor that improves performance of spin-wait loops.

Average packed unsigned byte integers from mm2/m64 and mm1 with rounding.

Average packed unsigned byte integers from mm2/m64 and mm1 with rounding.

Average packed unsigned byte integers from xmm2/m128 and xmm1 with rounding.

Average packed unsigned byte integers from xmm2/m128 and xmm1 with rounding.

Average packed unsigned word integers from mm2/m64 and mm1 with rounding.

Average packed unsigned word integers from mm2/m64 and mm1 with rounding.

Average packed unsigned word integers from xmm2/m128 and xmm1 with rounding.

Average packed unsigned word integers from xmm2/m128 and xmm1 with rounding.

Select byte values from xmm1 and xmm2/m128 from mask specified in the high bit of each byte in XMM0 and store the values into xmm1.

Select byte values from xmm1 and xmm2/m128 from mask specified in the high bit of each byte in XMM0 and store the values into xmm1.

Select words from xmm1 and xmm2/m128 from mask specified in imm8 and store the values into xmm1.

Select words from xmm1 and xmm2/m128 from mask specified in imm8 and store the values into xmm1.

Carry-less multiplication of one quadword of xmm1 by one quadword of xmm2/m128, stores the 128-bit result in xmm1.

The immediate is used to determine which quadwords of xmm1 and xmm2/m128 should be used.

Carry-less multiplication of one quadword of xmm1 by one quadword of xmm2/m128, stores the 128-bit result in xmm1.

The immediate is used to determine which quadwords of xmm1 and xmm2/m128 should be used.

Compare packed bytes in mm/m64 and mm for equality.

Compare packed bytes in mm/m64 and mm for equality.

Compare packed bytes in xmm2/m128 and xmm1 for equality.

Compare packed bytes in xmm2/m128 and xmm1 for equality.

Compare packed doublewords in mm/m64 and mm for equality.

Compare packed doublewords in mm/m64 and mm for equality.

Compare packed doublewords in xmm2/m128 and xmm1 for equality.

Compare packed doublewords in xmm2/m128 and xmm1 for equality.

Compare packed qwords in xmm2/m128 and xmm1 for equality.

Compare packed qwords in xmm2/m128 and xmm1 for equality.

Compare packed words in mm/m64 and mm for equality.

Compare packed words in mm/m64 and mm for equality.

Compare packed words in xmm2/m128 and xmm1 for equality.

Compare packed words in xmm2/m128 and xmm1 for equality.

Perform a packed comparison of string data with explicit lengths, generating an index, and storing the result in ECX.

Perform a packed comparison of string data with explicit lengths, generating an index, and storing the result in ECX.

Perform a packed comparison of string data with explicit lengths, generating a mask, and storing the result in XMM0.

Perform a packed comparison of string data with explicit lengths, generating a mask, and storing the result in XMM0.

Compare packed signed byte integers in mm and mm/m64 for greater than.

Compare packed signed byte integers in mm and mm/m64 for greater than.

Compare packed signed byte integers in xmm1 and xmm2/m128 for greater than.

Compare packed signed byte integers in xmm1 and xmm2/m128 for greater than.

Compare packed signed doubleword integers in mm and mm/m64 for greater than.

Compare packed signed doubleword integers in mm and mm/m64 for greater than.

Compare packed signed doubleword integers in xmm1 and xmm2/m128 for greater than.

Compare packed signed doubleword integers in xmm1 and xmm2/m128 for greater than.

Compare packed signed qwords in xmm2/m128 and xmm1 for greater than.

Compare packed signed qwords in xmm2/m128 and xmm1 for greater than.

Compare packed signed word integers in mm and mm/m64 for greater than.

Compare packed signed word integers in mm and mm/m64 for greater than.

Compare packed signed word integers in xmm1 and xmm2/m128 for greater than.

Compare packed signed word integers in xmm1 and xmm2/m128 for greater than.

Perform a packed comparison of string data with implicit lengths, generating an index, and storing the result in ECX.

Perform a packed comparison of string data with implicit lengths, generating an index, and storing the result in ECX.

Perform a packed comparison of string data with implicit lengths, generating a mask, and storing the result in XMM0.

Perform a packed comparison of string data with implicit lengths, generating a mask, and storing the result in XMM0.

Parallel deposit of bits from r32b using mask in r/m32, result is written to r32a.

Parallel deposit of bits from r32b using mask in r/m32, result is written to r32a.

Parallel deposit of bits from r64b using mask in r/m64, result is written to r64a.

Parallel deposit of bits from r64b using mask in r/m64, result is written to r64a.

Parallel extract of bits from r32b using mask in r/m32, result is written to r32a.

Parallel extract of bits from r32b using mask in r/m32, result is written to r32a.

Parallel extract of bits from r64b using mask in r/m64, result is written to r64a.

Parallel extract of bits from r64b using mask in r/m64, result is written to r64a.

Extract a byte integer value from xmm2 at the source byte offset specified by imm8 into rreg or m8.

The upper bits of r32 or r64 are zeroed.

Extract a byte integer value from xmm2 at the source byte offset specified by imm8 into rreg or m8.

The upper bits of r32 or r64 are zeroed.

Extract a byte integer value from xmm2 at the source byte offset specified by imm8 into rreg or m8.

The upper bits of r32 or r64 are zeroed.

Extract a dword integer value from xmm2 at the source dword offset specified by imm8 into r/m32.

Extract a dword integer value from xmm2 at the source dword offset specified by imm8 into r/m32.

Extract a qword integer value from xmm2 at the source qword offset specified by imm8 into r/m64.

Extract a qword integer value from xmm2 at the source qword offset specified by imm8 into r/m64.

Extract the word specified by imm8 from xmm and copy it to lowest 16 bits of reg or m16.

Zero-extend the result in the destination, r32 or r64.

Extract the word specified by imm8 from mm and move it to reg, bits 15-0.

The upper bits of r32 or r64 is zeroed.

Extract the word specified by imm8 from xmm and move it to reg, bits 15-0.

The upper bits of r32 or r64 is zeroed.

Extract the word specified by imm8 from xmm and move it to reg, bits 15-0.

The upper bits of r32 or r64 is zeroed. Extract the word specified by imm8 from xmm and move it to reg, bits 15-0.

The upper bits of r32 or r64 is zeroed.

Extract the word specified by imm8 from mm and move it to reg, bits 15-0.

The upper bits of r32 or r64 is zeroed.

Extract the word specified by imm8 from xmm and move it to reg, bits 15-0.

The upper bits of r32 or r64 is zeroed.

Extract the word specified by imm8 from xmm and move it to reg, bits 15-0.

The upper bits of r32 or r64 is zeroed.

Add 32-bit integers horizontally, pack to mm1.

Add 32-bit integers horizontally, pack to mm1.

Add 32-bit integers horizontally, pack to xmm1.

Add 32-bit integers horizontally, pack to xmm1.

Add 16-bit signed integers horizontally, pack saturated integers to mm1.

Add 16-bit signed integers horizontally, pack saturated integers to mm1.

Add 16-bit signed integers horizontally, pack saturated integers to xmm1.

Add 16-bit signed integers horizontally, pack saturated integers to xmm1.

Add 16-bit integers horizontally, pack to mm1.

Add 16-bit integers horizontally, pack to mm1.

Add 16-bit integers horizontally, pack to xmm1.

Add 16-bit integers horizontally, pack to xmm1.

Find the minimum unsigned word in xmm2/m128 and place its value in the low word of xmm1 and its index in the second-lowest word of xmm1.

Find the minimum unsigned word in xmm2/m128 and place its value in the low word of xmm1 and its index in the second-lowest word of xmm1.

Subtract 32-bit signed integers horizontally, pack to mm1.

Subtract 32-bit signed integers horizontally, pack to mm1.

Subtract 32-bit signed integers horizontally, pack to xmm1.

Subtract 32-bit signed integers horizontally, pack to xmm1.

Subtract 16-bit signed integer horizontally, pack saturated integers to mm1.

Subtract 16-bit signed integer horizontally, pack saturated integers to mm1.

Subtract 16-bit signed integer horizontally, pack saturated integers to xmm1.

Subtract 16-bit signed integer horizontally, pack saturated integers to xmm1.

Subtract 16-bit signed integers horizontally, pack to mm1.

Subtract 16-bit signed integers horizontally, pack to mm1.

Subtract 16-bit signed integers horizontally, pack to XMM1.

Subtract 16-bit signed integers horizontally, pack to xmm1.

Insert a byte integer value from r32/m8 into xmm1 at the destination element in xmm1 specified by imm8.

Insert a byte integer value from r32/m8 into xmm1 at the destination element in xmm1 specified by imm8.

Insert a dword integer value from r/m32 into the xmm1 at the destination element specified by imm8.

Insert a dword integer value from r/m32 into the xmm1 at the destination element specified by imm8.

Insert the low word from r32 or from m16 into mm at the word position specified by imm8.

Insert the low word from r32 or from m16 into mm at the word position specified by imm8.

Move the low word of r32 or from m16 into xmm at the word position specified by imm8.

Move the low word of r32 or from m16 into xmm at the word position specified by imm8.

Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words to mm1.

Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words to mm1.

Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words to xmm1.

Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words to xmm1.

Multiply the packed words in mm by the packed words in mm/m64, add adjacent doubleword results, and store in mm.

Multiply the packed words in mm by the packed words in mm/m64, add adjacent doubleword results, and store in mm.

Multiply the packed word integers in xmm1 by the packed word integers in xmm2/m128, add adjacent doubleword results, and store in xmm1.

Multiply the packed word integers in xmm1 by the packed word integers in xmm2/m128, add adjacent doubleword results, and store in xmm1.

Compare packed signed byte integers in xmm1 and xmm2/m128 and store packed maximum values in xmm1.

Compare packed signed byte integers in xmm1 and xmm2/m128 and store packed maximum values in xmm1.

Compare packed signed dword integers in xmm1 and xmm2/m128 and store packed maximum values in xmm1.

Compare packed signed dword integers in xmm1 and xmm2/m128 and store packed maximum values in xmm1.

Compare signed word integers in mm2/m64 and mm1 and return maximum values.

Compare signed word integers in mm2/m64 and mm1 and return maximum values.

Compare signed word integers in xmm2/m128 and xmm1 and return maximum values.

Compare signed word integers in xmm2/m128 and xmm1 and return maximum values.

Compare unsigned byte integers in mm2/m64 and mm1 and returns maximum values.

Compare unsigned byte integers in mm2/m64 and mm1 and returns maximum values.

Compare unsigned byte integers in xmm2/m128 and xmm1 and returns maximum values.

Compare unsigned byte integers in xmm2/m128 and xmm1 and returns maximum values.

Compare packed unsigned dword integers in xmm1 and xmm2/m128 and store packed maximum values in xmm1.

Compare packed unsigned dword integers in xmm1 and xmm2/m128 and store packed maximum values in xmm1.

Compare packed unsigned word integers in xmm1 and xmm2/m128 and store packed maximum values in xmm1.

Compare packed unsigned word integers in xmm1 and xmm2/m128 and store packed maximum values in xmm1.

Compare packed signed byte integers in xmm1 and xmm2/m128 and store packed minimum values in xmm1.

Compare packed signed byte integers in xmm1 and xmm2/m128 and store packed minimum values in xmm1.

Compare packed signed dword integers in xmm1 and xmm2/m128 and store packed minimum values in xmm1.

Compare packed signed dword integers in xmm1 and xmm2/m128 and store packed minimum values in xmm1.

Compare signed word integers in mm2/m64 and mm1 and return minimum values.

Compare signed word integers in mm2/m64 and mm1 and return minimum values.

Compare signed word integers in xmm2/m128 and xmm1 and return minimum values.

Compare signed word integers in xmm2/m128 and xmm1 and return minimum values.

Compare unsigned byte integers in mm2/m64 and mm1 and returns minimum values.

Compare unsigned byte integers in mm2/m64 and mm1 and returns minimum values.

Compare unsigned byte integers in xmm2/m128 and xmm1 and returns minimum values.

Compare unsigned byte integers in xmm2/m128 and xmm1 and returns minimum values.

Compare packed unsigned dword integers in xmm1 and xmm2/m128 and store packed minimum values in xmm1.

Compare packed unsigned dword integers in xmm1 and xmm2/m128 and store packed minimum values in xmm1.

Compare packed unsigned word integers in xmm1 and xmm2/m128 and store packed minimum values in xmm1.

Compare packed unsigned word integers in xmm1 and xmm2/m128 and store packed minimum values in xmm1.

Move a byte mask of mm to register.

The upper bits of r32 or r64 are zeroed.

Move a byte mask of xmm to register.

The upper bits of r32 or r64 are zeroed.

Move a byte mask of mm to register.

The upper bits of r32 or r64 are zeroed.

Move a byte mask of xmm to register.

The upper bits of r32 or r64 are zeroed.

Sign extend 4 packed signed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed signed 32-bit integers in xmm1.

Sign extend 4 packed signed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed signed 32-bit integers in xmm1.

Sign extend 2 packed signed 8-bit integers in the low 2 bytes of xmm2.m16 to 2 packed signed 64-bit integers in xmm1.

Sign extend 2 packed signed 8-bit integers in the low 2 bytes of xmm2.m16 to 2 packed signed 64-bit integers in xmm1.

Sign extend 8 packed signed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed signed 16-bit integers in xmm1.

Sign extend 8 packed signed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed signed 16-bit integers in xmm1.

Sign extend 2 packed signed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed signed 64-bit integers in xmm1.

Sign extend 2 packed signed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed signed 64-bit integers in xmm1.

Sign extend 4 packed signed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed signed 32-bit integers in xmm1.

Sign extend 4 packed signed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed signed 32-bit integers in xmm1.

Sign extend 2 packed signed 16-bit integers in the low 4 bytes of xmm2/m32 to 2 packed signed 64-bit integers in xmm1.

Sign extend 2 packed signed 16-bit integers in the low 4 bytes of xmm2/m32 to 2 packed signed 64-bit integers in xmm1.

Zero extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 32-bit integers in xmm1.

Zero extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 32-bit integers in xmm1.

Zero extend 2 packed 8-bit integers in the low 2 bytes of xmm2.m16 to 2 packed 64-bit integers in xmm1.

Zero extend 2 packed 8-bit integers in the low 2 bytes of xmm2.m16 to 2 packed 64-bit integers in xmm1.

Zero extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 16-bit integers in xmm1.

Zero extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 16-bit integers in xmm1.

Zero extend 2 packed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed 64-bit integers in xmm1.

Zero extend 2 packed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed 64-bit integers in xmm1.

Zero extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 32-bit integers in xmm1.

Zero extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 32-bit integers in xmm1.

Zero extend 2 packed 16-bit integers in the low 4 bytes of xmm2/m32 to 2 packed 64-bit integers in xmm1.

Zero extend 2 packed 16-bit integers in the low 4 bytes of xmm2/m32 to 2 packed 64-bit integers in xmm1.

Multiply the packed signed dword integers in xmm1 and xmm2/m128 and store the quadword product in xmm1.

Multiply the packed signed dword integers in xmm1 and xmm2/m128 and store the quadword product in xmm1.

Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits to mm1.

Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits to mm1.

Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits to xmm1.

Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits to xmm1.

Multiply the packed unsigned word integers in mm1 register and mm2/m64, and store the high 16 bits of the results in mm1.

Multiply the packed unsigned word integers in mm1 register and mm2/m64, and store the high 16 bits of the results in mm1.

Multiply the packed unsigned word integers in xmm1 and xmm2/m128, and store the high 16 bits of the results in xmm1.

Multiply the packed unsigned word integers in xmm1 and xmm2/m128, and store the high 16 bits of the results in xmm1.

Multiply the packed signed word integers in mm1 register and mm2/m64, and store the high 16 bits of the results in mm1.

Multiply the packed signed word integers in mm1 register and mm2/m64, and store the high 16 bits of the results in mm1.

Multiply the packed signed word integers in xmm1 and xmm2/m128, and store the high 16 bits of the results in xmm1.

Multiply the packed signed word integers in xmm1 and xmm2/m128, and store the high 16 bits of the results in xmm1.

Multiply the packed dword signed integers in xmm1 and xmm2/m128 and store the low 32 bits of each product in xmm1.

Multiply the packed dword signed integers in xmm1 and xmm2/m128 and store the low 32 bits of each product in xmm1.

Multiply the packed signed word integers in mm1 register and mm2/m64, and store the low 16 bits of the results in mm1.

Multiply the packed signed word integers in mm1 register and mm2/m64, and store the low 16 bits of the results in mm1.

Multiply the packed signed word integers in xmm1 and xmm2/m128, and store the low 16 bits of the results in xmm1.

Multiply the packed signed word integers in xmm1 and xmm2/m128, and store the low 16 bits of the results in xmm1.

Multiply unsigned doubleword integer in mm1 by unsigned doubleword integer in mm2/m64, and store the quadword result in mm1.

Multiply unsigned doubleword integer in mm1 by unsigned doubleword integer in mm2/m64, and store the quadword result in mm1.

Multiply packed unsigned doubleword integers in xmm1 by packed unsigned doubleword integers in xmm2/m128, and store the quadword results in xmm1.

Multiply packed unsigned doubleword integers in xmm1 by packed unsigned doubleword integers in xmm2/m128, and store the quadword results in xmm1.

Pop top of stack into FS and increment stack pointer by 64 bits.

Pop top of stack into FS and increment stack pointer by 16 bits.

Pop top of stack into GS and increment stack pointer by 64 bits.

Pop top of stack into GS and increment stack pointer by 16 bits.

Pop top of stack into m16 and increment stack pointer.

Pop top of stack into m64 and increment stack pointer.

Cannot encode 32-bit operand size.

Pop top of stack into m16 and increment stack pointer.

Pop top of stack into r16 and increment stack pointer.

Pop top of stack into m64 and increment stack pointer.

Cannot encode 32-bit operand size.

Pop top of stack into r64 and increment stack pointer.

Cannot encode 32-bit operand size.

POPCNT on r/m16.

POPCNT on r/m16.

POPCNT on r/m32.

POPCNT on r/m32.

POPCNT on r/m64.

POPCNT on r/m64.

Pop top of stack into lower 16 bits of EFLAGS.

Pop top of stack and zero-extend into RFLAGS.

Bitwise OR of mm/m64 and mm.

Bitwise OR of mm/m64 and mm.

Bitwise OR of xmm2/m128 and xmm1.

Bitwise OR of xmm2/m128 and xmm1.

Move data from m8 closer to the processor using NTA hint.

Move data from m8 closer to the processor using T0 hint.

Move data from m8 closer to the processor using T1 hint.

Move data from m8 closer to the processor using T2 hint.

Move data from m8 closer to the processor in anticipation of a write.

Introduced with AMD’s 3DNow! instructions.

Computes the absolute differences of the packed unsigned byte integers from mm2/m64 and mm1; differences are then summed to produce an unsigned word integer result.

Computes the absolute differences of the packed unsigned byte integers from mm2/m64 and mm1; differences are then summed to produce an unsigned word integer result.

Computes the absolute differences of the packed unsigned byte integers from xmm2/m128 and xmm1; the 8 low differences and 8 high differences are then summed separately to produce two unsigned word integer results.

Computes the absolute differences of the packed unsigned byte integers from xmm2/m128 and xmm1; the 8 low differences and 8 high differences are then summed separately to produce two unsigned word integer results.

Shuffle bytes in mm1 according to contents of mm2/m64.

Shuffle bytes in mm1 according to contents of mm2/m64.

Shuffle bytes in xmm1 according to contents of xmm2/m128.

Shuffle bytes in xmm1 according to contents of xmm2/m128.

Shuffle the doublewords in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the doublewords in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the high words in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the high words in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the low words in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the low words in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the words in mm2/m64 based on the encoding in imm8 and store the result in mm1.

Shuffle the words in mm2/m64 based on the encoding in imm8 and store the result in mm1.

Negate/zero/preserve packed byte integers in mm1 depending on the corresponding sign in mm2/m64.

Negate/zero/preserve packed byte integers in mm1 depending on the corresponding sign in mm2/m64.

Negate/zero/preserve packed byte integers in xmm1 depending on the corresponding sign in xmm2/m128.

Negate/zero/preserve packed byte integers in xmm1 depending on the corresponding sign in xmm2/m128.

Negate/zero/preserve packed doubleword integers in mm1 depending on the corresponding sign in mm2/m128.

Negate/zero/preserve packed doubleword integers in mm1 depending on the corresponding sign in mm2/m128.

Negate/zero/preserve packed doubleword integers in xmm1 depending on the corresponding sign in xmm2/m128.

Negate/zero/preserve packed doubleword integers in xmm1 depending on the corresponding sign in xmm2/m128.

Negate/zero/preserve packed word integers in mm1 depending on the corresponding sign in mm2/m128.

Negate/zero/preserve packed word integers in mm1 depending on the corresponding sign in mm2/m128.

Negate/zero/preserve packed word integers in xmm1 depending on the corresponding sign in xmm2/m128.

Negate/zero/preserve packed word integers in xmm1 depending on the corresponding sign in xmm2/m128.

Shift doublewords in mm left by imm8 while shifting in zero-signed.

Shift doublewords in mm left by mm/m64 while shifting in zero-signed.

Shift doublewords in mm left by mm/m64 while shifting in zero-signed.

Shift doublewords in xmm1 left by imm8 while shifting in zero-signed.

Shift doublewords in xmm1 left by xmm2/m128 while shifting in zero-signed.

Shift doublewords in xmm1 left by xmm2/m128 while shifting in zero-signed.

Shift xmm1 left by imm8 bytes while shifting in zero-signed.

Shift quadword in mm left by imm8 while shifting in zero-signed.

Shift quadword in mm left by mm/m64 while shifting in zero-signed.

Shift quadword in mm left by mm/m64 while shifting in zero-signed.

Shift quadwords in xmm1 left by imm8 while shifting in zero-signed.

Shift quadwords in xmm1 left by xmm2/m128 while shifting in zero-signed.

Shift quadwords in xmm1 left by xmm2/m128 while shifting in zero-signed.

Shift words in mm left by imm8 while shifting in zero-signed.

Shift words in mm left mm/m64 while shifting in zero-signed.

Shift words in mm left mm/m64 while shifting in zero-signed.

Shift words in xmm1 left by imm8 while shifting in zero-signed.

Shift words in xmm1 left by xmm2/m128 while shifting in zero-signed.

Shift words in xmm1 left by xmm2/m128 while shifting in zero-signed.

Shift doublewords in mm right by imm8 while shifting in sign bits.

Shift doublewords in mm right by mm/m64 while shifting in sign bits.

Shift doublewords in mm right by mm/m64 while shifting in sign bits.

Shift doublewords in xmm1 right by imm8 while shifting in sign bits.

Shift doubleword in xmm1 right by xmm2/m128 while shifting in sign bits.

Shift doubleword in xmm1 right by xmm2/m128 while shifting in sign bits.

Shift words in mm right by imm8 while shifting in sign bits.

Shift words in mm right by mm/m64 while shifting in sign bits.

Shift words in mm right by mm/m64 while shifting in sign bits.

Shift words in xmm1 right by imm8 while shifting in sign bits.

Shift words in xmm1 right by xmm2/m128 while shifting in sign bits.

Shift words in xmm1 right by xmm2/m128 while shifting in sign bits.

Shift doublewords in mm right by imm8 while shifting in zero-signed.

Shift doublewords in mm right by amount specified in mm/m64 while shifting in zero-signed.

Shift doublewords in mm right by amount specified in mm/m64 while shifting in zero-signed.

Shift doublewords in xmm1 right by imm8 while shifting in zero-signed.

Shift doublewords in xmm1 right by amount specified in xmm2/m128 while shifting in zero-signed.

Shift doublewords in xmm1 right by amount specified in xmm2/m128 while shifting in zero-signed.

Shift xmm1 right by imm8 while shifting in zero-signed.

Shift mm right by imm8 while shifting in zero-signed.

Shift mm right by amount specified in mm/m64 while shifting in zero-signed.

Shift mm right by amount specified in mm/m64 while shifting in zero-signed.

Shift quadwords in xmm1 right by imm8 while shifting in zero-signed.

Shift quadwords in xmm1 right by amount specified in xmm2/m128 while shifting in zero-signed.

Shift quadwords in xmm1 right by amount specified in xmm2/m128 while shifting in zero-signed.

Shift words in mm right by imm8 while shifting in zero-signed.

Shift words in mm right by amount specified in mm/m64 while shifting in zero-signed.

Shift words in mm right by amount specified in mm/m64 while shifting in zero-signed.

Shift words in xmm1 right by imm8 while shifting in zero-signed.

Shift words in xmm1 right by amount specified in xmm2/m128 while shifting in zero-signed.

Shift words in xmm1 right by amount specified in xmm2/m128 while shifting in zero-signed.

Subtract packed byte integers in mm/m64 from packed byte integers in mm.

Subtract packed byte integers in mm/m64 from packed byte integers in mm.

Subtract packed byte integers in xmm2/m128 from packed byte integers in xmm1.

Subtract packed byte integers in xmm2/m128 from packed byte integers in xmm1.

Subtract packed doubleword integers in mm/m64 from packed doubleword integers in mm.

Subtract packed doubleword integers in mm/m64 from packed doubleword integers in mm.

Subtract packed doubleword integers in xmm2/mem128 from packed doubleword integers in xmm1.

Subtract packed doubleword integers in xmm2/mem128 from packed doubleword integers in xmm1.

Subtract quadword integer in mm1 from mm2/m64.

Subtract quadword integer in mm1 from mm2/m64.

Subtract packed quadword integers in xmm1 from xmm2/m128.

Subtract packed quadword integers in xmm1 from xmm2/m128.

Subtract signed packed bytes in mm/m64 from signed packed bytes in mm and saturate results.

Subtract signed packed bytes in mm/m64 from signed packed bytes in mm and saturate results.

Subtract packed signed byte integers in xmm2/m128 from packed signed byte integers in xmm1 and saturate results.

Subtract packed signed byte integers in xmm2/m128 from packed signed byte integers in xmm1 and saturate results.

Subtract signed packed words in mm/m64 from signed packed words in mm and saturate results.

Subtract signed packed words in mm/m64 from signed packed words in mm and saturate results.

Subtract packed signed word integers in xmm2/m128 from packed signed word integers in xmm1 and saturate results.

Subtract packed signed word integers in xmm2/m128 from packed signed word integers in xmm1 and saturate results.

Subtract unsigned packed bytes in mm/m64 from unsigned packed bytes in mm and saturate result.

Subtract unsigned packed bytes in mm/m64 from unsigned packed bytes in mm and saturate result.

Subtract packed unsigned byte integers in xmm2/m128 from packed unsigned byte integers in xmm1 and saturate result.

Subtract packed unsigned byte integers in xmm2/m128 from packed unsigned byte integers in xmm1 and saturate result.

Subtract unsigned packed words in mm/m64 from unsigned packed words in mm and saturate result.

Subtract unsigned packed words in mm/m64 from unsigned packed words in mm and saturate result.

Subtract packed unsigned word integers in xmm2/m128 from packed unsigned word integers in xmm1 and saturate result.

Subtract packed unsigned word integers in xmm2/m128 from packed unsigned word integers in xmm1 and saturate result.

Subtract packed word integers in mm/m64 from packed word integers in mm.

Subtract packed word integers in mm/m64 from packed word integers in mm.

Subtract packed word integers in xmm2/m128 from packed word integers in xmm1.

Subtract packed word integers in xmm2/m128 from packed word integers in xmm1.

Set Zero Flag (ZF) if xmm2/m128 && xmm1 result is all zero-signed.

Set Carry Flag (CF) if xmm2/m128 AND NOT xmm1 result is all zero-signed.

Set Zero Flag (ZF) if xmm2/m128 && xmm1 result is all zero-signed.

Set Carry Flag (CF) if xmm2/m128 AND NOT xmm1 result is all zero-signed.

Unpack and interleave high-order bytes from mm and mm/m64 into mm.

Unpack and interleave high-order bytes from mm and mm/m64 into mm.

Unpack and interleave high-order bytes from xmm1 and xmm2/m128 into xmm1.

Unpack and interleave high-order bytes from xmm1 and xmm2/m128 into xmm1.

Unpack and interleave high-order doublewords from mm and mm/m64 into mm.

Unpack and interleave high-order doublewords from mm and mm/m64 into mm.

Unpack and interleave high-order doublewords from xmm1 and xmm2/m128 into xmm1.

Unpack and interleave high-order doublewords from xmm1 and xmm2/m128 into xmm1.

Unpack and interleave high-order quadwords from xmm1 and xmm2/m128 into xmm1.

Unpack and interleave high-order quadwords from xmm1 and xmm2/m128 into xmm1.

Unpack and interleave high-order words from mm and mm/m64 into mm.

Unpack and interleave high-order words from mm and mm/m64 into mm.

Unpack and interleave high-order words from xmm1 and xmm2/m128 into xmm1.

Unpack and interleave high-order words from xmm1 and xmm2/m128 into xmm1.

Interleave low-order bytes from mm and mm/m32 into mm.

Interleave low-order bytes from mm and mm/m32 into mm.

Interleave low-order bytes from xmm1 and xmm2/m128 into xmm1.

Interleave low-order bytes from xmm1 and xmm2/m128 into xmm1.

Interleave low-order doublewords from mm and mm/m32 into mm.

Interleave low-order doublewords from mm and mm/m32 into mm.

Interleave low-order doublewords from xmm1 and xmm2/m128 into xmm1.

Interleave low-order doublewords from xmm1 and xmm2/m128 into xmm1.

Interleave low-order quadword from xmm1 and xmm2/m128 into xmm1.

Interleave low-order quadword from xmm1 and xmm2/m128 into xmm1.

Interleave low-order words from mm and mm/m32 into mm.

Interleave low-order words from mm and mm/m32 into mm.

Interleave low-order words from xmm1 and xmm2/m128 into xmm1.

Interleave low-order words from xmm1 and xmm2/m128 into xmm1.

Push FS.

Push GS.

Push r/m16.

Push r/m64.

Push r/m16.

Push r16.

Push r/m64.

Push r64.

Push lower 16 bits of EFLAGS.

Push RFLAGS.

Push imm16 (sign-extended to 64-bits).

Push imm32 (sign-extended to 64-bits).

Push imm8 (sign-extended to 64-bits).

Push imm16 (sign-extended to 16-bits).

Push imm8 (sign-extended to 16-bits).

Bitwise XOR of mm/m64 and mm.

Bitwise XOR of mm/m64 and mm.

Bitwise XOR of xmm2/m128 and xmm1.

Bitwise XOR of xmm2/m128 and xmm1.

Rotate 17 bits (Carry Flag (CF), r/m16) left CL times.

Rotate 17 bits (Carry Flag (CF), r/m16) left imm8 times.

Rotate 17 bits (Carry Flag (CF), r/m16) left once.

Rotate 33 bits (Carry Flag (CF), r/m32) left CL times.

Rotate 33 bits (Carry Flag (CF), r/m32) left imm8 times.

Rotate 33 bits (Carry Flag (CF), r/m32) left once.

Rotate 65 bits (Carry Flag (CF), r/m64) left CL times.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) left imm8 times.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) left once.

Uses a 6 bit count.

Rotate 9 bits (Carry Flag (CF), r/m8) left CL times.

Rotate 9 bits (Carry Flag (CF), r/m8) left imm8 times.

Rotate 9 bits (Carry Flag (CF), r/m8) left once.

Rotate 17 bits (Carry Flag (CF), r/m16) left CL times.

Rotate 17 bits (Carry Flag (CF), r/m16) left imm8 times.

Rotate 17 bits (Carry Flag (CF), r/m16) left once.

Rotate 33 bits (Carry Flag (CF), r/m32) left CL times.

Rotate 33 bits (Carry Flag (CF), r/m32) left imm8 times.

Rotate 33 bits (Carry Flag (CF), r/m32) left once.

Rotate 65 bits (Carry Flag (CF), r/m64) left CL times.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) left imm8 times.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) left once.

Uses a 6 bit count.

Rotate 9 bits (Carry Flag (CF), r/m8) left CL times.

Rotate 9 bits (Carry Flag (CF), r/m8) left imm8 times.

Rotate 9 bits (Carry Flag (CF), r/m8) left once.

Rotate 9 bits (Carry Flag (CF), r/m8) left CL times.

Rotate 9 bits (Carry Flag (CF), r/m8) left imm8 times.

Rotate 9 bits (Carry Flag (CF), r/m8) left once.

Computes the approximate reciprocals of the packed single-precision floating-point values in xmm2/m128 and stores the results in xmm1.

Computes the approximate reciprocals of the packed single-precision floating-point values in xmm2/m128 and stores the results in xmm1.

Computes the approximate reciprocal of the scalar single-precision floating-point value in xmm2/m32 and stores the result in xmm1.

Computes the approximate reciprocal of the scalar single-precision floating-point value in xmm2/m32 and stores the result in xmm1.

Rotate 17 bits (Carry Flag (CF), r/m16) right CL times.

Rotate 17 bits (Carry Flag (CF), r/m16) right imm8 times.

Rotate 17 bits (Carry Flag (CF), r/m16) right once.

Rotate 33 bits (Carry Flag (CF), r/m32) right CL times.

Rotate 33 bits (Carry Flag (CF), r/m32) right imm8 times.

Rotate 33 bits (Carry Flag (CF), r/m32) right once.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) right CL times.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) right imm8 times.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) right once.

Uses a 6 bit count.

Rotate 9 bits (Carry Flag (CF), r/m8) right CL times.

Rotate 9 bits (Carry Flag (CF), r/m8) right imm8 times.

Rotate 9 bits (Carry Flag (CF), r/m8) right once.

Rotate 17 bits (Carry Flag (CF), r/m16) right CL times.

Rotate 17 bits (Carry Flag (CF), r/m16) right imm8 times.

Rotate 17 bits (Carry Flag (CF), r/m16) right once.

Rotate 33 bits (Carry Flag (CF), r/m32) right CL times.

Rotate 33 bits (Carry Flag (CF), r/m32) right imm8 times.

Rotate 33 bits (Carry Flag (CF), r/m32) right once.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) right CL times.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) right imm8 times.

Uses a 6 bit count.

Rotate 65 bits (Carry Flag (CF), r/m64) right once.

Uses a 6 bit count.

Rotate 9 bits (Carry Flag (CF), r/m8) right CL times.

Rotate 9 bits (Carry Flag (CF), r/m8) right imm8 times.

Rotate 9 bits (Carry Flag (CF), r/m8) right once.

Rotate 9 bits (Carry Flag (CF), r/m8) right CL times.

Rotate 9 bits (Carry Flag (CF), r/m8) right imm8 times.

Rotate 9 bits (Carry Flag (CF), r/m8) right once.

Load the 32-bit destination register with the FS base address.

Load the 64-bit destination register with the FS base address.

Load the 32-bit destination register with the GS base address.

Load the 64-bit destination register with the GS base address.

Read a 16-bit random number and store in the destination register.

Read a 32-bit random number and store in the destination register.

Read a 64-bit random number and store in the destination register.

Input (E)CX words from port DX into ES:[(E)DI].

Input (E)CX doublewords from port DX into ES:[(E)DI].

Input RCX default size from port DX into [RDI].

Input (E)CX bytes from port DX into ES:[(E)DI].

Input RCX bytes from port DX into [RDI].

Load (E)CX bytes from DS:[(E)SI] to AL.

Load RCX bytes from [RSI] to AL.

Load (E)CX words from DS:[(E)SI] to AX.

Load (E)CX doublewords from DS:[(E)SI] to EAX.

Load RCX quadwords from [RSI] to RAX.

Move (E)CX words from DS:[(E)SI] to ES:[(E)DI].

Move (E)CX doublewords from DS:[(E)SI] to ES:[(E)DI].

Move RCX quadwords from [RSI] to [RDI].

Move (E)CX bytes from DS:[(E)SI] to ES:[(E)DI].

Move RCX bytes from [RSI] to [RDI].

Output (E)CX words from DS:[(E)SI] to port DX.

Output (E)CX doublewords from DS:[(E)SI] to port DX.

Output RCX default size from [RSI] to port DX.

Output (E)CX bytes from DS:[(E)SI] to port DX.

Output RCX bytes from [RSI] to port DX.

Fill (E)CX words at ES:[(E)DI] with AX.

Fill (E)CX doublewords at ES:[(E)DI] with EAX.

Fill RCX quadwords at [RDI] with RAX.

Fill (E)CX bytes at ES:[(E)DI] with AL.

Fill RCX bytes at [RDI] with AL.

Find nonmatching words in ES:[(E)DI] and DS:[(E)SI].

Find nonmatching doublewords in ES:[(E)DI] and DS:[(E)SI].

Find non-matching quadwords in [RDI] and [RSI].

Find nonmatching bytes in ES:[(E)DI] and DS:[(E)SI].

Find non-matching bytes in [RDI] and [RSI].

Find non-AX word starting at ES:[(E)DI].

Find non-EAX doubleword starting at ES:[(E)DI].

Find non-RAX quadword starting at [RDI].

Find non-AL byte starting at ES:[(E)DI].

Find non-AL byte starting at [RDI].

Find matching words in ES:[(E)DI] and DS:[(E)SI].

Find matching doublewords in ES:[(E)DI] and DS:[(E)SI].

Find matching doublewords in [RDI] and [RSI].

Find matching bytes in ES:[(E)DI] and DS:[(E)SI].

Find matching bytes in [RDI] and [RSI].

Find AX, starting at ES:[(E)DI].

Find EAX, starting at ES:[(E)DI].

Find RAX, starting at [RDI].

Find AL, starting at ES:[(E)DI].

Find AL, starting at [RDI].

Near return to calling procedure.

Far return to calling procedure.

Near return to calling procedure and pop imm16 bytes from stack.

Far return to calling procedure and pop imm16 bytes from stack.

Rotate 16 bits r/m16 left CL times.

Rotate 16 bits r/m16 left imm8 times.

Rotate 16 bits r/m16 left once.

Rotate 32 bits r/m32 left CL times.

Rotate 32 bits r/m32 left imm8 times.

Rotate 32 bits r/m32 left once.

Rotate 64 bits r/m64 left CL times.

Uses a 6 bit count.

Rotate 64 bits r/m64 left imm8 times.

Uses a 6 bit count.

Rotate 64 bits r/m64 left once.

Uses a 6 bit count.

Rotate 8 bits r/m8 left CL times.

Rotate 8 bits r/m8 left imm8 times.

Rotate 8 bits r/m8 left once.

Rotate 16 bits r/m16 left CL times.

Rotate 16 bits r/m16 left imm8 times.

Rotate 16 bits r/m16 left once.

Rotate 32 bits r/m32 left CL times.

Rotate 32 bits r/m32 left imm8 times.

Rotate 32 bits r/m32 left once.

Rotate 64 bits r/m64 left CL times.

Uses a 6 bit count.

Rotate 64 bits r/m64 left imm8 times.

Uses a 6 bit count.

Rotate 64 bits r/m64 left once.

Uses a 6 bit count.

Rotate 8 bits r/m8 left CL times.

Rotate 8 bits r/m8 left imm8 times.

Rotate 8 bits r/m8 left once.

Rotate 8 bits r/m8 left CL times.

Rotate 8 bits r/m8 left imm8 times.

Rotate 8 bits r/m8 left once.

Rotate 16 bits r/m16 right CL times.

Rotate 16 bits r/m16 right imm8 times.

Rotate 16 bits r/m16 right once.

Rotate 32 bits r/m32 right CL times.

Rotate 32 bits r/m32 right imm8 times.

Rotate 32 bits r/m32 right once.

Rotate 64 bits r/m64 right CL times.

Uses a 6 bit count.

Rotate 64 bits r/m64 right imm8 times.

Uses a 6 bit count.

Rotate 64 bits r/m64 right once.

Uses a 6 bit count.

Rotate 8 bits r/m8 right CL times.

Rotate 8 bits r/m16 right imm8 times.

Rotate 8 bits r/m8 right once.

Rotate 16 bits r/m16 right CL times.

Rotate 16 bits r/m16 right imm8 times.

Rotate 16 bits r/m16 right once.

Rotate 32 bits r/m32 right CL times.

Rotate 32 bits r/m32 right imm8 times.

Rotate 32 bits r/m32 right once.

Rotate 64 bits r/m64 right CL times.

Uses a 6 bit count.

Rotate 64 bits r/m64 right imm8 times.

Uses a 6 bit count.

Rotate 64 bits r/m64 right once.

Uses a 6 bit count.

Rotate 8 bits r/m8 right CL times.

Rotate 8 bits r/m16 right imm8 times.

Rotate 8 bits r/m8 right once.

Rotate 8 bits r/m8 right CL times.

Rotate 8 bits r/m16 right imm8 times.

Rotate 8 bits r/m8 right once.

Rotate 32-bit r/m32 right imm8 times without affecting arithmetic flags.

Rotate 32-bit r/m32 right imm8 times without affecting arithmetic flags.

Rotate 64-bit r/m64 right imm8 times without affecting arithmetic flags.

Rotate 64-bit r/m64 right imm8 times without affecting arithmetic flags.

Round packed double-precision floating-point values in xmm2/m128 and place the result in xmm1.

The rounding mode is determined by imm8.

Round packed double-precision floating-point values in xmm2/m128 and place the result in xmm1.

The rounding mode is determined by imm8.

Round packed single-precision floating-point values in xmm2/m128 and place the result in xmm1.

The rounding mode is determined by imm8.

Round packed single-precision floating-point values in xmm2/m128 and place the result in xmm1.

The rounding mode is determined by imm8.

Round the low packed double-precision floating-point value in xmm2/m64 and place the result in xmm1.

The rounding mode is determined by imm8.

Round the low packed double-precision floating-point value in xmm2/m64 and place the result in xmm1.

The rounding mode is determined by imm8.

Round the low packed single-precision floating-point value in xmm2/m32 and place the result in xmm1.

The rounding mode is determined by imm8.

Round the low packed single-precision floating-point value in xmm2/m32 and place the result in xmm1.

The rounding mode is determined by imm8.

Computes the approximate reciprocals of the square roots of the packed single-precision floating-point values in xmm2/m128 and stores the results in xmm1.

Computes the approximate reciprocals of the square roots of the packed single-precision floating-point values in xmm2/m128 and stores the results in xmm1.

Computes the approximate reciprocal of the square root of the low single-precision floating-point value in xmm2/m32 and stores the results in xmm1.

Computes the approximate reciprocal of the square root of the low single-precision floating-point value in xmm2/m32 and stores the results in xmm1.

Loads the Sign Flag (SF), Zero Flag (ZF), A Flag (AF), Parity Flag (PF), and Carry Flag (CF) from AH into EFLAGS.

Multiply r/m16 by 2, CL times.

Multiply r/m16 by 2, imm8 times.

Multiply r/m16 by 2, once.

Multiply r/m32 by 2, CL times.

Multiply r/m32 by 2, imm8 times.

Multiply r/m32 by 2, once.

Multiply r/m64 by 2, CL times.

Multiply r/m64 by 2, imm8 times.

Multiply r/m64 by 2, once.

Multiply r/m8 by 2, CL times.

Multiply r/m8 by 2, imm8 times.

Multiply r/m8 by 2, once.

Multiply r/m16 by 2, CL times.

Multiply r/m16 by 2, imm8 times.

Multiply r/m16 by 2, once.

Multiply r/m32 by 2, CL times.

Multiply r/m32 by 2, imm8 times.

Multiply r/m32 by 2, once.

Multiply r/m64 by 2, CL times.

Multiply r/m64 by 2, imm8 times.

Multiply r/m64 by 2, once.

Multiply r/m8 by 2, CL times.

Multiply r/m8 by 2, imm8 times.

Multiply r/m8 by 2, once.

Multiply r/m8 by 2, CL times.

Multiply r/m8 by 2, imm8 times.

Multiply r/m8 by 2, once.

Signed divide r/m16 by 2, CL times.

Signed divide r/m16 by 2, imm8 times.

Signed divide r/m16 by 2, once.

Signed divide r/m32 by 2, CL times.

Signed divide r/m32 by 2, imm8 times.

Signed divide r/m32 by 2, once.

Signed divide r/m32 by 2, CL times.

Signed divide r/m32 by 2, imm8 times.

Signed divide r/m32 by 2, once.

Signed divide r/m8 by 2, CL times.

Signed divide r/m8 by 2, imm8 time.

Signed divide r/m8 by 2, once.

Signed divide r/m16 by 2, CL times.

Signed divide r/m16 by 2, imm8 times.

Signed divide r/m16 by 2, once.

Signed divide r/m32 by 2, CL times.

Signed divide r/m32 by 2, imm8 times.

Signed divide r/m32 by 2, once.

Signed divide r/m32 by 2, CL times.

Signed divide r/m32 by 2, imm8 times.

Signed divide r/m32 by 2, once.

Signed divide r/m8 by 2, CL times.

Signed divide r/m8 by 2, imm8 time.

Signed divide r/m8 by 2, once.

Signed divide r/m8 by 2, CL times.

Signed divide r/m8 by 2, imm8 time.

Signed divide r/m8 by 2, once.

Shift r/m32 arithmetically right with count specified in r32b.

Shift r/m32 arithmetically right with count specified in r32b.

Shift r/m64 arithmetically right with count specified in r64b.

Shift r/m64 arithmetically right with count specified in r64b.

Subtract with borrow imm8 from AL.

Subtract with borrow imm16 from AX.

Subtract with borrow imm32 from EAX.

Subtract with borrow imm16 from r/m16.

Subtract with borrow sign-extended imm8 from r/m16.

Subtract with borrow r16 from r/m16.

Subtract with borrow imm32 from r/m32.

Subtract with borrow sign-extended imm8 from r/m32.

Subtract with borrow r32 from r/m32.

Subtract with borrow sign-extended imm32 to 64-bits from r/m64.

Subtract with borrow sign-extended imm8 from r/m64.

Subtract with borrow r64 from r/m64.

Subtract with borrow imm8 from r/m8.

Subtract with borrow r8 from r/m8.

Subtract with borrow r8 from r/m8.

Subtract with borrow imm16 from r/m16.

Subtract with borrow sign-extended imm8 from r/m16.

Subtract with borrow r/m16 from r16.

Subtract with borrow r16 from r/m16.

Subtract with borrow r/m16 from r16.

Subtract with borrow imm32 from r/m32.

Subtract with borrow sign-extended imm8 from r/m32.

Subtract with borrow r/m32 from r32.

Subtract with borrow r32 from r/m32.

Subtract with borrow r/m32 from r32.

Subtract with borrow sign-extended imm32 to 64-bits from r/m64.

Subtract with borrow sign-extended imm8 from r/m64.

Subtract with borrow r/m64 from r64.

Subtract with borrow r64 from r/m64.

Subtract with borrow r/m64 from r64.

Subtract with borrow imm8 from r/m8.

Subtract with borrow r/m8 from r8.

Subtract with borrow r8 from r/m8.

Subtract with borrow r/m8 from r8.

Subtract with borrow r8 from r/m8.

Subtract with borrow r/m8 from r8.

Subtract with borrow sign-extended imm.32 to 64-bits from RAX.

Subtract with borrow imm8 from r/m8.

Subtract with borrow r/m8 from r8.

Subtract with borrow r8 from r/m8.

Subtract with borrow r/m8 from r8.

Subtract with borrow r8 from r/m8.

Subtract with borrow r/m8 from r8.

Compare AX with word at ES:(E)DI or RDI then set status flags.

Compare EAX with doubleword at ES(E)DI or RDI then set status flags.

Compare RAX with quadword at RDI or EDI then set status flags.

Compare AL with byte at ES:(E)DI or RDI then set status flags.

Compare AL with byte at ES:(E)DI or RDI then set status flags.

Compare EAX with doubleword at ES:(E)DI or RDI then set status flags.

Compare RAX with quadword at RDI or EDI then set status flags.

Compare AX with word at ES:(E)DI or RDI then set status flags.

Set byte if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Set byte if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Set byte if above (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Set byte if above or equal (Carry Flag (CF) is 0).

Set byte if above or equal (Carry Flag (CF) is 0).

Set byte if above or equal (Carry Flag (CF) is 0).

Set byte if below (Carry Flag (CF) is 1).

Set byte if below (Carry Flag (CF) is 1).

Set byte if below (Carry Flag (CF) is 1).

Set byte if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Set byte if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Set byte if below or equal (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Set byte if carry (Carry Flag (CF) is 1).

Set byte if carry (Carry Flag (CF) is 1).

Set byte if carry (Carry Flag (CF) is 1).

Set byte if equal (Zero Flag (ZF) is 1).

Set byte if equal (Zero Flag (ZF) is 1).

Set byte if equal (Zero Flag (ZF) is 1).

Set byte if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Set byte if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Set byte if greater (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Set byte if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Set byte if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Set byte if greater or equal (Sign Flag (SF) == Overflow Flag (OF)).

Set byte if less (Sign Flag (SF) != Overflow Flag (OF)).

Set byte if less (Sign Flag (SF) != Overflow Flag (OF)).

Set byte if less (Sign Flag (SF) != Overflow Flag (OF)).

Set byte if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Set byte if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Set byte if less or equal (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Set byte if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Set byte if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Set byte if not above (Carry Flag (CF) is 1 or Zero Flag (ZF) is 1).

Set byte if not above or equal (Carry Flag (CF) is 1).

Set byte if not above or equal (Carry Flag (CF) is 1).

Set byte if not above or equal (Carry Flag (CF) is 1).

Set byte if not below (Carry Flag (CF) is 0).

Set byte if not below (Carry Flag (CF) is 0).

Set byte if not below (Carry Flag (CF) is 0).

Set byte if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Set byte if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Set byte if not below or equal (Carry Flag (CF) is 0 and Zero Flag (ZF) is 0).

Set byte if not carry (Carry Flag (CF) is 0).

Set byte if not carry (Carry Flag (CF) is 0).

Set byte if not carry (Carry Flag (CF) is 0).

Set byte if not equal (Zero Flag (ZF) is 0).

Set byte if not equal (Zero Flag (ZF) is 0).

Set byte if not equal (Zero Flag (ZF) is 0).

Set byte if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Set byte if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Set byte if not greater (Zero Flag (ZF) is 1 or Sign Flag (SF) != Overflow Flag (OF)).

Set byte if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Set byte if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Set byte if not greater or equal (Sign Flag (SF) != Overflow Flag (OF)).

Set byte if not less (Sign Flag (SF) == Overflow Flag (OF)).

Set byte if not less (Sign Flag (SF) == Overflow Flag (OF)).

Set byte if not less (Sign Flag (SF) == Overflow Flag (OF)).

Set byte if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Set byte if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Set byte if not less or equal (Zero Flag (ZF) is 0 and Sign Flag (SF) == Overflow Flag (OF)).

Set byte if not overflow (Overflow Flag (OF) is 0).

Set byte if not overflow (Overflow Flag (OF) is 0).

Set byte if not overflow (Overflow Flag (OF) is 0).

Set byte if not parity (Parity Flag (PF) is 0).

Set byte if not parity (Parity Flag (PF) is 0).

Set byte if not parity (Parity Flag (PF) is 0).

Set byte if not sign (Sign Flag (SF) is 0).

Set byte if not sign (Sign Flag (SF) is 0).

Set byte if not sign (Sign Flag (SF) is 0).

Set byte if not zero (Zero Flag (ZF) is 0).

Set byte if not zero (Zero Flag (ZF) is 0).

Set byte if not zero (Zero Flag (ZF) is 0).

Set byte if overflow (Overflow Flag (OF) is 1).

Set byte if overflow (Overflow Flag (OF) is 1).

Set byte if overflow (Overflow Flag (OF) is 1).

Set byte if parity (Parity Flag (PF) is 1).

Set byte if parity (Parity Flag (PF) is 1).

Set byte if parity (Parity Flag (PF) is 1).

Set byte if parity even (Parity Flag (PF) is 1).

Set byte if parity even (Parity Flag (PF) is 1).

Set byte if parity even (Parity Flag (PF) is 1).

Set byte if parity odd (Parity Flag (PF) is 0).

Set byte if parity odd (Parity Flag (PF) is 0).

Set byte if parity odd (Parity Flag (PF) is 0).

Set byte if sign (Sign Flag (SF) is 1).

Set byte if sign (Sign Flag (SF) is 1).

Set byte if sign (Sign Flag (SF) is 1).

Set byte if zero (Zero Flag (ZF) is 1).

Set byte if zero (Zero Flag (ZF) is 1).

Set byte if zero (Zero Flag (ZF) is 1).

Serializes store operations.

Multiply r/m16 by 2, CL times.

Multiply r/m16 by 2, imm8 times.

Multiply r/m16 by 2, once.

Multiply r/m32 by 2, CL times.

Multiply r/m32 by 2, imm8 times.

Multiply r/m32 by 2, once.

Multiply r/m32 by 2, CL times.

Multiply r/m32 by 2, imm8 times.

Multiply r/m64 by 2, once.

Multiply r/m8 by 2, CL times.

Multiply r/m8 by 2, imm8 times.

Multiply r/m8 by 2, once.

Multiply r/m16 by 2, CL times.

Multiply r/m16 by 2, imm8 times.

Multiply r/m16 by 2, once.

Multiply r/m32 by 2, CL times.

Multiply r/m32 by 2, imm8 times.

Multiply r/m32 by 2, once.

Multiply r/m32 by 2, CL times.

Multiply r/m32 by 2, imm8 times.

Multiply r/m64 by 2, once.

Multiply r/m8 by 2, CL times.

Multiply r/m8 by 2, imm8 times.

Multiply r/m8 by 2, once.

Multiply r/m8 by 2, CL times.

Multiply r/m8 by 2, imm8 times.

Multiply r/m8 by 2, once.

Shift r/m16 to left CL places while shifting bits from r16 in from the right.

Shift r/m16 to left imm8 places while shifting bits from r16 in from the right.

Shift r/m32 to left CL places while shifting bits from r32 in from the right.

Shift r/m32 to left imm8 places while shifting bits from r32 in from the right.

Shift r/m64 to left CL places while shifting bits from r64 in from the right.

Shift r/m64 to left imm8 places while shifting bits from r64 in from the right.

Shift r/m16 to left CL places while shifting bits from r16 in from the right.

Shift r/m16 to left imm8 places while shifting bits from r16 in from the right.

Shift r/m32 to left CL places while shifting bits from r32 in from the right.

Shift r/m32 to left imm8 places while shifting bits from r32 in from the right.

Shift r/m64 to left CL places while shifting bits from r64 in from the right.

Shift r/m64 to left imm8 places while shifting bits from r64 in from the right.

Shift r/m32 logically left with count specified in r32b.

Shift r/m32 logically left with count specified in r32b.

Shift r/m64 logically left with count specified in r64b.

Shift r/m64 logically left with count specified in r64b.

Unsigned divide r/m16 by 2, CL times.

Unsigned divide r/m16 by 2, imm8 times.

Unsigned divide r/m16 by 2, once.

Unsigned divide r/m32 by 2, CL times.

Unsigned divide r/m32 by 2, imm8 times.

Unsigned divide r/m32 by 2, once.

Unsigned divide r/m32 by 2, CL times.

Unsigned divide r/m32 by 2, imm8 times.

Unsigned divide r/m32 by 2, once.

Unsigned divide r/m8 by 2, CL times.

Unsigned divide r/m8 by 2, imm8 times.

Unsigned divide r/m8 by 2, once.

Unsigned divide r/m16 by 2, CL times.

Unsigned divide r/m16 by 2, imm8 times.

Unsigned divide r/m16 by 2, once.

Unsigned divide r/m32 by 2, CL times.

Unsigned divide r/m32 by 2, imm8 times.

Unsigned divide r/m32 by 2, once.

Unsigned divide r/m32 by 2, CL times.

Unsigned divide r/m32 by 2, imm8 times.

Unsigned divide r/m32 by 2, once.

Unsigned divide r/m8 by 2, CL times.

Unsigned divide r/m8 by 2, imm8 times.

Unsigned divide r/m8 by 2, once.

Unsigned divide r/m8 by 2, CL times.

Unsigned divide r/m8 by 2, imm8 times.

Unsigned divide r/m8 by 2, once.

Shift r/m16 to right CL places while shifting bits from r16 in from the left.

Shift r/m16 to right imm8 places while shifting bits from r16 in from the left.

Shift r/m32 to right CL places while shifting bits from r32 in from the left.

Shift r/m32 to right imm8 places while shifting bits from r32 in from the left.

Shift r/m64 to right CL places while shifting bits from r64 in from the left.

Shift r/m64 to right imm8 places while shifting bits from r64 in from the left.

Shift r/m16 to right CL places while shifting bits from r16 in from the left.

Shift r/m16 to right imm8 places while shifting bits from r16 in from the left.

Shift r/m32 to right CL places while shifting bits from r32 in from the left.

Shift r/m32 to right imm8 places while shifting bits from r32 in from the left.

Shift r/m64 to right CL places while shifting bits from r64 in from the left.

Shift r/m64 to right imm8 places while shifting bits from r64 in from the left.

Shift r/m32 logically right with count specified in r32b.

Shift r/m32 logically right with count specified in r32b.

Shift r/m64 logically right with count specified in r64b.

Shift r/m64 logically right with count specified in r64b.

Shuffle packed double-precision floating-point values selected by imm8 from xmm1 and xmm2/m128 to xmm1.

Shuffle packed double-precision floating-point values selected by imm8 from xmm1 and xmm2/m128 to xmm1.

Shuffle packed single-precision floating-point values selected by imm8 from xmm1 and xmm1/m128 to xmm1.

Shuffle packed single-precision floating-point values selected by imm8 from xmm1 and xmm1/m128 to xmm1.

Computes square roots of the packed double-precision floating-point values in xmm2/m128 and stores the results in xmm1.

Computes square roots of the packed double-precision floating-point values in xmm2/m128 and stores the results in xmm1.

Computes square roots of the packed single-precision floating-point values in xmm2/m128 and stores the results in xmm1.

Computes square roots of the packed single-precision floating-point values in xmm2/m128 and stores the results in xmm1.

Computes square root of the low double-precision floating-point value in xmm2/m64 and stores the results in xmm1.

Computes square root of the low double-precision floating-point value in xmm2/m64 and stores the results in xmm1.

Computes square root of the low single-precision floating-point value in xmm2/m32 and stores the results in xmm1.

Computes square root of the low single-precision floating-point value in xmm2/m32 and stores the results in xmm1.

Set Carry Flag (CF).

Set Direction Flag (DF).

Set interrupt flag.

External, maskable interrupts are enabled at the end of the next instruction.

Store contents of MXCSR register to m32.

For legacy mode, store AX at address ES:(E)DI.

For 64-bit mode store AX at address RDI or EDI.

For legacy mode, store EAX at address ES:(E)DI.

For 64-bit mode store EAX at address RDI or EDI.

Store RAX at address RDI or EDI.

For legacy mode, store AL at address ES:(E)DI.

For 64-bit mode store AL at address RDI or EDI.

For legacy mode, store AL at address ES:(E)DI.

For 64-bit mode store AL at address RDI or EDI.

For legacy mode, store EAX at address ES:(E)DI

For 64-bit mode store EAX at address RDI or EDI.

Store RAX at address RDI or EDI.

For legacy mode, store AX at address ES:(E)DI.

For 64-bit mode store AX at address RDI or EDI.

Subtract imm8 from AL.

Subtract imm16 from AX.

Subtract imm32 from EAX.

Subtract imm16 from r/m16.

Subtract sign-extended imm8 from r/m16.

Subtract r16 from r/m16.

Subtract imm32 from r/m32.

Subtract sign-extended imm8 from r/m32.

Subtract r32 from r/m32.

Subtract imm32 sign-extended to 64-bits from r/m64.

Subtract sign-extended imm8 from r/m64.

Subtract r64 from r/m64.

Subtract imm8 from r/m8.

Subtract r8 from r/m8.

Subtract r8 from r/m8.

Subtract imm16 from r/m16.

Subtract sign-extended imm8 from r/m16.

Subtract r/m16 from r16.

Subtract r16 from r/m16.

Subtract r/m16 from r16.

Subtract imm32 from r/m32.

Subtract sign-extended imm8 from r/m32.

Subtract r/m32 from r32.

Subtract r32 from r/m32.

Subtract r/m32 from r32.

Subtract imm32 sign-extended to 64-bits from r/m64.

Subtract sign-extended imm8 from r/m64.

Subtract r/m64 from r64.

Subtract r64 from r/m64.

Subtract r/m64 from r64.

Subtract imm8 from r/m8.

Subtract r/m8 from r8.

Subtract r8 from r/m8.

Subtract r/m8 from r8.

Subtract r8 from r/m8.

Subtract r/m8 from r8.

Subtract imm32 sign-extended to 64-bits from RAX.

Subtract imm8 from r/m8.

Subtract r/m8 from r8.

Subtract r8 from r/m8.

Subtract r/m8 from r8.

Subtract r8 from r/m8.

Subtract r/m8 from r8.

Subtract packed double-precision floating-point values in xmm2/m128 from xmm1.

Subtract packed double-precision floating-point values in xmm2/m128 from xmm1.

Subtract packed single-precision floating-point values in xmm2/mem from xmm1.

Subtract packed single-precision floating-point values in xmm2/mem from xmm1.

Subtracts the low double-precision floating-point values in xmm2/mem64 from xmm1.

Subtracts the low double-precision floating-point values in xmm2/mem64 from xmm1.

Subtract the lower single-precision floating-point values in xmm2/m32 from xmm1.

Subtract the lower single-precision floating-point values in xmm2/m32 from xmm1.

Exchanges the current GS base register value with the value contained in MSR address 0xC0000102.

Fast call to privilege level 0 system procedures.

Fast call to privilege level 0 system procedures.

Fast return to privilege level 3 user code.

Fast return to 64-bit mode privilege level 3 user code.

Return to compatibility mode from fast system call.

Return to 64-bit mode from fast system call.

AND imm8 with AL.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm16 with AX.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm32 with EAX.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm16 with r/m16.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r16 with r/m16.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm32 with r/m32.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r32 with r/m32.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm32 sign-extended to 64-bits with r/m64.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r64 with r/m64.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm16 with r/m16.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r16 with r/m16.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm32 with r/m32.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r32 with r/m32.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm32 sign-extended to 64-bits with r/m64.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r64 with r/m64.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm32 sign-extended to 64-bits with RAX.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND imm8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

AND r8 with r/m8.

The Sign Flag (SF), Zero Flag (ZF) and Parity Flag (PF) are each potentially set.

Count the number of trailing zero bits in r/m16 and return result in r16.

Count the number of trailing zero bits in r/m16 and return result in r16.

Count the number of trailing zero bits in r/m32 and return result in r32.

Count the number of trailing zero bits in r/m32 and return result in r32.

Count the number of trailing zero bits in r/m64 and return result in r64.

Count the number of trailing zero bits in r/m64 and return result in r64.

Compares (unordered) the low double-precision floating-point values in xmm1 and xmm2/m64 and sets the appropriate flags in EFLAGS accordingly.

Compares (unordered) the low double-precision floating-point values in xmm1 and xmm2/m64 and sets the appropriate flags in EFLAGS accordingly.

Compare lower single-precision floating-point value in xmm1 register with lower single-precision floating-point value in xmm2/mem and set the status flags accordingly.

Compare lower single-precision floating-point value in xmm1 register with lower single-precision floating-point value in xmm2/mem and set the status flags accordingly.

Raise invalid opcode exception (‘Undefined 2’).

Unpacks and Interleaves double-precision floating-point values from high quadwords of xmm1 and xmm2/m128.

Unpacks and Interleaves double-precision floating-point values from high quadwords of xmm1 and xmm2/m128.

Unpacks and Interleaves single-precision floating-point values from high quadwords of xmm1 and xmm2/mem into xmm1.

Unpacks and Interleaves single-precision floating-point values from high quadwords of xmm1 and xmm2/mem into xmm1.

Unpacks and Interleaves double-precision floating-point values from low quadwords of xmm1 and xmm2/m128.

Unpacks and Interleaves double-precision floating-point values from low quadwords of xmm1 and xmm2/m128.

Unpacks and Interleaves single-precision floating-point values from low quadwords of xmm1 and xmm2/mem into xmm1.

Unpacks and Interleaves single-precision floating-point values from low quadwords of xmm1 and xmm2/mem into xmm1.

Add packed double-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Add packed double-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Add packed double-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Add packed double-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Add packed single-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Add packed single-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Add packed single-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Add packed single-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Add the low double-precision floating-point value from xmm3/mem to xmm2 and store the result in xmm1.

Add the low double-precision floating-point value from xmm3/mem to xmm2 and store the result in xmm1.

Add the low single-precision floating-point value from xmm3/mem to xmm2 and store the result in xmm1.

Add the low single-precision floating-point value from xmm3/mem to xmm2 and store the result in xmm1.

Add/subtract packed double-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Add/subtract packed double-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Add / subtract packed double-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Add / subtract packed double-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Add/subtract single-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Add/subtract single-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Add / subtract single-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Add / subtract single-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Perform one round of an AES decryption flow, using the Equivalent Inverse Cipher, operating on a 128-bit data (state) from xmm2 with a 128-bit round key from xmm3/m128.

Stores the result in xmm1.

Perform one round of an AES decryption flow, using the Equivalent Inverse Cipher, operating on a 128-bit data (state) from xmm2 with a 128-bit round key from xmm3/m128.

Stores the result in xmm1.

Perform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, operating on a 128-bit data (state) from xmm2 with a 128-bit round key from xmm3/m128.

Stores the result in xmm1.

Perform the last round of an AES decryption flow, using the Equivalent Inverse Cipher, operating on a 128-bit data (state) from xmm2 with a 128-bit round key from xmm3/m128.

Stores the result in xmm1.

Perform one round of an AES encryption flow, operating on a 128-bit data (state) from xmm2 with a 128-bit round key from the xmm3/m128.

Stores the result in xmm1.

Perform one round of an AES encryption flow, operating on a 128-bit data (state) from xmm2 with a 128-bit round key from the xmm3/m128.

Stores the result in xmm1.

Perform the last round of an AES encryption flow, operating on a 128-bit data (state) from xmm2 with a 128 bit round key from xmm3/m128.

Stores the result in xmm1.

Perform the last round of an AES encryption flow, operating on a 128-bit data (state) from xmm2 with a 128 bit round key from xmm3/m128.

Stores the result in xmm1.

Perform the InvMixColumn transformation on a 128-bit round key from xmm2/m128 and store the result in xmm1.

Perform the InvMixColumn transformation on a 128-bit round key from xmm2/m128 and store the result in xmm1.

Assist in AES round key generation using 8 bits Round Constant (RCON) specified in the imm8, operating on 128 bits of data specified in xmm2/m128 and stores the result in xmm1.

Assist in AES round key generation using 8 bits Round Constant (RCON) specified in the imm8, operating on 128 bits of data specified in xmm2/m128 and stores the result in xmm1.

Return the bitwise logical AND NOT of packed double-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical AND NOT of packed double-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical AND NOT of packed double-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical AND NOT of packed double-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical AND NOT of packed single-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical AND NOT of packed single-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical AND NOT of packed single-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical AND NOT of packed single-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical AND of packed double-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical AND of packed double-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical AND of packed double-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical AND of packed double-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical AND of packed single-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical AND of packed single-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical AND of packed single-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical AND of packed single-precision floating-point values in ymm2 and ymm3/mem.

Select packed double-precision floating-point values from xmm2 and xmm3/m128 from mask in imm8 and store the values in xmm1.

Select packed double-precision floating-point values from xmm2 and xmm3/m128 from mask in imm8 and store the values in xmm1.

Select packed double-precision floating-point values from ymm2 and ymm3/m256 from mask in imm8 and store the values in ymm1.

Select packed double-precision floating-point values from ymm2 and ymm3/m256 from mask in imm8 and store the values in ymm1.

Select packed single-precision floating-point values from xmm2 and xmm3/m128 from mask in imm8 and store the values in xmm1.

Select packed single-precision floating-point values from xmm2 and xmm3/m128 from mask in imm8 and store the values in xmm1.

Select packed single-precision floating-point values from ymm2 and ymm3/m256 from mask in imm8 and store the values in ymm1.

Select packed single-precision floating-point values from ymm2 and ymm3/m256 from mask in imm8 and store the values in ymm1.

Conditionally copy double-precision floating-point values from xmm2 or xmm3/m128 to xmm1, based on mask bits in the mask operand, xmm4.

Conditionally copy double-precision floating-point values from xmm2 or xmm3/m128 to xmm1, based on mask bits in the mask operand, xmm4.

Conditionally copy double-precision floating-point values from ymm2 or ymm3/m256 to ymm1, based on mask bits in the mask operand, ymm4.

Conditionally copy double-precision floating-point values from ymm2 or ymm3/m256 to ymm1, based on mask bits in the mask operand, ymm4.

Conditionally copy single-precision floating-point values from xmm2 or xmm3/m128 to xmm1, based on mask bits in the specified mask operand, xmm4.

Conditionally copy single-precision floating-point values from xmm2 or xmm3/m128 to xmm1, based on mask bits in the specified mask operand, xmm4.

Conditionally copy single-precision floating-point values from ymm2 or ymm3/m256 to ymm1, based on mask bits in the specified mask register, ymm4.

Conditionally copy single-precision floating-point values from ymm2 or ymm3/m256 to ymm1, based on mask bits in the specified mask register, ymm4.

Broadcast 128 bits of floating-point data in mem to low and high 128-bits in ymm1.

Broadcast 128 bits of integer data in mem to low and high 128-bits in ymm1.

Broadcast double-precision floating-point element in mem to four locations in ymm1.

Broadcast low double-precision floating-point element in the source operand to four locations in ymm1.

Broadcast single-precision floating-point element in mem to four locations in xmm1.

Broadcast the low single-precision floating-point element in the source operand to four locations in xmm1.

Broadcast single-precision floating-point element in mem to eight locations in ymm1.

Broadcast low single-precision floating-point element in the source operand to eight locations in ymm1.

Compare packed double-precision floating-point values in xmm3/m128 and xmm2 using bits 4:0 of imm8 as a comparison predicate.

Compare packed double-precision floating-point values in xmm3/m128 and xmm2 using bits 4:0 of imm8 as a comparison predicate.

Compare packed double-precision floating-point values in ymm3/m256 and ymm2 using bits 4:0 of imm8 as a comparison predicate.

Compare packed double-precision floating-point values in ymm3/m256 and ymm2 using bits 4:0 of imm8 as a comparison predicate.

Compare packed single-precision floating-point values in xmm3/m128 and xmm2 using bits 4:0 of imm8 as a comparison predicate.

Compare packed single-precision floating-point values in xmm3/m128 and xmm2 using bits 4:0 of imm8 as a comparison predicate.

Compare packed single-precision floating-point values in ymm3/m256 and ymm2 using bits 4:0 of imm8 as a comparison predicate.

Compare packed single-precision floating-point values in ymm3/m256 and ymm2 using bits 4:0 of imm8 as a comparison predicate.

Compare low double-precision floating-point value in xmm3/m64 and xmm2 using bits 4:0 of imm8 as comparison predicate.

Compare low double-precision floating-point value in xmm3/m64 and xmm2 using bits 4:0 of imm8 as comparison predicate.

Compare low single-precision floating-point value in xmm3/m32 and xmm2 using bits 4:0 of imm8 as comparison predicate.

Compare low single-precision floating-point value in xmm3/m32 and xmm2 using bits 4:0 of imm8 as comparison predicate.

Compare low double-precision floating-point values in xmm1 and xmm2/mem64 and sets the appropriate flags in EFLAGS accordingly.

Compare low double-precision floating-point values in xmm1 and xmm2/mem64 and sets the appropriate flags in EFLAGS accordingly.

Compare low single-precision floating-point values in xmm1 and xmm2/mem32 and sets the appropriate flags in EFLAGS accordingly.

Compare low single-precision floating-point values in xmm1 and xmm2/mem32 and sets the appropriate flags in EFLAGS accordingly.

Convert two packed signed doubleword integers from xmm2/mem to two packed double-precision floating-point values in xmm1.

Convert two packed signed doubleword integers from xmm2/mem to two packed double-precision floating-point values in xmm1.

Convert four packed signed doubleword integers from ymm2/mem to four packed double-precision floating-point values in ymm1.

Convert four packed signed doubleword integers from ymm2/mem to four packed double-precision floating-point values in ymm1.

Convert four packed signed doubleword integers from xmm2/mem to four packed single-precision floating-point values in xmm1.

Convert four packed signed doubleword integers from xmm2/mem to four packed single-precision floating-point values in xmm1.

Convert eight packed signed doubleword integers from ymm2/mem to eight packed single-precision floating-point values in ymm1.

Convert eight packed signed doubleword integers from ymm2/mem to eight packed single-precision floating-point values in ymm1.

Convert two packed double-precision floating-point values in xmm2/mem to two signed doubleword integers in xmm1.

Convert four packed double-precision floating-point values in ymm2/mem to four signed doubleword integers in xmm1.

Convert two packed double-precision floating-point values in xmm2/mem to two signed doubleword integers in xmm1.

Convert four packed double-precision floating-point values in ymm2/mem to four signed doubleword integers in xmm1.

Convert two packed double-precision floating-point values in xmm2/mem to two single-precision floating-point values in xmm1.

Convert four packed double-precision floating-point values in ymm2/mem to four single-precision floating-point values in xmm1.

Convert two packed double-precision floating-point values in xmm2/mem to two single-precision floating-point values in xmm1.

Convert four packed double-precision floating-point values in ymm2/mem to four single-precision floating-point values in xmm1.

Convert four packed half precision (16-bit) floating-point values in xmm2/m64 to packed single-precision floating-point value in xmm1.

Convert four packed half precision (16-bit) floating-point values in xmm2/m64 to packed single-precision floating-point value in xmm1.

Convert eight packed half precision (16-bit) floating-point values in xmm2/m128 to packed single-precision floating-point value in ymm1.

Convert eight packed half precision (16-bit) floating-point values in xmm2/m128 to packed single-precision floating-point value in ymm1.

Convert four packed single-precision floating-point values from xmm2/mem to four packed signed doubleword values in xmm1.

Convert four packed single-precision floating-point values from xmm2/mem to four packed signed doubleword values in xmm1.

Convert eight packed single-precision floating-point values from ymm2/mem to eight packed signed doubleword values in ymm1.

Convert eight packed single-precision floating-point values from ymm2/mem to eight packed signed doubleword values in ymm1.

Convert two packed single-precision floating-point values in xmm2/mem to two packed double-precision floating-point values in xmm1.

Convert two packed single-precision floating-point values in xmm2/mem to two packed double-precision floating-point values in xmm1.

Convert four packed single-precision floating-point values in xmm2/mem to four packed double-precision floating-point values in ymm1.

Convert four packed single-precision floating-point values in xmm2/mem to four packed double-precision floating-point values in ymm1.

Convert eight packed single-precision floating-point value in ymm2 to packed half-precision (16-bit) floating-point value in xmm1/mem.

imm8 provides rounding controls.

Convert four packed single-precision float- ing-point value in xmm2 to packed half- precision (16-bit) floating-point value in xmm1/mem.

imm8 provides rounding controls.

Convert four packed single-precision float- ing-point value in xmm2 to packed half- precision (16-bit) floating-point value in xmm1/mem.

imm8 provides rounding controls.

Convert eight packed single-precision floating-point value in ymm2 to packed half-precision (16-bit) floating-point value in xmm1/mem.

imm8 provides rounding controls.

Convert one double-precision floating-point value from xmm1/m64 to one signed doubleword integer r32.

Convert one double-precision floating-point value from xmm1/m64 to one signed doubleword integer r32.

Convert one double-precision floating-point value from xmm1/m64 to one signed quadword integer sign-extended into r64.

Convert one double-precision floating-point value from xmm1/m64 to one signed quadword integer sign-extended into r64.

Convert one double-precision floating-point value in xmm3/m64 to one single-precision floating-point value and merge with high bits in xmm2.

Convert one double-precision floating-point value in xmm3/m64 to one single-precision floating-point value and merge with high bits in xmm2.

Convert one signed doubleword integer from r/m32 to one double-precision floating-point value in xmm1.

Convert one signed quadword integer from r/m64 to one double-precision floating-point value in xmm1.

Convert one signed doubleword integer from r/m32 to one double-precision floating-point value in xmm1.

Convert one signed quadword integer from r/m64 to one double-precision floating-point value in xmm1.

Convert one signed doubleword integer from r/m32 to one single-precision floating-point value in xmm1.

Convert one signed quadword integer from r/m64 to one single-precision floating-point value in xmm1.

Convert one signed doubleword integer from r/m32 to one single-precision floating-point value in xmm1.

Convert one signed quadword integer from r/m64 to one single-precision floating-point value in xmm1.

Convert one single-precision floating-point value in xmm3/m32 to one double-precision floating-point value and merge with high bits of xmm2.

Convert one single-precision floating-point value in xmm3/m32 to one double-precision floating-point value and merge with high bits of xmm2.

Convert one single-precision floating-point value from xmm1/m32 to one signed doubleword integer in r32.

Convert one single-precision floating-point value from xmm1/m32 to one signed doubleword integer in r32.

Convert one single-precision floating-point value from xmm1/m32 to one signed quadword integer in r64.

Convert one single-precision floating-point value from xmm1/m32 to one signed quadword integer in r64.

Convert two packed double-precision floating-point values in xmm2/mem to two signed doubleword integers in xmm1 using truncation.

Convert four packed double-precision floating-point values in ymm2/mem to four signed doubleword integers in xmm1 using truncation.

Convert two packed double-precision floating-point values in xmm2/mem to two signed doubleword integers in xmm1 using truncation.

Convert four packed double-precision floating-point values in ymm2/mem to four signed doubleword integers in xmm1 using truncation.

Convert four packed single-precision floating-point values from xmm2/mem to four packed signed doubleword values in xmm1 using truncation.

Convert four packed single-precision floating-point values from xmm2/mem to four packed signed doubleword values in xmm1 using truncation.

Convert eight packed single-precision floating-point values from ymm2/mem to eight packed signed doubleword values in ymm1 using truncation.

Convert eight packed single-precision floating-point values from ymm2/mem to eight packed signed doubleword values in ymm1 using truncation.

Convert one double-precision floating-point value from xmm1/m64 to one signed doubleword integer in r32 using truncation.

Convert one double-precision floating-point value from xmm1/m64 to one signed doubleword integer in r32 using truncation.

Convert one double-precision floating-point value from xmm1/m64 to one signed quadword integer in r64 using truncation.

Convert one double-precision floating-point value from xmm1/m64 to one signed quadword integer in r64 using truncation.

Convert one single-precision floating-point value from xmm1/m32 to one signed doubleword integer in r32 using truncation.

Convert one single-precision floating-point value from xmm1/m32 to one signed doubleword integer in r32 using truncation.

Convert one single-precision floating-point value from xmm1/m32 to one signed quadword integer in r64 using truncation.

Convert one single-precision floating-point value from xmm1/m32 to one signed quadword integer in r64 using truncation.

Divide packed double-precision floating-point values in xmm2 by packed double-precision floating-point values in xmm3/mem.

Divide packed double-precision floating-point values in xmm2 by packed double-precision floating-point values in xmm3/mem.

Divide packed double-precision floating-point values in ymm2 by packed double-precision floating-point values in ymm3/mem.

Divide packed double-precision floating-point values in ymm2 by packed double-precision floating-point values in ymm3/mem.

Divide packed single-precision floating-point values in xmm2 by packed double-precision floating-point values in xmm3/mem.

Divide packed single-precision floating-point values in xmm2 by packed double-precision floating-point values in xmm3/mem.

Divide packed single-precision floating-point values in ymm2 by packed double-precision floating-point values in ymm3/mem.

Divide packed single-precision floating-point values in ymm2 by packed double-precision floating-point values in ymm3/mem.

Divide low double-precision floating-point values in xmm2 by low double-precision floating-point value in xmm3/mem.

Divide low double-precision floating-point values in xmm2 by low double-precision floating-point value in xmm3/mem.

Divide low single-precision floating-point value in xmm2 by low single-precision floating-point value in xmm3/m32.

Divide low single-precision floating-point value in xmm2 by low single-precision floating-point value in xmm3/m32.

Selectively multiply packed double-precision floating-point values from xmm2 with packed double-precision floating-point values from xmm3, selectively add and store the packed double-precision floating-point values to xmm1.

Selectively multiply packed double-precision floating-point values from xmm2 with packed double-precision floating-point values from xmm3, selectively add and store the packed double-precision floating-point values to xmm1.

Multiply packed single-precision floating-point values from xmm1 with packed single-precision floating-point values from xmm2/mem, selectively add and store to xmm1.

Multiply packed single-precision floating-point values from xmm1 with packed single-precision floating-point values from xmm2/mem, selectively add and store to xmm1.

Multiply packed single-precision floating-point values from ymm2 with packed single-precision floating-point values from ymm3/mem, selectively add pairs of elements and store to ymm1.

Multiply packed single-precision floating-point values from ymm2 with packed single-precision floating-point values from ymm3/mem, selectively add pairs of elements and store to ymm1.

Set Zero Flag (ZF) is 1 if segment specified with r/m16 can be read.

Set Zero Flag (ZF) is 1 if segment specified with r/m16 can be read.

Set Zero Flag (ZF) is 1 if segment specified with r/m16 can be written.

Set Zero Flag (ZF) is 1 if segment specified with r/m16 can be written.

Extract 128 bits of packed floating-point values from ymm2 and store results in xmm1/mem.

Extract 128 bits of packed floating-point values from ymm2 and store results in xmm1/mem.

Extract 128 bits of integer data from ymm2 and store results in xmm1/mem.

Extract 128 bits of integer data from ymm2 and store results in xmm1/mem.

Extract one single-precision floating-point value from xmm1 at the offset specified by imm8 and store the result in reg or m32.

Zero extend the results in 64-bit register if applicable.

Extract one single-precision floating-point value from xmm1 at the offset specified by imm8 and store the result in reg or m32.

Zero extend the results in 64-bit register if applicable.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, add to xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, add to xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, add to ymm1 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, add to ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, add to xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, add to xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, add to ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, add to ymm1 and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm2/mem, add to xmm1 and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm2/mem, add to xmm1 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm2/mem, add to xmm1 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm2/mem, add to xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, add to xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, add to xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1. add to ymm2/mem and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1, add to ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, add to xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, add to xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, add to ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, add to ymm2/mem and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm1, add to xmm2/mem and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm1, add to xmm2/mem and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm1, add to xmm2/mem and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm1, add to xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, add to xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, add to xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, add to ymm0 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, add to ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, add to xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, add to xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, add to ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, add to ymm0 and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm1 and xmm2/mem, add to xmm0 and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm1 and xmm2/mem, add to xmm0 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm1 and xmm2/mem, add to xmm0 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm1 and xmm2/mem, add to xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, add/subtract elements in xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, add/subtract elements in xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, add/subtract elements in ymm1 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, add/subtract elements in ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, add/subtract elements in xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, add/subtract elements in xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, add/subtract elements in ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, add/subtract elements in ymm1 and put result in ymm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, add/subtract elements in xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, add/subtract elements in xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1. add/subtract elements in ymm2/mem and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1. add/subtract elements in ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, add/subtract elements in xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, add/subtract elements in xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, add/subtract elements in ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, add/subtract elements in ymm2/mem and put result in ymm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, add/subtract elements in xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, add/subtract elements in xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, add/subtract elements in ymm0 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, add/subtract elements in ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, add/subtract elements in xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, add/subtract elements in xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, add/subtract elements in ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, add/subtract elements in ymm0 and put result in ymm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, subtract xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, subtract xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, subtract ymm1 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, subtract ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, subtract xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, subtract xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, subtract ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, subtract ymm1 and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm2/mem, subtract xmm1 and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm2/mem, subtract xmm1 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm2/mem, subtract xmm1 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm2/mem, subtract xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, subtract xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, subtract xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1. subtract ymm2/mem and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1. subtract ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, subtract xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, subtract xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, subtract ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, subtract ymm2/mem and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm1, subtract xmm2/mem and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm1, subtract xmm2/mem and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm1, subtract xmm2/mem and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm1, subtract xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, subtract xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, subtract xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, subtract ymm0 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, subtract ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, subtract xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, subtract xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, subtract ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, subtract ymm0 and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm1 and xmm2/mem, subtract xmm0 and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm1 and xmm2/mem, subtract xmm0 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm1 and xmm2/mem, subtract xmm0 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm1 and xmm2/mem, subtract xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, subtract/add elements in xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, subtract/add elements in xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, subtract/add elements in ymm1 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, subtract/add elements in ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, subtract/add elements in xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, subtract/add elements in xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, subtract/add elements in ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, subtract/add elements in ymm1 and put result in ymm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, subtract/add elements in xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, subtract/add elements in xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1, subtract/add elements in ymm2/mem and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1, subtract/add elements in ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, subtract/add elements in xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, subtract/add elements in xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, subtract/add elements in ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, subtract/add elements in ymm2/mem and put result in ymm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, subtract/add elements in xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, subtract/add elements in xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, subtract/add elements in ymm0 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, subtract/add elements in ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, subtract/add elements in xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, subtract/add elements in xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, subtract/add elements in ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, subtract/add elements in ymm0 and put result in ymm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, negate the multiplication result and add to xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, negate the multiplication result and add to xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, negate the multiplication result and add to ymm1 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, negate the multiplication result and add to ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, negate the multiplication result and add to xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, negate the multiplication result and add to xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, negate the multiplication result and add to ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, negate the multiplication result and add to ymm1 and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm2/mem, negate the multiplication result and add to xmm1 and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm2/mem, negate the multiplication result and add to xmm1 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm2/mem, negate the multiplication result and add to xmm1 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm2/mem, negate the multiplication result and add to xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, negate the multiplication result and add to xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, negate the multiplication result and add to xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1, negate the multiplication result and add to ymm2/mem and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1, negate the multiplication result and add to ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, negate the multiplication result and add to xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, negate the multiplication result and add to xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, negate the multiplication result and add to ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, negate the multiplication result and add to ymm2/mem and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm1, negate the multiplication result and add to xmm2/mem and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm1, negate the multiplication result and add to xmm2/mem and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm1, negate the multiplication result and add to xmm2/mem and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm1, negate the multiplication result and add to xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, negate the multiplication result and add to xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, negate the multiplication result and add to xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, negate the multiplication result and add to ymm0 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, negate the multiplication result and add to ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, negate the multiplication result and add to xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, negate the multiplication result and add to xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, negate the multiplication result and add to ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, negate the multiplication result and add to ymm0 and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm1 and xmm2/mem, negate the multiplication result and add to xmm0 and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm1 and xmm2/mem, negate the multiplication result and add to xmm0 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm1 and xmm2/mem, negate the multiplication result and add to xmm0 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm1 and xmm2/mem, negate the multiplication result and add to xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, negate the multiplication result and subtract xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm2/mem, negate the multiplication result and subtract xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, negate the multiplication result and subtract ymm1 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm2/mem, negate the multiplication result and subtract ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, negate the multiplication result and subtract xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm2/mem, negate the multiplication result and subtract xmm1 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, negate the multiplication result and subtract ymm1 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm2/mem, negate the multiplication result and subtract ymm1 and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm2/mem, negate the multiplication result and subtract xmm1 and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm2/mem, negate the multiplication result and subtract xmm1 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm2/mem, negate the multiplication result and subtract xmm1 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm2/mem, negate the multiplication result and subtract xmm1 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, negate the multiplication result and subtract xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm0 and xmm1, negate the multiplication result and subtract xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1, negate the multiplication result and subtract ymm2/mem and put result in ymm0.

Multiply packed double-precision floating-point values from ymm0 and ymm1, negate the multiplication result and subtract ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, negate the multiplication result and subtract xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from xmm0 and xmm1, negate the multiplication result and subtract xmm2/mem and put result in xmm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, negate the multiplication result and subtract ymm2/mem and put result in ymm0.

Multiply packed single-precision floating-point values from ymm0 and ymm1, negate the multiplication result and subtract ymm2/mem and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm1, negate the multiplication result and subtract xmm2/mem and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm0 and xmm1, negate the multiplication result and subtract xmm2/mem and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm1, negate the multiplication result and subtract xmm2/mem and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm0 and xmm1, negate the multiplication result and subtract xmm2/mem and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, negate the multiplication result and subtract xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from xmm1 and xmm2/mem, negate the multiplication result and subtract xmm0 and put result in xmm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, negate the multiplication result and subtract ymm0 and put result in ymm0.

Multiply packed double-precision floating-point values from ymm1 and ymm2/mem, negate the multiplication result and subtract ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, negate the multiplication result and subtract xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from xmm1 and xmm2/mem, negate the multiplication result and subtract xmm0 and put result in xmm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, negate the multiplication result and subtract ymm0 and put result in ymm0.

Multiply packed single-precision floating-point values from ymm1 and ymm2/mem, negate the multiplication result and subtract ymm0 and put result in ymm0.

Multiply scalar double-precision floating-point value from xmm1 and xmm2/mem, negate the multiplication result and subtract xmm0 and put result in xmm0.

Multiply scalar double-precision floating-point value from xmm1 and xmm2/mem, negate the multiplication result and subtract xmm0 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm1 and xmm2/mem, negate the multiplication result and subtract xmm0 and put result in xmm0.

Multiply scalar single-precision floating-point value from xmm1 and xmm2/mem, negate the multiplication result and subtract xmm0 and put result in xmm0.

Using dword indices specified in vm32x, gather double-precision FP values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using dword indices specified in vm32x, gather double-precision FP values from memory conditioned on mask specified by ymm2.

Conditionally gathered elements are merged into ymm1.

Using dword indices specified in vm32x, gather single-precision FP values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using dword indices specified in vm32x, gather single-precision FP values from memory conditioned on mask specified by ymm2.

Conditionally gathered elements are merged into ymm1.

Using qword indices specified in vm64x, gather double-precision FP values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using qword indices specified in vm64y, gather double-precision FP values from memory conditioned on mask specified by ymm2.

Conditionally gathered elements are merged into ymm1.

Using qword indices specified in vm64x, gather single-precision FP values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using qword indices specified in vm64x, gather single-precision FP values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Horizontal add packed double-precision floating-point values from xmm2 and xmm3/mem.

Horizontal add packed double-precision floating-point values from xmm2 and xmm3/mem.

Horizontal add packed double-precision floating-point values from ymm2 and ymm3/mem.

Horizontal add packed double-precision floating-point values from ymm2 and ymm3/mem.

Horizontal add packed single-precision floating-point values from xmm2 and xmm3/mem.

Horizontal add packed single-precision floating-point values from xmm2 and xmm3/mem.

Horizontal add packed single-precision floating-point values from ymm2 and ymm3/mem.

Horizontal add packed single-precision floating-point values from ymm2 and ymm3/mem.

Horizontal subtract packed double-precision floating-point values from xmm2 and xmm3/mem.

Horizontal subtract packed double-precision floating-point values from xmm2 and xmm3/mem.

Horizontal subtract packed double-precision floating-point values from ymm2 and ymm3/mem.

Horizontal subtract packed double-precision floating-point values from ymm2 and ymm3/mem.

Horizontal subtract packed single-precision floating-point values from xmm2 and xmm3/mem.

Horizontal subtract packed single-precision floating-point values from xmm2 and xmm3/mem.

Horizontal subtract packed single-precision floating-point values from ymm2 and ymm3/mem.

Horizontal subtract packed single-precision floating-point values from ymm2 and ymm3/mem.

Insert a single-precision floating-point value selected by imm8 from xmm3/m128 into ymm2 at the specified destination element specified by imm8 and zero out destination elements in ymm1 as indicated in imm8.

Insert a single-precision floating-point value selected by imm8 from xmm3/m128 into ymm2 at the specified destination element specified by imm8 and zero out destination elements in ymm1 as indicated in imm8.

Insert 128-bits of integer data from xmm3/mem and the remaining values from ymm2 into ymm1.

Insert 128-bits of integer data from xmm3/mem and the remaining values from ymm2 into ymm1.

Insert a single-precision floating-point value selected by imm8 from xmm3/m32 and merge into xmm2 at the specified destination element specified by imm8 and zero out destination elements in xmm1 as indicated in imm8.

Insert a single-precision floating-point value selected by imm8 from xmm3/m32 and merge into xmm2 at the specified destination element specified by imm8 and zero out destination elements in xmm1 as indicated in imm8.

Load unaligned packed integer values from mem to xmm1.

Load unaligned packed integer values from mem to ymm1.

Load MXCSR register from m32.

Selectively write bytes from xmm1 to memory location using the byte mask in xmm2.

The default memory location is specified by DS:DI, EDI or RDI.

Conditionally store packed double-precision values from xmm2 using mask in xmm1.

Conditionally store packed double-precision values from ymm2 using mask in ymm1.

Conditionally load packed double-precision values from m128 using mask in xmm2 and store in xmm1.

Conditionally load packed double-precision values from m256 using mask in ymm2 and store in ymm1.

Conditionally store packed single-precision values from xmm2 using mask in xmm1.

Conditionally store packed single-precision values from ymm2 using mask in ymm1.

Conditionally load packed single-precision values from m128 using mask in xmm2 and store in xmm1.

Conditionally load packed single-precision values from m256 using mask in ymm2 and store in ymm1.

Return the maximum double-precision floating-point values between xmm2 and xmm3/mem.

Return the maximum double-precision floating-point values between xmm2 and xmm3/mem.

Return the maximum packed double-precision floating-point values between ymm2 and ymm3/mem.

Return the maximum packed double-precision floating-point values between ymm2 and ymm3/mem.

Return the maximum single-precision floating-point values between xmm2 and xmm3/mem.

Return the maximum single-precision floating-point values between xmm2 and xmm3/mem.

Return the maximum single double-precision floating-point values between ymm2 and ymm3/mem.

Return the maximum single double-precision floating-point values between ymm2 and ymm3/mem.

Return the maximum scalar double-precision floating-point value between xmm3/mem.4 and xmm2.

Return the maximum scalar double-precision floating-point value between xmm3/mem.4 and xmm2.

Return the maximum scalar single-precision floating-point value between xmm3/mem.2 and xmm2.

Return the maximum scalar single-precision floating-point value between xmm3/mem.2 and xmm2.

Return the minimum double-precision floating-point values between xmm2 and xmm3/mem.

Return the minimum double-precision floating-point values between xmm2 and xmm3/mem.

Return the minimum packed double-precision floating-point values between ymm2 and ymm3/mem.

Return the minimum packed double-precision floating-point values between ymm2 and ymm3/mem.

Return the minimum single-precision floating-point values between xmm2 and xmm3/mem.

Return the minimum single-precision floating-point values between xmm2 and xmm3/mem.

Return the minimum single double-precision floating-point values between ymm2 and ymm3/mem.

Return the minimum single double-precision floating-point values between ymm2 and ymm3/mem.

Return the minimum scalar double-precision floating-point value between xmm3/mem4 and xmm2.

Return the minimum scalar double-precision floating-point value between xmm3/mem4 and xmm2.

Return the minimum scalar single-precision floating-point value between xmm3/mem2 and xmm2.

Return the minimum scalar single-precision floating-point value between xmm3/mem2 and xmm2.

Move aligned packed double-precision floating-point values from xmm1 to xmm2/mem.

Move aligned packed double-precision floating-point values from ymm1 to ymm2/mem.

Move aligned packed double-precision floating-point values from xmm2/mem to xmm1.

Move aligned packed double-precision floating-point values from xmm2/mem to xmm1.

Move aligned packed double-precision floating-point values from xmm1 to xmm2/mem.

Move aligned packed double-precision floating-point values from ymm2/mem to ymm1.

Move aligned packed double-precision floating-point values from ymm2/mem to ymm1.

Move aligned packed double-precision floating-point values from ymm1 to ymm2/mem.

Move aligned packed single-precision floating-point values from xmm1 to xmm2/mem.

Move aligned packed single-precision floating-point values from ymm1 to ymm2/mem.

Move aligned packed single-precision floating-point values from xmm2/mem to xmm1.

Move aligned packed single-precision floating-point values from xmm2/mem to xmm1.

Move aligned packed single-precision floating-point values from xmm1 to xmm2/mem.

Move aligned packed single-precision floating-point values from ymm2/mem to ymm1.

Move aligned packed single-precision floating-point values from ymm2/mem to ymm1.

Move aligned packed single-precision floating-point values from ymm1 to ymm2/mem.

Move doubleword from xmm1 register to r/m32.

Move doubleword from xmm1 register to r/m32.

Move doubleword from r/m32 to xmm1.

Move doubleword from r/m32 to xmm1.

Move double-precision floating-point values from xmm2/mem and duplicate into xmm1.

Move double-precision floating-point values from xmm2/mem and duplicate into xmm1.

Move even index double-precision floating-point values from ymm2/mem and duplicate each element into ymm1.

Move even index double-precision floating-point values from ymm2/mem and duplicate each element into ymm1.

Move aligned packed integer values from xmm1 to xmm2/mem.

Move aligned packed integer values from ymm1 to ymm2/mem.

Move aligned packed integer values from xmm2/mem to xmm1.

Move aligned packed integer values from xmm2/mem to xmm1.

Move aligned packed integer values from xmm1 to xmm2/mem.

Move aligned packed integer values from ymm2/mem to ymm1.

Move aligned packed integer values from ymm2/mem to ymm1.

Move aligned packed integer values from ymm1 to ymm2/mem.

Move unaligned packed integer values from xmm1 to xmm2/mem.

Move unaligned packed integer values from ymm1 to ymm2/mem.

Move unaligned packed integer values from xmm2/mem to xmm1.

Move unaligned packed integer values from xmm2/mem to xmm1.

Move unaligned packed integer values from xmm1 to xmm2/mem.

Move unaligned packed integer values from ymm2/mem to ymm1.

Move unaligned packed integer values from ymm2/mem to ymm1.

Move unaligned packed integer values from ymm1 to ymm2/mem.

Merge two packed single-precision floating-point values from high quadword of xmm3 and low quadword of xmm2.

Move double-precision floating-point values from high quadword of xmm1 to m64.

Merge double-precision floating-point value from m64 and the low quadword of xmm1.

Move two packed single-precision floating-point values from high quadword of xmm1to m64.

Merge two packed single-precision floating-point values from m64 and the low quadword of xmm1.

Merge two packed single-precision floating-point values from low quadword of xmm3 and low quadword of xmm2.

Move double-precision floating-point values from low quadword of xmm1 to m64.

Merge double-precision floating-point value from m64 and the high quadword of xmm1.

Move two packed single-precision floating-point values from low quadword of xmm1 to m64.

Merge two packed single-precision floating-point values from m64 and the high quadword of xmm1.

Extract 2-bit sign mask from xmm2 and store in register.

The upper bits of r32 or r64 are zeroed.

Extract 4-bit sign mask from ymm2 and store in register.

The upper bits of r32 or r64 are zeroed.

Extract 2-bit sign mask from xmm2 and store in register.

The upper bits of r32 or r64 are zeroed.

Extract 4-bit sign mask from ymm2 and store in register.

The upper bits of r32 or r64 are zeroed.

Extract 4-bit sign mask from xmm2 and store in register.

The upper bits of r32 or r64 are zeroed.

Extract 8-bit sign mask from ymm2 and store in register.

The upper bits of r32 or r64 are zeroed.

Extract 4-bit sign mask from xmm2 and store in register.

The upper bits of r32 or r64 are zeroed.

Extract 8-bit sign mask from ymm2 and store in register.

The upper bits of r32 or r64 are zeroed.

Move packed integer values in xmm1 to m128 using non-temporal hint.

Move packed integer values in ymm1 to m256 using non-temporal hint.

Move double quadword from m128 to xmm using non-temporal hint if WC memory type.

Move 256-bit data from m256 to ymm using non-temporal hint if WC memory type.

Move packed double-precision values in xmm1 to m128 using non-temporal hint.

Move packed double-precision values in ymm1 to m256 using non-temporal hint.

Move packed single-precision values xmm1 to mem using non-temporal hint.

Move packed single-precision values ymm1 to mem using non-temporal hint.

Move quadword from xmm1 register to r/m64.

Move quadword from xmm2 register to xmm1/m64.

Move quadword from xmm1 register to r/m64.

Move quadword from r/m64 to xmm1.

Load quadword from m64 to xmm1.

Move quadword from r/m64 to xmm1.

Move quadword from xmm2 to xmm1.

Move quadword from xmm2 register to xmm1/m64.

Move scalar double-precision floating-point value from xmm1 register to m64.

Load scalar double-precision floating-point value from m64 to xmm1.

Merge scalar double-precision floating-point value from xmm2 and xmm3 to xmm1.

Merge scalar double-precision floating-point value from xmm2 and xmm3 to xmm1.

Move odd index single-precision floating-point values from xmm2/mem and duplicate each element into xmm1.

Move odd index single-precision floating-point values from xmm2/mem and duplicate each element into xmm1.

Move odd index single-precision floating-point values from ymm2/mem and duplicate each element into ymm1.

Move odd index single-precision floating-point values from ymm2/mem and duplicate each element into ymm1.

Move even index single-precision floating-point values from xmm2/mem and duplicate each element into xmm1.

Move even index single-precision floating-point values from xmm2/mem and duplicate each element into xmm1.

Move even index single-precision floating-point values from ymm2/mem and duplicate each element into ymm1.

Move even index single-precision floating-point values from ymm2/mem and duplicate each element into ymm1.

Move scalar single-precision floating-point value from xmm1 register to m32.

Load scalar single-precision floating-point value from m32 to xmm1.

Merge scalar single-precision floating-point value from xmm2 and xmm3 to xmm1.

Merge scalar single-precision floating-point value from xmm2 and xmm3 to xmm1.

Move unaligned packed double-precision floating-point from xmm1 to xmm2/mem.

Move unaligned packed double-precision floating-point from ymm1 to ymm2/mem.

Move unaligned packed double-precision floating-point from xmm2/mem to xmm1.

Move unaligned packed double-precision floating-point from xmm2/mem to xmm1.

Move unaligned packed double-precision floating-point from xmm1 to xmm2/mem.

Move unaligned packed double-precision floating-point from ymm2/mem to ymm1.

Move unaligned packed double-precision floating-point from ymm2/mem to ymm1.

Move unaligned packed double-precision floating-point from ymm1 to ymm2/mem.

Move unaligned packed single-precision floating-point from xmm1 to xmm2/mem.

Move unaligned packed single-precision floating-point from ymm1 to ymm2/mem.

Move unaligned packed single-precision floating-point from xmm2/mem to xmm1.

Move unaligned packed single-precision floating-point from xmm2/mem to xmm1.

Move unaligned packed single-precision floating-point from xmm1 to xmm2/mem.

Move unaligned packed single-precision floating-point from ymm2/mem to ymm1.

Move unaligned packed single-precision floating-point from ymm2/mem to ymm1.

Move unaligned packed single-precision floating-point from ymm1 to ymm2/mem.

Sums absolute 8-bit integer difference of adjacent groups of 4 byte integers in xmm2 and xmm3/m128 and writes the results in xmm1.

Starting offsets within xmm2 and xmm3/m128 are determined by imm8.

Sums absolute 8-bit integer difference of adjacent groups of 4 byte integers in xmm2 and xmm3/m128 and writes the results in xmm1.

Starting offsets within xmm2 and xmm3/m128 are determined by imm8.

Sums absolute 8-bit integer difference of adjacent groups of 4 byte integers in xmm2 and ymm3/m128 and writes the results in ymm1.

Starting offsets within ymm2 and xmm3/m128 are determined by imm8.

Sums absolute 8-bit integer difference of adjacent groups of 4 byte integers in xmm2 and ymm3/m128 and writes the results in ymm1.

Starting offsets within ymm2 and xmm3/m128 are determined by imm8.

Multiply packed double-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Multiply packed double-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Multiply packed double-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Multiply packed double-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Multiply packed single-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Multiply packed single-precision floating-point values from xmm3/mem to xmm2 and stores result in xmm1.

Multiply packed single-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Multiply packed single-precision floating-point values from ymm3/mem to ymm2 and stores result in ymm1.

Multiply the low double-precision floating-point value in xmm3/mem4 by low double-precision floating-point value in xmm2.

Multiply the low double-precision floating-point value in xmm3/mem4 by low double-precision floating-point value in xmm2.

Multiply the low single-precision floating-point value in xmm3/mem by the low single-precision floating-point value in xmm2.

Multiply the low single-precision floating-point value in xmm3/mem by the low single-precision floating-point value in xmm2.

Return the bitwise logical OR of packed double-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical OR of packed double-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical OR of packed double-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical OR of packed double-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical OR of packed single-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical OR of packed single-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical OR of packed single-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical OR of packed single-precision floating-point values in ymm2 and ymm3/mem.

Compute the absolute value of bytes in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of bytes in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of bytes in ymm2/m256 and store unsigned result in ymm1.

Compute the absolute value of bytes in ymm2/m256 and store unsigned result in ymm1.

Compute the absolute value of 32-bit integers in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of 32-bit integers in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of 32-bit integers in ymm2/m256 and store unsigned result in ymm1.

Compute the absolute value of 32-bit integers in ymm2/m256 and store unsigned result in ymm1.

Compute the absolute value of 16-bit integers in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of 16-bit integers in xmm2/m128 and store unsigned result in xmm1.

Compute the absolute value of 16-bit integers in ymm2/m256 and store unsigned result in ymm1.

Compute the absolute value of 16-bit integers in ymm2/m256 and store unsigned result in ymm1.

Converts 4 packed signed doubleword integers from xmm2 and from xmm3/m128 into 8 packed signed word integers in xmm1 using signed saturation.

Converts 4 packed signed doubleword integers from xmm2 and from xmm3/m128 into 8 packed signed word integers in xmm1 using signed saturation.

Converts 8 packed signed doubleword integers from ymm2 and from ymm3/m256 into 16 packed signed word integers in ymm1 using signed saturation.

Converts 8 packed signed doubleword integers from ymm2 and from ymm3/m256 into 16 packed signed word integers in ymm1 using signed saturation.

Converts 8 packed signed word integers from xmm2 and from xmm3/m128 into 16 packed signed byte integers in xmm1 using signed saturation.

Converts 8 packed signed word integers from xmm2 and from xmm3/m128 into 16 packed signed byte integers in xmm1 using signed saturation.

Converts 16 packed signed word integers from ymm2 and from ymm3/m256 into 32 packed signed byte integers in ymm1 using signed saturation.

Converts 16 packed signed word integers from ymm2 and from ymm3/m256 into 32 packed signed byte integers in ymm1 using signed saturation.

Convert 4 packed signed doubleword integers from xmm2 and 4 packed signed doubleword integers from xmm3/m128 into 8 packed unsigned word integers in xmm1 using unsigned saturation.

Convert 4 packed signed doubleword integers from xmm2 and 4 packed signed doubleword integers from xmm3/m128 into 8 packed unsigned word integers in xmm1 using unsigned saturation.

Convert 8 packed signed doubleword integers from ymm2 and 8 packed signed doubleword integers from ymm3/m128 into 16 packed unsigned word integers in ymm1 using unsigned saturation.

Convert 8 packed signed doubleword integers from ymm2 and 8 packed signed doubleword integers from ymm3/m128 into 16 packed unsigned word integers in ymm1 using unsigned saturation.

Converts 8 signed word integers from xmm2 and 8 signed word integers from xmm3/m128 into 16 unsigned byte integers in xmm1 using unsigned saturation.

Converts 8 signed word integers from xmm2 and 8 signed word integers from xmm3/m128 into 16 unsigned byte integers in xmm1 using unsigned saturation.

Converts 16 signed word integers from ymm2 And 16 signed word integers from ymm3/m256 into 32 unsigned byte integers in ymm1 using unsigned saturation.

Converts 16 signed word integers from ymm2 And 16 signed word integers from ymm3/m256 into 32 unsigned byte integers in ymm1 using unsigned saturation.

Add packed byte integers from xmm3/m128 and xmm2.

Add packed byte integers from xmm3/m128 and xmm2.

Add packed byte integers from ymm2 and ymm3/m256 and store in ymm1.

Add packed byte integers from ymm2 and ymm3/m256 and store in ymm1.

Add packed doubleword integers from xmm3/m128 and xmm2.

Add packed doubleword integers from xmm3/m128 and xmm2.

Add packed doubleword integers from ymm2, ymm3/m256 and store in ymm1.

Add packed doubleword integers from ymm2, ymm3/m256 and store in ymm1.

Add packed quadword integers xmm3/m128 and xmm2.

Add packed quadword integers xmm3/m128 and xmm2.

Add packed quadword integers from ymm2. ymm3/m256 and store in ymm1.

Add packed quadword integers from ymm2. ymm3/m256 and store in ymm1.

Add packed signed byte integers from xmm3/m128 and xmm2 saturate the results.

Add packed signed byte integers from xmm3/m128 and xmm2 saturate the results.

Add packed signed byte integers from ymm2 and ymm3/m256 and store the saturated results in ymm1.

Add packed signed byte integers from ymm2 and ymm3/m256 and store the saturated results in ymm1.

Add packed signed word integers from xmm3/m128 and xmm2 and saturate the results.

Add packed signed word integers from xmm3/m128 and xmm2 and saturate the results.

Add packed signed word integers from ymm2 and ymm3/m256 and store the saturated results in ymm1.

Add packed signed word integers from ymm2 and ymm3/m256 and store the saturated results in ymm1.

Add packed unsigned byte integers from xmm3/m128 to xmm2 and saturate the results.

Add packed unsigned byte integers from xmm3/m128 to xmm2 and saturate the results.

Add packed unsigned byte integers from ymm2 and ymm3/m256 and store the saturated results in ymm1.

Add packed unsigned byte integers from ymm2 and ymm3/m256 and store the saturated results in ymm1.

Add packed unsigned word integers from xmm3/m128 to xmm2 and saturate the results.

Add packed unsigned word integers from xmm3/m128 to xmm2 and saturate the results.

Add packed unsigned word integers from ymm2 and ymm3/m256 and store the saturated results in ymm1.

Add packed unsigned word integers from ymm2 and ymm3/m256 and store the saturated results in ymm1.

Add packed word integers from xmm3/m128 and xmm2.

Add packed word integers from xmm3/m128 and xmm2.

Add packed word integers from ymm2, ymm3/m256 and store in ymm1.

Add packed word integers from ymm2, ymm3/m256 and store in ymm1.

Concatenate xmm2 and xmm3/m128, extract byte aligned result shifted to the right by constant value in imm8 and result is stored in xmm1.

Concatenate xmm2 and xmm3/m128, extract byte aligned result shifted to the right by constant value in imm8 and result is stored in xmm1.

Concatenate pairs of 16 bytes in ymm2 and ymm3/m256 into 32-byte intermediate result, extract byte-aligned, 16-byte result shifted to the right by constant values in imm8 from each intermediate result, and two 16-byte results are stored in ymm1.

Concatenate pairs of 16 bytes in ymm2 and ymm3/m256 into 32-byte intermediate result, extract byte-aligned, 16-byte result shifted to the right by constant values in imm8 from each intermediate result, and two 16-byte results are stored in ymm1.

Bitwise AND of xmm3/m128 and xmm.

Bitwise AND of xmm3/m128 and xmm.

Bitwise AND of ymm2 and ymm3/m256 and store result in ymm1.

Bitwise AND of ymm2 and ymm3/m256 and store result in ymm1.

Bitwise AND NOT of xmm3/m128 and xmm2.

Bitwise AND NOT of xmm3/m128 and xmm2.

Bitwise AND NOT of ymm2 and ymm3/m256 and store result in ymm1.

Bitwise AND NOT of ymm2 and ymm3/m256 and store result in ymm1.

Average packed unsigned byte integers from xmm3/m128 and xmm2 with rounding.

Average packed unsigned byte integers from xmm3/m128 and xmm2 with rounding.

Average packed unsigned byte integers from ymm2 and ymm3/m256 with rounding and store to ymm1.

Average packed unsigned byte integers from ymm2 and ymm3/m256 with rounding and store to ymm1.

Average packed unsigned word integers from xmm3/m128 and xmm2 with rounding.

Average packed unsigned word integers from xmm3/m128 and xmm2 with rounding.

Average packed unsigned word integers from ymm2, ymm3/m256 with rounding to ymm1.

Average packed unsigned word integers from ymm2, ymm3/m256 with rounding to ymm1.

Select dwords from xmm2 and xmm3/m128 from mask specified in imm8 and store the values into xmm1.

Select dwords from xmm2 and xmm3/m128 from mask specified in imm8 and store the values into xmm1.

Select dwords from ymm2 and ymm3/m256 from mask specified in imm8 and store the values into ymm1.

Select dwords from ymm2 and ymm3/m256 from mask specified in imm8 and store the values into ymm1.

Select byte values from xmm2 and xmm3/m128 using mask bits in the specified mask register, xmm4 and store the values into xmm1.

Select byte values from xmm2 and xmm3/m128 using mask bits in the specified mask register, xmm4 and store the values into xmm1.

Select byte values from ymm2 and ymm3/m256 from mask specified in the high bit of each byte in ymm4 and store the values into ymm1.

Select byte values from ymm2 and ymm3/m256 from mask specified in the high bit of each byte in ymm4 and store the values into ymm1.

Select words from xmm2 and xmm3/m128 from mask specified in imm8 and store the values into xmm1.

Select words from xmm2 and xmm3/m128 from mask specified in imm8 and store the values into xmm1.

Select words from ymm2 and ymm3/m256 from mask specified in imm8 and store the values into ymm1.

Select words from ymm2 and ymm3/m256 from mask specified in imm8 and store the values into ymm1.

Broadcast a byte integer in the source operand to sixteen locations in xmm1.

Broadcast a byte integer in the source operand to sixteen locations in xmm1.

Broadcast a byte integer in the source operand to thirty two locations in ymm1.

Broadcast a byte integer in the source operand to thirty two locations in ymm1.

Broadcast a dword integer in the source operand to four locations in xmm1.

Broadcast a dword integer in the source operand to four locations in xmm1.

Broadcast a dword integer in the source operand to eight locations in ymm1.

Broadcast a dword integer in the source operand to eight locations in ymm1.

Broadcast a qword element in mem to two locations in xmm1.

Broadcast a qword element in mem to two locations in xmm1.

Broadcast a qword element in mem to four locations in ymm1.

Broadcast a qword element in mem to four locations in ymm1.

Broadcast a word integer in the source operand to eight locations in xmm1.

Broadcast a word integer in the source operand to eight locations in xmm1.

Broadcast a word integer in the source operand to sixteen locations in ymm1.

Broadcast a word integer in the source operand to sixteen locations in ymm1.

Carry-less multiplication of one quadword of xmm2 by one quadword of xmm3/m128.

Stores the 128-bit result in xmm1.

The immediate is used to determine which quadwords of xmm2 and xmm3/m128 should be used.

Carry-less multiplication of one quadword of xmm2 by one quadword of xmm3/m128.

Stores the 128-bit result in xmm1.

The immediate is used to determine which quadwords of xmm2 and xmm3/m128 should be used.

Compare packed bytes in xmm3/m128 and xmm2 for equality.

Compare packed bytes in xmm3/m128 and xmm2 for equality.

Compare packed bytes in ymm3/m256 and ymm2 for equality.

Compare packed bytes in ymm3/m256 and ymm2 for equality.

Compare packed doublewords in xmm3/m128 and xmm2 for equality.

Compare packed doublewords in xmm3/m128 and xmm2 for equality.

Compare packed doublewords in ymm3/m256 and ymm2 for equality.

Compare packed doublewords in ymm3/m256 and ymm2 for equality.

Compare packed quadwords in xmm3/m128 and xmm2 for equality.

Compare packed quadwords in xmm3/m128 and xmm2 for equality.

Compare packed quadwords in ymm3/m256 and ymm2 for equality.

Compare packed quadwords in ymm3/m256 and ymm2 for equality.

Compare packed words in xmm3/m128 and xmm2 for equality.

Compare packed words in xmm3/m128 and xmm2 for equality.

Compare packed words in ymm3/m256 and ymm2 for equality.

Compare packed words in ymm3/m256 and ymm2 for equality.

Perform a packed comparison of string data with explicit lengths, generating an index, and storing the result in ECX.

Perform a packed comparison of string data with explicit lengths, generating an index, and storing the result in ECX.

Perform a packed comparison of string data with explicit lengths, generating a mask, and storing the result in XMM0.

Perform a packed comparison of string data with explicit lengths, generating a mask, and storing the result in XMM0.

Compare packed signed byte integers in xmm2 and xmm3/m128 for greater than.

Compare packed signed byte integers in xmm2 and xmm3/m128 for greater than.

Compare packed signed byte integers in ymm2 and ymm3/m256 for greater than.

Compare packed signed byte integers in ymm2 and ymm3/m256 for greater than.

Compare packed signed doubleword integers in xmm2 and xmm3/m128 for greater than.

Compare packed signed doubleword integers in xmm2 and xmm3/m128 for greater than.

Compare packed signed doubleword integers in ymm2 and ymm3/m256 for greater than.

Compare packed signed doubleword integers in ymm2 and ymm3/m256 for greater than.

Compare packed signed qwords in xmm2 and xmm3/m128 for greater than.

Compare packed signed qwords in xmm2 and xmm3/m128 for greater than.

Compare packed signed qwords in ymm2 and ymm3/m256 for greater than.

Compare packed signed qwords in ymm2 and ymm3/m256 for greater than.

Compare packed signed word integers in xmm2 and xmm3/m128 for greater than.

Compare packed signed word integers in xmm2 and xmm3/m128 for greater than.

Compare packed signed word integers in ymm2 and ymm3/m256 for greater than.

Compare packed signed word integers in ymm2 and ymm3/m256 for greater than.

Perform a packed comparison of string data with implicit lengths, generating an index, and storing the result in ECX.

Perform a packed comparison of string data with implicit lengths, generating an index, and storing the result in ECX.

Perform a packed comparison of string data with implicit lengths, generating a Mask, and storing the result in XMM0.

Perform a packed comparison of string data with implicit lengths, generating a Mask, and storing the result in XMM0.

Permute 128-bit floating-point fields in ymm2 and ymm3/mem using controls from imm8 and store result in ymm1.

Permute 128-bit floating-point fields in ymm2 and ymm3/mem using controls from imm8 and store result in ymm1.

Permute 128-bit integer data in ymm2 and ymm3/mem using controls from imm8 and store result in ymm1.

Permute 128-bit integer data in ymm2 and ymm3/mem using controls from imm8 and store result in ymm1.

Permute doublewords in ymm3/m256 using indexes in ymm2 and store the result in ymm1.

Permute doublewords in ymm3/m256 using indexes in ymm2 and store the result in ymm1.

Permute double-precision floating-point values in xmm2/mem using controls from imm8.

Permute double-precision floating-point values in xmm2/mem using controls from imm8.

Permute double-precision floating-point values in xmm2 using controls from xmm3/mem and store result in xmm1.

Permute double-precision floating-point values in xmm2 using controls from xmm3/mem and store result in xmm1.

Permute double-precision floating-point values in ymm2/mem using controls from imm8.

Permute double-precision floating-point values in ymm2/mem using controls from imm8.

Permute double-precision floating-point values in ymm2 using controls from ymm3/mem and store result in ymm1.

Permute double-precision floating-point values in ymm2 using controls from ymm3/mem and store result in ymm1.

Permute single-precision floating-point values in xmm2/mem using controls from imm8 and store result in xmm1.

Permute single-precision floating-point values in xmm2/mem using controls from imm8 and store result in xmm1.

Permute single-precision floating-point values in xmm2 using controls from xmm3/mem and store result in xmm1.

Permute single-precision floating-point values in xmm2 using controls from xmm3/mem and store result in xmm1.

Permute single-precision floating-point values in ymm2/mem using controls from imm8 and store result in ymm1.

Permute single-precision floating-point values in ymm2/mem using controls from imm8 and store result in ymm1.

Permute single-precision floating-point values in ymm2 using controls from ymm3/mem and store result in ymm1.

Permute single-precision floating-point values in ymm2 using controls from ymm3/mem and store result in ymm1.

Permute double-precision floating-point elements in ymm2/m256 using indexes in imm8 and store the result in ymm1.

Permute double-precision floating-point elements in ymm2/m256 using indexes in imm8 and store the result in ymm1.

Permute single-precision floating-point elements in ymm3/m256 using indexes in ymm2 and store the result in ymm1.

Permute single-precision floating-point elements in ymm3/m256 using indexes in ymm2 and store the result in ymm1.

Permute qwords in ymm2/m256 using indexes in imm8 and store the result in ymm1.

Permute qwords in ymm2/m256 using indexes in imm8 and store the result in ymm1.

Extract a byte integer value from xmm2 at the source byte offset specified by imm8 into reg or m8.

The upper bits of r64/r32 is filled with zeros.

Extract a byte integer value from xmm2 at the source byte offset specified by imm8 into reg or m8.

The upper bits of r64/r32 is filled with zeros.

Extract a byte integer value from xmm2 at the source byte offset specified by imm8 into reg or m8.

The upper bits of r64/r32 is filled with zeros.

Extract a dword integer value from xmm2 at the source dword offset specified by imm8 into r32/m32.

Extract a dword integer value from xmm2 at the source dword offset specified by imm8 into r32/m32.

Extract a qword integer value from xmm2 at the source dword offset specified by imm8 into r64/m64.

Extract a qword integer value from xmm2 at the source dword offset specified by imm8 into r64/m64.

Extract a word integer value from xmm2 at the source word offset specified by imm8 into reg or m16.

The upper bits of r64/r32 is filled with zeros.

Extract the word specified by imm8 from xmm1 and move it to reg, bits 15:0.

Zero-extend the result.

The upper bits of r64/r32 is filled with zeros.

Extract the word specified by imm8 from xmm1 and move it to reg, bits 15:0.

Zero-extend the result.

The upper bits of r64/r32 is filled with zeros.

Extract the word specified by imm8 from xmm1 and move it to reg, bits 15:0.

Zero-extend the result.

The upper bits of r64/r32 is filled with zeros.

Extract the word specified by imm8 from xmm1 and move it to reg, bits 15:0.

Zero-extend the result.

The upper bits of r64/r32 is filled with zeros.

Using dword indices specified in vm32x, gather dword values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using dword indices specified in vm32y, gather dword from memory conditioned on mask specified by ymm2.

Conditionally gathered elements are merged into ymm1.

Using dword indices specified in vm32x, gather qword values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using dword indices specified in vm32x, gather qword values from memory conditioned on mask specified by ymm2.

Conditionally gathered elements are merged into ymm1.

Using qword indices specified in vm64x, gather dword values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using qword indices specified in vm64x, gather dword values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using qword indices specified in vm64x, gather qword values from memory conditioned on mask specified by xmm2.

Conditionally gathered elements are merged into xmm1.

Using qword indices specified in vm64y, gather qword values from memory conditioned on mask specified by ymm2.

Conditionally gathered elements are merged into ymm1.

Add 32-bit integers horizontally, pack to xmm1.

Add 32-bit integers horizontally, pack to xmm1.

Add 32-bit signed integers horizontally, pack to ymm1.

Add 32-bit signed integers horizontally, pack to ymm1.

Add 16-bit signed integers horizontally, pack saturated integers to xmm1.

Add 16-bit signed integers horizontally, pack saturated integers to xmm1.

Add 16-bit signed integers horizontally, pack saturated integers to ymm1.

Add 16-bit signed integers horizontally, pack saturated integers to ymm1.

Add 16-bit integers horizontally, pack to xmm1.

Add 16-bit integers horizontally, pack to xmm1.

Add 16-bit signed integers horizontally, pack to ymm1.

Add 16-bit signed integers horizontally, pack to ymm1.

Find the minimum unsigned word in xmm2/m128 and place its value in the low word of xmm1 and its index in the second-lowest word of xmm1.

Find the minimum unsigned word in xmm2/m128 and place its value in the low word of xmm1 and its index in the second-lowest word of xmm1.

Subtract 32-bit signed integers horizontally, pack to xmm1.

Subtract 32-bit signed integers horizontally, pack to xmm1.

Subtract 32-bit signed integers horizontally, pack to ymm1.

Subtract 32-bit signed integers horizontally, pack to ymm1.

Subtract 16-bit signed integer horizontally, pack saturated integers to xmm1.

Subtract 16-bit signed integer horizontally, pack saturated integers to xmm1.

Subtract 16-bit signed integer horizontally, pack saturated integers to ymm1.

Subtract 16-bit signed integer horizontally, pack saturated integers to ymm1.

Subtract 16-bit signed integers horizontally, pack to xmm1.

Subtract 16-bit signed integers horizontally, pack to xmm1.

Subtract 16-bit signed integers horizontally, pack to ymm1.

Subtract 16-bit signed integers horizontally, pack to ymm1.

Merge a byte integer value from r32/m8 and rest from xmm2 into xmm1 at the byte offset in imm8.

Merge a byte integer value from r32/m8 and rest from xmm2 into xmm1 at the byte offset in imm8.

Insert a dword integer value from r32/m32 and rest from xmm2 into xmm1 at the dword offset in imm8.

Insert a dword integer value from r32/m32 and rest from xmm2 into xmm1 at the dword offset in imm8.

Insert a qword integer value from r64/m64 and rest from xmm2 into xmm1 at the qword offset in imm8.

Insert a qword integer value from r64/m64 and rest from xmm2 into xmm1 at the qword offset in imm8.

Insert a word integer value from r32/m16 and rest from xmm2 into xmm1 at the word offset in imm8.

Insert a word integer value from r32/m16 and rest from xmm2 into xmm1 at the word offset in imm8.

Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words to xmm1.

Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words to xmm1.

Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words to ymm1.

Multiply signed and unsigned bytes, add horizontal pair of signed words, pack saturated signed-words to ymm1.

Multiply the packed word integers in xmm2 by the packed word integers in xmm3/m128, add adjacent doubleword results, and store in xmm1.

Multiply the packed word integers in xmm2 by the packed word integers in xmm3/m128, add adjacent doubleword results, and store in xmm1.

Multiply the packed word integers in ymm2 by the packed word integers in ymm3/m256, add adjacent doubleword results, and store in ymm1.

Multiply the packed word integers in ymm2 by the packed word integers in ymm3/m256, add adjacent doubleword results, and store in ymm1.

Conditionally store dword values from xmm2 using mask in xmm1.

Conditionally store dword values from ymm2 using mask in ymm1.

Conditionally load dword values from m128 using mask in xmm2 and store in xmm1.

Conditionally load dword values from m256 using mask in ymm2 and store in ymm1.

Conditionally store qword values from xmm2 using mask in xmm1.

Conditionally store qword values from ymm2 using mask in ymm1.

Conditionally load qword values from m128 using mask in xmm2 and store in xmm1.

Conditionally load qword values from m256 using mask in ymm2 and store in ymm1.

Compare packed signed byte integers in xmm2 and xmm3/m128 and store packed maximum values in xmm1.

Compare packed signed byte integers in xmm2 and xmm3/m128 and store packed maximum values in xmm1.

Compare packed signed byte integers in ymm2 and ymm3/m128 and store packed maximum values in ymm1.

Compare packed signed byte integers in ymm2 and ymm3/m128 and store packed maximum values in ymm1.

Compare packed signed dword integers in xmm2 and xmm3/m128 and store packed maximum values in xmm1.

Compare packed signed dword integers in xmm2 and xmm3/m128 and store packed maximum values in xmm1.

Compare packed signed dword integers in ymm2 and ymm3/m128 and store packed maximum values in ymm1.

Compare packed signed dword integers in ymm2 and ymm3/m128 and store packed maximum values in ymm1.

Compare packed signed word integers in xmm3/m128 and xmm2 and store packed maximum values in xmm1.

Compare packed signed word integers in xmm3/m128 and xmm2 and store packed maximum values in xmm1.

Compare packed signed word integers in ymm3/m128 and ymm2 and store packed maximum values in ymm1.

Compare packed signed word integers in ymm3/m128 and ymm2 and store packed maximum values in ymm1.

Compare packed unsigned byte integers in xmm2 and xmm3/m128 and store packed maximum values in xmm1.

Compare packed unsigned byte integers in xmm2 and xmm3/m128 and store packed maximum values in xmm1.

Compare packed unsigned byte integers in ymm2 and ymm3/m256 and store packed maximum values in ymm1.

Compare packed unsigned byte integers in ymm2 and ymm3/m256 and store packed maximum values in ymm1.

Compare packed unsigned dword integers in xmm2 and xmm3/m128 and store packed maximum values in xmm1.

Compare packed unsigned dword integers in xmm2 and xmm3/m128 and store packed maximum values in xmm1.

Compare packed unsigned dword integers in ymm2 and ymm3/m256 and store packed maximum values in ymm1.

Compare packed unsigned dword integers in ymm2 and ymm3/m256 and store packed maximum values in ymm1.

Compare packed unsigned word integers in xmm3/m128 and xmm2 and store maximum packed values in xmm1.

Compare packed unsigned word integers in xmm3/m128 and xmm2 and store maximum packed values in xmm1.

Compare packed unsigned word integers in ymm3/m256 and ymm2 and store maximum packed values in ymm1.

Compare packed unsigned word integers in ymm3/m256 and ymm2 and store maximum packed values in ymm1.

Compare packed signed byte integers in xmm2 and xmm3/m128 and store packed minimum values in xmm1.

Compare packed signed byte integers in xmm2 and xmm3/m128 and store packed minimum values in xmm1.

Compare packed signed byte integers in ymm2 and ymm3/m256 and store packed minimum values in ymm1.

Compare packed signed byte integers in ymm2 and ymm3/m256 and store packed minimum values in ymm1.

Compare packed signed dword integers in xmm2 and xmm3/m128 and store packed minimum values in xmm1.

Compare packed signed dword integers in xmm2 and xmm3/m128 and store packed minimum values in xmm1.

Compare packed signed dword integers in ymm2 and ymm3/m128 and store packed minimum values in ymm1.

Compare packed signed dword integers in ymm2 and ymm3/m128 and store packed minimum values in ymm1.

Compare packed signed word integers in xmm3/m128 and xmm2 and return packed minimum values in xmm1.

Compare packed signed word integers in xmm3/m128 and xmm2 and return packed minimum values in xmm1.

Compare packed unsigned byte integers in xmm2 and xmm3/m128 and store packed minimum values in xmm1.

Compare packed unsigned byte integers in xmm2 and xmm3/m128 and store packed minimum values in xmm1.

Compare packed unsigned byte integers in ymm2 and ymm3/m256 and store packed minimum values in ymm1.

Compare packed unsigned byte integers in ymm2 and ymm3/m256 and store packed minimum values in ymm1.

Compare packed unsigned dword integers in xmm2 and xmm3/m128 and store packed minimum values in xmm1.

Compare packed unsigned dword integers in xmm2 and xmm3/m128 and store packed minimum values in xmm1.

Compare packed unsigned dword integers in ymm2 and ymm3/m256 and store packed minimum values in ymm1.

Compare packed unsigned dword integers in ymm2 and ymm3/m256 and store packed minimum values in ymm1.

Compare packed unsigned word integers in xmm3/m128 and xmm2 and return packed minimum values in xmm1.

Compare packed unsigned word integers in xmm3/m128 and xmm2 and return packed minimum values in xmm1.

Compare packed unsigned word integers in ymm3/m256 and ymm2 and return packed minimum values in ymm1.

Compare packed unsigned word integers in ymm3/m256 and ymm2 and return packed minimum values in ymm1.

Move a byte mask of xmm1 to register.

The upper bits of r32 or r64 are filled with zeros.

Move a 32-bit mask of ymm1 to register.

The upper bits of r64 are filled with zeros.

Move a byte mask of xmm1 to register.

The upper bits of r32 or r64 are filled with zeros.

Move a 32-bit mask of ymm1 to register.

The upper bits of r64 are filled with zeros.

Sign extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 32-bit integers in xmm1.

Sign extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 32-bit integers in xmm1.

Sign extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 32-bit integers in ymm1.

Sign extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 32-bit integers in ymm1.

Sign extend 2 packed 8-bit integers in the low 2 bytes of xmm2.m16 to 2 packed 64-bit integers in xmm1.

Sign extend 2 packed 8-bit integers in the low 2 bytes of xmm2.m16 to 2 packed 64-bit integers in xmm1.

Sign extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 64-bit integers in ymm1.

Sign extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 64-bit integers in ymm1.

Sign extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 16-bit integers in xmm1.

Sign extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 16-bit integers in xmm1.

Sign extend 16 packed 8-bit integers in xmm2/m128 to 16 packed 16-bit integers in ymm1.

Sign extend 16 packed 8-bit integers in xmm2/m128 to 16 packed 16-bit integers in ymm1.

Sign extend 2 packed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed 64-bit integers in xmm1.

Sign extend 2 packed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed 64-bit integers in xmm1.

Sign extend 4 packed 32-bit integers in the low 16 bytes of xmm2/m128 to 4 packed 64-bit integers in ymm1.

Sign extend 4 packed 32-bit integers in the low 16 bytes of xmm2/m128 to 4 packed 64-bit integers in ymm1.

Sign extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 32-bit integers in xmm1.

Sign extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 32-bit integers in xmm1.

Sign extend 8 packed 16-bit integers in the low 16 bytes of xmm2/m128 to 8 packed 32-bit integers in ymm1.

Sign extend 8 packed 16-bit integers in the low 16 bytes of xmm2/m128 to 8 packed 32-bit integers in ymm1.

Sign extend 2 packed 16-bit integers in the low 4 bytes of xmm2/m32 to 2 packed 64-bit integers in xmm1.

Sign extend 2 packed 16-bit integers in the low 4 bytes of xmm2/m32 to 2 packed 64-bit integers in xmm1.

Sign extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 64-bit integers in ymm1.

Sign extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 64-bit integers in ymm1.

Zero extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 32-bit integers in xmm1.

Zero extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 32-bit integers in xmm1.

Zero extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 32-bit integers in ymm1.

Zero extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 32-bit integers in ymm1.

Zero extend 2 packed 8-bit integers in the low 2 bytes of xmm2.m16 to 2 packed 64-bit integers in xmm1.

Zero extend 2 packed 8-bit integers in the low 2 bytes of xmm2.m16 to 2 packed 64-bit integers in xmm1.

Zero extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 64-bit integers in ymm1.

Zero extend 4 packed 8-bit integers in the low 4 bytes of xmm2/m32 to 4 packed 64-bit integers in ymm1.

Zero extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 16-bit integers in xmm1.

Zero extend 8 packed 8-bit integers in the low 8 bytes of xmm2/m64 to 8 packed 16-bit integers in xmm1.

Zero extend 16 packed 8-bit integers in the low 16 bytes of xmm2/m128 to 16 packed 16-bit integers in ymm1.

Zero extend 16 packed 8-bit integers in the low 16 bytes of xmm2/m128 to 16 packed 16-bit integers in ymm1.

Zero extend 2 packed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed 64-bit integers in xmm1.

Zero extend 2 packed 32-bit integers in the low 8 bytes of xmm2/m64 to 2 packed 64-bit integers in xmm1.

Zero extend 4 packed 32-bit integers in the low 16 bytes of xmm2/m128 to 4 packed 64-bit integers in ymm1.

Zero extend 4 packed 32-bit integers in the low 16 bytes of xmm2/m128 to 4 packed 64-bit integers in ymm1.

Zero extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 32-bit integers in xmm1.

Zero extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 32-bit integers in xmm1.

Zero extend 8 packed 16-bit integers in the low 16 bytes of xmm2/m128 to 8 packed 32-bit integers in ymm1.

Zero extend 8 packed 16-bit integers in the low 16 bytes of xmm2/m128 to 8 packed 32-bit integers in ymm1.

Zero extend 2 packed 16-bit integers in the low 4 bytes of xmm2/m32 to 2 packed 64-bit integers in xmm1.

Zero extend 2 packed 16-bit integers in the low 4 bytes of xmm2/m32 to 2 packed 64-bit integers in xmm1.

Zero extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 64-bit integers in xmm1.

Zero extend 4 packed 16-bit integers in the low 8 bytes of xmm2/m64 to 4 packed 64-bit integers in xmm1.

Multiply packed signed doubleword integers in xmm2 by packed signed doubleword integers in xmm3/m128 and store the quadword results in xmm1.

Multiply packed signed doubleword integers in xmm2 by packed signed doubleword integers in xmm3/m128 and store the quadword results in xmm1.

Multiply packed signed doubleword integers in ymm2 by packed signed doubleword integers in ymm3/m256, and store the quadword results in ymm1.

Multiply packed signed doubleword integers in ymm2 by packed signed doubleword integers in ymm3/m256, and store the quadword results in ymm1.

Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits to xmm1.

Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits to xmm1.

Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits to ymm1.

Multiply 16-bit signed words, scale and round signed doublewords, pack high 16 bits to ymm1.

Multiply the packed unsigned word integers in xmm2 and xmm3/m128 and store the high 16 bits of the results in xmm1.

Multiply the packed unsigned word integers in xmm2 and xmm3/m128 and store the high 16 bits of the results in xmm1.

Multiply the packed unsigned word integers in ymm2 and ymm3/m256, and store the high 16 bits of the results in ymm1.

Multiply the packed unsigned word integers in ymm2 and ymm3/m256, and store the high 16 bits of the results in ymm1.

Multiply the packed signed word integers in xmm2 and xmm3/m128 and store the high 16 bits of the results in xmm1.

Multiply the packed signed word integers in xmm2 and xmm3/m128 and store the high 16 bits of the results in xmm1.

Multiply the packed signed word integers in ymm2 and ymm3/m256, and store the high 16 bits of the results in ymm1.

Multiply the packed signed word integers in ymm2 and ymm3/m256, and store the high 16 bits of the results in ymm1.

Multiply the packed dword signed integers in xmm2 and xmm3/m128 and store the low 32 bits of each product in xmm1.

Multiply the packed dword signed integers in xmm2 and xmm3/m128 and store the low 32 bits of each product in xmm1.

Multiply the packed dword signed integers in ymm2 and ymm3/m256 and store the low 32 bits of each product in ymm1.

Multiply the packed dword signed integers in ymm2 and ymm3/m256 and store the low 32 bits of each product in ymm1.

Multiply the packed dword signed integers in xmm2 and xmm3/m128 and store the low 32 bits of each product in xmm1.

Multiply the packed dword signed integers in xmm2 and xmm3/m128 and store the low 32 bits of each product in xmm1.

Multiply the packed signed word integers in ymm2 and ymm3/m256, and store the low 16 bits of the results in ymm1.

Multiply the packed signed word integers in ymm2 and ymm3/m256, and store the low 16 bits of the results in ymm1.

Multiply packed unsigned doubleword integers in xmm2 by packed unsigned doubleword integers in xmm3/m128 and store the quadword results in xmm1.

Multiply packed unsigned doubleword integers in xmm2 by packed unsigned doubleword integers in xmm3/m128 and store the quadword results in xmm1.

Multiply packed unsigned doubleword integers in ymm2 by packed unsigned doubleword integers in ymm3/m256, and store the quadword results in ymm1.

Multiply packed unsigned doubleword integers in ymm2 by packed unsigned doubleword integers in ymm3/m256, and store the quadword results in ymm1.

Bitwise OR of xmm2/m128 and xmm3.

Bitwise OR of xmm2/m128 and xmm3.

Bitwise OR of ymm2/m256 and ymm3.

Bitwise OR of ymm2/m256 and ymm3.

Computes the absolute differences of the packed unsigned byte integers from xmm3 /m128 and xmm2.

The 8 low differences and 8 high differences are then summed separately to produce two unsigned word integer results.

Computes the absolute differences of the packed unsigned byte integers from xmm3 /m128 and xmm2.

The 8 low differences and 8 high differences are then summed separately to produce two unsigned word integer results.

Computes the absolute differences of the packed unsigned byte integers from ymm3/m256 and ymm2.

Then each consecutive 8 differences are summed separately to produce four unsigned word integer results.

Computes the absolute differences of the packed unsigned byte integers from ymm3/m256 and ymm2.

Then each consecutive 8 differences are summed separately to produce four unsigned word integer results.

Shuffle bytes in xmm2 according to contents of xmm3/m128.

Shuffle bytes in xmm2 according to contents of xmm3/m128.

Shuffle bytes in ymm2 according to contents of ymm3/m256.

Shuffle bytes in ymm2 according to contents of ymm3/m256.

Shuffle the doublewords in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the doublewords in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the doublewords in ymm2/m256 based on the encoding in imm8 and store the result in ymm1.

Shuffle the doublewords in ymm2/m256 based on the encoding in imm8 and store the result in ymm1.

Shuffle the high words in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the high words in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the high words in ymm2/m256 based on the encoding in imm8 and store the result in ymm1.

Shuffle the high words in ymm2/m256 based on the encoding in imm8 and store the result in ymm1.

Shuffle the low words in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the low words in xmm2/m128 based on the encoding in imm8 and store the result in xmm1.

Shuffle the low words in ymm2/m256 based on the encoding in imm8 and store the result in ymm1.

Shuffle the low words in ymm2/m256 based on the encoding in imm8 and store the result in ymm1.

Negate/zero/preserve packed byte integers in xmm2 depending on the corresponding sign in xmm3/m128.

Negate/zero/preserve packed byte integers in xmm2 depending on the corresponding sign in xmm3/m128.

Negate/zero/preserve packed doubleword integers in xmm2 depending on the corresponding sign in xmm3/m128.

Negate/zero/preserve packed doubleword integers in xmm2 depending on the corresponding sign in xmm3/m128.

Negate/zero/preserve packed word integers in xmm2 depending on the corresponding sign in xmm3/m128.

Negate/zero/preserve packed word integers in xmm2 depending on the corresponding sign in xmm3/m128.

Shift doublewords in xmm2 left by imm8 while shifting in zero-signed.

Shift doublewords in xmm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift doublewords in xmm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift doublewords in ymm2 left by imm8 while shifting in zero-signed.

Shift doublewords in ymm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift doublewords in ymm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift xmm2 left by imm8 bytes while shifting in zero-signed and store result in xmm1.

Shift ymm2 left by imm8 bytes while shifting in zero-signed and store result in ymm1.

Shift quadwords in xmm2 left by imm8 while shifting in zero-signed.

Shift quadwords in xmm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift quadwords in xmm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift quadwords in ymm2 left by imm8 while shifting in zero-signed.

Shift quadwords in ymm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift quadwords in ymm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift bits in doublewords in xmm2 left by amount specified in the corresponding element of xmm3/m128 while shifting in zero-signed.

Shift bits in doublewords in xmm2 left by amount specified in the corresponding element of xmm3/m128 while shifting in zero-signed.

Shift bits in doublewords in ymm2 left by amount specified in the corresponding element of ymm3/m256 while shifting in zero-signed.

Shift bits in doublewords in ymm2 left by amount specified in the corresponding element of ymm3/m256 while shifting in zero-signed.

Shift bits in quadwords in xmm2 left by amount specified in the corresponding element of xmm3/m128 while shifting in zero-signed.

Shift bits in quadwords in xmm2 left by amount specified in the corresponding element of xmm3/m128 while shifting in zero-signed.

Shift bits in quadwords in ymm2 left by amount specified in the corresponding element of ymm3/m256 while shifting in zero-signed.

Shift bits in quadwords in ymm2 left by amount specified in the corresponding element of ymm3/m256 while shifting in zero-signed.

Shift words in xmm2 left by imm8 while shifting in zero-signed.

Shift words in xmm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift words in xmm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift words in ymm2 left by imm8 while shifting in zero-signed.

Shift words in ymm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift words in ymm2 left by amount specified in xmm3/m128 while shifting in zero-signed.

Shift doublewords in xmm2 right by imm8 while shifting in sign bits.

Shift doublewords in xmm2 right by amount specified in xmm3/m128 while shifting in sign bits.

Shift doublewords in xmm2 right by amount specified in xmm3/m128 while shifting in sign bits.

Shift doublewords in ymm2 right by imm8 while shifting in sign bits.

Shift doublewords in ymm2 right by amount specified in xmm3/m128 while shifting in sign bits.

Shift doublewords in ymm2 right by amount specified in xmm3/m128 while shifting in sign bits.

Shift bits in doublewords in xmm2 right by amount specified in the corresponding element of xmm3/m128 while shifting in the sign bits.

Shift bits in doublewords in xmm2 right by amount specified in the corresponding element of xmm3/m128 while shifting in the sign bits.

Shift bits in doublewords in ymm2 right by amount specified in the corresponding element of ymm3/m256 while shifting in the sign bits.

Shift bits in doublewords in ymm2 right by amount specified in the corresponding element of ymm3/m256 while shifting in the sign bits.

Shift words in xmm2 right by imm8 while shifting in sign bits.

Shift words in xmm2 right by amount specified in xmm3/m128 while shifting in sign bits.

Shift words in xmm2 right by amount specified in xmm3/m128 while shifting in sign bits.

Shift words in ymm2 right by imm8 while shifting in sign bits.

Shift words in ymm2 right by amount specified in xmm3/m128 while shifting in sign bits.

Shift words in ymm2 right by amount specified in xmm3/m128 while shifting in sign bits.

Shift doublewords in xmm2 right by imm8 while shifting in zero-signed.

Shift doublewords in xmm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift doublewords in xmm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift doublewords in ymm2 right by imm8 while shifting in zero-signed.

Shift doublewords in ymm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift doublewords in ymm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift xmm2 right by imm8 bytes while shifting in zero-signed.

Shift ymm1 right by imm8 bytes while shifting in zero-signed.

Shift quadwords in xmm2 right by imm8 while shifting in zero-signed.

Shift quadwords in xmm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift quadwords in xmm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift quadwords in ymm2 right by imm8 while shifting in zero-signed.

Shift quadwords in ymm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift quadwords in ymm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift bits in doublewords in xmm2 right by amount specified in the corresponding element of xmm3/m128 while shifting in zero-signed.

Shift bits in doublewords in xmm2 right by amount specified in the corresponding element of xmm3/m128 while shifting in zero-signed.

Shift bits in doublewords in ymm2 right by amount specified in the corresponding element of ymm3/m256 while shifting in zero-signed.

Shift bits in doublewords in ymm2 right by amount specified in the corresponding element of ymm3/m256 while shifting in zero-signed.

Shift bits in quadwords in xmm2 right by amount specified in the corresponding element of xmm3/m128 while shifting in zero-signed.

Shift bits in quadwords in xmm2 right by amount specified in the corresponding element of xmm3/m128 while shifting in zero-signed.

Shift bits in quadwords in ymm2 right by amount specified in the corresponding element of ymm3/m256 while shifting in zero-signed.

Shift bits in quadwords in ymm2 right by amount specified in the corresponding element of ymm3/m256 while shifting in zero-signed.

Shift words in xmm2 right by imm8 while shifting in zero-signed.

Shift words in xmm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift words in xmm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift words in ymm2 right by imm8 while shifting in zero-signed.

Shift words in ymm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Shift words in ymm2 right by amount specified in xmm3/m128 while shifting in zero-signed.

Subtract packed byte integers in xmm3/m128 from xmm2.

Subtract packed byte integers in xmm3/m128 from xmm2.

Subtract packed byte integers in ymm3/m256 from ymm2.

Subtract packed byte integers in ymm3/m256 from ymm2.

Subtract packed doubleword integers in xmm3/m128 from xmm2.

Subtract packed doubleword integers in xmm3/m128 from xmm2.

Subtract packed doubleword integers in ymm3/m256 from ymm2.

Subtract packed doubleword integers in ymm3/m256 from ymm2.

Subtract packed quadword integers in xmm3/m128 from xmm2.

Subtract packed quadword integers in xmm3/m128 from xmm2.

Subtract packed quadword integers in ymm3/m256 from ymm2.

Subtract packed quadword integers in ymm3/m256 from ymm2.

Subtract packed signed byte integers in xmm3/m128 from packed signed byte integers in xmm2 and saturate results.

Subtract packed signed byte integers in xmm3/m128 from packed signed byte integers in xmm2 and saturate results.

Subtract packed signed byte integers in ymm3/m256 from packed signed byte integers in ymm2 and saturate results.

Subtract packed signed byte integers in ymm3/m256 from packed signed byte integers in ymm2 and saturate results.

Subtract packed signed word integers in xmm3/m128 from packed signed word integers in xmm2 and saturate results.

Subtract packed signed word integers in xmm3/m128 from packed signed word integers in xmm2 and saturate results.

Subtract packed signed word integers in ymm3/m256 from packed signed word integers in ymm2 and saturate results.

Subtract packed signed word integers in ymm3/m256 from packed signed word integers in ymm2 and saturate results.

Subtract packed unsigned byte integers in xmm3/m128 from packed unsigned byte integers in xmm2 and saturate result.

Subtract packed unsigned byte integers in xmm3/m128 from packed unsigned byte integers in xmm2 and saturate result.

Subtract packed unsigned byte integers in ymm3/m256 from packed unsigned byte integers in ymm2 and saturate result.

Subtract packed unsigned byte integers in ymm3/m256 from packed unsigned byte integers in ymm2 and saturate result.

Subtract packed unsigned word integers in xmm3/m128 from packed unsigned word integers in xmm2 and saturate result.

Subtract packed unsigned word integers in xmm3/m128 from packed unsigned word integers in xmm2 and saturate result.

Subtract packed unsigned word integers in ymm3/m256 from packed unsigned word integers in ymm2 and saturate result.

Subtract packed unsigned word integers in ymm3/m256 from packed unsigned word integers in ymm2 and saturate result.

Subtract packed word integers in xmm3/m128 from xmm2.

Subtract packed word integers in xmm3/m128 from xmm2.

Subtract packed word integers in ymm3/m256 from ymm2.

Subtract packed word integers in ymm3/m256 from ymm2.

Set Zero Flag (ZF) and Carry Flag (CF) depending on bitwise AND and ANDN of sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on bitwise AND and ANDN of sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on bitwise AND and ANDN of sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on bitwise AND and ANDN of sources.

Interleave high-order bytes from xmm2 and xmm3/m128 into xmm1.

Interleave high-order bytes from xmm2 and xmm3/m128 into xmm1.

Interleave high-order bytes from ymm2 and ymm3/m256 into ymm1.

Interleave high-order bytes from ymm2 and ymm3/m256 into ymm1.

Interleave high-order doublewords from xmm2 and xmm3/m128 into xmm1.

Interleave high-order doublewords from xmm2 and xmm3/m128 into xmm1.

Interleave high-order doublewords from ymm2 and ymm3/m256 into ymm1.

Interleave high-order doublewords from ymm2 and ymm3/m256 into ymm1.

Interleave high-order quadword from xmm2 and xmm3/m128 into xmm1.

Interleave high-order quadword from xmm2 and xmm3/m128 into xmm1.

Interleave high-order quadword from ymm2 and ymm3/m256 into ymm1.

Interleave high-order quadword from ymm2 and ymm3/m256 into ymm1.

Interleave high-order words from xmm2 and xmm3/m128 into xmm1.

Interleave high-order words from xmm2 and xmm3/m128 into xmm1.

Interleave high-order words from ymm2 and ymm3/m256 into ymm1.

Interleave high-order words from ymm2 and ymm3/m256 into ymm1.

Interleave low-order bytes from xmm2 and xmm3/m128 into xmm1.

Interleave low-order bytes from xmm2 and xmm3/m128 into xmm1.

Interleave low-order bytes from ymm2 and ymm3/m256 into ymm1.

Interleave low-order bytes from ymm2 and ymm3/m256 into ymm1.

Interleave low-order doublewords from xmm2 and xmm3/m128 into xmm1.

Interleave low-order doublewords from xmm2 and xmm3/m128 into xmm1.

Interleave low-order doublewords from ymm2 and ymm3/m256 into ymm1.

Interleave low-order doublewords from ymm2 and ymm3/m256 into ymm1.

Interleave low-order quadword from xmm2 and xmm3/m128 into xmm1.

Interleave low-order quadword from xmm2 and xmm3/m128 into xmm1.

Interleave low-order quadword from ymm2 and ymm3/m256 into ymm1.

Interleave low-order quadword from ymm2 and ymm3/m256 into ymm1.

Interleave low-order words from xmm2 and xmm3/m128 into xmm1.

Interleave low-order words from xmm2 and xmm3/m128 into xmm1.

Interleave low-order words from ymm2 and ymm3/m256 into ymm1.

Interleave low-order words from ymm2 and ymm3/m256 into ymm1.

Bitwise XOR of xmm3/m128 and xmm2.

Bitwise XOR of xmm3/m128 and xmm2.

Bitwise XOR of ymm3/m256 and ymm2.

Bitwise XOR of ymm3/m256 and ymm2.

Computes the approximate reciprocals of packed single-precision values in xmm2/mem and stores the results in xmm1.

Computes the approximate reciprocals of packed single-precision values in xmm2/mem and stores the results in xmm1.

Computes the approximate reciprocals of packed single-precision values in ymm2/mem and stores the results in ymm1.

Computes the approximate reciprocals of packed single-precision values in ymm2/mem and stores the results in ymm1.

Computes the approximate reciprocal of the scalar single-precision floating-point value in xmm3/m32 and stores the result in xmm1.

Also, upper single-precision floating-point values (bits [127:32]) from xmm2 are copied to xmm1 bits [127:32].

Computes the approximate reciprocal of the scalar single-precision floating-point value in xmm3/m32 and stores the result in xmm1.

Also, upper single-precision floating-point values (bits [127:32]) from xmm2 are copied to xmm1 bits [127:32].

Round packed double-precision floating-point values in xmm2/m128 and place the result in xmm1.

The rounding mode is determined by imm8.

Round packed double-precision floating-point values in xmm2/m128 and place the result in xmm1.

The rounding mode is determined by imm8.

Round packed double-precision floating-point values in ymm2/m256 and place the result in ymm1.

The rounding mode is determined by imm8.

Round packed double-precision floating-point values in ymm2/m256 and place the result in ymm1.

The rounding mode is determined by imm8.

Round packed single-precision floating-point values in xmm2/m128 and place the result in xmm1.

The rounding mode is determined by imm8.

Round packed single-precision floating-point values in xmm2/m128 and place the result in xmm1.

The rounding mode is determined by imm8.

Round packed single-precision floating-point values in ymm2/m256 and place the result in ymm1.

The rounding mode is determined by imm8.

Round packed single-precision floating-point values in ymm2/m256 and place the result in ymm1.

The rounding mode is determined by imm8.

Round the low packed double-precision floating-point value in xmm3/m64 and place the result in xmm1.

The rounding mode is determined by imm8.

Upper packed double-precision floating-point value (bits [127:64]) from xmm2 is copied to xmm1 bits [127:64].

Round the low packed double-precision floating-point value in xmm3/m64 and place the result in xmm1.

The rounding mode is determined by imm8.

Upper packed double-precision floating-point value (bits [127:64]) from xmm2 is copied to xmm1 bits [127:64].

Round the low packed single-precision floating-point value in xmm3/m32 and place the result in xmm1.

The rounding mode is determined by imm8.

Also, upper packed single-precision floating-point values (bits [127:32]) from xmm2 are copied to xmm1 bits [127:32].

Round the low packed single-precision floating-point value in xmm3/m32 and place the result in xmm1.

The rounding mode is determined by imm8.

Also, upper packed single-precision floating-point values (bits [127:32]) from xmm2 are copied to xmm1 bits [127:32].

Computes the approximate reciprocals of the square roots of packed single-precision values in xmm2/mem and stores the results in xmm1.

Computes the approximate reciprocals of the square roots of packed single-precision values in xmm2/mem and stores the results in xmm1.

Computes the approximate reciprocals of the square roots of packed single-precision values in ymm2/mem and stores the results in ymm1.

Computes the approximate reciprocals of the square roots of packed single-precision values in ymm2/mem and stores the results in ymm1.

Computes the approximate reciprocal of the square root of the low single-precision floating-point value in xmm3/m32 and stores the results in xmm1.

Also, upper single-precision floating-point values (bits [127:32]) from xmm2 are copied to xmm1 bits [127:32].

Computes the approximate reciprocal of the square root of the low single-precision floating-point value in xmm3/m32 and stores the results in xmm1.

Also, upper single-precision floating-point values (bits [127:32]) from xmm2 are copied to xmm1``[127:32].

Shuffle Packed double-precision floating-point values selected by imm8 from xmm2 and xmm3/mem.

Shuffle Packed double-precision floating-point values selected by imm8 from xmm2 and xmm3/mem.

Shuffle Packed double-precision floating-point values selected by imm8 from ymm2 and ymm3/mem.

Shuffle Packed double-precision floating-point values selected by imm8 from ymm2 and ymm3/mem.

Shuffle Packed single-precision floating-point values selected by imm8 from xmm2 and xmm3/mem.

Shuffle Packed single-precision floating-point values selected by imm8 from xmm2 and xmm3/mem.

Shuffle Packed single-precision floating-point values selected by imm8 from ymm2 and ymm3/mem.

Shuffle Packed single-precision floating-point values selected by imm8 from ymm2 and ymm3/mem.

Computes Square Roots of the packed double-precision floating-point values in xmm2/m128 and stores the result in xmm1.

Computes Square Roots of the packed double-precision floating-point values in xmm2/m128 and stores the result in xmm1.

Computes Square Roots of the packed double-precision floating-point values in ymm2/m256 and stores the result in ymm1.

Computes Square Roots of the packed double-precision floating-point values in ymm2/m256 and stores the result in ymm1.

Computes Square Roots of the packed single-precision floating-point values in xmm2/m128 and stores the result in xmm1.

Computes Square Roots of the packed single-precision floating-point values in xmm2/m128 and stores the result in xmm1.

Computes Square Roots of the packed single-precision floating-point values in ymm2/m256 and stores the result in ymm1.

Computes Square Roots of the packed single-precision floating-point values in ymm2/m256 and stores the result in ymm1.

Computes square root of the low double-precision floating-point value in xmm3/m64 and stores the results in xmm2.

Also, upper double-precision floating-point value (bits [127:64]) from xmm2 is copied to xmm1 bits [127:64].

Computes square root of the low double-precision floating-point value in xmm3/m64 and stores the results in xmm2.

Also, upper double-precision floating-point value (bits [127:64]) from xmm2 is copied to xmm1 bits [127:64].

Computes square root of the low single-precision floating-point value in xmm3/m32 and stores the results in xmm1.

Also, upper single-precision floating-point values (bits [127:32]) from xmm2 are copied to xmm1 bits [127:32].

Computes square root of the low single-precision floating-point value in xmm3/m32 and stores the results in xmm1.

Also, upper single-precision floating-point values (bits [127:32]) from xmm2 are copied to xmm1 bits [127:32].

Store contents of MXCSR register to m32.

Subtract packed double-precision floating-point values in xmm3/mem from xmm2 and stores result in xmm1.

Subtract packed double-precision floating-point values in xmm3/mem from xmm2 and stores result in xmm1.

Subtract packed double-precision floating-point values in ymm3/mem from ymm2 and stores result in ymm1.

Subtract packed double-precision floating-point values in ymm3/mem from ymm2 and stores result in ymm1.

Subtract packed single-precision floating-point values in xmm3/mem from xmm2 and stores result in xmm1.

Subtract packed single-precision floating-point values in xmm3/mem from xmm2 and stores result in xmm1.

Subtract packed single-precision floating-point values in ymm3/mem from ymm2 and stores result in ymm1.

Subtract packed single-precision floating-point values in ymm3/mem from ymm2 and stores result in ymm1.

Subtract the low double-precision floating-point value in xmm3/mem from xmm2 and store the result in xmm1.

Subtract the low double-precision floating-point value in xmm3/mem from xmm2 and store the result in xmm1.

Subtract the low single-precision floating-point value in xmm3/mem from xmm2 and store the result in xmm1.

Subtract the low single-precision floating-point value in xmm3/mem from xmm2 and store the result in xmm1.

Set Zero Flag (ZF) and Carry Flag (CF) depending on sign bit AND and ANDN of packed double-precision floating-point sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on sign bit AND and ANDN of packed double-precision floating-point sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on sign bit AND and ANDN of packed double-precision floating-point sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on sign bit AND and ANDN of packed double-precision floating-point sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on sign bit AND and ANDN of packed single-precision floating-point sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on sign bit AND and ANDN of packed single-precision floating-point sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on sign bit AND and ANDN of packed single-precision floating-point sources.

Set Zero Flag (ZF) and Carry Flag (CF) depending on sign bit AND and ANDN of packed single-precision floating-point sources.

Compare low double-precision floating-point values in xmm1 and xmm2/mem64 and sets the appropriate flags in EFLAGS accordingly.

Compare low double-precision floating-point values in xmm1 and xmm2/mem64 and sets the appropriate flags in EFLAGS accordingly.

Compare low single-precision floating-point values in xmm1 and xmm2/mem32 and sets the appropriate flags in EFLAGS accordingly.

Compare low single-precision floating-point values in xmm1 and xmm2/mem32 and sets the appropriate flags in EFLAGS accordingly.

Unpacks and Interleaves double-precision floating-point values from high quadwords of xmm2 and xmm3/m128.

Unpacks and Interleaves double-precision floating-point values from high quadwords of xmm2 and xmm3/m128.

Unpacks and Interleaves double-precision floating-point values from high quadwords of ymm2 and ymm3/m256.

Unpacks and Interleaves double-precision floating-point values from high quadwords of ymm2 and ymm3/m256.

Unpacks and Interleaves single-precision floating-point values from high quadwords of xmm2 and xmm3/m128.

Unpacks and Interleaves single-precision floating-point values from high quadwords of xmm2 and xmm3/m128.

Unpacks and Interleaves single-precision floating-point values from high quadwords of ymm2 and ymm3/m256.

Unpacks and Interleaves single-precision floating-point values from high quadwords of ymm2 and ymm3/m256.

Unpacks and Interleaves double-precision floating-point values low high quadwords of xmm2 and xmm3/m128.

Unpacks and Interleaves double-precision floating-point values low high quadwords of xmm2 and xmm3/m128.

Unpacks and Interleaves double-precision floating-point values low high quadwords of ymm2 and ymm3/m256.

Unpacks and Interleaves double-precision floating-point values low high quadwords of ymm2 and ymm3/m256.

Unpacks and Interleaves single-precision floating-point values from low quadwords of xmm2 and xmm3/m128.

Unpacks and Interleaves single-precision floating-point values from low quadwords of xmm2 and xmm3/m128.

Unpacks and Interleaves single-precision floating-point values from low quadwords of ymm2 and ymm3/m256.

Unpacks and Interleaves single-precision floating-point values from low quadwords of ymm2 and ymm3/m256.

Return the bitwise logical XOR of packed double-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical XOR of packed double-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical XOR of packed double-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical XOR of packed double-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical XOR of packed single-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical XOR of packed single-precision floating-point values in xmm2 and xmm3/mem.

Return the bitwise logical XOR of packed single-precision floating-point values in ymm2 and ymm3/mem.

Return the bitwise logical XOR of packed single-precision floating-point values in ymm2 and ymm3/mem.

Zero all YMM registers.

Zero upper 128 bits of all YMM registers.

Check pending unmasked floating-point exceptions.

Load the FS base address with the 32-bit value in the source register.

Load the FS base address with the 64-bit value in the source register.

Load the GS base address with the 32-bit value in the source register.

Load the GS base address with the 64-bit value in the source register.

Causes a Restricted Transactional Memory (RTM) abort if executing in a Restricted Transactional Memory (RTM) transaction.

A hint used with an “XACQUIRE-enabled” instruction to start lock elision on the instruction memory operand address.

Exchange r16 and r/m16; load sum into r/m16.

Exchange r32 and r/m32; load sum into r/m32.

Exchange r64 and r/m64; load sum into r/m64.

Exchange r8 and r/m8; load sum into r/m8.

Exchange r8 and r/m8; load sum into r/m8.

Exchange r16 and r/m16; load sum into r/m16.

Exchange r32 and r/m32; load sum into r/m32.

Exchange r64 and r/m64; load sum into r/m64.

Exchange r8 and r/m8; load sum into r/m8.

Exchange r8 and r/m8; load sum into r/m8.

Exchange r8 and r/m8; load sum into r/m8.

Exchange r8 and r/m8; load sum into r/m8.

Specifies the start of an Restricted Transactional Memory (RTM) code region.

Provides a 32-bit relative offset to compute the address of the fallback instruction address at which execution resumes following an Restricted Transactional Memory (RTM) abort.

Specifies the start of an Restricted Transactional Memory (RTM) code region.

Provides a 32-bit relative offset to compute the address of the fallback instruction address at which execution resumes following an Restricted Transactional Memory (RTM) abort.

Exchange r16 with AX.

Exchange r32 with EAX.

Exchange r16 with word from r/m16.

Exchange r32 with doubleword from r/m32.

Exchange r64 with quadword from r/m64.

Exchange r8 (byte register) with byte from r/m8.

Exchange r8 (byte register) with byte from r/m8.

Exchange AX with r16.

Exchange word from r/m16 with r16.

Exchange r16 with word from r/m16.

Exchange word from r/m16 with r16.

Exchange EAX with r32.

Exchange doubleword from r/m32 with r32.

Exchange r32 with doubleword from r/m32.

Exchange doubleword from r/m32 with r32.

Exchange quadword from r/m64 with r64.

Exchange r64 with quadword from r/m64.

Exchange quadword from r/m64 with r64.

Exchange RAX with r64.

Exchange byte from r/m8 with r8.

Exchange r8 (byte register) with byte from r/m8.

Exchange byte from r/m8 with r8 (alternate form).

Exchange r8 (byte register) with byte from r/m8.

Exchange byte from r/m8 with r8 (alternate form).

Exchange r64 with RAX.

Exchange byte from r/m8 with r8.

Exchange r8 (byte register) with byte from r/m8.

Exchange byte from r/m8 with r8 (alternate form).

Exchange r8 (byte register) with byte from r/m8.

Exchange byte from r/m8 with r8 (alternate form).

Specifies the end of an Restricted Transactional Memory (RTM) code region.

Reads an XCR specified by ECX into EDX:EAX.

Set AL to memory byte DS:[(E)BX + unsigned AL].

Set AL to memory byte DS:[(E)BX + unsigned AL].

Set AL to memory byte [RBX + unsigned AL].

AL XOR imm8.

AX XOR imm16.

EAX XOR imm32.

r/m16 XOR imm16.

r/m16 XOR imm8 (sign-extended).

r/m16 XOR r16.

r/m32 XOR imm32.

r/m32 XOR imm8 (sign-extended).

r/m32 XOR r32.

r/m64 XOR imm32 (sign-extended).

r/m64 XOR imm8 (sign-extended).

r/m64 XOR r64.

r/m8 XOR imm8.

r/m8 XOR r8.

r/m8 XOR r8.

r/m16 XOR imm16.

r/m16 XOR imm8 (sign-extended).

r16 XOR r/m16.

r/m16 XOR r16.

r16 XOR r/m16.

r/m32 XOR imm32.

r/m32 XOR imm8 (sign-extended).

r32 XOR r/m32.

r/m32 XOR r32.

r32 XOR r/m32.

r/m64 XOR imm32 (sign-extended).

r/m64 XOR imm8 (sign-extended).

r64 XOR r/m64.

r/m64 XOR r64.

r64 XOR r/m64.

r/m8 XOR imm8.

r8 XOR r/m8.

r/m8 XOR r8.

r8 XOR r/m8.

r/m8 XOR r8.

r8 XOR r/m8.

RAX XOR imm32 (sign-extended).

r/m8 XOR imm8.

r8 XOR r/m8.

r/m8 XOR r8.

r8 XOR r/m8.

r/m8 XOR r8.

r8 XOR r/m8.

Bitwise exclusive-OR of xmm2/m128 and xmm1.

Bitwise exclusive-OR of xmm2/m128 and xmm1.

Bitwise exclusive-OR of xmm2/m128 and xmm1.

Bitwise exclusive-OR of xmm2/m128 and xmm1.

A hint used with an “XRELEASE-enabled” instruction to end lock elision on the instruction memory operand address.

Restore processor extended states from memory.

The states are specified by EDX:EAX.

Restore processor extended states from memory.

The states are specified by EDX:EAX.

Restore processor extended states from memory.

The states are specified by EDX:EAX.

Restore processor extended states from memory.

The states are specified by EDX:EAX.

Restore processor extended states from memory.

The states are specified by EDX:EAX.

Restore processor extended states from memory.

The states are specified by EDX:EAX.

Save processor extended states to memory.

The states are specified by EDX:EAX.

Save processor extended states to memory.

The states are specified by EDX:EAX.

Save processor extended states to memory.

The states are specified by EDX:EAX.

Save processor extended states to memory.

The states are specified by EDX:EAX.

Save processor extended states to memory.

The states are specified by EDX:EAX.

Save processor extended states to memory.

The states are specified by EDX:EAX.

Save processor extended states specified in EDX:EAX to memory, optimizing the state save operation if possible.

Save processor extended states specified in EDX:EAX to memory, optimizing the state save operation if possible.

Save processor extended states specified in EDX:EAX to memory, optimizing the state save operation if possible.

Save processor extended states specified in EDX:EAX to memory, optimizing the state save operation if possible.

Save processor extended states specified in EDX:EAX to memory, optimizing the state save operation if possible.

Save processor extended states specified in EDX:EAX to memory, optimizing the state save operation if possible.

Test if executing in a transactional region.

Trait Implementations

Formats the value using the given formatter. Read more

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
Performs the conversion.
The type returned in the event of a conversion error.
Performs the conversion.