asmkit/x86/features/
PREFETCHWT1.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `PREFETCHWT1`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+----------+
16/// | # | Operands |
17/// +---+----------+
18/// | 1 | Mem      |
19/// +---+----------+
20/// ```
21pub trait Prefetchwt1Emitter<A> {
22    fn prefetchwt1(&mut self, op0: A);
23}
24
25impl<'a> Prefetchwt1Emitter<Mem> for Assembler<'a> {
26    fn prefetchwt1(&mut self, op0: Mem) {
27        self.emit(PREFETCHWT1M, op0.as_operand(), &NOREG, &NOREG, &NOREG);
28    }
29}
30
31impl<'a> Assembler<'a> {
32    /// `PREFETCHWT1`.
33    ///
34    /// Supported operand variants:
35    ///
36    /// ```text
37    /// +---+----------+
38    /// | # | Operands |
39    /// +---+----------+
40    /// | 1 | Mem      |
41    /// +---+----------+
42    /// ```
43    #[inline]
44    pub fn prefetchwt1<A>(&mut self, op0: A)
45    where
46        Assembler<'a>: Prefetchwt1Emitter<A>,
47    {
48        <Self as Prefetchwt1Emitter<A>>::prefetchwt1(self, op0);
49    }
50}
asmkit/x86/features/PREFETCHWT1.rs

asmkit/x86/features/
PREFETCHWT1.rs
