asmkit/x86/features/
INVPCID.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `INVPCID`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+----------+
16/// | # | Operands |
17/// +---+----------+
18/// | 1 | Gpq, Mem |
19/// +---+----------+
20/// ```
21pub trait InvpcidEmitter<A, B> {
22    fn invpcid(&mut self, op0: A, op1: B);
23}
24
25impl<'a> InvpcidEmitter<Gpq, Mem> for Assembler<'a> {
26    fn invpcid(&mut self, op0: Gpq, op1: Mem) {
27        self.emit(
28            INVPCIDRM,
29            op0.as_operand(),
30            op1.as_operand(),
31            &NOREG,
32            &NOREG,
33        );
34    }
35}
36
37impl<'a> Assembler<'a> {
38    /// `INVPCID`.
39    ///
40    /// Supported operand variants:
41    ///
42    /// ```text
43    /// +---+----------+
44    /// | # | Operands |
45    /// +---+----------+
46    /// | 1 | Gpq, Mem |
47    /// +---+----------+
48    /// ```
49    #[inline]
50    pub fn invpcid<A, B>(&mut self, op0: A, op1: B)
51    where
52        Assembler<'a>: InvpcidEmitter<A, B>,
53    {
54        <Self as InvpcidEmitter<A, B>>::invpcid(self, op0, op1);
55    }
56}
asmkit/x86/features/INVPCID.rs

asmkit/x86/features/
INVPCID.rs
