asmkit/x86/features/
CET.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `CLRSSBSY`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+----------+
16/// | # | Operands |
17/// +---+----------+
18/// | 1 | Mem      |
19/// +---+----------+
20/// ```
21pub trait ClrssbsyEmitter<A> {
22    fn clrssbsy(&mut self, op0: A);
23}
24
25impl<'a> ClrssbsyEmitter<Mem> for Assembler<'a> {
26    fn clrssbsy(&mut self, op0: Mem) {
27        self.emit(CLRSSBSYM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
28    }
29}
30
31/// `ENDBR32`.
32///
33/// Supported operand variants:
34///
35/// ```text
36/// +---+----------+
37/// | # | Operands |
38/// +---+----------+
39/// | 1 | (none)   |
40/// +---+----------+
41/// ```
42pub trait Endbr32Emitter {
43    fn endbr32(&mut self);
44}
45
46impl<'a> Endbr32Emitter for Assembler<'a> {
47    fn endbr32(&mut self) {
48        self.emit(ENDBR32, &NOREG, &NOREG, &NOREG, &NOREG);
49    }
50}
51
52/// `ENDBR64`.
53///
54/// Supported operand variants:
55///
56/// ```text
57/// +---+----------+
58/// | # | Operands |
59/// +---+----------+
60/// | 1 | (none)   |
61/// +---+----------+
62/// ```
63pub trait Endbr64Emitter {
64    fn endbr64(&mut self);
65}
66
67impl<'a> Endbr64Emitter for Assembler<'a> {
68    fn endbr64(&mut self) {
69        self.emit(ENDBR64, &NOREG, &NOREG, &NOREG, &NOREG);
70    }
71}
72
73/// `INCSSP`.
74///
75/// Supported operand variants:
76///
77/// ```text
78/// +---+----------+
79/// | # | Operands |
80/// +---+----------+
81/// | 1 | Gpd      |
82/// | 2 | Gpq      |
83/// +---+----------+
84/// ```
85pub trait IncsspEmitter<A> {
86    fn incssp(&mut self, op0: A);
87}
88
89impl<'a> IncsspEmitter<Gpd> for Assembler<'a> {
90    fn incssp(&mut self, op0: Gpd) {
91        self.emit(INCSSP32R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
92    }
93}
94
95impl<'a> IncsspEmitter<Gpq> for Assembler<'a> {
96    fn incssp(&mut self, op0: Gpq) {
97        self.emit(INCSSP64R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
98    }
99}
100
101/// `RDSSP`.
102///
103/// Supported operand variants:
104///
105/// ```text
106/// +---+----------+
107/// | # | Operands |
108/// +---+----------+
109/// | 1 | Gpd      |
110/// | 2 | Gpq      |
111/// +---+----------+
112/// ```
113pub trait RdsspEmitter<A> {
114    fn rdssp(&mut self, op0: A);
115}
116
117impl<'a> RdsspEmitter<Gpd> for Assembler<'a> {
118    fn rdssp(&mut self, op0: Gpd) {
119        self.emit(RDSSP32R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
120    }
121}
122
123impl<'a> RdsspEmitter<Gpq> for Assembler<'a> {
124    fn rdssp(&mut self, op0: Gpq) {
125        self.emit(RDSSP64R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
126    }
127}
128
129/// `RSTORSSP`.
130///
131/// Supported operand variants:
132///
133/// ```text
134/// +---+----------+
135/// | # | Operands |
136/// +---+----------+
137/// | 1 | Mem      |
138/// +---+----------+
139/// ```
140pub trait RstorsspEmitter<A> {
141    fn rstorssp(&mut self, op0: A);
142}
143
144impl<'a> RstorsspEmitter<Mem> for Assembler<'a> {
145    fn rstorssp(&mut self, op0: Mem) {
146        self.emit(RSTORSSPM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
147    }
148}
149
150/// `SAVEPREVSSP`.
151///
152/// Supported operand variants:
153///
154/// ```text
155/// +---+----------+
156/// | # | Operands |
157/// +---+----------+
158/// | 1 | (none)   |
159/// +---+----------+
160/// ```
161pub trait SaveprevsspEmitter {
162    fn saveprevssp(&mut self);
163}
164
165impl<'a> SaveprevsspEmitter for Assembler<'a> {
166    fn saveprevssp(&mut self) {
167        self.emit(SAVEPREVSSP, &NOREG, &NOREG, &NOREG, &NOREG);
168    }
169}
170
171/// `SETSSBSY`.
172///
173/// Supported operand variants:
174///
175/// ```text
176/// +---+----------+
177/// | # | Operands |
178/// +---+----------+
179/// | 1 | (none)   |
180/// +---+----------+
181/// ```
182pub trait SetssbsyEmitter {
183    fn setssbsy(&mut self);
184}
185
186impl<'a> SetssbsyEmitter for Assembler<'a> {
187    fn setssbsy(&mut self) {
188        self.emit(SETSSBSY, &NOREG, &NOREG, &NOREG, &NOREG);
189    }
190}
191
192/// `WRSS`.
193///
194/// Supported operand variants:
195///
196/// ```text
197/// +---+----------+
198/// | # | Operands |
199/// +---+----------+
200/// | 1 | Mem, Gpd |
201/// | 2 | Mem, Gpq |
202/// +---+----------+
203/// ```
204pub trait WrssEmitter<A, B> {
205    fn wrss(&mut self, op0: A, op1: B);
206}
207
208impl<'a> WrssEmitter<Mem, Gpd> for Assembler<'a> {
209    fn wrss(&mut self, op0: Mem, op1: Gpd) {
210        self.emit(WRSS32MR, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
211    }
212}
213
214impl<'a> WrssEmitter<Mem, Gpq> for Assembler<'a> {
215    fn wrss(&mut self, op0: Mem, op1: Gpq) {
216        self.emit(WRSS64MR, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
217    }
218}
219
220/// `WRUSS`.
221///
222/// Supported operand variants:
223///
224/// ```text
225/// +---+----------+
226/// | # | Operands |
227/// +---+----------+
228/// | 1 | Mem, Gpd |
229/// | 2 | Mem, Gpq |
230/// +---+----------+
231/// ```
232pub trait WrussEmitter<A, B> {
233    fn wruss(&mut self, op0: A, op1: B);
234}
235
236impl<'a> WrussEmitter<Mem, Gpd> for Assembler<'a> {
237    fn wruss(&mut self, op0: Mem, op1: Gpd) {
238        self.emit(
239            WRUSS32MR,
240            op0.as_operand(),
241            op1.as_operand(),
242            &NOREG,
243            &NOREG,
244        );
245    }
246}
247
248impl<'a> WrussEmitter<Mem, Gpq> for Assembler<'a> {
249    fn wruss(&mut self, op0: Mem, op1: Gpq) {
250        self.emit(
251            WRUSS64MR,
252            op0.as_operand(),
253            op1.as_operand(),
254            &NOREG,
255            &NOREG,
256        );
257    }
258}
259
260impl<'a> Assembler<'a> {
261    /// `CLRSSBSY`.
262    ///
263    /// Supported operand variants:
264    ///
265    /// ```text
266    /// +---+----------+
267    /// | # | Operands |
268    /// +---+----------+
269    /// | 1 | Mem      |
270    /// +---+----------+
271    /// ```
272    #[inline]
273    pub fn clrssbsy<A>(&mut self, op0: A)
274    where
275        Assembler<'a>: ClrssbsyEmitter<A>,
276    {
277        <Self as ClrssbsyEmitter<A>>::clrssbsy(self, op0);
278    }
279    /// `ENDBR32`.
280    ///
281    /// Supported operand variants:
282    ///
283    /// ```text
284    /// +---+----------+
285    /// | # | Operands |
286    /// +---+----------+
287    /// | 1 | (none)   |
288    /// +---+----------+
289    /// ```
290    #[inline]
291    pub fn endbr32(&mut self)
292    where
293        Assembler<'a>: Endbr32Emitter,
294    {
295        <Self as Endbr32Emitter>::endbr32(self);
296    }
297    /// `ENDBR64`.
298    ///
299    /// Supported operand variants:
300    ///
301    /// ```text
302    /// +---+----------+
303    /// | # | Operands |
304    /// +---+----------+
305    /// | 1 | (none)   |
306    /// +---+----------+
307    /// ```
308    #[inline]
309    pub fn endbr64(&mut self)
310    where
311        Assembler<'a>: Endbr64Emitter,
312    {
313        <Self as Endbr64Emitter>::endbr64(self);
314    }
315    /// `INCSSP`.
316    ///
317    /// Supported operand variants:
318    ///
319    /// ```text
320    /// +---+----------+
321    /// | # | Operands |
322    /// +---+----------+
323    /// | 1 | Gpd      |
324    /// | 2 | Gpq      |
325    /// +---+----------+
326    /// ```
327    #[inline]
328    pub fn incssp<A>(&mut self, op0: A)
329    where
330        Assembler<'a>: IncsspEmitter<A>,
331    {
332        <Self as IncsspEmitter<A>>::incssp(self, op0);
333    }
334    /// `RDSSP`.
335    ///
336    /// Supported operand variants:
337    ///
338    /// ```text
339    /// +---+----------+
340    /// | # | Operands |
341    /// +---+----------+
342    /// | 1 | Gpd      |
343    /// | 2 | Gpq      |
344    /// +---+----------+
345    /// ```
346    #[inline]
347    pub fn rdssp<A>(&mut self, op0: A)
348    where
349        Assembler<'a>: RdsspEmitter<A>,
350    {
351        <Self as RdsspEmitter<A>>::rdssp(self, op0);
352    }
353    /// `RSTORSSP`.
354    ///
355    /// Supported operand variants:
356    ///
357    /// ```text
358    /// +---+----------+
359    /// | # | Operands |
360    /// +---+----------+
361    /// | 1 | Mem      |
362    /// +---+----------+
363    /// ```
364    #[inline]
365    pub fn rstorssp<A>(&mut self, op0: A)
366    where
367        Assembler<'a>: RstorsspEmitter<A>,
368    {
369        <Self as RstorsspEmitter<A>>::rstorssp(self, op0);
370    }
371    /// `SAVEPREVSSP`.
372    ///
373    /// Supported operand variants:
374    ///
375    /// ```text
376    /// +---+----------+
377    /// | # | Operands |
378    /// +---+----------+
379    /// | 1 | (none)   |
380    /// +---+----------+
381    /// ```
382    #[inline]
383    pub fn saveprevssp(&mut self)
384    where
385        Assembler<'a>: SaveprevsspEmitter,
386    {
387        <Self as SaveprevsspEmitter>::saveprevssp(self);
388    }
389    /// `SETSSBSY`.
390    ///
391    /// Supported operand variants:
392    ///
393    /// ```text
394    /// +---+----------+
395    /// | # | Operands |
396    /// +---+----------+
397    /// | 1 | (none)   |
398    /// +---+----------+
399    /// ```
400    #[inline]
401    pub fn setssbsy(&mut self)
402    where
403        Assembler<'a>: SetssbsyEmitter,
404    {
405        <Self as SetssbsyEmitter>::setssbsy(self);
406    }
407    /// `WRSS`.
408    ///
409    /// Supported operand variants:
410    ///
411    /// ```text
412    /// +---+----------+
413    /// | # | Operands |
414    /// +---+----------+
415    /// | 1 | Mem, Gpd |
416    /// | 2 | Mem, Gpq |
417    /// +---+----------+
418    /// ```
419    #[inline]
420    pub fn wrss<A, B>(&mut self, op0: A, op1: B)
421    where
422        Assembler<'a>: WrssEmitter<A, B>,
423    {
424        <Self as WrssEmitter<A, B>>::wrss(self, op0, op1);
425    }
426    /// `WRUSS`.
427    ///
428    /// Supported operand variants:
429    ///
430    /// ```text
431    /// +---+----------+
432    /// | # | Operands |
433    /// +---+----------+
434    /// | 1 | Mem, Gpd |
435    /// | 2 | Mem, Gpq |
436    /// +---+----------+
437    /// ```
438    #[inline]
439    pub fn wruss<A, B>(&mut self, op0: A, op1: B)
440    where
441        Assembler<'a>: WrussEmitter<A, B>,
442    {
443        <Self as WrussEmitter<A, B>>::wruss(self, op0, op1);
444    }
445}
asmkit/x86/features/CET.rs

asmkit/x86/features/
CET.rs
