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asmkit/core/
globals.rs

1use bitflags::bitflags;
2
3pub const ALLOC_OVERHEAD: u32 = core::mem::size_of::<usize>() as u32 * 4;
4pub const ALLOC_ALIGNMENT: u32 = 8;
5pub const GROW_THRESHOLD: u32 = 1024 * 1024 * 16;
6pub const MAX_TREE_HEIGHT: u32 = if cfg!(target_pointer_width = "32") {
7    30
8} else {
9    61
10} + 1;
11pub const MAX_OP_COUNT: usize = 6;
12pub const MAX_FUNC_ARGS: u32 = 32;
13pub const MAX_VALUE_PACK: u32 = 4;
14pub const MAX_PHYS_REGS: u32 = 32;
15pub const MAX_ALIGNMENT: u32 = 64;
16pub const MAX_LABEL_NAME_SIZE: u32 = 2048;
17pub const MAX_SECTION_NAME_SIZE: u32 = 35;
18pub const MAX_COMMENT_SIZE: u32 = 1024;
19pub const INVALID_ID: u32 = 0xFFFFFFFFu32;
20pub const NOT_FOUND: u32 = 0xFFFFFFFFu32;
21pub const NO_BASE_ADDRESS: u64 = !0u64;
22pub const NUM_VIRT_GROUPS: usize = 4;
23
24#[derive(Debug, Clone, Copy, PartialEq, Eq)]
25#[repr(u8)]
26pub enum CondCode {
27    /// (no condition code) (always)
28    AL = 0x00,
29    /// (not available)     (special)
30    NA = 0x01,
31    ///        Z==1         (any_sign ==)
32    EQ = 0x02,
33    ///        Z==0         (any_sign !=)
34    NE = 0x03,
35    /// C==1                (unsigned >=)
36    CS = 0x04,
37
38    /// C==0                (unsigned < )
39    LO = 0x05,
40
41    ///               N==1  (is negative)
42    MI = 0x06,
43    ///               N==0  (is positive or zero)
44    PL = 0x07,
45    ///               V==1  (is overflow)
46    VS = 0x08,
47    ///               V==0  (no overflow)
48    VC = 0x09,
49    /// C==1 & Z==0         (unsigned > )
50    HI = 0x0A,
51    /// C==0 | Z==1         (unsigned <=)
52    LS = 0x0B,
53    ///               N==V  (signed   >=)
54    GE = 0x0C,
55    ///               N!=V  (signed   < )
56    LT = 0x0D,
57    ///        Z==0 & N==V  (signed   > )
58    GT = 0x0E,
59    ///        Z==1 | N!=V  (signed   <=)
60    LE = 0x0F,
61}
62impl CondCode {
63    pub const MAX_VALUE: Self = Self::LE;
64    pub const CC: Self = Self::LO;
65    pub const HS: Self = Self::CS;
66}
67
68bitflags! {
69    #[derive(Clone, Copy, PartialEq, Eq, Debug)]
70    pub struct InstOptions: u32 {
71        const NONE = 0;
72        const RESERVED =  0x00000001;
73        const UNFOLLOW = 0x00000002;
74        const OVERWRITE = 0x00000004;
75        const SHORT_FORM = 0x00000010;
76        const LONG_FORM = 0x00000020;
77        const TAKEN = 0x00000040;
78        const NOT_TAKEN = 0x00000080;
79
80        /// Use ModMR instead of ModRM if applicable.
81        const X86_MOD_MR = 0x00000100;
82        /// Use ModRM instead of ModMR if applicable.
83        const X86_MOD_RM = 0x00000200;
84        /// Use 3-byte VEX prefix if possible (AVX).
85        const X86_VEX3 = 0x00000400;
86        /// Use VEX prefix when both VEX|EVEX prefixes are available.
87        const X86_VEX = 0x00000800;
88        /// Use 4-byte EVEX prefix if possible (AVX-512).
89        const X86_EVEX = 0x00001000;
90
91        /// LOCK prefix (lock-enabled instructions only).
92        const X86_LOCK = 0x00002000;
93        /// REP prefix (string instructions only).
94        const X86_REP = 0x00004000;
95        /// REPNE prefix (string instructions only).
96        const X86_REPNE = 0x00008000;
97
98        /// XACQUIRE prefix (only allowed instructions).
99        const X86_XACQUIRE = 0x00010000;
100        /// XRELEASE prefix (only allowed instructions).
101        const X86_XRELEASE = 0x00020000;
102
103        /// AVX-512: embedded-rounding {er} and implicit {sae}.
104        const X86_ER = 0x00040000;
105        /// AVX-512: suppress-all-exceptions {sae}.
106        const X86_SAE = 0x00080000;
107        /// AVX-512: round-to-nearest (even) {rn-sae} (bits 00).
108        const X86_RN_SAE = 0x00000000;
109        /// AVX-512: round-down (toward -inf) {rd-sae} (bits 01).
110        const X86_RD_SAE = 0x00200000;
111        /// AVX-512: round-up (toward +inf) {ru-sae} (bits 10).
112        const X86_RU_SAE = 0x00400000;
113        /// AVX-512: round-toward-zero (truncate) {rz-sae} (bits 11).
114        const X86_RZ_SAE = 0x00600000;
115        /// AVX-512: Use zeroing {k}{z} instead of merging {k}.
116        const X86_ZMASK = 0x00800000;
117
118        /// AVX-512: mask to get embedded rounding bits (2 bits).
119        const X86_ER_MASK = Self::X86_RZ_SAE.bits();
120        /// AVX-512: mask of all possible AVX-512 options except the EVEX prefix flag.
121        const X86_AVX512_MASK = 0x00FC0000;
122
123        /// Force REX.B and/or VEX.B field (X64 only, used internally).
124        const X86_OP_CODE_B = 0x01000000;
125        /// Force REX.X and/or VEX.X field (X64 only, used internally).
126        const X86_OP_CODE_X = 0x02000000;
127        /// Force REX.R and/or VEX.R field (X64 only, used internally).
128        const X86_OP_CODE_R = 0x04000000;
129        /// Force REX.W and/or VEX.W field (X64 only, used internally).
130        const X86_OP_CODE_W = 0x08000000;
131        /// Force REX prefix (X64 only).
132        const X86_REX = 0x40000000;
133        /// Invalid REX prefix (set by X86 or when AH|BH|CH|DH regs are used on X64).
134        const X86_INVALID_REX = 0x80000000;
135    }
136}