asmkit/core/
globals.rs

1use bitflags::bitflags;
2
3pub const ALLOC_OVERHEAD: u32 = core::mem::size_of::<usize>() as u32 * 4;
4pub const ALLOC_ALIGNMENT: u32 = 8;
5pub const GROW_THRESHOLD: u32 = 1024 * 1024 * 16;
6pub const MAX_TREE_HEIGHT: u32 = if cfg!(target_pointer_width = "32") {
7    30
8} else {
9    61
10} + 1;
11pub const MAX_OP_COUNT: usize = 6;
12pub const MAX_FUNC_ARGS: u32 = 32;
13pub const MAX_VALUE_PACK: u32 = 4;
14pub const MAX_PHYS_REGS: u32 = 32;
15pub const MAX_ALIGNMENT: u32 = 64;
16pub const MAX_LABEL_NAME_SIZE: u32 = 2048;
17pub const MAX_SECTION_NAME_SIZE: u32 = 35;
18pub const MAX_COMMENT_SIZE: u32 = 1024;
19pub const INVALID_ID: u32 = 0xFFFFFFFFu32;
20pub const NOT_FOUND: u32 = 0xFFFFFFFFu32;
21pub const NO_BASE_ADDRESS: u64 = !0u64;
22pub const NUM_VIRT_GROUPS: usize = 4;
23
24#[derive(Debug, Clone, Copy, PartialEq, Eq)]
25pub enum CondCode {
26    /// (no condition code) (always)
27    AL = 0x00,
28    /// (not available)     (special)
29    NA = 0x01,
30    ///        Z==1         (any_sign ==)
31    EQ = 0x02,
32    ///        Z==0         (any_sign !=)
33    NE = 0x03,
34    /// C==1                (unsigned >=)
35    CS = 0x04,
36
37    /// C==0                (unsigned < )
38    LO = 0x05,
39
40    ///               N==1  (is negative)
41    MI = 0x06,
42    ///               N==0  (is positive or zero)
43    PL = 0x07,
44    ///               V==1  (is overflow)
45    VS = 0x08,
46    ///               V==0  (no overflow)
47    VC = 0x09,
48    /// C==1 & Z==0         (unsigned > )
49    HI = 0x0A,
50    /// C==0 | Z==1         (unsigned <=)
51    LS = 0x0B,
52    ///               N==V  (signed   >=)
53    GE = 0x0C,
54    ///               N!=V  (signed   < )
55    LT = 0x0D,
56    ///        Z==0 & N==V  (signed   > )
57    GT = 0x0E,
58    ///        Z==1 | N!=V  (signed   <=)
59    LE = 0x0F,
60}
61impl CondCode {
62    pub const MAX_VALUE: Self = Self::LE;
63    pub const CC: Self = Self::LO;
64    pub const HS: Self = Self::CS;
65}
66
67bitflags! {
68    #[derive(Clone, Copy, PartialEq, Eq, Debug)]
69    pub struct InstOptions: u32 {
70        const NONE = 0;
71        const RESERVED =  0x00000001;
72        const UNFOLLOW = 0x00000002;
73        const OVERWRITE = 0x00000004;
74        const SHORT_FORM = 0x00000010;
75        const LONG_FORM = 0x00000020;
76        const TAKEN = 0x00000040;
77        const NOT_TAKEN = 0x00000080;
78
79        /// Use ModMR instead of ModRM if applicable.
80        const X86_MOD_MR = 0x00000100;
81        /// Use ModRM instead of ModMR if applicable.
82        const X86_MOD_RM = 0x00000200;
83        /// Use 3-byte VEX prefix if possible (AVX).
84        const X86_VEX3 = 0x00000400;
85        /// Use VEX prefix when both VEX|EVEX prefixes are available.
86        const X86_VEX = 0x00000800;
87        /// Use 4-byte EVEX prefix if possible (AVX-512).
88        const X86_EVEX = 0x00001000;
89
90        /// LOCK prefix (lock-enabled instructions only).
91        const X86_LOCK = 0x00002000;
92        /// REP prefix (string instructions only).
93        const X86_REP = 0x00004000;
94        /// REPNE prefix (string instructions only).
95        const X86_REPNE = 0x00008000;
96
97        /// XACQUIRE prefix (only allowed instructions).
98        const X86_XACQUIRE = 0x00010000;
99        /// XRELEASE prefix (only allowed instructions).
100        const X86_XRELEASE = 0x00020000;
101
102        /// AVX-512: embedded-rounding {er} and implicit {sae}.
103        const X86_ER = 0x00040000;
104        /// AVX-512: suppress-all-exceptions {sae}.
105        const X86_SAE = 0x00080000;
106        /// AVX-512: round-to-nearest (even) {rn-sae} (bits 00).
107        const X86_RN_SAE = 0x00000000;
108        /// AVX-512: round-down (toward -inf) {rd-sae} (bits 01).
109        const X86_RD_SAE = 0x00200000;
110        /// AVX-512: round-up (toward +inf) {ru-sae} (bits 10).
111        const X86_RU_SAE = 0x00400000;
112        /// AVX-512: round-toward-zero (truncate) {rz-sae} (bits 11).
113        const X86_RZ_SAE = 0x00600000;
114        /// AVX-512: Use zeroing {k}{z} instead of merging {k}.
115        const X86_ZMASK = 0x00800000;
116
117        /// AVX-512: mask to get embedded rounding bits (2 bits).
118        const X86_ER_MASK = Self::X86_RZ_SAE.bits();
119        /// AVX-512: mask of all possible AVX-512 options except the EVEX prefix flag.
120        const X86_AVX512_MASK = 0x00FC0000;
121
122        /// Force REX.B and/or VEX.B field (X64 only, used internally).
123        const X86_OP_CODE_B = 0x01000000;
124        /// Force REX.X and/or VEX.X field (X64 only, used internally).
125        const X86_OP_CODE_X = 0x02000000;
126        /// Force REX.R and/or VEX.R field (X64 only, used internally).
127        const X86_OP_CODE_R = 0x04000000;
128        /// Force REX.W and/or VEX.W field (X64 only, used internally).
129        const X86_OP_CODE_W = 0x08000000;
130        /// Force REX prefix (X64 only).
131        const X86_REX = 0x40000000;
132        /// Invalid REX prefix (set by X86 or when AH|BH|CH|DH regs are used on X64).
133        const X86_INVALID_REX = 0x80000000;
134    }
135}
asmkit/core/globals.rs

asmkit/core/
globals.rs
