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asmkit/riscv/
instdb.rs

1//! RISC-V instruction info database: per-opcode effects.
2//!
3//! For every [`Opcode`] this records the operand read/write pattern (indexed into
4//! [`RW_PATTERN_TABLE`]), the operand-class signature for debug asserts
5//! ([`SIGNATURE_TABLE`]), the memory access kind and width, implicit fixed-register
6//! effects ([`IMPLICIT_REG_TABLE`]), and implicit CSR flag effects
7//! (`read_flags`/`write_flags`, `CpuRwFlags::RISCV_*` bits).
8//!
9//! Modeling notes:
10//! - Public operand order comes only from the generator's reviewed declarative
11//!   encoding-shape table; unknown shapes fail generation.
12//! - The `csr` immediate operand of CSR instructions carries R/W bits describing
13//!   the CSR access itself.
14//! - Vector instructions with a `vm` field conservatively read v0 (vm=0 masking);
15//!   reads/writes of vtype/vl/vxrm are not modeled (`CpuRwFlags` has no bits).
16//! - `mem_width` is the access width in bytes; 0 means no memory access or a width
17//!   that is not instruction-fixed (whole-register vector loads/stores).
18//!
19//! Automatically generated by parse_opcodes (meta/riscv.py). Do not edit by hand.
20//! Derived from riscv-opcodes (BSD-3-Clause) and riscv-unified-db
21//! (BSD-3-Clause-Clear); see meta/README.md for the input pins.
22use crate::core::rwinfo::{CpuRwFlags, OpRwFlags};
23
24use super::opcodes::Opcode;
25
26/// RISC-V extension identifiers from the pinned riscv-opcodes input files.
27#[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord)]
28#[repr(u8)]
29pub enum CpuFeature {
30    Rv32C,
31    Rv32CF,
32    Rv32DZfa,
33    Rv32I,
34    Rv32Zbb,
35    Rv32Zbkb,
36    Rv32Zbs,
37    Rv32Zclsd,
38    Rv32Zicntr,
39    Rv32Zk,
40    Rv32Zkn,
41    Rv32Zknd,
42    Rv32Zkne,
43    Rv32Zknh,
44    Rv32Zks,
45    Rv64A,
46    Rv64C,
47    Rv64D,
48    Rv64F,
49    Rv64H,
50    Rv64I,
51    Rv64M,
52    Rv64Q,
53    Rv64QZfa,
54    Rv64Zacas,
55    Rv64Zba,
56    Rv64Zbb,
57    Rv64Zbkb,
58    Rv64Zbs,
59    Rv64Zcb,
60    Rv64Zfh,
61    Rv64Zk,
62    Rv64Zkn,
63    Rv64Zknd,
64    Rv64Zkne,
65    Rv64Zknh,
66    Rv64Zks,
67    RvA,
68    RvC,
69    RvCD,
70    RvCZicfiss,
71    RvCZihintntl,
72    RvD,
73    RvDZfa,
74    RvDZfhmin,
75    RvF,
76    RvFZfa,
77    RvH,
78    RvI,
79    RvM,
80    RvQ,
81    RvQZfa,
82    RvQZfhmin,
83    RvS,
84    RvSdext,
85    RvSmrnmi,
86    RvSsctr,
87    RvSvinval,
88    RvSvinvalH,
89    RvSystem,
90    RvV,
91    RvVAliases,
92    RvZabha,
93    RvZabhaZacas,
94    RvZacas,
95    RvZawrs,
96    RvZba,
97    RvZbb,
98    RvZbc,
99    RvZbkb,
100    RvZbkc,
101    RvZbkx,
102    RvZbs,
103    RvZcb,
104    RvZcmop,
105    RvZcmp,
106    RvZcmt,
107    RvZfbfmin,
108    RvZfh,
109    RvZfhZfa,
110    RvZfhmin,
111    RvZicbo,
112    RvZicfilp,
113    RvZicfiss,
114    RvZicntr,
115    RvZicond,
116    RvZicsr,
117    RvZifencei,
118    RvZihintntl,
119    RvZimop,
120    RvZk,
121    RvZkn,
122    RvZknh,
123    RvZks,
124    RvZksed,
125    RvZksh,
126    RvZvbb,
127    RvZvbc,
128    RvZvfbfmin,
129    RvZvfbfwma,
130    RvZvkg,
131    RvZvkn,
132    RvZvkned,
133    RvZvknha,
134    RvZvknhb,
135    RvZvks,
136    RvZvksed,
137    RvZvksh,
138}
139
140pub const CPU_FEATURE_COUNT: usize = 108;
141pub const CPU_FEATURE_WORDS: usize = 2;
142pub const CPU_FEATURE_NAMES: [&str; CPU_FEATURE_COUNT] = [
143    "rv32_c",
144    "rv32_c_f",
145    "rv32_d_zfa",
146    "rv32_i",
147    "rv32_zbb",
148    "rv32_zbkb",
149    "rv32_zbs",
150    "rv32_zclsd",
151    "rv32_zicntr",
152    "rv32_zk",
153    "rv32_zkn",
154    "rv32_zknd",
155    "rv32_zkne",
156    "rv32_zknh",
157    "rv32_zks",
158    "rv64_a",
159    "rv64_c",
160    "rv64_d",
161    "rv64_f",
162    "rv64_h",
163    "rv64_i",
164    "rv64_m",
165    "rv64_q",
166    "rv64_q_zfa",
167    "rv64_zacas",
168    "rv64_zba",
169    "rv64_zbb",
170    "rv64_zbkb",
171    "rv64_zbs",
172    "rv64_zcb",
173    "rv64_zfh",
174    "rv64_zk",
175    "rv64_zkn",
176    "rv64_zknd",
177    "rv64_zkne",
178    "rv64_zknh",
179    "rv64_zks",
180    "rv_a",
181    "rv_c",
182    "rv_c_d",
183    "rv_c_zicfiss",
184    "rv_c_zihintntl",
185    "rv_d",
186    "rv_d_zfa",
187    "rv_d_zfhmin",
188    "rv_f",
189    "rv_f_zfa",
190    "rv_h",
191    "rv_i",
192    "rv_m",
193    "rv_q",
194    "rv_q_zfa",
195    "rv_q_zfhmin",
196    "rv_s",
197    "rv_sdext",
198    "rv_smrnmi",
199    "rv_ssctr",
200    "rv_svinval",
201    "rv_svinval_h",
202    "rv_system",
203    "rv_v",
204    "rv_v_aliases",
205    "rv_zabha",
206    "rv_zabha_zacas",
207    "rv_zacas",
208    "rv_zawrs",
209    "rv_zba",
210    "rv_zbb",
211    "rv_zbc",
212    "rv_zbkb",
213    "rv_zbkc",
214    "rv_zbkx",
215    "rv_zbs",
216    "rv_zcb",
217    "rv_zcmop",
218    "rv_zcmp",
219    "rv_zcmt",
220    "rv_zfbfmin",
221    "rv_zfh",
222    "rv_zfh_zfa",
223    "rv_zfhmin",
224    "rv_zicbo",
225    "rv_zicfilp",
226    "rv_zicfiss",
227    "rv_zicntr",
228    "rv_zicond",
229    "rv_zicsr",
230    "rv_zifencei",
231    "rv_zihintntl",
232    "rv_zimop",
233    "rv_zk",
234    "rv_zkn",
235    "rv_zknh",
236    "rv_zks",
237    "rv_zksed",
238    "rv_zksh",
239    "rv_zvbb",
240    "rv_zvbc",
241    "rv_zvfbfmin",
242    "rv_zvfbfwma",
243    "rv_zvkg",
244    "rv_zvkn",
245    "rv_zvkned",
246    "rv_zvknha",
247    "rv_zvknhb",
248    "rv_zvks",
249    "rv_zvksed",
250    "rv_zvksh",
251];
252
253pub const ALL_CPU_FEATURES: [CpuFeature; CPU_FEATURE_COUNT] = [
254    CpuFeature::Rv32C,
255    CpuFeature::Rv32CF,
256    CpuFeature::Rv32DZfa,
257    CpuFeature::Rv32I,
258    CpuFeature::Rv32Zbb,
259    CpuFeature::Rv32Zbkb,
260    CpuFeature::Rv32Zbs,
261    CpuFeature::Rv32Zclsd,
262    CpuFeature::Rv32Zicntr,
263    CpuFeature::Rv32Zk,
264    CpuFeature::Rv32Zkn,
265    CpuFeature::Rv32Zknd,
266    CpuFeature::Rv32Zkne,
267    CpuFeature::Rv32Zknh,
268    CpuFeature::Rv32Zks,
269    CpuFeature::Rv64A,
270    CpuFeature::Rv64C,
271    CpuFeature::Rv64D,
272    CpuFeature::Rv64F,
273    CpuFeature::Rv64H,
274    CpuFeature::Rv64I,
275    CpuFeature::Rv64M,
276    CpuFeature::Rv64Q,
277    CpuFeature::Rv64QZfa,
278    CpuFeature::Rv64Zacas,
279    CpuFeature::Rv64Zba,
280    CpuFeature::Rv64Zbb,
281    CpuFeature::Rv64Zbkb,
282    CpuFeature::Rv64Zbs,
283    CpuFeature::Rv64Zcb,
284    CpuFeature::Rv64Zfh,
285    CpuFeature::Rv64Zk,
286    CpuFeature::Rv64Zkn,
287    CpuFeature::Rv64Zknd,
288    CpuFeature::Rv64Zkne,
289    CpuFeature::Rv64Zknh,
290    CpuFeature::Rv64Zks,
291    CpuFeature::RvA,
292    CpuFeature::RvC,
293    CpuFeature::RvCD,
294    CpuFeature::RvCZicfiss,
295    CpuFeature::RvCZihintntl,
296    CpuFeature::RvD,
297    CpuFeature::RvDZfa,
298    CpuFeature::RvDZfhmin,
299    CpuFeature::RvF,
300    CpuFeature::RvFZfa,
301    CpuFeature::RvH,
302    CpuFeature::RvI,
303    CpuFeature::RvM,
304    CpuFeature::RvQ,
305    CpuFeature::RvQZfa,
306    CpuFeature::RvQZfhmin,
307    CpuFeature::RvS,
308    CpuFeature::RvSdext,
309    CpuFeature::RvSmrnmi,
310    CpuFeature::RvSsctr,
311    CpuFeature::RvSvinval,
312    CpuFeature::RvSvinvalH,
313    CpuFeature::RvSystem,
314    CpuFeature::RvV,
315    CpuFeature::RvVAliases,
316    CpuFeature::RvZabha,
317    CpuFeature::RvZabhaZacas,
318    CpuFeature::RvZacas,
319    CpuFeature::RvZawrs,
320    CpuFeature::RvZba,
321    CpuFeature::RvZbb,
322    CpuFeature::RvZbc,
323    CpuFeature::RvZbkb,
324    CpuFeature::RvZbkc,
325    CpuFeature::RvZbkx,
326    CpuFeature::RvZbs,
327    CpuFeature::RvZcb,
328    CpuFeature::RvZcmop,
329    CpuFeature::RvZcmp,
330    CpuFeature::RvZcmt,
331    CpuFeature::RvZfbfmin,
332    CpuFeature::RvZfh,
333    CpuFeature::RvZfhZfa,
334    CpuFeature::RvZfhmin,
335    CpuFeature::RvZicbo,
336    CpuFeature::RvZicfilp,
337    CpuFeature::RvZicfiss,
338    CpuFeature::RvZicntr,
339    CpuFeature::RvZicond,
340    CpuFeature::RvZicsr,
341    CpuFeature::RvZifencei,
342    CpuFeature::RvZihintntl,
343    CpuFeature::RvZimop,
344    CpuFeature::RvZk,
345    CpuFeature::RvZkn,
346    CpuFeature::RvZknh,
347    CpuFeature::RvZks,
348    CpuFeature::RvZksed,
349    CpuFeature::RvZksh,
350    CpuFeature::RvZvbb,
351    CpuFeature::RvZvbc,
352    CpuFeature::RvZvfbfmin,
353    CpuFeature::RvZvfbfwma,
354    CpuFeature::RvZvkg,
355    CpuFeature::RvZvkn,
356    CpuFeature::RvZvkned,
357    CpuFeature::RvZvknha,
358    CpuFeature::RvZvknhb,
359    CpuFeature::RvZvks,
360    CpuFeature::RvZvksed,
361    CpuFeature::RvZvksh,
362];
363
364/// Base-I database inputs enabled by [`Environment::baseline`](crate::Environment::baseline).
365pub const BASELINE_CPU_FEATURES: &[CpuFeature] = &[
366    CpuFeature::RvI,
367    CpuFeature::Rv32I,
368    CpuFeature::Rv64I,
369    CpuFeature::RvSystem,
370];
371
372impl CpuFeature {
373    pub const fn name(self) -> &'static str {
374        CPU_FEATURE_NAMES[self as usize]
375    }
376}
377
378/// Accepted source-extension alternatives per opcode. At least one bit must be enabled.
379#[rustfmt::skip]
380pub static OPCODE_FEATURE_MASKS: [[u64; CPU_FEATURE_WORDS]; 1039] = [
381    [0x0001000000000000, 0x0000000000000000], // add
382    [0x0000000002000000, 0x0000000000000000], // add.uw
383    [0x0001000000000000, 0x0000000000000000], // addi
384    [0x0000000000100000, 0x0000000000000000], // addiw
385    [0x0000000000100000, 0x0000000000000000], // addw
386    [0x0000000000000e00, 0x0000000000000000], // aes32dsi
387    [0x0000000000000e00, 0x0000000000000000], // aes32dsmi
388    [0x0000000000001600, 0x0000000000000000], // aes32esi
389    [0x0000000000001600, 0x0000000000000000], // aes32esmi
390    [0x0000000380000000, 0x0000000000000000], // aes64ds
391    [0x0000000380000000, 0x0000000000000000], // aes64dsm
392    [0x0000000580000000, 0x0000000000000000], // aes64es
393    [0x0000000580000000, 0x0000000000000000], // aes64esm
394    [0x0000000380000000, 0x0000000000000000], // aes64im
395    [0x0000000780000000, 0x0000000000000000], // aes64ks1i
396    [0x0000000780000000, 0x0000000000000000], // aes64ks2
397    [0x4000000000000000, 0x0000000000000000], // amoadd.b
398    [0x0000000000008000, 0x0000000000000000], // amoadd.d
399    [0x4000000000000000, 0x0000000000000000], // amoadd.h
400    [0x0000002000000000, 0x0000000000000000], // amoadd.w
401    [0x4000000000000000, 0x0000000000000000], // amoand.b
402    [0x0000000000008000, 0x0000000000000000], // amoand.d
403    [0x4000000000000000, 0x0000000000000000], // amoand.h
404    [0x0000002000000000, 0x0000000000000000], // amoand.w
405    [0x8000000000000000, 0x0000000000000000], // amocas.b
406    [0x0000000000000000, 0x0000000000000001], // amocas.d
407    [0x8000000000000000, 0x0000000000000000], // amocas.h
408    [0x0000000001000000, 0x0000000000000000], // amocas.q
409    [0x0000000000000000, 0x0000000000000001], // amocas.w
410    [0x4000000000000000, 0x0000000000000000], // amomax.b
411    [0x0000000000008000, 0x0000000000000000], // amomax.d
412    [0x4000000000000000, 0x0000000000000000], // amomax.h
413    [0x0000002000000000, 0x0000000000000000], // amomax.w
414    [0x4000000000000000, 0x0000000000000000], // amomaxu.b
415    [0x0000000000008000, 0x0000000000000000], // amomaxu.d
416    [0x4000000000000000, 0x0000000000000000], // amomaxu.h
417    [0x0000002000000000, 0x0000000000000000], // amomaxu.w
418    [0x4000000000000000, 0x0000000000000000], // amomin.b
419    [0x0000000000008000, 0x0000000000000000], // amomin.d
420    [0x4000000000000000, 0x0000000000000000], // amomin.h
421    [0x0000002000000000, 0x0000000000000000], // amomin.w
422    [0x4000000000000000, 0x0000000000000000], // amominu.b
423    [0x0000000000008000, 0x0000000000000000], // amominu.d
424    [0x4000000000000000, 0x0000000000000000], // amominu.h
425    [0x0000002000000000, 0x0000000000000000], // amominu.w
426    [0x4000000000000000, 0x0000000000000000], // amoor.b
427    [0x0000000000008000, 0x0000000000000000], // amoor.d
428    [0x4000000000000000, 0x0000000000000000], // amoor.h
429    [0x0000002000000000, 0x0000000000000000], // amoor.w
430    [0x4000000000000000, 0x0000000000000000], // amoswap.b
431    [0x0000000000008000, 0x0000000000000000], // amoswap.d
432    [0x4000000000000000, 0x0000000000000000], // amoswap.h
433    [0x0000002000000000, 0x0000000000000000], // amoswap.w
434    [0x4000000000000000, 0x0000000000000000], // amoxor.b
435    [0x0000000000008000, 0x0000000000000000], // amoxor.d
436    [0x4000000000000000, 0x0000000000000000], // amoxor.h
437    [0x0000002000000000, 0x0000000000000000], // amoxor.w
438    [0x0001000000000000, 0x0000000000000000], // and
439    [0x0001000000000000, 0x0000000000000000], // andi
440    [0x0000000000000000, 0x000000002c000028], // andn
441    [0x0001000000000000, 0x0000000000000000], // auipc
442    [0x0000000000000000, 0x0000000000000100], // bclr
443    [0x0000000010000000, 0x0000000000000000], // bclri
444    [0x0000000000000040, 0x0000000000000000], // bclri.rv32
445    [0x0001000000000000, 0x0000000000000000], // beq
446    [0x0001000000000000, 0x0000000000000000], // beqz
447    [0x0000000000000000, 0x0000000000000100], // bext
448    [0x0000000010000000, 0x0000000000000000], // bexti
449    [0x0000000000000040, 0x0000000000000000], // bexti.rv32
450    [0x0001000000000000, 0x0000000000000000], // bge
451    [0x0001000000000000, 0x0000000000000000], // bgeu
452    [0x0001000000000000, 0x0000000000000000], // bgez
453    [0x0001000000000000, 0x0000000000000000], // bgt
454    [0x0001000000000000, 0x0000000000000000], // bgtu
455    [0x0001000000000000, 0x0000000000000000], // bgtz
456    [0x0000000000000000, 0x0000000000000100], // binv
457    [0x0000000010000000, 0x0000000000000000], // binvi
458    [0x0000000000000040, 0x0000000000000000], // binvi.rv32
459    [0x0001000000000000, 0x0000000000000000], // ble
460    [0x0001000000000000, 0x0000000000000000], // bleu
461    [0x0001000000000000, 0x0000000000000000], // blez
462    [0x0001000000000000, 0x0000000000000000], // blt
463    [0x0001000000000000, 0x0000000000000000], // bltu
464    [0x0001000000000000, 0x0000000000000000], // bltz
465    [0x0001000000000000, 0x0000000000000000], // bne
466    [0x0001000000000000, 0x0000000000000000], // bnez
467    [0x0000000000000000, 0x000000002c000020], // brev8
468    [0x0000000000000000, 0x0000000000000100], // bset
469    [0x0000000010000000, 0x0000000000000000], // bseti
470    [0x0000000000000040, 0x0000000000000000], // bseti.rv32
471    [0x0000004000000000, 0x0000000000000000], // c.add
472    [0x0000004000000000, 0x0000000000000000], // c.addi
473    [0x0000004000000000, 0x0000000000000000], // c.addi16sp
474    [0x0000004000000000, 0x0000000000000000], // c.addi4spn
475    [0x0000000000010000, 0x0000000000000000], // c.addiw
476    [0x0000000000010000, 0x0000000000000000], // c.addw
477    [0x0000004000000000, 0x0000000000000000], // c.and
478    [0x0000004000000000, 0x0000000000000000], // c.andi
479    [0x0000004000000000, 0x0000000000000000], // c.beqz
480    [0x0000004000000000, 0x0000000000000000], // c.bnez
481    [0x0000004000000000, 0x0000000000000000], // c.ebreak
482    [0x0000008000000000, 0x0000000000000000], // c.fld
483    [0x0000008000000000, 0x0000000000000000], // c.fldsp
484    [0x0000000000000002, 0x0000000000000000], // c.flw
485    [0x0000000000000002, 0x0000000000000000], // c.flwsp
486    [0x0000008000000000, 0x0000000000000000], // c.fsd
487    [0x0000008000000000, 0x0000000000000000], // c.fsdsp
488    [0x0000000000000002, 0x0000000000000000], // c.fsw
489    [0x0000000000000002, 0x0000000000000000], // c.fswsp
490    [0x0000004000000000, 0x0000000000000000], // c.j
491    [0x0000000000000001, 0x0000000000000000], // c.jal
492    [0x0000004000000000, 0x0000000000000000], // c.jalr
493    [0x0000004000000000, 0x0000000000000000], // c.jr
494    [0x0000000000000000, 0x0000000000000200], // c.lbu
495    [0x0000000000010080, 0x0000000000000000], // c.ld
496    [0x0000000000010080, 0x0000000000000000], // c.ldsp
497    [0x0000000000000000, 0x0000000000000200], // c.lh
498    [0x0000000000000000, 0x0000000000000200], // c.lhu
499    [0x0000004000000000, 0x0000000000000000], // c.li
500    [0x0000004000000000, 0x0000000000000000], // c.lui
501    [0x0000004000000000, 0x0000000000000000], // c.lw
502    [0x0000004000000000, 0x0000000000000000], // c.lwsp
503    [0x0000000000000000, 0x0000000000000400], // c.mop.1
504    [0x0000000000000000, 0x0000000000000400], // c.mop.11
505    [0x0000000000000000, 0x0000000000000400], // c.mop.13
506    [0x0000000000000000, 0x0000000000000400], // c.mop.15
507    [0x0000000000000000, 0x0000000000000400], // c.mop.3
508    [0x0000000000000000, 0x0000000000000400], // c.mop.5
509    [0x0000000000000000, 0x0000000000000400], // c.mop.7
510    [0x0000000000000000, 0x0000000000000400], // c.mop.9
511    [0x0000000000000000, 0x0000000000000400], // c.mop.n
512    [0x0000000000000000, 0x0000000000000200], // c.mul
513    [0x0000004000000000, 0x0000000000000000], // c.mv
514    [0x0000004000000000, 0x0000000000000000], // c.nop
515    [0x0000000000000000, 0x0000000000000200], // c.not
516    [0x0000020000000000, 0x0000000000000000], // c.ntl.all
517    [0x0000020000000000, 0x0000000000000000], // c.ntl.p1
518    [0x0000020000000000, 0x0000000000000000], // c.ntl.pall
519    [0x0000020000000000, 0x0000000000000000], // c.ntl.s1
520    [0x0000004000000000, 0x0000000000000000], // c.or
521    [0x0000000000000000, 0x0000000000000200], // c.sb
522    [0x0000000000010080, 0x0000000000000000], // c.sd
523    [0x0000000000010080, 0x0000000000000000], // c.sdsp
524    [0x0000000000000000, 0x0000000000000200], // c.sext.b
525    [0x0000000000000000, 0x0000000000000200], // c.sext.h
526    [0x0000000020000000, 0x0000000000000000], // c.sext.w
527    [0x0000000000000000, 0x0000000000000200], // c.sh
528    [0x0000000000010001, 0x0000000000000000], // c.slli
529    [0x0000000000000001, 0x0000000000000000], // c.slli.rv32
530    [0x0000000000010001, 0x0000000000000000], // c.srai
531    [0x0000000000000001, 0x0000000000000000], // c.srai.rv32
532    [0x0000000000010001, 0x0000000000000000], // c.srli
533    [0x0000000000000001, 0x0000000000000000], // c.srli.rv32
534    [0x0000010000000000, 0x0000000000000000], // c.sspopchk.x5
535    [0x0000010000000000, 0x0000000000000000], // c.sspush.x1
536    [0x0000004000000000, 0x0000000000000000], // c.sub
537    [0x0000000000010000, 0x0000000000000000], // c.subw
538    [0x0000004000000000, 0x0000000000000000], // c.sw
539    [0x0000004000000000, 0x0000000000000000], // c.swsp
540    [0x0000004000000000, 0x0000000000000000], // c.xor
541    [0x0000000000000000, 0x0000000000000200], // c.zext.b
542    [0x0000000000000000, 0x0000000000000200], // c.zext.h
543    [0x0000000020000000, 0x0000000000000000], // c.zext.w
544    [0x0000000000000000, 0x0000000000020000], // cbo.clean
545    [0x0000000000000000, 0x0000000000020000], // cbo.flush
546    [0x0000000000000000, 0x0000000000020000], // cbo.inval
547    [0x0000000000000000, 0x0000000000020000], // cbo.zero
548    [0x0000000000000000, 0x000000002c000050], // clmul
549    [0x0000000000000000, 0x000000002c000050], // clmulh
550    [0x0000000000000000, 0x0000000000000010], // clmulr
551    [0x0000000000000000, 0x0000000000000008], // clz
552    [0x0000000004000000, 0x0000000000000000], // clzw
553    [0x0000000000000000, 0x0000000000001000], // cm.jalt
554    [0x0000000000000000, 0x0000000000000800], // cm.mva01s
555    [0x0000000000000000, 0x0000000000000800], // cm.mvsa01
556    [0x0000000000000000, 0x0000000000000800], // cm.pop
557    [0x0000000000000000, 0x0000000000000800], // cm.popret
558    [0x0000000000000000, 0x0000000000000800], // cm.popretz
559    [0x0000000000000000, 0x0000000000000800], // cm.push
560    [0x0000000000000000, 0x0000000000000008], // cpop
561    [0x0000000004000000, 0x0000000000000000], // cpopw
562    [0x0000000000000000, 0x0000000000400000], // csrc
563    [0x0000000000000000, 0x0000000000400000], // csrci
564    [0x0000000000000000, 0x0000000000400000], // csrr
565    [0x0000000000000000, 0x0000000000400000], // csrrc
566    [0x0000000000000000, 0x0000000000400000], // csrrci
567    [0x0000000000000000, 0x0000000000400000], // csrrs
568    [0x0000000000000000, 0x0000000000400000], // csrrsi
569    [0x0000000000000000, 0x0000000000400000], // csrrw
570    [0x0000000000000000, 0x0000000000400000], // csrrwi
571    [0x0000000000000000, 0x0000000000400000], // csrs
572    [0x0000000000000000, 0x0000000000400000], // csrsi
573    [0x0000000000000000, 0x0000000000400000], // csrw
574    [0x0000000000000000, 0x0000000000400000], // csrwi
575    [0x0000000000000000, 0x0000000000000008], // ctz
576    [0x0000000004000000, 0x0000000000000000], // ctzw
577    [0x0000000000000000, 0x0000000000200000], // czero.eqz
578    [0x0000000000000000, 0x0000000000200000], // czero.nez
579    [0x0002000000000000, 0x0000000000000000], // div
580    [0x0002000000000000, 0x0000000000000000], // divu
581    [0x0000000000200000, 0x0000000000000000], // divuw
582    [0x0000000000200000, 0x0000000000000000], // divw
583    [0x0040000000000000, 0x0000000000000000], // dret
584    [0x0001000000000000, 0x0000000000000000], // ebreak
585    [0x0001000000000000, 0x0000000000000000], // ecall
586    [0x0000040000000000, 0x0000000000000000], // fabs.d
587    [0x0000000000000000, 0x0000000000004000], // fabs.h
588    [0x0004000000000000, 0x0000000000000000], // fabs.q
589    [0x0000200000000000, 0x0000000000000000], // fabs.s
590    [0x0000040000000000, 0x0000000000000000], // fadd.d
591    [0x0000000000000000, 0x0000000000004000], // fadd.h
592    [0x0004000000000000, 0x0000000000000000], // fadd.q
593    [0x0000200000000000, 0x0000000000000000], // fadd.s
594    [0x0000040000000000, 0x0000000000000000], // fclass.d
595    [0x0000000000000000, 0x0000000000004000], // fclass.h
596    [0x0004000000000000, 0x0000000000000000], // fclass.q
597    [0x0000200000000000, 0x0000000000000000], // fclass.s
598    [0x0000000000000000, 0x0000000000002000], // fcvt.bf16.s
599    [0x0000100000000000, 0x0000000000000000], // fcvt.d.h
600    [0x0000000000020000, 0x0000000000000000], // fcvt.d.l
601    [0x0000000000020000, 0x0000000000000000], // fcvt.d.lu
602    [0x0004000000000000, 0x0000000000000000], // fcvt.d.q
603    [0x0000040000000000, 0x0000000000000000], // fcvt.d.s
604    [0x0000040000000000, 0x0000000000000000], // fcvt.d.w
605    [0x0000040000000000, 0x0000000000000000], // fcvt.d.wu
606    [0x0000100000000000, 0x0000000000000000], // fcvt.h.d
607    [0x0000000040000000, 0x0000000000000000], // fcvt.h.l
608    [0x0000000040000000, 0x0000000000000000], // fcvt.h.lu
609    [0x0010000000000000, 0x0000000000000000], // fcvt.h.q
610    [0x0000000000000000, 0x0000000000010000], // fcvt.h.s
611    [0x0000000000000000, 0x0000000000004000], // fcvt.h.w
612    [0x0000000000000000, 0x0000000000004000], // fcvt.h.wu
613    [0x0000000000020000, 0x0000000000000000], // fcvt.l.d
614    [0x0000000040000000, 0x0000000000000000], // fcvt.l.h
615    [0x0000000000400000, 0x0000000000000000], // fcvt.l.q
616    [0x0000000000040000, 0x0000000000000000], // fcvt.l.s
617    [0x0000000000020000, 0x0000000000000000], // fcvt.lu.d
618    [0x0000000040000000, 0x0000000000000000], // fcvt.lu.h
619    [0x0000000000400000, 0x0000000000000000], // fcvt.lu.q
620    [0x0000000000040000, 0x0000000000000000], // fcvt.lu.s
621    [0x0004000000000000, 0x0000000000000000], // fcvt.q.d
622    [0x0010000000000000, 0x0000000000000000], // fcvt.q.h
623    [0x0000000000400000, 0x0000000000000000], // fcvt.q.l
624    [0x0000000000400000, 0x0000000000000000], // fcvt.q.lu
625    [0x0004000000000000, 0x0000000000000000], // fcvt.q.s
626    [0x0004000000000000, 0x0000000000000000], // fcvt.q.w
627    [0x0004000000000000, 0x0000000000000000], // fcvt.q.wu
628    [0x0000000000000000, 0x0000000000002000], // fcvt.s.bf16
629    [0x0000040000000000, 0x0000000000000000], // fcvt.s.d
630    [0x0000000000000000, 0x0000000000010000], // fcvt.s.h
631    [0x0000000000040000, 0x0000000000000000], // fcvt.s.l
632    [0x0000000000040000, 0x0000000000000000], // fcvt.s.lu
633    [0x0004000000000000, 0x0000000000000000], // fcvt.s.q
634    [0x0000200000000000, 0x0000000000000000], // fcvt.s.w
635    [0x0000200000000000, 0x0000000000000000], // fcvt.s.wu
636    [0x0000040000000000, 0x0000000000000000], // fcvt.w.d
637    [0x0000000000000000, 0x0000000000004000], // fcvt.w.h
638    [0x0004000000000000, 0x0000000000000000], // fcvt.w.q
639    [0x0000200000000000, 0x0000000000000000], // fcvt.w.s
640    [0x0000040000000000, 0x0000000000000000], // fcvt.wu.d
641    [0x0000000000000000, 0x0000000000004000], // fcvt.wu.h
642    [0x0004000000000000, 0x0000000000000000], // fcvt.wu.q
643    [0x0000200000000000, 0x0000000000000000], // fcvt.wu.s
644    [0x0000080000000000, 0x0000000000000000], // fcvtmod.w.d
645    [0x0000040000000000, 0x0000000000000000], // fdiv.d
646    [0x0000000000000000, 0x0000000000004000], // fdiv.h
647    [0x0004000000000000, 0x0000000000000000], // fdiv.q
648    [0x0000200000000000, 0x0000000000000000], // fdiv.s
649    [0x0001000000000000, 0x0000000000000000], // fence
650    [0x0000000000000000, 0x0000000000800000], // fence.i
651    [0x0001000000000000, 0x0000000000000000], // fence.tso
652    [0x0000040000000000, 0x0000000000000000], // feq.d
653    [0x0000000000000000, 0x0000000000004000], // feq.h
654    [0x0004000000000000, 0x0000000000000000], // feq.q
655    [0x0000200000000000, 0x0000000000000000], // feq.s
656    [0x0000040000000000, 0x0000000000000000], // fld
657    [0x0000040000000000, 0x0000000000000000], // fle.d
658    [0x0000000000000000, 0x0000000000004000], // fle.h
659    [0x0004000000000000, 0x0000000000000000], // fle.q
660    [0x0000200000000000, 0x0000000000000000], // fle.s
661    [0x0000080000000000, 0x0000000000000000], // fleq.d
662    [0x0000000000000000, 0x0000000000008000], // fleq.h
663    [0x0008000000000000, 0x0000000000000000], // fleq.q
664    [0x0000400000000000, 0x0000000000000000], // fleq.s
665    [0x0000000000000000, 0x0000000000010000], // flh
666    [0x0000080000000000, 0x0000000000000000], // fli.d
667    [0x0000000000000000, 0x0000000000008000], // fli.h
668    [0x0008000000000000, 0x0000000000000000], // fli.q
669    [0x0000400000000000, 0x0000000000000000], // fli.s
670    [0x0004000000000000, 0x0000000000000000], // flq
671    [0x0000040000000000, 0x0000000000000000], // flt.d
672    [0x0000000000000000, 0x0000000000004000], // flt.h
673    [0x0004000000000000, 0x0000000000000000], // flt.q
674    [0x0000200000000000, 0x0000000000000000], // flt.s
675    [0x0000080000000000, 0x0000000000000000], // fltq.d
676    [0x0000000000000000, 0x0000000000008000], // fltq.h
677    [0x0008000000000000, 0x0000000000000000], // fltq.q
678    [0x0000400000000000, 0x0000000000000000], // fltq.s
679    [0x0000200000000000, 0x0000000000000000], // flw
680    [0x0000040000000000, 0x0000000000000000], // fmadd.d
681    [0x0000000000000000, 0x0000000000004000], // fmadd.h
682    [0x0004000000000000, 0x0000000000000000], // fmadd.q
683    [0x0000200000000000, 0x0000000000000000], // fmadd.s
684    [0x0000040000000000, 0x0000000000000000], // fmax.d
685    [0x0000000000000000, 0x0000000000004000], // fmax.h
686    [0x0004000000000000, 0x0000000000000000], // fmax.q
687    [0x0000200000000000, 0x0000000000000000], // fmax.s
688    [0x0000080000000000, 0x0000000000000000], // fmaxm.d
689    [0x0000000000000000, 0x0000000000008000], // fmaxm.h
690    [0x0008000000000000, 0x0000000000000000], // fmaxm.q
691    [0x0000400000000000, 0x0000000000000000], // fmaxm.s
692    [0x0000040000000000, 0x0000000000000000], // fmin.d
693    [0x0000000000000000, 0x0000000000004000], // fmin.h
694    [0x0004000000000000, 0x0000000000000000], // fmin.q
695    [0x0000200000000000, 0x0000000000000000], // fmin.s
696    [0x0000080000000000, 0x0000000000000000], // fminm.d
697    [0x0000000000000000, 0x0000000000008000], // fminm.h
698    [0x0008000000000000, 0x0000000000000000], // fminm.q
699    [0x0000400000000000, 0x0000000000000000], // fminm.s
700    [0x0000040000000000, 0x0000000000000000], // fmsub.d
701    [0x0000000000000000, 0x0000000000004000], // fmsub.h
702    [0x0004000000000000, 0x0000000000000000], // fmsub.q
703    [0x0000200000000000, 0x0000000000000000], // fmsub.s
704    [0x0000040000000000, 0x0000000000000000], // fmul.d
705    [0x0000000000000000, 0x0000000000004000], // fmul.h
706    [0x0004000000000000, 0x0000000000000000], // fmul.q
707    [0x0000200000000000, 0x0000000000000000], // fmul.s
708    [0x0000040000000000, 0x0000000000000000], // fmv.d
709    [0x0000000000020000, 0x0000000000000000], // fmv.d.x
710    [0x0000000000000000, 0x0000000000004000], // fmv.h
711    [0x0000000000000000, 0x0000000000010000], // fmv.h.x
712    [0x0004000000000000, 0x0000000000000000], // fmv.q
713    [0x0000200000000000, 0x0000000000000000], // fmv.s
714    [0x0000200000000000, 0x0000000000000000], // fmv.s.x
715    [0x0000200000000000, 0x0000000000000000], // fmv.w.x
716    [0x0000000000020000, 0x0000000000000000], // fmv.x.d
717    [0x0000000000000000, 0x0000000000010000], // fmv.x.h
718    [0x0000200000000000, 0x0000000000000000], // fmv.x.s
719    [0x0000200000000000, 0x0000000000000000], // fmv.x.w
720    [0x0000000000000004, 0x0000000000000000], // fmvh.x.d
721    [0x0000000000800000, 0x0000000000000000], // fmvh.x.q
722    [0x0000000000000004, 0x0000000000000000], // fmvp.d.x
723    [0x0000000000800000, 0x0000000000000000], // fmvp.q.x
724    [0x0000040000000000, 0x0000000000000000], // fneg.d
725    [0x0000000000000000, 0x0000000000004000], // fneg.h
726    [0x0004000000000000, 0x0000000000000000], // fneg.q
727    [0x0000200000000000, 0x0000000000000000], // fneg.s
728    [0x0000040000000000, 0x0000000000000000], // fnmadd.d
729    [0x0000000000000000, 0x0000000000004000], // fnmadd.h
730    [0x0004000000000000, 0x0000000000000000], // fnmadd.q
731    [0x0000200000000000, 0x0000000000000000], // fnmadd.s
732    [0x0000040000000000, 0x0000000000000000], // fnmsub.d
733    [0x0000000000000000, 0x0000000000004000], // fnmsub.h
734    [0x0004000000000000, 0x0000000000000000], // fnmsub.q
735    [0x0000200000000000, 0x0000000000000000], // fnmsub.s
736    [0x0000200000000000, 0x0000000000000000], // frcsr
737    [0x0000200000000000, 0x0000000000000000], // frflags
738    [0x0000080000000000, 0x0000000000000000], // fround.d
739    [0x0000000000000000, 0x0000000000008000], // fround.h
740    [0x0008000000000000, 0x0000000000000000], // fround.q
741    [0x0000400000000000, 0x0000000000000000], // fround.s
742    [0x0000080000000000, 0x0000000000000000], // froundnx.d
743    [0x0000000000000000, 0x0000000000008000], // froundnx.h
744    [0x0008000000000000, 0x0000000000000000], // froundnx.q
745    [0x0000400000000000, 0x0000000000000000], // froundnx.s
746    [0x0000200000000000, 0x0000000000000000], // frrm
747    [0x0000200000000000, 0x0000000000000000], // fscsr
748    [0x0000040000000000, 0x0000000000000000], // fsd
749    [0x0000200000000000, 0x0000000000000000], // fsflags
750    [0x0000200000000000, 0x0000000000000000], // fsflagsi
751    [0x0000040000000000, 0x0000000000000000], // fsgnj.d
752    [0x0000000000000000, 0x0000000000004000], // fsgnj.h
753    [0x0004000000000000, 0x0000000000000000], // fsgnj.q
754    [0x0000200000000000, 0x0000000000000000], // fsgnj.s
755    [0x0000040000000000, 0x0000000000000000], // fsgnjn.d
756    [0x0000000000000000, 0x0000000000004000], // fsgnjn.h
757    [0x0004000000000000, 0x0000000000000000], // fsgnjn.q
758    [0x0000200000000000, 0x0000000000000000], // fsgnjn.s
759    [0x0000040000000000, 0x0000000000000000], // fsgnjx.d
760    [0x0000000000000000, 0x0000000000004000], // fsgnjx.h
761    [0x0004000000000000, 0x0000000000000000], // fsgnjx.q
762    [0x0000200000000000, 0x0000000000000000], // fsgnjx.s
763    [0x0000000000000000, 0x0000000000010000], // fsh
764    [0x0004000000000000, 0x0000000000000000], // fsq
765    [0x0000040000000000, 0x0000000000000000], // fsqrt.d
766    [0x0000000000000000, 0x0000000000004000], // fsqrt.h
767    [0x0004000000000000, 0x0000000000000000], // fsqrt.q
768    [0x0000200000000000, 0x0000000000000000], // fsqrt.s
769    [0x0000200000000000, 0x0000000000000000], // fsrm
770    [0x0000200000000000, 0x0000000000000000], // fsrmi
771    [0x0000040000000000, 0x0000000000000000], // fsub.d
772    [0x0000000000000000, 0x0000000000004000], // fsub.h
773    [0x0004000000000000, 0x0000000000000000], // fsub.q
774    [0x0000200000000000, 0x0000000000000000], // fsub.s
775    [0x0000200000000000, 0x0000000000000000], // fsw
776    [0x0000800000000000, 0x0000000000000000], // hfence.gvma
777    [0x0000800000000000, 0x0000000000000000], // hfence.vvma
778    [0x0400000000000000, 0x0000000000000000], // hinval.gvma
779    [0x0400000000000000, 0x0000000000000000], // hinval.vvma
780    [0x0000800000000000, 0x0000000000000000], // hlv.b
781    [0x0000800000000000, 0x0000000000000000], // hlv.bu
782    [0x0000000000080000, 0x0000000000000000], // hlv.d
783    [0x0000800000000000, 0x0000000000000000], // hlv.h
784    [0x0000800000000000, 0x0000000000000000], // hlv.hu
785    [0x0000800000000000, 0x0000000000000000], // hlv.w
786    [0x0000000000080000, 0x0000000000000000], // hlv.wu
787    [0x0000800000000000, 0x0000000000000000], // hlvx.hu
788    [0x0000800000000000, 0x0000000000000000], // hlvx.wu
789    [0x0000800000000000, 0x0000000000000000], // hsv.b
790    [0x0000000000080000, 0x0000000000000000], // hsv.d
791    [0x0000800000000000, 0x0000000000000000], // hsv.h
792    [0x0000800000000000, 0x0000000000000000], // hsv.w
793    [0x0001000000000000, 0x0000000000000000], // j
794    [0x0001000000000000, 0x0000000000000000], // jal
795    [0x0001000000000000, 0x0000000000000000], // jal.pseudo
796    [0x0001000000000000, 0x0000000000000000], // jalr
797    [0x0001000000000000, 0x0000000000000000], // jalr.pseudo
798    [0x0001000000000000, 0x0000000000000000], // jr
799    [0x0001000000000000, 0x0000000000000000], // lb
800    [0x0001000000000000, 0x0000000000000000], // lbu
801    [0x0000000000100000, 0x0000000000000000], // ld
802    [0x0001000000000000, 0x0000000000000000], // lh
803    [0x0001000000000000, 0x0000000000000000], // lhu
804    [0x0000000000000000, 0x0000000000040000], // lpad
805    [0x0000000000008000, 0x0000000000000000], // lr.d
806    [0x0000002000000000, 0x0000000000000000], // lr.w
807    [0x0001000000000000, 0x0000000000000000], // lui
808    [0x0001000000000000, 0x0000000000000000], // lw
809    [0x0000000000100000, 0x0000000000000000], // lwu
810    [0x0000000000000000, 0x0000000000000008], // max
811    [0x0000000000000000, 0x0000000000000008], // maxu
812    [0x0000000000000000, 0x0000000000000008], // min
813    [0x0000000000000000, 0x0000000000000008], // minu
814    [0x0080000000000000, 0x0000000000000000], // mnret
815    [0x0000000000000000, 0x0000000002000000], // mop.r.0
816    [0x0000000000000000, 0x0000000002000000], // mop.r.1
817    [0x0000000000000000, 0x0000000002000000], // mop.r.10
818    [0x0000000000000000, 0x0000000002000000], // mop.r.11
819    [0x0000000000000000, 0x0000000002000000], // mop.r.12
820    [0x0000000000000000, 0x0000000002000000], // mop.r.13
821    [0x0000000000000000, 0x0000000002000000], // mop.r.14
822    [0x0000000000000000, 0x0000000002000000], // mop.r.15
823    [0x0000000000000000, 0x0000000002000000], // mop.r.16
824    [0x0000000000000000, 0x0000000002000000], // mop.r.17
825    [0x0000000000000000, 0x0000000002000000], // mop.r.18
826    [0x0000000000000000, 0x0000000002000000], // mop.r.19
827    [0x0000000000000000, 0x0000000002000000], // mop.r.2
828    [0x0000000000000000, 0x0000000002000000], // mop.r.20
829    [0x0000000000000000, 0x0000000002000000], // mop.r.21
830    [0x0000000000000000, 0x0000000002000000], // mop.r.22
831    [0x0000000000000000, 0x0000000002000000], // mop.r.23
832    [0x0000000000000000, 0x0000000002000000], // mop.r.24
833    [0x0000000000000000, 0x0000000002000000], // mop.r.25
834    [0x0000000000000000, 0x0000000002000000], // mop.r.26
835    [0x0000000000000000, 0x0000000002000000], // mop.r.27
836    [0x0000000000000000, 0x0000000002000000], // mop.r.28
837    [0x0000000000000000, 0x0000000002000000], // mop.r.29
838    [0x0000000000000000, 0x0000000002000000], // mop.r.3
839    [0x0000000000000000, 0x0000000002000000], // mop.r.30
840    [0x0000000000000000, 0x0000000002000000], // mop.r.31
841    [0x0000000000000000, 0x0000000002000000], // mop.r.4
842    [0x0000000000000000, 0x0000000002000000], // mop.r.5
843    [0x0000000000000000, 0x0000000002000000], // mop.r.6
844    [0x0000000000000000, 0x0000000002000000], // mop.r.7
845    [0x0000000000000000, 0x0000000002000000], // mop.r.8
846    [0x0000000000000000, 0x0000000002000000], // mop.r.9
847    [0x0000000000000000, 0x0000000002000000], // mop.r.n
848    [0x0000000000000000, 0x0000000002000000], // mop.rr.0
849    [0x0000000000000000, 0x0000000002000000], // mop.rr.1
850    [0x0000000000000000, 0x0000000002000000], // mop.rr.2
851    [0x0000000000000000, 0x0000000002000000], // mop.rr.3
852    [0x0000000000000000, 0x0000000002000000], // mop.rr.4
853    [0x0000000000000000, 0x0000000002000000], // mop.rr.5
854    [0x0000000000000000, 0x0000000002000000], // mop.rr.6
855    [0x0000000000000000, 0x0000000002000000], // mop.rr.7
856    [0x0000000000000000, 0x0000000002000000], // mop.rr.n
857    [0x0800000000000000, 0x0000000000000000], // mret
858    [0x0002000000000000, 0x0000000000000000], // mul
859    [0x0002000000000000, 0x0000000000000000], // mulh
860    [0x0002000000000000, 0x0000000000000000], // mulhsu
861    [0x0002000000000000, 0x0000000000000000], // mulhu
862    [0x0000000000200000, 0x0000000000000000], // mulw
863    [0x0001000000000000, 0x0000000000000000], // mv
864    [0x0001000000000000, 0x0000000000000000], // neg
865    [0x0001000000000000, 0x0000000000000000], // nop
866    [0x0000000000000000, 0x0000000001000000], // ntl.all
867    [0x0000000000000000, 0x0000000001000000], // ntl.p1
868    [0x0000000000000000, 0x0000000001000000], // ntl.pall
869    [0x0000000000000000, 0x0000000001000000], // ntl.s1
870    [0x0001000000000000, 0x0000000000000000], // or
871    [0x0000000000000000, 0x0000000000000008], // orc.b
872    [0x0001000000000000, 0x0000000000000000], // ori
873    [0x0000000000000000, 0x000000002c000028], // orn
874    [0x0000000000000000, 0x000000002c000020], // pack
875    [0x0000000000000000, 0x000000002c000020], // packh
876    [0x0000001188000000, 0x0000000000000000], // packw
877    [0x0001000000000000, 0x0000000000000000], // pause
878    [0x0000000000000000, 0x0000000000020000], // prefetch.i
879    [0x0000000000000000, 0x0000000000020000], // prefetch.r
880    [0x0000000000000000, 0x0000000000020000], // prefetch.w
881    [0x0000000000000000, 0x0000000000100000], // rdcycle
882    [0x0000000000000100, 0x0000000000000000], // rdcycleh
883    [0x0000000000000000, 0x0000000000100000], // rdinstret
884    [0x0000000000000100, 0x0000000000000000], // rdinstreth
885    [0x0000000000000000, 0x0000000000100000], // rdtime
886    [0x0000000000000100, 0x0000000000000000], // rdtimeh
887    [0x0002000000000000, 0x0000000000000000], // rem
888    [0x0002000000000000, 0x0000000000000000], // remu
889    [0x0000000000200000, 0x0000000000000000], // remuw
890    [0x0000000000200000, 0x0000000000000000], // remw
891    [0x0001000000000000, 0x0000000000000000], // ret
892    [0x000000118c000000, 0x0000000000000000], // rev8
893    [0x0000000000004630, 0x0000000000000000], // rev8.rv32
894    [0x0000000000000000, 0x000000002c000028], // rol
895    [0x000000118c000000, 0x0000000000000000], // rolw
896    [0x0000000000000000, 0x000000002c000028], // ror
897    [0x000000118c000000, 0x0000000000000000], // rori
898    [0x0000000000004630, 0x0000000000000000], // rori.rv32
899    [0x000000118c000000, 0x0000000000000000], // roriw
900    [0x000000118c000000, 0x0000000000000000], // rorw
901    [0x0001000000000000, 0x0000000000000000], // sb
902    [0x0001000000000000, 0x0000000000000000], // sbreak
903    [0x0000000000008000, 0x0000000000000000], // sc.d
904    [0x0000002000000000, 0x0000000000000000], // sc.w
905    [0x0001000000000000, 0x0000000000000000], // scall
906    [0x0100000000000000, 0x0000000000000000], // sctrclr
907    [0x0000000000100000, 0x0000000000000000], // sd
908    [0x0001000000000000, 0x0000000000000000], // seqz
909    [0x0000000000000000, 0x0000000000000008], // sext.b
910    [0x0000000000000000, 0x0000000000000008], // sext.h
911    [0x0000000000100000, 0x0000000000000000], // sext.w
912    [0x0200000000000000, 0x0000000000000000], // sfence.inval.ir
913    [0x0020000000000000, 0x0000000000000000], // sfence.vma
914    [0x0200000000000000, 0x0000000000000000], // sfence.w.inval
915    [0x0001000000000000, 0x0000000000000000], // sgtz
916    [0x0001000000000000, 0x0000000000000000], // sh
917    [0x0000000000000000, 0x0000000000000004], // sh1add
918    [0x0000000002000000, 0x0000000000000000], // sh1add.uw
919    [0x0000000000000000, 0x0000000000000004], // sh2add
920    [0x0000000002000000, 0x0000000000000000], // sh2add.uw
921    [0x0000000000000000, 0x0000000000000004], // sh3add
922    [0x0000000002000000, 0x0000000000000000], // sh3add.uw
923    [0x0000000000000000, 0x000000001c000000], // sha256sig0
924    [0x0000000000000000, 0x000000001c000000], // sha256sig1
925    [0x0000000000000000, 0x000000001c000000], // sha256sum0
926    [0x0000000000000000, 0x000000001c000000], // sha256sum1
927    [0x0000000980000000, 0x0000000000000000], // sha512sig0
928    [0x0000000000002600, 0x0000000000000000], // sha512sig0h
929    [0x0000000000002600, 0x0000000000000000], // sha512sig0l
930    [0x0000000980000000, 0x0000000000000000], // sha512sig1
931    [0x0000000000002600, 0x0000000000000000], // sha512sig1h
932    [0x0000000000002600, 0x0000000000000000], // sha512sig1l
933    [0x0000000980000000, 0x0000000000000000], // sha512sum0
934    [0x0000000000002600, 0x0000000000000000], // sha512sum0r
935    [0x0000000980000000, 0x0000000000000000], // sha512sum1
936    [0x0000000000002600, 0x0000000000000000], // sha512sum1r
937    [0x0200000000000000, 0x0000000000000000], // sinval.vma
938    [0x0001000000000000, 0x0000000000000000], // sll
939    [0x0000000000100008, 0x0000000000000000], // slli
940    [0x0000000000000008, 0x0000000000000000], // slli.rv32
941    [0x0000000002000000, 0x0000000000000000], // slli.uw
942    [0x0000000000100000, 0x0000000000000000], // slliw
943    [0x0000000000100000, 0x0000000000000000], // sllw
944    [0x0001000000000000, 0x0000000000000000], // slt
945    [0x0001000000000000, 0x0000000000000000], // slti
946    [0x0001000000000000, 0x0000000000000000], // sltiu
947    [0x0001000000000000, 0x0000000000000000], // sltu
948    [0x0001000000000000, 0x0000000000000000], // sltz
949    [0x0000000000000000, 0x00000000a0000000], // sm3p0
950    [0x0000000000000000, 0x00000000a0000000], // sm3p1
951    [0x0000000000000000, 0x0000000060000000], // sm4ed
952    [0x0000000000000000, 0x0000000060000000], // sm4ks
953    [0x0001000000000000, 0x0000000000000000], // snez
954    [0x0001000000000000, 0x0000000000000000], // sra
955    [0x0000000000100008, 0x0000000000000000], // srai
956    [0x0000000000000008, 0x0000000000000000], // srai.rv32
957    [0x0000000000100000, 0x0000000000000000], // sraiw
958    [0x0000000000100000, 0x0000000000000000], // sraw
959    [0x0020000000000000, 0x0000000000000000], // sret
960    [0x0001000000000000, 0x0000000000000000], // srl
961    [0x0000000000100008, 0x0000000000000000], // srli
962    [0x0000000000000008, 0x0000000000000000], // srli.rv32
963    [0x0000000000100000, 0x0000000000000000], // srliw
964    [0x0000000000100000, 0x0000000000000000], // srlw
965    [0x0000000000000000, 0x0000000000080000], // ssamoswap.d
966    [0x0000000000000000, 0x0000000000080000], // ssamoswap.w
967    [0x0000000000000000, 0x0000000000080000], // sspopchk.x1
968    [0x0000000000000000, 0x0000000000080000], // sspopchk.x5
969    [0x0000000000000000, 0x0000000000080000], // sspush.x1
970    [0x0000000000000000, 0x0000000000080000], // sspush.x5
971    [0x0000000000000000, 0x0000000000080000], // ssrdp
972    [0x0001000000000000, 0x0000000000000000], // sub
973    [0x0000000000100000, 0x0000000000000000], // subw
974    [0x0001000000000000, 0x0000000000000000], // sw
975    [0x0000000000004620, 0x0000000000000000], // unzip
976    [0x1000000000000000, 0x0000000000000000], // vaadd.vv
977    [0x1000000000000000, 0x0000000000000000], // vaadd.vx
978    [0x1000000000000000, 0x0000000000000000], // vaaddu.vv
979    [0x1000000000000000, 0x0000000000000000], // vaaddu.vx
980    [0x1000000000000000, 0x0000000000000000], // vadc.vim
981    [0x1000000000000000, 0x0000000000000000], // vadc.vvm
982    [0x1000000000000000, 0x0000000000000000], // vadc.vxm
983    [0x1000000000000000, 0x0000000000000000], // vadd.vi
984    [0x1000000000000000, 0x0000000000000000], // vadd.vv
985    [0x1000000000000000, 0x0000000000000000], // vadd.vx
986    [0x0000000000000000, 0x0000006000000000], // vaesdf.vs
987    [0x0000000000000000, 0x0000006000000000], // vaesdf.vv
988    [0x0000000000000000, 0x0000006000000000], // vaesdm.vs
989    [0x0000000000000000, 0x0000006000000000], // vaesdm.vv
990    [0x0000000000000000, 0x0000006000000000], // vaesef.vs
991    [0x0000000000000000, 0x0000006000000000], // vaesef.vv
992    [0x0000000000000000, 0x0000006000000000], // vaesem.vs
993    [0x0000000000000000, 0x0000006000000000], // vaesem.vv
994    [0x0000000000000000, 0x0000006000000000], // vaeskf1.vi
995    [0x0000000000000000, 0x0000006000000000], // vaeskf2.vi
996    [0x0000000000000000, 0x0000006000000000], // vaesz.vs
997    [0x1000000000000000, 0x0000000000000000], // vand.vi
998    [0x1000000000000000, 0x0000000000000000], // vand.vv
999    [0x1000000000000000, 0x0000000000000000], // vand.vx
1000    [0x0000000000000000, 0x0000022100000000], // vandn.vv
1001    [0x0000000000000000, 0x0000022100000000], // vandn.vx
1002    [0x1000000000000000, 0x0000000000000000], // vasub.vv
1003    [0x1000000000000000, 0x0000000000000000], // vasub.vx
1004    [0x1000000000000000, 0x0000000000000000], // vasubu.vv
1005    [0x1000000000000000, 0x0000000000000000], // vasubu.vx
1006    [0x0000000000000000, 0x0000022100000000], // vbrev8.v
1007    [0x0000000000000000, 0x0000000100000000], // vbrev.v
1008    [0x0000000000000000, 0x0000000200000000], // vclmul.vv
1009    [0x0000000000000000, 0x0000000200000000], // vclmul.vx
1010    [0x0000000000000000, 0x0000000200000000], // vclmulh.vv
1011    [0x0000000000000000, 0x0000000200000000], // vclmulh.vx
1012    [0x0000000000000000, 0x0000000100000000], // vclz.v
1013    [0x1000000000000000, 0x0000000000000000], // vcompress.vm
1014    [0x1000000000000000, 0x0000000000000000], // vcpop.m
1015    [0x0000000000000000, 0x0000000100000000], // vcpop.v
1016    [0x0000000000000000, 0x0000000100000000], // vctz.v
1017    [0x1000000000000000, 0x0000000000000000], // vdiv.vv
1018    [0x1000000000000000, 0x0000000000000000], // vdiv.vx
1019    [0x1000000000000000, 0x0000000000000000], // vdivu.vv
1020    [0x1000000000000000, 0x0000000000000000], // vdivu.vx
1021    [0x1000000000000000, 0x0000000000000000], // vfadd.vf
1022    [0x1000000000000000, 0x0000000000000000], // vfadd.vv
1023    [0x1000000000000000, 0x0000000000000000], // vfclass.v
1024    [0x1000000000000000, 0x0000000000000000], // vfcvt.f.x.v
1025    [0x1000000000000000, 0x0000000000000000], // vfcvt.f.xu.v
1026    [0x1000000000000000, 0x0000000000000000], // vfcvt.rtz.x.f.v
1027    [0x1000000000000000, 0x0000000000000000], // vfcvt.rtz.xu.f.v
1028    [0x1000000000000000, 0x0000000000000000], // vfcvt.x.f.v
1029    [0x1000000000000000, 0x0000000000000000], // vfcvt.xu.f.v
1030    [0x1000000000000000, 0x0000000000000000], // vfdiv.vf
1031    [0x1000000000000000, 0x0000000000000000], // vfdiv.vv
1032    [0x1000000000000000, 0x0000000000000000], // vfirst.m
1033    [0x1000000000000000, 0x0000000000000000], // vfmacc.vf
1034    [0x1000000000000000, 0x0000000000000000], // vfmacc.vv
1035    [0x1000000000000000, 0x0000000000000000], // vfmadd.vf
1036    [0x1000000000000000, 0x0000000000000000], // vfmadd.vv
1037    [0x1000000000000000, 0x0000000000000000], // vfmax.vf
1038    [0x1000000000000000, 0x0000000000000000], // vfmax.vv
1039    [0x1000000000000000, 0x0000000000000000], // vfmerge.vfm
1040    [0x1000000000000000, 0x0000000000000000], // vfmin.vf
1041    [0x1000000000000000, 0x0000000000000000], // vfmin.vv
1042    [0x1000000000000000, 0x0000000000000000], // vfmsac.vf
1043    [0x1000000000000000, 0x0000000000000000], // vfmsac.vv
1044    [0x1000000000000000, 0x0000000000000000], // vfmsub.vf
1045    [0x1000000000000000, 0x0000000000000000], // vfmsub.vv
1046    [0x1000000000000000, 0x0000000000000000], // vfmul.vf
1047    [0x1000000000000000, 0x0000000000000000], // vfmul.vv
1048    [0x1000000000000000, 0x0000000000000000], // vfmv.f.s
1049    [0x1000000000000000, 0x0000000000000000], // vfmv.s.f
1050    [0x1000000000000000, 0x0000000000000000], // vfmv.v.f
1051    [0x1000000000000000, 0x0000000000000000], // vfncvt.f.f.w
1052    [0x1000000000000000, 0x0000000000000000], // vfncvt.f.x.w
1053    [0x1000000000000000, 0x0000000000000000], // vfncvt.f.xu.w
1054    [0x1000000000000000, 0x0000000000000000], // vfncvt.rod.f.f.w
1055    [0x1000000000000000, 0x0000000000000000], // vfncvt.rtz.x.f.w
1056    [0x1000000000000000, 0x0000000000000000], // vfncvt.rtz.xu.f.w
1057    [0x1000000000000000, 0x0000000000000000], // vfncvt.x.f.w
1058    [0x1000000000000000, 0x0000000000000000], // vfncvt.xu.f.w
1059    [0x0000000000000000, 0x0000000400000000], // vfncvtbf16.f.f.w
1060    [0x1000000000000000, 0x0000000000000000], // vfnmacc.vf
1061    [0x1000000000000000, 0x0000000000000000], // vfnmacc.vv
1062    [0x1000000000000000, 0x0000000000000000], // vfnmadd.vf
1063    [0x1000000000000000, 0x0000000000000000], // vfnmadd.vv
1064    [0x1000000000000000, 0x0000000000000000], // vfnmsac.vf
1065    [0x1000000000000000, 0x0000000000000000], // vfnmsac.vv
1066    [0x1000000000000000, 0x0000000000000000], // vfnmsub.vf
1067    [0x1000000000000000, 0x0000000000000000], // vfnmsub.vv
1068    [0x1000000000000000, 0x0000000000000000], // vfrdiv.vf
1069    [0x1000000000000000, 0x0000000000000000], // vfrec7.v
1070    [0x1000000000000000, 0x0000000000000000], // vfredmax.vs
1071    [0x1000000000000000, 0x0000000000000000], // vfredmin.vs
1072    [0x1000000000000000, 0x0000000000000000], // vfredosum.vs
1073    [0x2000000000000000, 0x0000000000000000], // vfredsum.vs
1074    [0x1000000000000000, 0x0000000000000000], // vfredusum.vs
1075    [0x1000000000000000, 0x0000000000000000], // vfrsqrt7.v
1076    [0x1000000000000000, 0x0000000000000000], // vfrsub.vf
1077    [0x1000000000000000, 0x0000000000000000], // vfsgnj.vf
1078    [0x1000000000000000, 0x0000000000000000], // vfsgnj.vv
1079    [0x1000000000000000, 0x0000000000000000], // vfsgnjn.vf
1080    [0x1000000000000000, 0x0000000000000000], // vfsgnjn.vv
1081    [0x1000000000000000, 0x0000000000000000], // vfsgnjx.vf
1082    [0x1000000000000000, 0x0000000000000000], // vfsgnjx.vv
1083    [0x1000000000000000, 0x0000000000000000], // vfslide1down.vf
1084    [0x1000000000000000, 0x0000000000000000], // vfslide1up.vf
1085    [0x1000000000000000, 0x0000000000000000], // vfsqrt.v
1086    [0x1000000000000000, 0x0000000000000000], // vfsub.vf
1087    [0x1000000000000000, 0x0000000000000000], // vfsub.vv
1088    [0x1000000000000000, 0x0000000000000000], // vfwadd.vf
1089    [0x1000000000000000, 0x0000000000000000], // vfwadd.vv
1090    [0x1000000000000000, 0x0000000000000000], // vfwadd.wf
1091    [0x1000000000000000, 0x0000000000000000], // vfwadd.wv
1092    [0x1000000000000000, 0x0000000000000000], // vfwcvt.f.f.v
1093    [0x1000000000000000, 0x0000000000000000], // vfwcvt.f.x.v
1094    [0x1000000000000000, 0x0000000000000000], // vfwcvt.f.xu.v
1095    [0x1000000000000000, 0x0000000000000000], // vfwcvt.rtz.x.f.v
1096    [0x1000000000000000, 0x0000000000000000], // vfwcvt.rtz.xu.f.v
1097    [0x1000000000000000, 0x0000000000000000], // vfwcvt.x.f.v
1098    [0x1000000000000000, 0x0000000000000000], // vfwcvt.xu.f.v
1099    [0x0000000000000000, 0x0000000400000000], // vfwcvtbf16.f.f.v
1100    [0x1000000000000000, 0x0000000000000000], // vfwmacc.vf
1101    [0x1000000000000000, 0x0000000000000000], // vfwmacc.vv
1102    [0x0000000000000000, 0x0000000800000000], // vfwmaccbf16.vf
1103    [0x0000000000000000, 0x0000000800000000], // vfwmaccbf16.vv
1104    [0x1000000000000000, 0x0000000000000000], // vfwmsac.vf
1105    [0x1000000000000000, 0x0000000000000000], // vfwmsac.vv
1106    [0x1000000000000000, 0x0000000000000000], // vfwmul.vf
1107    [0x1000000000000000, 0x0000000000000000], // vfwmul.vv
1108    [0x1000000000000000, 0x0000000000000000], // vfwnmacc.vf
1109    [0x1000000000000000, 0x0000000000000000], // vfwnmacc.vv
1110    [0x1000000000000000, 0x0000000000000000], // vfwnmsac.vf
1111    [0x1000000000000000, 0x0000000000000000], // vfwnmsac.vv
1112    [0x1000000000000000, 0x0000000000000000], // vfwredosum.vs
1113    [0x2000000000000000, 0x0000000000000000], // vfwredsum.vs
1114    [0x1000000000000000, 0x0000000000000000], // vfwredusum.vs
1115    [0x1000000000000000, 0x0000000000000000], // vfwsub.vf
1116    [0x1000000000000000, 0x0000000000000000], // vfwsub.vv
1117    [0x1000000000000000, 0x0000000000000000], // vfwsub.wf
1118    [0x1000000000000000, 0x0000000000000000], // vfwsub.wv
1119    [0x0000000000000000, 0x0000001000000000], // vghsh.vv
1120    [0x0000000000000000, 0x0000001000000000], // vgmul.vv
1121    [0x1000000000000000, 0x0000000000000000], // vid.v
1122    [0x1000000000000000, 0x0000000000000000], // viota.m
1123    [0x2000000000000000, 0x0000000000000000], // vl1r.v
1124    [0x1000000000000000, 0x0000000000000000], // vl1re16.v
1125    [0x1000000000000000, 0x0000000000000000], // vl1re32.v
1126    [0x1000000000000000, 0x0000000000000000], // vl1re64.v
1127    [0x1000000000000000, 0x0000000000000000], // vl1re8.v
1128    [0x2000000000000000, 0x0000000000000000], // vl2r.v
1129    [0x1000000000000000, 0x0000000000000000], // vl2re16.v
1130    [0x1000000000000000, 0x0000000000000000], // vl2re32.v
1131    [0x1000000000000000, 0x0000000000000000], // vl2re64.v
1132    [0x1000000000000000, 0x0000000000000000], // vl2re8.v
1133    [0x2000000000000000, 0x0000000000000000], // vl4r.v
1134    [0x1000000000000000, 0x0000000000000000], // vl4re16.v
1135    [0x1000000000000000, 0x0000000000000000], // vl4re32.v
1136    [0x1000000000000000, 0x0000000000000000], // vl4re64.v
1137    [0x1000000000000000, 0x0000000000000000], // vl4re8.v
1138    [0x2000000000000000, 0x0000000000000000], // vl8r.v
1139    [0x1000000000000000, 0x0000000000000000], // vl8re16.v
1140    [0x1000000000000000, 0x0000000000000000], // vl8re32.v
1141    [0x1000000000000000, 0x0000000000000000], // vl8re64.v
1142    [0x1000000000000000, 0x0000000000000000], // vl8re8.v
1143    [0x1000000000000000, 0x0000000000000000], // vle16.v
1144    [0x1000000000000000, 0x0000000000000000], // vle16ff.v
1145    [0x2000000000000000, 0x0000000000000000], // vle1.v
1146    [0x1000000000000000, 0x0000000000000000], // vle32.v
1147    [0x1000000000000000, 0x0000000000000000], // vle32ff.v
1148    [0x1000000000000000, 0x0000000000000000], // vle64.v
1149    [0x1000000000000000, 0x0000000000000000], // vle64ff.v
1150    [0x1000000000000000, 0x0000000000000000], // vle8.v
1151    [0x1000000000000000, 0x0000000000000000], // vle8ff.v
1152    [0x1000000000000000, 0x0000000000000000], // vlm.v
1153    [0x1000000000000000, 0x0000000000000000], // vloxei16.v
1154    [0x1000000000000000, 0x0000000000000000], // vloxei32.v
1155    [0x1000000000000000, 0x0000000000000000], // vloxei64.v
1156    [0x1000000000000000, 0x0000000000000000], // vloxei8.v
1157    [0x1000000000000000, 0x0000000000000000], // vlse16.v
1158    [0x1000000000000000, 0x0000000000000000], // vlse32.v
1159    [0x1000000000000000, 0x0000000000000000], // vlse64.v
1160    [0x1000000000000000, 0x0000000000000000], // vlse8.v
1161    [0x1000000000000000, 0x0000000000000000], // vluxei16.v
1162    [0x1000000000000000, 0x0000000000000000], // vluxei32.v
1163    [0x1000000000000000, 0x0000000000000000], // vluxei64.v
1164    [0x1000000000000000, 0x0000000000000000], // vluxei8.v
1165    [0x1000000000000000, 0x0000000000000000], // vmacc.vv
1166    [0x1000000000000000, 0x0000000000000000], // vmacc.vx
1167    [0x1000000000000000, 0x0000000000000000], // vmadc.vi
1168    [0x1000000000000000, 0x0000000000000000], // vmadc.vim
1169    [0x1000000000000000, 0x0000000000000000], // vmadc.vv
1170    [0x1000000000000000, 0x0000000000000000], // vmadc.vvm
1171    [0x1000000000000000, 0x0000000000000000], // vmadc.vx
1172    [0x1000000000000000, 0x0000000000000000], // vmadc.vxm
1173    [0x1000000000000000, 0x0000000000000000], // vmadd.vv
1174    [0x1000000000000000, 0x0000000000000000], // vmadd.vx
1175    [0x1000000000000000, 0x0000000000000000], // vmand.mm
1176    [0x1000000000000000, 0x0000000000000000], // vmandn.mm
1177    [0x2000000000000000, 0x0000000000000000], // vmandnot.mm
1178    [0x1000000000000000, 0x0000000000000000], // vmax.vv
1179    [0x1000000000000000, 0x0000000000000000], // vmax.vx
1180    [0x1000000000000000, 0x0000000000000000], // vmaxu.vv
1181    [0x1000000000000000, 0x0000000000000000], // vmaxu.vx
1182    [0x1000000000000000, 0x0000000000000000], // vmerge.vim
1183    [0x1000000000000000, 0x0000000000000000], // vmerge.vvm
1184    [0x1000000000000000, 0x0000000000000000], // vmerge.vxm
1185    [0x1000000000000000, 0x0000000000000000], // vmfeq.vf
1186    [0x1000000000000000, 0x0000000000000000], // vmfeq.vv
1187    [0x1000000000000000, 0x0000000000000000], // vmfge.vf
1188    [0x1000000000000000, 0x0000000000000000], // vmfgt.vf
1189    [0x1000000000000000, 0x0000000000000000], // vmfle.vf
1190    [0x1000000000000000, 0x0000000000000000], // vmfle.vv
1191    [0x1000000000000000, 0x0000000000000000], // vmflt.vf
1192    [0x1000000000000000, 0x0000000000000000], // vmflt.vv
1193    [0x1000000000000000, 0x0000000000000000], // vmfne.vf
1194    [0x1000000000000000, 0x0000000000000000], // vmfne.vv
1195    [0x1000000000000000, 0x0000000000000000], // vmin.vv
1196    [0x1000000000000000, 0x0000000000000000], // vmin.vx
1197    [0x1000000000000000, 0x0000000000000000], // vminu.vv
1198    [0x1000000000000000, 0x0000000000000000], // vminu.vx
1199    [0x1000000000000000, 0x0000000000000000], // vmnand.mm
1200    [0x1000000000000000, 0x0000000000000000], // vmnor.mm
1201    [0x1000000000000000, 0x0000000000000000], // vmor.mm
1202    [0x1000000000000000, 0x0000000000000000], // vmorn.mm
1203    [0x2000000000000000, 0x0000000000000000], // vmornot.mm
1204    [0x1000000000000000, 0x0000000000000000], // vmsbc.vv
1205    [0x1000000000000000, 0x0000000000000000], // vmsbc.vvm
1206    [0x1000000000000000, 0x0000000000000000], // vmsbc.vx
1207    [0x1000000000000000, 0x0000000000000000], // vmsbc.vxm
1208    [0x1000000000000000, 0x0000000000000000], // vmsbf.m
1209    [0x1000000000000000, 0x0000000000000000], // vmseq.vi
1210    [0x1000000000000000, 0x0000000000000000], // vmseq.vv
1211    [0x1000000000000000, 0x0000000000000000], // vmseq.vx
1212    [0x1000000000000000, 0x0000000000000000], // vmsgt.vi
1213    [0x1000000000000000, 0x0000000000000000], // vmsgt.vx
1214    [0x1000000000000000, 0x0000000000000000], // vmsgtu.vi
1215    [0x1000000000000000, 0x0000000000000000], // vmsgtu.vx
1216    [0x1000000000000000, 0x0000000000000000], // vmsif.m
1217    [0x1000000000000000, 0x0000000000000000], // vmsle.vi
1218    [0x1000000000000000, 0x0000000000000000], // vmsle.vv
1219    [0x1000000000000000, 0x0000000000000000], // vmsle.vx
1220    [0x1000000000000000, 0x0000000000000000], // vmsleu.vi
1221    [0x1000000000000000, 0x0000000000000000], // vmsleu.vv
1222    [0x1000000000000000, 0x0000000000000000], // vmsleu.vx
1223    [0x1000000000000000, 0x0000000000000000], // vmslt.vv
1224    [0x1000000000000000, 0x0000000000000000], // vmslt.vx
1225    [0x1000000000000000, 0x0000000000000000], // vmsltu.vv
1226    [0x1000000000000000, 0x0000000000000000], // vmsltu.vx
1227    [0x1000000000000000, 0x0000000000000000], // vmsne.vi
1228    [0x1000000000000000, 0x0000000000000000], // vmsne.vv
1229    [0x1000000000000000, 0x0000000000000000], // vmsne.vx
1230    [0x1000000000000000, 0x0000000000000000], // vmsof.m
1231    [0x1000000000000000, 0x0000000000000000], // vmul.vv
1232    [0x1000000000000000, 0x0000000000000000], // vmul.vx
1233    [0x1000000000000000, 0x0000000000000000], // vmulh.vv
1234    [0x1000000000000000, 0x0000000000000000], // vmulh.vx
1235    [0x1000000000000000, 0x0000000000000000], // vmulhsu.vv
1236    [0x1000000000000000, 0x0000000000000000], // vmulhsu.vx
1237    [0x1000000000000000, 0x0000000000000000], // vmulhu.vv
1238    [0x1000000000000000, 0x0000000000000000], // vmulhu.vx
1239    [0x1000000000000000, 0x0000000000000000], // vmv1r.v
1240    [0x1000000000000000, 0x0000000000000000], // vmv2r.v
1241    [0x1000000000000000, 0x0000000000000000], // vmv4r.v
1242    [0x1000000000000000, 0x0000000000000000], // vmv8r.v
1243    [0x1000000000000000, 0x0000000000000000], // vmv.s.x
1244    [0x1000000000000000, 0x0000000000000000], // vmv.v.i
1245    [0x1000000000000000, 0x0000000000000000], // vmv.v.v
1246    [0x1000000000000000, 0x0000000000000000], // vmv.v.x
1247    [0x1000000000000000, 0x0000000000000000], // vmv.x.s
1248    [0x1000000000000000, 0x0000000000000000], // vmxnor.mm
1249    [0x1000000000000000, 0x0000000000000000], // vmxor.mm
1250    [0x1000000000000000, 0x0000000000000000], // vnclip.wi
1251    [0x1000000000000000, 0x0000000000000000], // vnclip.wv
1252    [0x1000000000000000, 0x0000000000000000], // vnclip.wx
1253    [0x1000000000000000, 0x0000000000000000], // vnclipu.wi
1254    [0x1000000000000000, 0x0000000000000000], // vnclipu.wv
1255    [0x1000000000000000, 0x0000000000000000], // vnclipu.wx
1256    [0x1000000000000000, 0x0000000000000000], // vnmsac.vv
1257    [0x1000000000000000, 0x0000000000000000], // vnmsac.vx
1258    [0x1000000000000000, 0x0000000000000000], // vnmsub.vv
1259    [0x1000000000000000, 0x0000000000000000], // vnmsub.vx
1260    [0x1000000000000000, 0x0000000000000000], // vnsra.wi
1261    [0x1000000000000000, 0x0000000000000000], // vnsra.wv
1262    [0x1000000000000000, 0x0000000000000000], // vnsra.wx
1263    [0x1000000000000000, 0x0000000000000000], // vnsrl.wi
1264    [0x1000000000000000, 0x0000000000000000], // vnsrl.wv
1265    [0x1000000000000000, 0x0000000000000000], // vnsrl.wx
1266    [0x1000000000000000, 0x0000000000000000], // vor.vi
1267    [0x1000000000000000, 0x0000000000000000], // vor.vv
1268    [0x1000000000000000, 0x0000000000000000], // vor.vx
1269    [0x2000000000000000, 0x0000000000000000], // vpopc.m
1270    [0x1000000000000000, 0x0000000000000000], // vredand.vs
1271    [0x1000000000000000, 0x0000000000000000], // vredmax.vs
1272    [0x1000000000000000, 0x0000000000000000], // vredmaxu.vs
1273    [0x1000000000000000, 0x0000000000000000], // vredmin.vs
1274    [0x1000000000000000, 0x0000000000000000], // vredminu.vs
1275    [0x1000000000000000, 0x0000000000000000], // vredor.vs
1276    [0x1000000000000000, 0x0000000000000000], // vredsum.vs
1277    [0x1000000000000000, 0x0000000000000000], // vredxor.vs
1278    [0x1000000000000000, 0x0000000000000000], // vrem.vv
1279    [0x1000000000000000, 0x0000000000000000], // vrem.vx
1280    [0x1000000000000000, 0x0000000000000000], // vremu.vv
1281    [0x1000000000000000, 0x0000000000000000], // vremu.vx
1282    [0x0000000000000000, 0x0000022100000000], // vrev8.v
1283    [0x1000000000000000, 0x0000000000000000], // vrgather.vi
1284    [0x1000000000000000, 0x0000000000000000], // vrgather.vv
1285    [0x1000000000000000, 0x0000000000000000], // vrgather.vx
1286    [0x1000000000000000, 0x0000000000000000], // vrgatherei16.vv
1287    [0x0000000000000000, 0x0000022100000000], // vrol.vv
1288    [0x0000000000000000, 0x0000022100000000], // vrol.vx
1289    [0x0000000000000000, 0x0000022100000000], // vror.vi
1290    [0x0000000000000000, 0x0000022100000000], // vror.vv
1291    [0x0000000000000000, 0x0000022100000000], // vror.vx
1292    [0x1000000000000000, 0x0000000000000000], // vrsub.vi
1293    [0x1000000000000000, 0x0000000000000000], // vrsub.vx
1294    [0x1000000000000000, 0x0000000000000000], // vs1r.v
1295    [0x1000000000000000, 0x0000000000000000], // vs2r.v
1296    [0x1000000000000000, 0x0000000000000000], // vs4r.v
1297    [0x1000000000000000, 0x0000000000000000], // vs8r.v
1298    [0x1000000000000000, 0x0000000000000000], // vsadd.vi
1299    [0x1000000000000000, 0x0000000000000000], // vsadd.vv
1300    [0x1000000000000000, 0x0000000000000000], // vsadd.vx
1301    [0x1000000000000000, 0x0000000000000000], // vsaddu.vi
1302    [0x1000000000000000, 0x0000000000000000], // vsaddu.vv
1303    [0x1000000000000000, 0x0000000000000000], // vsaddu.vx
1304    [0x1000000000000000, 0x0000000000000000], // vsbc.vvm
1305    [0x1000000000000000, 0x0000000000000000], // vsbc.vxm
1306    [0x1000000000000000, 0x0000000000000000], // vse16.v
1307    [0x2000000000000000, 0x0000000000000000], // vse1.v
1308    [0x1000000000000000, 0x0000000000000000], // vse32.v
1309    [0x1000000000000000, 0x0000000000000000], // vse64.v
1310    [0x1000000000000000, 0x0000000000000000], // vse8.v
1311    [0x1000000000000000, 0x0000000000000000], // vsetivli
1312    [0x1000000000000000, 0x0000000000000000], // vsetvl
1313    [0x1000000000000000, 0x0000000000000000], // vsetvli
1314    [0x1000000000000000, 0x0000000000000000], // vsext.vf2
1315    [0x1000000000000000, 0x0000000000000000], // vsext.vf4
1316    [0x1000000000000000, 0x0000000000000000], // vsext.vf8
1317    [0x0000000000000000, 0x000001a000000000], // vsha2ch.vv
1318    [0x0000000000000000, 0x000001a000000000], // vsha2cl.vv
1319    [0x0000000000000000, 0x000001a000000000], // vsha2ms.vv
1320    [0x1000000000000000, 0x0000000000000000], // vslide1down.vx
1321    [0x1000000000000000, 0x0000000000000000], // vslide1up.vx
1322    [0x1000000000000000, 0x0000000000000000], // vslidedown.vi
1323    [0x1000000000000000, 0x0000000000000000], // vslidedown.vx
1324    [0x1000000000000000, 0x0000000000000000], // vslideup.vi
1325    [0x1000000000000000, 0x0000000000000000], // vslideup.vx
1326    [0x1000000000000000, 0x0000000000000000], // vsll.vi
1327    [0x1000000000000000, 0x0000000000000000], // vsll.vv
1328    [0x1000000000000000, 0x0000000000000000], // vsll.vx
1329    [0x0000000000000000, 0x00000a0000000000], // vsm3c.vi
1330    [0x0000000000000000, 0x00000a0000000000], // vsm3me.vv
1331    [0x0000000000000000, 0x0000060000000000], // vsm4k.vi
1332    [0x0000000000000000, 0x0000060000000000], // vsm4r.vs
1333    [0x0000000000000000, 0x0000060000000000], // vsm4r.vv
1334    [0x1000000000000000, 0x0000000000000000], // vsm.v
1335    [0x1000000000000000, 0x0000000000000000], // vsmul.vv
1336    [0x1000000000000000, 0x0000000000000000], // vsmul.vx
1337    [0x1000000000000000, 0x0000000000000000], // vsoxei16.v
1338    [0x1000000000000000, 0x0000000000000000], // vsoxei32.v
1339    [0x1000000000000000, 0x0000000000000000], // vsoxei64.v
1340    [0x1000000000000000, 0x0000000000000000], // vsoxei8.v
1341    [0x1000000000000000, 0x0000000000000000], // vsra.vi
1342    [0x1000000000000000, 0x0000000000000000], // vsra.vv
1343    [0x1000000000000000, 0x0000000000000000], // vsra.vx
1344    [0x1000000000000000, 0x0000000000000000], // vsrl.vi
1345    [0x1000000000000000, 0x0000000000000000], // vsrl.vv
1346    [0x1000000000000000, 0x0000000000000000], // vsrl.vx
1347    [0x1000000000000000, 0x0000000000000000], // vsse16.v
1348    [0x1000000000000000, 0x0000000000000000], // vsse32.v
1349    [0x1000000000000000, 0x0000000000000000], // vsse64.v
1350    [0x1000000000000000, 0x0000000000000000], // vsse8.v
1351    [0x1000000000000000, 0x0000000000000000], // vssra.vi
1352    [0x1000000000000000, 0x0000000000000000], // vssra.vv
1353    [0x1000000000000000, 0x0000000000000000], // vssra.vx
1354    [0x1000000000000000, 0x0000000000000000], // vssrl.vi
1355    [0x1000000000000000, 0x0000000000000000], // vssrl.vv
1356    [0x1000000000000000, 0x0000000000000000], // vssrl.vx
1357    [0x1000000000000000, 0x0000000000000000], // vssub.vv
1358    [0x1000000000000000, 0x0000000000000000], // vssub.vx
1359    [0x1000000000000000, 0x0000000000000000], // vssubu.vv
1360    [0x1000000000000000, 0x0000000000000000], // vssubu.vx
1361    [0x1000000000000000, 0x0000000000000000], // vsub.vv
1362    [0x1000000000000000, 0x0000000000000000], // vsub.vx
1363    [0x1000000000000000, 0x0000000000000000], // vsuxei16.v
1364    [0x1000000000000000, 0x0000000000000000], // vsuxei32.v
1365    [0x1000000000000000, 0x0000000000000000], // vsuxei64.v
1366    [0x1000000000000000, 0x0000000000000000], // vsuxei8.v
1367    [0x1000000000000000, 0x0000000000000000], // vwadd.vv
1368    [0x1000000000000000, 0x0000000000000000], // vwadd.vx
1369    [0x1000000000000000, 0x0000000000000000], // vwadd.wv
1370    [0x1000000000000000, 0x0000000000000000], // vwadd.wx
1371    [0x1000000000000000, 0x0000000000000000], // vwaddu.vv
1372    [0x1000000000000000, 0x0000000000000000], // vwaddu.vx
1373    [0x1000000000000000, 0x0000000000000000], // vwaddu.wv
1374    [0x1000000000000000, 0x0000000000000000], // vwaddu.wx
1375    [0x1000000000000000, 0x0000000000000000], // vwmacc.vv
1376    [0x1000000000000000, 0x0000000000000000], // vwmacc.vx
1377    [0x1000000000000000, 0x0000000000000000], // vwmaccsu.vv
1378    [0x1000000000000000, 0x0000000000000000], // vwmaccsu.vx
1379    [0x1000000000000000, 0x0000000000000000], // vwmaccu.vv
1380    [0x1000000000000000, 0x0000000000000000], // vwmaccu.vx
1381    [0x1000000000000000, 0x0000000000000000], // vwmaccus.vx
1382    [0x1000000000000000, 0x0000000000000000], // vwmul.vv
1383    [0x1000000000000000, 0x0000000000000000], // vwmul.vx
1384    [0x1000000000000000, 0x0000000000000000], // vwmulsu.vv
1385    [0x1000000000000000, 0x0000000000000000], // vwmulsu.vx
1386    [0x1000000000000000, 0x0000000000000000], // vwmulu.vv
1387    [0x1000000000000000, 0x0000000000000000], // vwmulu.vx
1388    [0x1000000000000000, 0x0000000000000000], // vwredsum.vs
1389    [0x1000000000000000, 0x0000000000000000], // vwredsumu.vs
1390    [0x0000000000000000, 0x0000000100000000], // vwsll.vi
1391    [0x0000000000000000, 0x0000000100000000], // vwsll.vv
1392    [0x0000000000000000, 0x0000000100000000], // vwsll.vx
1393    [0x1000000000000000, 0x0000000000000000], // vwsub.vv
1394    [0x1000000000000000, 0x0000000000000000], // vwsub.vx
1395    [0x1000000000000000, 0x0000000000000000], // vwsub.wv
1396    [0x1000000000000000, 0x0000000000000000], // vwsub.wx
1397    [0x1000000000000000, 0x0000000000000000], // vwsubu.vv
1398    [0x1000000000000000, 0x0000000000000000], // vwsubu.vx
1399    [0x1000000000000000, 0x0000000000000000], // vwsubu.wv
1400    [0x1000000000000000, 0x0000000000000000], // vwsubu.wx
1401    [0x1000000000000000, 0x0000000000000000], // vxor.vi
1402    [0x1000000000000000, 0x0000000000000000], // vxor.vv
1403    [0x1000000000000000, 0x0000000000000000], // vxor.vx
1404    [0x1000000000000000, 0x0000000000000000], // vzext.vf2
1405    [0x1000000000000000, 0x0000000000000000], // vzext.vf4
1406    [0x1000000000000000, 0x0000000000000000], // vzext.vf8
1407    [0x0800000000000000, 0x0000000000000000], // wfi
1408    [0x0000000000000000, 0x0000000000000002], // wrs.nto
1409    [0x0000000000000000, 0x0000000000000002], // wrs.sto
1410    [0x0000000000000000, 0x000000002c000028], // xnor
1411    [0x0001000000000000, 0x0000000000000000], // xor
1412    [0x0001000000000000, 0x0000000000000000], // xori
1413    [0x0000000000000000, 0x000000002c000080], // xperm4
1414    [0x0000000000000000, 0x000000002c000080], // xperm8
1415    [0x0001000000000000, 0x0000000000000000], // zext.b
1416    [0x0000000004000000, 0x0000000000000000], // zext.h
1417    [0x0000000000000010, 0x0000000000000000], // zext.h.rv32
1418    [0x0000000002000000, 0x0000000000000000], // zext.w
1419    [0x0000000000004620, 0x0000000000000000], // zip
1420];
1421
1422/// Missing-feature diagnostics, indexed by `Opcode as usize`.
1423pub static OPCODE_FEATURE_CONTEXT: [&str; 1039] = [
1424    "add requires one of: rv_i",
1425    "add.uw requires one of: rv64_zba",
1426    "addi requires one of: rv_i",
1427    "addiw requires one of: rv64_i",
1428    "addw requires one of: rv64_i",
1429    "aes32dsi requires one of: rv32_zknd, rv32_zkn, rv32_zk",
1430    "aes32dsmi requires one of: rv32_zknd, rv32_zkn, rv32_zk",
1431    "aes32esi requires one of: rv32_zkne, rv32_zkn, rv32_zk",
1432    "aes32esmi requires one of: rv32_zkne, rv32_zkn, rv32_zk",
1433    "aes64ds requires one of: rv64_zknd, rv64_zkn, rv64_zk",
1434    "aes64dsm requires one of: rv64_zknd, rv64_zkn, rv64_zk",
1435    "aes64es requires one of: rv64_zkne, rv64_zkn, rv64_zk",
1436    "aes64esm requires one of: rv64_zkne, rv64_zkn, rv64_zk",
1437    "aes64im requires one of: rv64_zknd, rv64_zkn, rv64_zk",
1438    "aes64ks1i requires one of: rv64_zknd, rv64_zkne, rv64_zkn, rv64_zk",
1439    "aes64ks2 requires one of: rv64_zknd, rv64_zkne, rv64_zkn, rv64_zk",
1440    "amoadd.b requires one of: rv_zabha",
1441    "amoadd.d requires one of: rv64_a",
1442    "amoadd.h requires one of: rv_zabha",
1443    "amoadd.w requires one of: rv_a",
1444    "amoand.b requires one of: rv_zabha",
1445    "amoand.d requires one of: rv64_a",
1446    "amoand.h requires one of: rv_zabha",
1447    "amoand.w requires one of: rv_a",
1448    "amocas.b requires one of: rv_zabha_zacas",
1449    "amocas.d requires one of: rv_zacas",
1450    "amocas.h requires one of: rv_zabha_zacas",
1451    "amocas.q requires one of: rv64_zacas",
1452    "amocas.w requires one of: rv_zacas",
1453    "amomax.b requires one of: rv_zabha",
1454    "amomax.d requires one of: rv64_a",
1455    "amomax.h requires one of: rv_zabha",
1456    "amomax.w requires one of: rv_a",
1457    "amomaxu.b requires one of: rv_zabha",
1458    "amomaxu.d requires one of: rv64_a",
1459    "amomaxu.h requires one of: rv_zabha",
1460    "amomaxu.w requires one of: rv_a",
1461    "amomin.b requires one of: rv_zabha",
1462    "amomin.d requires one of: rv64_a",
1463    "amomin.h requires one of: rv_zabha",
1464    "amomin.w requires one of: rv_a",
1465    "amominu.b requires one of: rv_zabha",
1466    "amominu.d requires one of: rv64_a",
1467    "amominu.h requires one of: rv_zabha",
1468    "amominu.w requires one of: rv_a",
1469    "amoor.b requires one of: rv_zabha",
1470    "amoor.d requires one of: rv64_a",
1471    "amoor.h requires one of: rv_zabha",
1472    "amoor.w requires one of: rv_a",
1473    "amoswap.b requires one of: rv_zabha",
1474    "amoswap.d requires one of: rv64_a",
1475    "amoswap.h requires one of: rv_zabha",
1476    "amoswap.w requires one of: rv_a",
1477    "amoxor.b requires one of: rv_zabha",
1478    "amoxor.d requires one of: rv64_a",
1479    "amoxor.h requires one of: rv_zabha",
1480    "amoxor.w requires one of: rv_a",
1481    "and requires one of: rv_i",
1482    "andi requires one of: rv_i",
1483    "andn requires one of: rv_zbb, rv_zks, rv_zkn, rv_zk, rv_zbkb",
1484    "auipc requires one of: rv_i",
1485    "bclr requires one of: rv_zbs",
1486    "bclri requires one of: rv64_zbs",
1487    "bclri.rv32 requires one of: rv32_zbs",
1488    "beq requires one of: rv_i",
1489    "beqz requires one of: rv_i",
1490    "bext requires one of: rv_zbs",
1491    "bexti requires one of: rv64_zbs",
1492    "bexti.rv32 requires one of: rv32_zbs",
1493    "bge requires one of: rv_i",
1494    "bgeu requires one of: rv_i",
1495    "bgez requires one of: rv_i",
1496    "bgt requires one of: rv_i",
1497    "bgtu requires one of: rv_i",
1498    "bgtz requires one of: rv_i",
1499    "binv requires one of: rv_zbs",
1500    "binvi requires one of: rv64_zbs",
1501    "binvi.rv32 requires one of: rv32_zbs",
1502    "ble requires one of: rv_i",
1503    "bleu requires one of: rv_i",
1504    "blez requires one of: rv_i",
1505    "blt requires one of: rv_i",
1506    "bltu requires one of: rv_i",
1507    "bltz requires one of: rv_i",
1508    "bne requires one of: rv_i",
1509    "bnez requires one of: rv_i",
1510    "brev8 requires one of: rv_zbkb, rv_zks, rv_zkn, rv_zk",
1511    "bset requires one of: rv_zbs",
1512    "bseti requires one of: rv64_zbs",
1513    "bseti.rv32 requires one of: rv32_zbs",
1514    "c.add requires one of: rv_c",
1515    "c.addi requires one of: rv_c",
1516    "c.addi16sp requires one of: rv_c",
1517    "c.addi4spn requires one of: rv_c",
1518    "c.addiw requires one of: rv64_c",
1519    "c.addw requires one of: rv64_c",
1520    "c.and requires one of: rv_c",
1521    "c.andi requires one of: rv_c",
1522    "c.beqz requires one of: rv_c",
1523    "c.bnez requires one of: rv_c",
1524    "c.ebreak requires one of: rv_c",
1525    "c.fld requires one of: rv_c_d",
1526    "c.fldsp requires one of: rv_c_d",
1527    "c.flw requires one of: rv32_c_f",
1528    "c.flwsp requires one of: rv32_c_f",
1529    "c.fsd requires one of: rv_c_d",
1530    "c.fsdsp requires one of: rv_c_d",
1531    "c.fsw requires one of: rv32_c_f",
1532    "c.fswsp requires one of: rv32_c_f",
1533    "c.j requires one of: rv_c",
1534    "c.jal requires one of: rv32_c",
1535    "c.jalr requires one of: rv_c",
1536    "c.jr requires one of: rv_c",
1537    "c.lbu requires one of: rv_zcb",
1538    "c.ld requires one of: rv64_c, rv32_zclsd",
1539    "c.ldsp requires one of: rv64_c, rv32_zclsd",
1540    "c.lh requires one of: rv_zcb",
1541    "c.lhu requires one of: rv_zcb",
1542    "c.li requires one of: rv_c",
1543    "c.lui requires one of: rv_c",
1544    "c.lw requires one of: rv_c",
1545    "c.lwsp requires one of: rv_c",
1546    "c.mop.1 requires one of: rv_zcmop",
1547    "c.mop.11 requires one of: rv_zcmop",
1548    "c.mop.13 requires one of: rv_zcmop",
1549    "c.mop.15 requires one of: rv_zcmop",
1550    "c.mop.3 requires one of: rv_zcmop",
1551    "c.mop.5 requires one of: rv_zcmop",
1552    "c.mop.7 requires one of: rv_zcmop",
1553    "c.mop.9 requires one of: rv_zcmop",
1554    "c.mop.n requires one of: rv_zcmop",
1555    "c.mul requires one of: rv_zcb",
1556    "c.mv requires one of: rv_c",
1557    "c.nop requires one of: rv_c",
1558    "c.not requires one of: rv_zcb",
1559    "c.ntl.all requires one of: rv_c_zihintntl",
1560    "c.ntl.p1 requires one of: rv_c_zihintntl",
1561    "c.ntl.pall requires one of: rv_c_zihintntl",
1562    "c.ntl.s1 requires one of: rv_c_zihintntl",
1563    "c.or requires one of: rv_c",
1564    "c.sb requires one of: rv_zcb",
1565    "c.sd requires one of: rv64_c, rv32_zclsd",
1566    "c.sdsp requires one of: rv64_c, rv32_zclsd",
1567    "c.sext.b requires one of: rv_zcb",
1568    "c.sext.h requires one of: rv_zcb",
1569    "c.sext.w requires one of: rv64_zcb",
1570    "c.sh requires one of: rv_zcb",
1571    "c.slli requires one of: rv64_c, rv32_c",
1572    "c.slli.rv32 requires one of: rv32_c",
1573    "c.srai requires one of: rv64_c, rv32_c",
1574    "c.srai.rv32 requires one of: rv32_c",
1575    "c.srli requires one of: rv64_c, rv32_c",
1576    "c.srli.rv32 requires one of: rv32_c",
1577    "c.sspopchk.x5 requires one of: rv_c_zicfiss",
1578    "c.sspush.x1 requires one of: rv_c_zicfiss",
1579    "c.sub requires one of: rv_c",
1580    "c.subw requires one of: rv64_c",
1581    "c.sw requires one of: rv_c",
1582    "c.swsp requires one of: rv_c",
1583    "c.xor requires one of: rv_c",
1584    "c.zext.b requires one of: rv_zcb",
1585    "c.zext.h requires one of: rv_zcb",
1586    "c.zext.w requires one of: rv64_zcb",
1587    "cbo.clean requires one of: rv_zicbo",
1588    "cbo.flush requires one of: rv_zicbo",
1589    "cbo.inval requires one of: rv_zicbo",
1590    "cbo.zero requires one of: rv_zicbo",
1591    "clmul requires one of: rv_zbc, rv_zks, rv_zkn, rv_zk, rv_zbkc",
1592    "clmulh requires one of: rv_zbc, rv_zks, rv_zkn, rv_zk, rv_zbkc",
1593    "clmulr requires one of: rv_zbc",
1594    "clz requires one of: rv_zbb",
1595    "clzw requires one of: rv64_zbb",
1596    "cm.jalt requires one of: rv_zcmt",
1597    "cm.mva01s requires one of: rv_zcmp",
1598    "cm.mvsa01 requires one of: rv_zcmp",
1599    "cm.pop requires one of: rv_zcmp",
1600    "cm.popret requires one of: rv_zcmp",
1601    "cm.popretz requires one of: rv_zcmp",
1602    "cm.push requires one of: rv_zcmp",
1603    "cpop requires one of: rv_zbb",
1604    "cpopw requires one of: rv64_zbb",
1605    "csrc requires one of: rv_zicsr",
1606    "csrci requires one of: rv_zicsr",
1607    "csrr requires one of: rv_zicsr",
1608    "csrrc requires one of: rv_zicsr",
1609    "csrrci requires one of: rv_zicsr",
1610    "csrrs requires one of: rv_zicsr",
1611    "csrrsi requires one of: rv_zicsr",
1612    "csrrw requires one of: rv_zicsr",
1613    "csrrwi requires one of: rv_zicsr",
1614    "csrs requires one of: rv_zicsr",
1615    "csrsi requires one of: rv_zicsr",
1616    "csrw requires one of: rv_zicsr",
1617    "csrwi requires one of: rv_zicsr",
1618    "ctz requires one of: rv_zbb",
1619    "ctzw requires one of: rv64_zbb",
1620    "czero.eqz requires one of: rv_zicond",
1621    "czero.nez requires one of: rv_zicond",
1622    "div requires one of: rv_m",
1623    "divu requires one of: rv_m",
1624    "divuw requires one of: rv64_m",
1625    "divw requires one of: rv64_m",
1626    "dret requires one of: rv_sdext",
1627    "ebreak requires one of: rv_i",
1628    "ecall requires one of: rv_i",
1629    "fabs.d requires one of: rv_d",
1630    "fabs.h requires one of: rv_zfh",
1631    "fabs.q requires one of: rv_q",
1632    "fabs.s requires one of: rv_f",
1633    "fadd.d requires one of: rv_d",
1634    "fadd.h requires one of: rv_zfh",
1635    "fadd.q requires one of: rv_q",
1636    "fadd.s requires one of: rv_f",
1637    "fclass.d requires one of: rv_d",
1638    "fclass.h requires one of: rv_zfh",
1639    "fclass.q requires one of: rv_q",
1640    "fclass.s requires one of: rv_f",
1641    "fcvt.bf16.s requires one of: rv_zfbfmin",
1642    "fcvt.d.h requires one of: rv_d_zfhmin",
1643    "fcvt.d.l requires one of: rv64_d",
1644    "fcvt.d.lu requires one of: rv64_d",
1645    "fcvt.d.q requires one of: rv_q",
1646    "fcvt.d.s requires one of: rv_d",
1647    "fcvt.d.w requires one of: rv_d",
1648    "fcvt.d.wu requires one of: rv_d",
1649    "fcvt.h.d requires one of: rv_d_zfhmin",
1650    "fcvt.h.l requires one of: rv64_zfh",
1651    "fcvt.h.lu requires one of: rv64_zfh",
1652    "fcvt.h.q requires one of: rv_q_zfhmin",
1653    "fcvt.h.s requires one of: rv_zfhmin",
1654    "fcvt.h.w requires one of: rv_zfh",
1655    "fcvt.h.wu requires one of: rv_zfh",
1656    "fcvt.l.d requires one of: rv64_d",
1657    "fcvt.l.h requires one of: rv64_zfh",
1658    "fcvt.l.q requires one of: rv64_q",
1659    "fcvt.l.s requires one of: rv64_f",
1660    "fcvt.lu.d requires one of: rv64_d",
1661    "fcvt.lu.h requires one of: rv64_zfh",
1662    "fcvt.lu.q requires one of: rv64_q",
1663    "fcvt.lu.s requires one of: rv64_f",
1664    "fcvt.q.d requires one of: rv_q",
1665    "fcvt.q.h requires one of: rv_q_zfhmin",
1666    "fcvt.q.l requires one of: rv64_q",
1667    "fcvt.q.lu requires one of: rv64_q",
1668    "fcvt.q.s requires one of: rv_q",
1669    "fcvt.q.w requires one of: rv_q",
1670    "fcvt.q.wu requires one of: rv_q",
1671    "fcvt.s.bf16 requires one of: rv_zfbfmin",
1672    "fcvt.s.d requires one of: rv_d",
1673    "fcvt.s.h requires one of: rv_zfhmin",
1674    "fcvt.s.l requires one of: rv64_f",
1675    "fcvt.s.lu requires one of: rv64_f",
1676    "fcvt.s.q requires one of: rv_q",
1677    "fcvt.s.w requires one of: rv_f",
1678    "fcvt.s.wu requires one of: rv_f",
1679    "fcvt.w.d requires one of: rv_d",
1680    "fcvt.w.h requires one of: rv_zfh",
1681    "fcvt.w.q requires one of: rv_q",
1682    "fcvt.w.s requires one of: rv_f",
1683    "fcvt.wu.d requires one of: rv_d",
1684    "fcvt.wu.h requires one of: rv_zfh",
1685    "fcvt.wu.q requires one of: rv_q",
1686    "fcvt.wu.s requires one of: rv_f",
1687    "fcvtmod.w.d requires one of: rv_d_zfa",
1688    "fdiv.d requires one of: rv_d",
1689    "fdiv.h requires one of: rv_zfh",
1690    "fdiv.q requires one of: rv_q",
1691    "fdiv.s requires one of: rv_f",
1692    "fence requires one of: rv_i",
1693    "fence.i requires one of: rv_zifencei",
1694    "fence.tso requires one of: rv_i",
1695    "feq.d requires one of: rv_d",
1696    "feq.h requires one of: rv_zfh",
1697    "feq.q requires one of: rv_q",
1698    "feq.s requires one of: rv_f",
1699    "fld requires one of: rv_d",
1700    "fle.d requires one of: rv_d",
1701    "fle.h requires one of: rv_zfh",
1702    "fle.q requires one of: rv_q",
1703    "fle.s requires one of: rv_f",
1704    "fleq.d requires one of: rv_d_zfa",
1705    "fleq.h requires one of: rv_zfh_zfa",
1706    "fleq.q requires one of: rv_q_zfa",
1707    "fleq.s requires one of: rv_f_zfa",
1708    "flh requires one of: rv_zfhmin",
1709    "fli.d requires one of: rv_d_zfa",
1710    "fli.h requires one of: rv_zfh_zfa",
1711    "fli.q requires one of: rv_q_zfa",
1712    "fli.s requires one of: rv_f_zfa",
1713    "flq requires one of: rv_q",
1714    "flt.d requires one of: rv_d",
1715    "flt.h requires one of: rv_zfh",
1716    "flt.q requires one of: rv_q",
1717    "flt.s requires one of: rv_f",
1718    "fltq.d requires one of: rv_d_zfa",
1719    "fltq.h requires one of: rv_zfh_zfa",
1720    "fltq.q requires one of: rv_q_zfa",
1721    "fltq.s requires one of: rv_f_zfa",
1722    "flw requires one of: rv_f",
1723    "fmadd.d requires one of: rv_d",
1724    "fmadd.h requires one of: rv_zfh",
1725    "fmadd.q requires one of: rv_q",
1726    "fmadd.s requires one of: rv_f",
1727    "fmax.d requires one of: rv_d",
1728    "fmax.h requires one of: rv_zfh",
1729    "fmax.q requires one of: rv_q",
1730    "fmax.s requires one of: rv_f",
1731    "fmaxm.d requires one of: rv_d_zfa",
1732    "fmaxm.h requires one of: rv_zfh_zfa",
1733    "fmaxm.q requires one of: rv_q_zfa",
1734    "fmaxm.s requires one of: rv_f_zfa",
1735    "fmin.d requires one of: rv_d",
1736    "fmin.h requires one of: rv_zfh",
1737    "fmin.q requires one of: rv_q",
1738    "fmin.s requires one of: rv_f",
1739    "fminm.d requires one of: rv_d_zfa",
1740    "fminm.h requires one of: rv_zfh_zfa",
1741    "fminm.q requires one of: rv_q_zfa",
1742    "fminm.s requires one of: rv_f_zfa",
1743    "fmsub.d requires one of: rv_d",
1744    "fmsub.h requires one of: rv_zfh",
1745    "fmsub.q requires one of: rv_q",
1746    "fmsub.s requires one of: rv_f",
1747    "fmul.d requires one of: rv_d",
1748    "fmul.h requires one of: rv_zfh",
1749    "fmul.q requires one of: rv_q",
1750    "fmul.s requires one of: rv_f",
1751    "fmv.d requires one of: rv_d",
1752    "fmv.d.x requires one of: rv64_d",
1753    "fmv.h requires one of: rv_zfh",
1754    "fmv.h.x requires one of: rv_zfhmin",
1755    "fmv.q requires one of: rv_q",
1756    "fmv.s requires one of: rv_f",
1757    "fmv.s.x requires one of: rv_f",
1758    "fmv.w.x requires one of: rv_f",
1759    "fmv.x.d requires one of: rv64_d",
1760    "fmv.x.h requires one of: rv_zfhmin",
1761    "fmv.x.s requires one of: rv_f",
1762    "fmv.x.w requires one of: rv_f",
1763    "fmvh.x.d requires one of: rv32_d_zfa",
1764    "fmvh.x.q requires one of: rv64_q_zfa",
1765    "fmvp.d.x requires one of: rv32_d_zfa",
1766    "fmvp.q.x requires one of: rv64_q_zfa",
1767    "fneg.d requires one of: rv_d",
1768    "fneg.h requires one of: rv_zfh",
1769    "fneg.q requires one of: rv_q",
1770    "fneg.s requires one of: rv_f",
1771    "fnmadd.d requires one of: rv_d",
1772    "fnmadd.h requires one of: rv_zfh",
1773    "fnmadd.q requires one of: rv_q",
1774    "fnmadd.s requires one of: rv_f",
1775    "fnmsub.d requires one of: rv_d",
1776    "fnmsub.h requires one of: rv_zfh",
1777    "fnmsub.q requires one of: rv_q",
1778    "fnmsub.s requires one of: rv_f",
1779    "frcsr requires one of: rv_f",
1780    "frflags requires one of: rv_f",
1781    "fround.d requires one of: rv_d_zfa",
1782    "fround.h requires one of: rv_zfh_zfa",
1783    "fround.q requires one of: rv_q_zfa",
1784    "fround.s requires one of: rv_f_zfa",
1785    "froundnx.d requires one of: rv_d_zfa",
1786    "froundnx.h requires one of: rv_zfh_zfa",
1787    "froundnx.q requires one of: rv_q_zfa",
1788    "froundnx.s requires one of: rv_f_zfa",
1789    "frrm requires one of: rv_f",
1790    "fscsr requires one of: rv_f",
1791    "fsd requires one of: rv_d",
1792    "fsflags requires one of: rv_f",
1793    "fsflagsi requires one of: rv_f",
1794    "fsgnj.d requires one of: rv_d",
1795    "fsgnj.h requires one of: rv_zfh",
1796    "fsgnj.q requires one of: rv_q",
1797    "fsgnj.s requires one of: rv_f",
1798    "fsgnjn.d requires one of: rv_d",
1799    "fsgnjn.h requires one of: rv_zfh",
1800    "fsgnjn.q requires one of: rv_q",
1801    "fsgnjn.s requires one of: rv_f",
1802    "fsgnjx.d requires one of: rv_d",
1803    "fsgnjx.h requires one of: rv_zfh",
1804    "fsgnjx.q requires one of: rv_q",
1805    "fsgnjx.s requires one of: rv_f",
1806    "fsh requires one of: rv_zfhmin",
1807    "fsq requires one of: rv_q",
1808    "fsqrt.d requires one of: rv_d",
1809    "fsqrt.h requires one of: rv_zfh",
1810    "fsqrt.q requires one of: rv_q",
1811    "fsqrt.s requires one of: rv_f",
1812    "fsrm requires one of: rv_f",
1813    "fsrmi requires one of: rv_f",
1814    "fsub.d requires one of: rv_d",
1815    "fsub.h requires one of: rv_zfh",
1816    "fsub.q requires one of: rv_q",
1817    "fsub.s requires one of: rv_f",
1818    "fsw requires one of: rv_f",
1819    "hfence.gvma requires one of: rv_h",
1820    "hfence.vvma requires one of: rv_h",
1821    "hinval.gvma requires one of: rv_svinval_h",
1822    "hinval.vvma requires one of: rv_svinval_h",
1823    "hlv.b requires one of: rv_h",
1824    "hlv.bu requires one of: rv_h",
1825    "hlv.d requires one of: rv64_h",
1826    "hlv.h requires one of: rv_h",
1827    "hlv.hu requires one of: rv_h",
1828    "hlv.w requires one of: rv_h",
1829    "hlv.wu requires one of: rv64_h",
1830    "hlvx.hu requires one of: rv_h",
1831    "hlvx.wu requires one of: rv_h",
1832    "hsv.b requires one of: rv_h",
1833    "hsv.d requires one of: rv64_h",
1834    "hsv.h requires one of: rv_h",
1835    "hsv.w requires one of: rv_h",
1836    "j requires one of: rv_i",
1837    "jal requires one of: rv_i",
1838    "jal.pseudo requires one of: rv_i",
1839    "jalr requires one of: rv_i",
1840    "jalr.pseudo requires one of: rv_i",
1841    "jr requires one of: rv_i",
1842    "lb requires one of: rv_i",
1843    "lbu requires one of: rv_i",
1844    "ld requires one of: rv64_i",
1845    "lh requires one of: rv_i",
1846    "lhu requires one of: rv_i",
1847    "lpad requires one of: rv_zicfilp",
1848    "lr.d requires one of: rv64_a",
1849    "lr.w requires one of: rv_a",
1850    "lui requires one of: rv_i",
1851    "lw requires one of: rv_i",
1852    "lwu requires one of: rv64_i",
1853    "max requires one of: rv_zbb",
1854    "maxu requires one of: rv_zbb",
1855    "min requires one of: rv_zbb",
1856    "minu requires one of: rv_zbb",
1857    "mnret requires one of: rv_smrnmi",
1858    "mop.r.0 requires one of: rv_zimop",
1859    "mop.r.1 requires one of: rv_zimop",
1860    "mop.r.10 requires one of: rv_zimop",
1861    "mop.r.11 requires one of: rv_zimop",
1862    "mop.r.12 requires one of: rv_zimop",
1863    "mop.r.13 requires one of: rv_zimop",
1864    "mop.r.14 requires one of: rv_zimop",
1865    "mop.r.15 requires one of: rv_zimop",
1866    "mop.r.16 requires one of: rv_zimop",
1867    "mop.r.17 requires one of: rv_zimop",
1868    "mop.r.18 requires one of: rv_zimop",
1869    "mop.r.19 requires one of: rv_zimop",
1870    "mop.r.2 requires one of: rv_zimop",
1871    "mop.r.20 requires one of: rv_zimop",
1872    "mop.r.21 requires one of: rv_zimop",
1873    "mop.r.22 requires one of: rv_zimop",
1874    "mop.r.23 requires one of: rv_zimop",
1875    "mop.r.24 requires one of: rv_zimop",
1876    "mop.r.25 requires one of: rv_zimop",
1877    "mop.r.26 requires one of: rv_zimop",
1878    "mop.r.27 requires one of: rv_zimop",
1879    "mop.r.28 requires one of: rv_zimop",
1880    "mop.r.29 requires one of: rv_zimop",
1881    "mop.r.3 requires one of: rv_zimop",
1882    "mop.r.30 requires one of: rv_zimop",
1883    "mop.r.31 requires one of: rv_zimop",
1884    "mop.r.4 requires one of: rv_zimop",
1885    "mop.r.5 requires one of: rv_zimop",
1886    "mop.r.6 requires one of: rv_zimop",
1887    "mop.r.7 requires one of: rv_zimop",
1888    "mop.r.8 requires one of: rv_zimop",
1889    "mop.r.9 requires one of: rv_zimop",
1890    "mop.r.n requires one of: rv_zimop",
1891    "mop.rr.0 requires one of: rv_zimop",
1892    "mop.rr.1 requires one of: rv_zimop",
1893    "mop.rr.2 requires one of: rv_zimop",
1894    "mop.rr.3 requires one of: rv_zimop",
1895    "mop.rr.4 requires one of: rv_zimop",
1896    "mop.rr.5 requires one of: rv_zimop",
1897    "mop.rr.6 requires one of: rv_zimop",
1898    "mop.rr.7 requires one of: rv_zimop",
1899    "mop.rr.n requires one of: rv_zimop",
1900    "mret requires one of: rv_system",
1901    "mul requires one of: rv_m",
1902    "mulh requires one of: rv_m",
1903    "mulhsu requires one of: rv_m",
1904    "mulhu requires one of: rv_m",
1905    "mulw requires one of: rv64_m",
1906    "mv requires one of: rv_i",
1907    "neg requires one of: rv_i",
1908    "nop requires one of: rv_i",
1909    "ntl.all requires one of: rv_zihintntl",
1910    "ntl.p1 requires one of: rv_zihintntl",
1911    "ntl.pall requires one of: rv_zihintntl",
1912    "ntl.s1 requires one of: rv_zihintntl",
1913    "or requires one of: rv_i",
1914    "orc.b requires one of: rv_zbb",
1915    "ori requires one of: rv_i",
1916    "orn requires one of: rv_zbb, rv_zks, rv_zkn, rv_zk, rv_zbkb",
1917    "pack requires one of: rv_zbkb, rv_zks, rv_zkn, rv_zk",
1918    "packh requires one of: rv_zbkb, rv_zks, rv_zkn, rv_zk",
1919    "packw requires one of: rv64_zbkb, rv64_zks, rv64_zkn, rv64_zk",
1920    "pause requires one of: rv_i",
1921    "prefetch.i requires one of: rv_zicbo",
1922    "prefetch.r requires one of: rv_zicbo",
1923    "prefetch.w requires one of: rv_zicbo",
1924    "rdcycle requires one of: rv_zicntr",
1925    "rdcycleh requires one of: rv32_zicntr",
1926    "rdinstret requires one of: rv_zicntr",
1927    "rdinstreth requires one of: rv32_zicntr",
1928    "rdtime requires one of: rv_zicntr",
1929    "rdtimeh requires one of: rv32_zicntr",
1930    "rem requires one of: rv_m",
1931    "remu requires one of: rv_m",
1932    "remuw requires one of: rv64_m",
1933    "remw requires one of: rv64_m",
1934    "ret requires one of: rv_i",
1935    "rev8 requires one of: rv64_zbb, rv64_zks, rv64_zkn, rv64_zk, rv64_zbkb",
1936    "rev8.rv32 requires one of: rv32_zbkb, rv32_zks, rv32_zkn, rv32_zk, rv32_zbb",
1937    "rol requires one of: rv_zbb, rv_zks, rv_zkn, rv_zk, rv_zbkb",
1938    "rolw requires one of: rv64_zbb, rv64_zks, rv64_zkn, rv64_zk, rv64_zbkb",
1939    "ror requires one of: rv_zbb, rv_zks, rv_zkn, rv_zk, rv_zbkb",
1940    "rori requires one of: rv64_zbb, rv64_zks, rv64_zkn, rv64_zk, rv64_zbkb",
1941    "rori.rv32 requires one of: rv32_zks, rv32_zkn, rv32_zk, rv32_zbkb, rv32_zbb",
1942    "roriw requires one of: rv64_zbb, rv64_zks, rv64_zkn, rv64_zk, rv64_zbkb",
1943    "rorw requires one of: rv64_zbb, rv64_zks, rv64_zkn, rv64_zk, rv64_zbkb",
1944    "sb requires one of: rv_i",
1945    "sbreak requires one of: rv_i",
1946    "sc.d requires one of: rv64_a",
1947    "sc.w requires one of: rv_a",
1948    "scall requires one of: rv_i",
1949    "sctrclr requires one of: rv_ssctr",
1950    "sd requires one of: rv64_i",
1951    "seqz requires one of: rv_i",
1952    "sext.b requires one of: rv_zbb",
1953    "sext.h requires one of: rv_zbb",
1954    "sext.w requires one of: rv64_i",
1955    "sfence.inval.ir requires one of: rv_svinval",
1956    "sfence.vma requires one of: rv_s",
1957    "sfence.w.inval requires one of: rv_svinval",
1958    "sgtz requires one of: rv_i",
1959    "sh requires one of: rv_i",
1960    "sh1add requires one of: rv_zba",
1961    "sh1add.uw requires one of: rv64_zba",
1962    "sh2add requires one of: rv_zba",
1963    "sh2add.uw requires one of: rv64_zba",
1964    "sh3add requires one of: rv_zba",
1965    "sh3add.uw requires one of: rv64_zba",
1966    "sha256sig0 requires one of: rv_zknh, rv_zkn, rv_zk",
1967    "sha256sig1 requires one of: rv_zknh, rv_zkn, rv_zk",
1968    "sha256sum0 requires one of: rv_zknh, rv_zkn, rv_zk",
1969    "sha256sum1 requires one of: rv_zknh, rv_zkn, rv_zk",
1970    "sha512sig0 requires one of: rv64_zknh, rv64_zkn, rv64_zk",
1971    "sha512sig0h requires one of: rv32_zknh, rv32_zkn, rv32_zk",
1972    "sha512sig0l requires one of: rv32_zknh, rv32_zkn, rv32_zk",
1973    "sha512sig1 requires one of: rv64_zknh, rv64_zkn, rv64_zk",
1974    "sha512sig1h requires one of: rv32_zknh, rv32_zkn, rv32_zk",
1975    "sha512sig1l requires one of: rv32_zknh, rv32_zkn, rv32_zk",
1976    "sha512sum0 requires one of: rv64_zknh, rv64_zkn, rv64_zk",
1977    "sha512sum0r requires one of: rv32_zknh, rv32_zkn, rv32_zk",
1978    "sha512sum1 requires one of: rv64_zknh, rv64_zkn, rv64_zk",
1979    "sha512sum1r requires one of: rv32_zknh, rv32_zkn, rv32_zk",
1980    "sinval.vma requires one of: rv_svinval",
1981    "sll requires one of: rv_i",
1982    "slli requires one of: rv64_i, rv32_i",
1983    "slli.rv32 requires one of: rv32_i",
1984    "slli.uw requires one of: rv64_zba",
1985    "slliw requires one of: rv64_i",
1986    "sllw requires one of: rv64_i",
1987    "slt requires one of: rv_i",
1988    "slti requires one of: rv_i",
1989    "sltiu requires one of: rv_i",
1990    "sltu requires one of: rv_i",
1991    "sltz requires one of: rv_i",
1992    "sm3p0 requires one of: rv_zksh, rv_zks",
1993    "sm3p1 requires one of: rv_zksh, rv_zks",
1994    "sm4ed requires one of: rv_zksed, rv_zks",
1995    "sm4ks requires one of: rv_zksed, rv_zks",
1996    "snez requires one of: rv_i",
1997    "sra requires one of: rv_i",
1998    "srai requires one of: rv64_i, rv32_i",
1999    "srai.rv32 requires one of: rv32_i",
2000    "sraiw requires one of: rv64_i",
2001    "sraw requires one of: rv64_i",
2002    "sret requires one of: rv_s",
2003    "srl requires one of: rv_i",
2004    "srli requires one of: rv64_i, rv32_i",
2005    "srli.rv32 requires one of: rv32_i",
2006    "srliw requires one of: rv64_i",
2007    "srlw requires one of: rv64_i",
2008    "ssamoswap.d requires one of: rv_zicfiss",
2009    "ssamoswap.w requires one of: rv_zicfiss",
2010    "sspopchk.x1 requires one of: rv_zicfiss",
2011    "sspopchk.x5 requires one of: rv_zicfiss",
2012    "sspush.x1 requires one of: rv_zicfiss",
2013    "sspush.x5 requires one of: rv_zicfiss",
2014    "ssrdp requires one of: rv_zicfiss",
2015    "sub requires one of: rv_i",
2016    "subw requires one of: rv64_i",
2017    "sw requires one of: rv_i",
2018    "unzip requires one of: rv32_zbkb, rv32_zks, rv32_zkn, rv32_zk",
2019    "vaadd.vv requires one of: rv_v",
2020    "vaadd.vx requires one of: rv_v",
2021    "vaaddu.vv requires one of: rv_v",
2022    "vaaddu.vx requires one of: rv_v",
2023    "vadc.vim requires one of: rv_v",
2024    "vadc.vvm requires one of: rv_v",
2025    "vadc.vxm requires one of: rv_v",
2026    "vadd.vi requires one of: rv_v",
2027    "vadd.vv requires one of: rv_v",
2028    "vadd.vx requires one of: rv_v",
2029    "vaesdf.vs requires one of: rv_zvkned, rv_zvkn",
2030    "vaesdf.vv requires one of: rv_zvkned, rv_zvkn",
2031    "vaesdm.vs requires one of: rv_zvkned, rv_zvkn",
2032    "vaesdm.vv requires one of: rv_zvkned, rv_zvkn",
2033    "vaesef.vs requires one of: rv_zvkned, rv_zvkn",
2034    "vaesef.vv requires one of: rv_zvkned, rv_zvkn",
2035    "vaesem.vs requires one of: rv_zvkned, rv_zvkn",
2036    "vaesem.vv requires one of: rv_zvkned, rv_zvkn",
2037    "vaeskf1.vi requires one of: rv_zvkned, rv_zvkn",
2038    "vaeskf2.vi requires one of: rv_zvkned, rv_zvkn",
2039    "vaesz.vs requires one of: rv_zvkned, rv_zvkn",
2040    "vand.vi requires one of: rv_v",
2041    "vand.vv requires one of: rv_v",
2042    "vand.vx requires one of: rv_v",
2043    "vandn.vv requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2044    "vandn.vx requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2045    "vasub.vv requires one of: rv_v",
2046    "vasub.vx requires one of: rv_v",
2047    "vasubu.vv requires one of: rv_v",
2048    "vasubu.vx requires one of: rv_v",
2049    "vbrev8.v requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2050    "vbrev.v requires one of: rv_zvbb",
2051    "vclmul.vv requires one of: rv_zvbc",
2052    "vclmul.vx requires one of: rv_zvbc",
2053    "vclmulh.vv requires one of: rv_zvbc",
2054    "vclmulh.vx requires one of: rv_zvbc",
2055    "vclz.v requires one of: rv_zvbb",
2056    "vcompress.vm requires one of: rv_v",
2057    "vcpop.m requires one of: rv_v",
2058    "vcpop.v requires one of: rv_zvbb",
2059    "vctz.v requires one of: rv_zvbb",
2060    "vdiv.vv requires one of: rv_v",
2061    "vdiv.vx requires one of: rv_v",
2062    "vdivu.vv requires one of: rv_v",
2063    "vdivu.vx requires one of: rv_v",
2064    "vfadd.vf requires one of: rv_v",
2065    "vfadd.vv requires one of: rv_v",
2066    "vfclass.v requires one of: rv_v",
2067    "vfcvt.f.x.v requires one of: rv_v",
2068    "vfcvt.f.xu.v requires one of: rv_v",
2069    "vfcvt.rtz.x.f.v requires one of: rv_v",
2070    "vfcvt.rtz.xu.f.v requires one of: rv_v",
2071    "vfcvt.x.f.v requires one of: rv_v",
2072    "vfcvt.xu.f.v requires one of: rv_v",
2073    "vfdiv.vf requires one of: rv_v",
2074    "vfdiv.vv requires one of: rv_v",
2075    "vfirst.m requires one of: rv_v",
2076    "vfmacc.vf requires one of: rv_v",
2077    "vfmacc.vv requires one of: rv_v",
2078    "vfmadd.vf requires one of: rv_v",
2079    "vfmadd.vv requires one of: rv_v",
2080    "vfmax.vf requires one of: rv_v",
2081    "vfmax.vv requires one of: rv_v",
2082    "vfmerge.vfm requires one of: rv_v",
2083    "vfmin.vf requires one of: rv_v",
2084    "vfmin.vv requires one of: rv_v",
2085    "vfmsac.vf requires one of: rv_v",
2086    "vfmsac.vv requires one of: rv_v",
2087    "vfmsub.vf requires one of: rv_v",
2088    "vfmsub.vv requires one of: rv_v",
2089    "vfmul.vf requires one of: rv_v",
2090    "vfmul.vv requires one of: rv_v",
2091    "vfmv.f.s requires one of: rv_v",
2092    "vfmv.s.f requires one of: rv_v",
2093    "vfmv.v.f requires one of: rv_v",
2094    "vfncvt.f.f.w requires one of: rv_v",
2095    "vfncvt.f.x.w requires one of: rv_v",
2096    "vfncvt.f.xu.w requires one of: rv_v",
2097    "vfncvt.rod.f.f.w requires one of: rv_v",
2098    "vfncvt.rtz.x.f.w requires one of: rv_v",
2099    "vfncvt.rtz.xu.f.w requires one of: rv_v",
2100    "vfncvt.x.f.w requires one of: rv_v",
2101    "vfncvt.xu.f.w requires one of: rv_v",
2102    "vfncvtbf16.f.f.w requires one of: rv_zvfbfmin",
2103    "vfnmacc.vf requires one of: rv_v",
2104    "vfnmacc.vv requires one of: rv_v",
2105    "vfnmadd.vf requires one of: rv_v",
2106    "vfnmadd.vv requires one of: rv_v",
2107    "vfnmsac.vf requires one of: rv_v",
2108    "vfnmsac.vv requires one of: rv_v",
2109    "vfnmsub.vf requires one of: rv_v",
2110    "vfnmsub.vv requires one of: rv_v",
2111    "vfrdiv.vf requires one of: rv_v",
2112    "vfrec7.v requires one of: rv_v",
2113    "vfredmax.vs requires one of: rv_v",
2114    "vfredmin.vs requires one of: rv_v",
2115    "vfredosum.vs requires one of: rv_v",
2116    "vfredsum.vs requires one of: rv_v_aliases",
2117    "vfredusum.vs requires one of: rv_v",
2118    "vfrsqrt7.v requires one of: rv_v",
2119    "vfrsub.vf requires one of: rv_v",
2120    "vfsgnj.vf requires one of: rv_v",
2121    "vfsgnj.vv requires one of: rv_v",
2122    "vfsgnjn.vf requires one of: rv_v",
2123    "vfsgnjn.vv requires one of: rv_v",
2124    "vfsgnjx.vf requires one of: rv_v",
2125    "vfsgnjx.vv requires one of: rv_v",
2126    "vfslide1down.vf requires one of: rv_v",
2127    "vfslide1up.vf requires one of: rv_v",
2128    "vfsqrt.v requires one of: rv_v",
2129    "vfsub.vf requires one of: rv_v",
2130    "vfsub.vv requires one of: rv_v",
2131    "vfwadd.vf requires one of: rv_v",
2132    "vfwadd.vv requires one of: rv_v",
2133    "vfwadd.wf requires one of: rv_v",
2134    "vfwadd.wv requires one of: rv_v",
2135    "vfwcvt.f.f.v requires one of: rv_v",
2136    "vfwcvt.f.x.v requires one of: rv_v",
2137    "vfwcvt.f.xu.v requires one of: rv_v",
2138    "vfwcvt.rtz.x.f.v requires one of: rv_v",
2139    "vfwcvt.rtz.xu.f.v requires one of: rv_v",
2140    "vfwcvt.x.f.v requires one of: rv_v",
2141    "vfwcvt.xu.f.v requires one of: rv_v",
2142    "vfwcvtbf16.f.f.v requires one of: rv_zvfbfmin",
2143    "vfwmacc.vf requires one of: rv_v",
2144    "vfwmacc.vv requires one of: rv_v",
2145    "vfwmaccbf16.vf requires one of: rv_zvfbfwma",
2146    "vfwmaccbf16.vv requires one of: rv_zvfbfwma",
2147    "vfwmsac.vf requires one of: rv_v",
2148    "vfwmsac.vv requires one of: rv_v",
2149    "vfwmul.vf requires one of: rv_v",
2150    "vfwmul.vv requires one of: rv_v",
2151    "vfwnmacc.vf requires one of: rv_v",
2152    "vfwnmacc.vv requires one of: rv_v",
2153    "vfwnmsac.vf requires one of: rv_v",
2154    "vfwnmsac.vv requires one of: rv_v",
2155    "vfwredosum.vs requires one of: rv_v",
2156    "vfwredsum.vs requires one of: rv_v_aliases",
2157    "vfwredusum.vs requires one of: rv_v",
2158    "vfwsub.vf requires one of: rv_v",
2159    "vfwsub.vv requires one of: rv_v",
2160    "vfwsub.wf requires one of: rv_v",
2161    "vfwsub.wv requires one of: rv_v",
2162    "vghsh.vv requires one of: rv_zvkg",
2163    "vgmul.vv requires one of: rv_zvkg",
2164    "vid.v requires one of: rv_v",
2165    "viota.m requires one of: rv_v",
2166    "vl1r.v requires one of: rv_v_aliases",
2167    "vl1re16.v requires one of: rv_v",
2168    "vl1re32.v requires one of: rv_v",
2169    "vl1re64.v requires one of: rv_v",
2170    "vl1re8.v requires one of: rv_v",
2171    "vl2r.v requires one of: rv_v_aliases",
2172    "vl2re16.v requires one of: rv_v",
2173    "vl2re32.v requires one of: rv_v",
2174    "vl2re64.v requires one of: rv_v",
2175    "vl2re8.v requires one of: rv_v",
2176    "vl4r.v requires one of: rv_v_aliases",
2177    "vl4re16.v requires one of: rv_v",
2178    "vl4re32.v requires one of: rv_v",
2179    "vl4re64.v requires one of: rv_v",
2180    "vl4re8.v requires one of: rv_v",
2181    "vl8r.v requires one of: rv_v_aliases",
2182    "vl8re16.v requires one of: rv_v",
2183    "vl8re32.v requires one of: rv_v",
2184    "vl8re64.v requires one of: rv_v",
2185    "vl8re8.v requires one of: rv_v",
2186    "vle16.v requires one of: rv_v",
2187    "vle16ff.v requires one of: rv_v",
2188    "vle1.v requires one of: rv_v_aliases",
2189    "vle32.v requires one of: rv_v",
2190    "vle32ff.v requires one of: rv_v",
2191    "vle64.v requires one of: rv_v",
2192    "vle64ff.v requires one of: rv_v",
2193    "vle8.v requires one of: rv_v",
2194    "vle8ff.v requires one of: rv_v",
2195    "vlm.v requires one of: rv_v",
2196    "vloxei16.v requires one of: rv_v",
2197    "vloxei32.v requires one of: rv_v",
2198    "vloxei64.v requires one of: rv_v",
2199    "vloxei8.v requires one of: rv_v",
2200    "vlse16.v requires one of: rv_v",
2201    "vlse32.v requires one of: rv_v",
2202    "vlse64.v requires one of: rv_v",
2203    "vlse8.v requires one of: rv_v",
2204    "vluxei16.v requires one of: rv_v",
2205    "vluxei32.v requires one of: rv_v",
2206    "vluxei64.v requires one of: rv_v",
2207    "vluxei8.v requires one of: rv_v",
2208    "vmacc.vv requires one of: rv_v",
2209    "vmacc.vx requires one of: rv_v",
2210    "vmadc.vi requires one of: rv_v",
2211    "vmadc.vim requires one of: rv_v",
2212    "vmadc.vv requires one of: rv_v",
2213    "vmadc.vvm requires one of: rv_v",
2214    "vmadc.vx requires one of: rv_v",
2215    "vmadc.vxm requires one of: rv_v",
2216    "vmadd.vv requires one of: rv_v",
2217    "vmadd.vx requires one of: rv_v",
2218    "vmand.mm requires one of: rv_v",
2219    "vmandn.mm requires one of: rv_v",
2220    "vmandnot.mm requires one of: rv_v_aliases",
2221    "vmax.vv requires one of: rv_v",
2222    "vmax.vx requires one of: rv_v",
2223    "vmaxu.vv requires one of: rv_v",
2224    "vmaxu.vx requires one of: rv_v",
2225    "vmerge.vim requires one of: rv_v",
2226    "vmerge.vvm requires one of: rv_v",
2227    "vmerge.vxm requires one of: rv_v",
2228    "vmfeq.vf requires one of: rv_v",
2229    "vmfeq.vv requires one of: rv_v",
2230    "vmfge.vf requires one of: rv_v",
2231    "vmfgt.vf requires one of: rv_v",
2232    "vmfle.vf requires one of: rv_v",
2233    "vmfle.vv requires one of: rv_v",
2234    "vmflt.vf requires one of: rv_v",
2235    "vmflt.vv requires one of: rv_v",
2236    "vmfne.vf requires one of: rv_v",
2237    "vmfne.vv requires one of: rv_v",
2238    "vmin.vv requires one of: rv_v",
2239    "vmin.vx requires one of: rv_v",
2240    "vminu.vv requires one of: rv_v",
2241    "vminu.vx requires one of: rv_v",
2242    "vmnand.mm requires one of: rv_v",
2243    "vmnor.mm requires one of: rv_v",
2244    "vmor.mm requires one of: rv_v",
2245    "vmorn.mm requires one of: rv_v",
2246    "vmornot.mm requires one of: rv_v_aliases",
2247    "vmsbc.vv requires one of: rv_v",
2248    "vmsbc.vvm requires one of: rv_v",
2249    "vmsbc.vx requires one of: rv_v",
2250    "vmsbc.vxm requires one of: rv_v",
2251    "vmsbf.m requires one of: rv_v",
2252    "vmseq.vi requires one of: rv_v",
2253    "vmseq.vv requires one of: rv_v",
2254    "vmseq.vx requires one of: rv_v",
2255    "vmsgt.vi requires one of: rv_v",
2256    "vmsgt.vx requires one of: rv_v",
2257    "vmsgtu.vi requires one of: rv_v",
2258    "vmsgtu.vx requires one of: rv_v",
2259    "vmsif.m requires one of: rv_v",
2260    "vmsle.vi requires one of: rv_v",
2261    "vmsle.vv requires one of: rv_v",
2262    "vmsle.vx requires one of: rv_v",
2263    "vmsleu.vi requires one of: rv_v",
2264    "vmsleu.vv requires one of: rv_v",
2265    "vmsleu.vx requires one of: rv_v",
2266    "vmslt.vv requires one of: rv_v",
2267    "vmslt.vx requires one of: rv_v",
2268    "vmsltu.vv requires one of: rv_v",
2269    "vmsltu.vx requires one of: rv_v",
2270    "vmsne.vi requires one of: rv_v",
2271    "vmsne.vv requires one of: rv_v",
2272    "vmsne.vx requires one of: rv_v",
2273    "vmsof.m requires one of: rv_v",
2274    "vmul.vv requires one of: rv_v",
2275    "vmul.vx requires one of: rv_v",
2276    "vmulh.vv requires one of: rv_v",
2277    "vmulh.vx requires one of: rv_v",
2278    "vmulhsu.vv requires one of: rv_v",
2279    "vmulhsu.vx requires one of: rv_v",
2280    "vmulhu.vv requires one of: rv_v",
2281    "vmulhu.vx requires one of: rv_v",
2282    "vmv1r.v requires one of: rv_v",
2283    "vmv2r.v requires one of: rv_v",
2284    "vmv4r.v requires one of: rv_v",
2285    "vmv8r.v requires one of: rv_v",
2286    "vmv.s.x requires one of: rv_v",
2287    "vmv.v.i requires one of: rv_v",
2288    "vmv.v.v requires one of: rv_v",
2289    "vmv.v.x requires one of: rv_v",
2290    "vmv.x.s requires one of: rv_v",
2291    "vmxnor.mm requires one of: rv_v",
2292    "vmxor.mm requires one of: rv_v",
2293    "vnclip.wi requires one of: rv_v",
2294    "vnclip.wv requires one of: rv_v",
2295    "vnclip.wx requires one of: rv_v",
2296    "vnclipu.wi requires one of: rv_v",
2297    "vnclipu.wv requires one of: rv_v",
2298    "vnclipu.wx requires one of: rv_v",
2299    "vnmsac.vv requires one of: rv_v",
2300    "vnmsac.vx requires one of: rv_v",
2301    "vnmsub.vv requires one of: rv_v",
2302    "vnmsub.vx requires one of: rv_v",
2303    "vnsra.wi requires one of: rv_v",
2304    "vnsra.wv requires one of: rv_v",
2305    "vnsra.wx requires one of: rv_v",
2306    "vnsrl.wi requires one of: rv_v",
2307    "vnsrl.wv requires one of: rv_v",
2308    "vnsrl.wx requires one of: rv_v",
2309    "vor.vi requires one of: rv_v",
2310    "vor.vv requires one of: rv_v",
2311    "vor.vx requires one of: rv_v",
2312    "vpopc.m requires one of: rv_v_aliases",
2313    "vredand.vs requires one of: rv_v",
2314    "vredmax.vs requires one of: rv_v",
2315    "vredmaxu.vs requires one of: rv_v",
2316    "vredmin.vs requires one of: rv_v",
2317    "vredminu.vs requires one of: rv_v",
2318    "vredor.vs requires one of: rv_v",
2319    "vredsum.vs requires one of: rv_v",
2320    "vredxor.vs requires one of: rv_v",
2321    "vrem.vv requires one of: rv_v",
2322    "vrem.vx requires one of: rv_v",
2323    "vremu.vv requires one of: rv_v",
2324    "vremu.vx requires one of: rv_v",
2325    "vrev8.v requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2326    "vrgather.vi requires one of: rv_v",
2327    "vrgather.vv requires one of: rv_v",
2328    "vrgather.vx requires one of: rv_v",
2329    "vrgatherei16.vv requires one of: rv_v",
2330    "vrol.vv requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2331    "vrol.vx requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2332    "vror.vi requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2333    "vror.vv requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2334    "vror.vx requires one of: rv_zvbb, rv_zvks, rv_zvkn",
2335    "vrsub.vi requires one of: rv_v",
2336    "vrsub.vx requires one of: rv_v",
2337    "vs1r.v requires one of: rv_v",
2338    "vs2r.v requires one of: rv_v",
2339    "vs4r.v requires one of: rv_v",
2340    "vs8r.v requires one of: rv_v",
2341    "vsadd.vi requires one of: rv_v",
2342    "vsadd.vv requires one of: rv_v",
2343    "vsadd.vx requires one of: rv_v",
2344    "vsaddu.vi requires one of: rv_v",
2345    "vsaddu.vv requires one of: rv_v",
2346    "vsaddu.vx requires one of: rv_v",
2347    "vsbc.vvm requires one of: rv_v",
2348    "vsbc.vxm requires one of: rv_v",
2349    "vse16.v requires one of: rv_v",
2350    "vse1.v requires one of: rv_v_aliases",
2351    "vse32.v requires one of: rv_v",
2352    "vse64.v requires one of: rv_v",
2353    "vse8.v requires one of: rv_v",
2354    "vsetivli requires one of: rv_v",
2355    "vsetvl requires one of: rv_v",
2356    "vsetvli requires one of: rv_v",
2357    "vsext.vf2 requires one of: rv_v",
2358    "vsext.vf4 requires one of: rv_v",
2359    "vsext.vf8 requires one of: rv_v",
2360    "vsha2ch.vv requires one of: rv_zvknha, rv_zvknhb, rv_zvkn",
2361    "vsha2cl.vv requires one of: rv_zvknha, rv_zvknhb, rv_zvkn",
2362    "vsha2ms.vv requires one of: rv_zvknha, rv_zvknhb, rv_zvkn",
2363    "vslide1down.vx requires one of: rv_v",
2364    "vslide1up.vx requires one of: rv_v",
2365    "vslidedown.vi requires one of: rv_v",
2366    "vslidedown.vx requires one of: rv_v",
2367    "vslideup.vi requires one of: rv_v",
2368    "vslideup.vx requires one of: rv_v",
2369    "vsll.vi requires one of: rv_v",
2370    "vsll.vv requires one of: rv_v",
2371    "vsll.vx requires one of: rv_v",
2372    "vsm3c.vi requires one of: rv_zvksh, rv_zvks",
2373    "vsm3me.vv requires one of: rv_zvksh, rv_zvks",
2374    "vsm4k.vi requires one of: rv_zvksed, rv_zvks",
2375    "vsm4r.vs requires one of: rv_zvksed, rv_zvks",
2376    "vsm4r.vv requires one of: rv_zvksed, rv_zvks",
2377    "vsm.v requires one of: rv_v",
2378    "vsmul.vv requires one of: rv_v",
2379    "vsmul.vx requires one of: rv_v",
2380    "vsoxei16.v requires one of: rv_v",
2381    "vsoxei32.v requires one of: rv_v",
2382    "vsoxei64.v requires one of: rv_v",
2383    "vsoxei8.v requires one of: rv_v",
2384    "vsra.vi requires one of: rv_v",
2385    "vsra.vv requires one of: rv_v",
2386    "vsra.vx requires one of: rv_v",
2387    "vsrl.vi requires one of: rv_v",
2388    "vsrl.vv requires one of: rv_v",
2389    "vsrl.vx requires one of: rv_v",
2390    "vsse16.v requires one of: rv_v",
2391    "vsse32.v requires one of: rv_v",
2392    "vsse64.v requires one of: rv_v",
2393    "vsse8.v requires one of: rv_v",
2394    "vssra.vi requires one of: rv_v",
2395    "vssra.vv requires one of: rv_v",
2396    "vssra.vx requires one of: rv_v",
2397    "vssrl.vi requires one of: rv_v",
2398    "vssrl.vv requires one of: rv_v",
2399    "vssrl.vx requires one of: rv_v",
2400    "vssub.vv requires one of: rv_v",
2401    "vssub.vx requires one of: rv_v",
2402    "vssubu.vv requires one of: rv_v",
2403    "vssubu.vx requires one of: rv_v",
2404    "vsub.vv requires one of: rv_v",
2405    "vsub.vx requires one of: rv_v",
2406    "vsuxei16.v requires one of: rv_v",
2407    "vsuxei32.v requires one of: rv_v",
2408    "vsuxei64.v requires one of: rv_v",
2409    "vsuxei8.v requires one of: rv_v",
2410    "vwadd.vv requires one of: rv_v",
2411    "vwadd.vx requires one of: rv_v",
2412    "vwadd.wv requires one of: rv_v",
2413    "vwadd.wx requires one of: rv_v",
2414    "vwaddu.vv requires one of: rv_v",
2415    "vwaddu.vx requires one of: rv_v",
2416    "vwaddu.wv requires one of: rv_v",
2417    "vwaddu.wx requires one of: rv_v",
2418    "vwmacc.vv requires one of: rv_v",
2419    "vwmacc.vx requires one of: rv_v",
2420    "vwmaccsu.vv requires one of: rv_v",
2421    "vwmaccsu.vx requires one of: rv_v",
2422    "vwmaccu.vv requires one of: rv_v",
2423    "vwmaccu.vx requires one of: rv_v",
2424    "vwmaccus.vx requires one of: rv_v",
2425    "vwmul.vv requires one of: rv_v",
2426    "vwmul.vx requires one of: rv_v",
2427    "vwmulsu.vv requires one of: rv_v",
2428    "vwmulsu.vx requires one of: rv_v",
2429    "vwmulu.vv requires one of: rv_v",
2430    "vwmulu.vx requires one of: rv_v",
2431    "vwredsum.vs requires one of: rv_v",
2432    "vwredsumu.vs requires one of: rv_v",
2433    "vwsll.vi requires one of: rv_zvbb",
2434    "vwsll.vv requires one of: rv_zvbb",
2435    "vwsll.vx requires one of: rv_zvbb",
2436    "vwsub.vv requires one of: rv_v",
2437    "vwsub.vx requires one of: rv_v",
2438    "vwsub.wv requires one of: rv_v",
2439    "vwsub.wx requires one of: rv_v",
2440    "vwsubu.vv requires one of: rv_v",
2441    "vwsubu.vx requires one of: rv_v",
2442    "vwsubu.wv requires one of: rv_v",
2443    "vwsubu.wx requires one of: rv_v",
2444    "vxor.vi requires one of: rv_v",
2445    "vxor.vv requires one of: rv_v",
2446    "vxor.vx requires one of: rv_v",
2447    "vzext.vf2 requires one of: rv_v",
2448    "vzext.vf4 requires one of: rv_v",
2449    "vzext.vf8 requires one of: rv_v",
2450    "wfi requires one of: rv_system",
2451    "wrs.nto requires one of: rv_zawrs",
2452    "wrs.sto requires one of: rv_zawrs",
2453    "xnor requires one of: rv_zbb, rv_zks, rv_zkn, rv_zk, rv_zbkb",
2454    "xor requires one of: rv_i",
2455    "xori requires one of: rv_i",
2456    "xperm4 requires one of: rv_zbkx, rv_zks, rv_zkn, rv_zk",
2457    "xperm8 requires one of: rv_zbkx, rv_zks, rv_zkn, rv_zk",
2458    "zext.b requires one of: rv_i",
2459    "zext.h requires one of: rv64_zbb",
2460    "zext.h.rv32 requires one of: rv32_zbb",
2461    "zext.w requires one of: rv64_zba",
2462    "zip requires one of: rv32_zbkb, rv32_zks, rv32_zkn, rv32_zk",
2463];
2464
2465/// One opcode carrying each represented extension, for generated coverage checks.
2466pub static CPU_FEATURE_REPRESENTATIVE: [Opcode; CPU_FEATURE_COUNT] = [
2467    Opcode::CJAL,
2468    Opcode::CFLW,
2469    Opcode::FMVHXD,
2470    Opcode::SLLI,
2471    Opcode::REV8RV32,
2472    Opcode::REV8RV32,
2473    Opcode::BCLRIRV32,
2474    Opcode::CLD,
2475    Opcode::RDCYCLEH,
2476    Opcode::AES32DSI,
2477    Opcode::AES32DSI,
2478    Opcode::AES32DSI,
2479    Opcode::AES32ESI,
2480    Opcode::SHA512SIG0H,
2481    Opcode::REV8RV32,
2482    Opcode::AMOADDD,
2483    Opcode::CADDIW,
2484    Opcode::FCVTDL,
2485    Opcode::FCVTLS,
2486    Opcode::HLVD,
2487    Opcode::ADDIW,
2488    Opcode::DIVUW,
2489    Opcode::FCVTLQ,
2490    Opcode::FMVHXQ,
2491    Opcode::AMOCASQ,
2492    Opcode::ADDUW,
2493    Opcode::CLZW,
2494    Opcode::PACKW,
2495    Opcode::BCLRI,
2496    Opcode::CSEXTW,
2497    Opcode::FCVTHL,
2498    Opcode::AES64DS,
2499    Opcode::AES64DS,
2500    Opcode::AES64DS,
2501    Opcode::AES64ES,
2502    Opcode::SHA512SIG0,
2503    Opcode::PACKW,
2504    Opcode::AMOADDW,
2505    Opcode::CADD,
2506    Opcode::CFLD,
2507    Opcode::CSSPOPCHKX5,
2508    Opcode::CNTLALL,
2509    Opcode::FABSD,
2510    Opcode::FCVTMODWD,
2511    Opcode::FCVTDH,
2512    Opcode::FABSS,
2513    Opcode::FLEQS,
2514    Opcode::HFENCEGVMA,
2515    Opcode::ADD,
2516    Opcode::DIV,
2517    Opcode::FABSQ,
2518    Opcode::FLEQQ,
2519    Opcode::FCVTHQ,
2520    Opcode::SFENCEVMA,
2521    Opcode::DRET,
2522    Opcode::MNRET,
2523    Opcode::SCTRCLR,
2524    Opcode::SFENCEINVALIR,
2525    Opcode::HINVALGVMA,
2526    Opcode::MRET,
2527    Opcode::VAADDVV,
2528    Opcode::VFREDSUMVS,
2529    Opcode::AMOADDB,
2530    Opcode::AMOCASB,
2531    Opcode::AMOCASD,
2532    Opcode::WRSNTO,
2533    Opcode::SH1ADD,
2534    Opcode::ANDN,
2535    Opcode::CLMUL,
2536    Opcode::ANDN,
2537    Opcode::CLMUL,
2538    Opcode::XPERM4,
2539    Opcode::BCLR,
2540    Opcode::CLBU,
2541    Opcode::CMOP1,
2542    Opcode::CMMVA01S,
2543    Opcode::CMJALT,
2544    Opcode::FCVTBF16S,
2545    Opcode::FABSH,
2546    Opcode::FLEQH,
2547    Opcode::FCVTHS,
2548    Opcode::CBOCLEAN,
2549    Opcode::LPAD,
2550    Opcode::SSAMOSWAPD,
2551    Opcode::RDCYCLE,
2552    Opcode::CZEROEQZ,
2553    Opcode::CSRC,
2554    Opcode::FENCEI,
2555    Opcode::NTLALL,
2556    Opcode::MOPR0,
2557    Opcode::ANDN,
2558    Opcode::ANDN,
2559    Opcode::SHA256SIG0,
2560    Opcode::ANDN,
2561    Opcode::SM4ED,
2562    Opcode::SM3P0,
2563    Opcode::VANDNVV,
2564    Opcode::VCLMULVV,
2565    Opcode::VFNCVTBF16FFW,
2566    Opcode::VFWMACCBF16VF,
2567    Opcode::VGHSHVV,
2568    Opcode::VAESDFVS,
2569    Opcode::VAESDFVS,
2570    Opcode::VSHA2CHVV,
2571    Opcode::VSHA2CHVV,
2572    Opcode::VANDNVV,
2573    Opcode::VSM4KVI,
2574    Opcode::VSM3CVI,
2575];
2576
2577/// Pattern value: no effects.
2578pub const NONE: u32 = 0;
2579/// Pattern value: operand is read (`OpRwFlags::READ`).
2580pub const R: u32 = OpRwFlags::READ.bits();
2581/// Pattern value: operand is written (`OpRwFlags::WRITE`).
2582pub const W: u32 = OpRwFlags::WRITE.bits();
2583/// Pattern value: operand is read and written (`OpRwFlags::RW`).
2584pub const X: u32 = OpRwFlags::RW.bits();
2585/// Pattern value: memory address base register, read (`OpRwFlags::READ | MEM_BASE_READ`).
2586pub const B: u32 = OpRwFlags::READ.bits() | OpRwFlags::MEM_BASE_READ.bits();
2587
2588/// No memory access (`InstInfo::mem_access`).
2589pub const MEM_NONE: u8 = 0;
2590/// Memory load (`InstInfo::mem_access`).
2591pub const MEM_LOAD: u8 = 1;
2592/// Memory store (`InstInfo::mem_access`).
2593pub const MEM_STORE: u8 = 2;
2594/// Atomic memory read-modify-write (`InstInfo::mem_access`).
2595pub const MEM_READ_MODIFY_WRITE: u8 = 3;
2596
2597/// `InstInfo::flags` bit: machine-level side effects, no allocatable effects
2598/// (ecall/ebreak/xret/wfi).
2599pub const FLAG_VOLATILE: u8 = 0x1;
2600
2601/// Signature value: operand class unconstrained (`SIGNATURE_TABLE`).
2602pub const ANY: u8 = 0;
2603/// Signature value: general-purpose register (`SIGNATURE_TABLE`).
2604pub const GP: u8 = 1;
2605/// Signature value: floating-point register (`SIGNATURE_TABLE`).
2606pub const FP: u8 = 2;
2607/// Signature value: vector register (`SIGNATURE_TABLE`).
2608pub const VEC: u8 = 3;
2609/// Signature value: immediate or label (`SIGNATURE_TABLE`).
2610pub const IMM: u8 = 4;
2611
2612/// Per-opcode instruction information.
2613#[derive(Clone, Copy, Debug)]
2614pub struct InstInfo {
2615    /// Index into [`RW_PATTERN_TABLE`].
2616    pub rw_info_index: u8,
2617    /// Index into [`SIGNATURE_TABLE`].
2618    pub signature_index: u8,
2619    /// `MEM_*` access kind.
2620    pub mem_access: u8,
2621    /// Access width in bytes (0 = none or not instruction-fixed).
2622    pub mem_width: u8,
2623    /// Index into [`IMPLICIT_REG_TABLE`].
2624    pub implicit_index: u8,
2625    /// `FLAG_*` bits.
2626    pub flags: u8,
2627    /// Implicit CSR flag reads (`CpuRwFlags::RISCV_*` bits).
2628    pub read_flags: u32,
2629    /// Implicit CSR flag writes (`CpuRwFlags::RISCV_*` bits).
2630    pub write_flags: u32,
2631}
2632
2633/// Implicit fixed-register effects. Bits 0..=31 name GP registers x0..x31; bit 32
2634/// names the vector mask register v0.
2635#[derive(Clone, Copy, Debug, Default, PartialEq, Eq)]
2636pub struct ImplicitRegEffects {
2637    /// Mask of implicitly read fixed registers.
2638    pub read: u64,
2639    /// Mask of implicitly written fixed registers.
2640    pub write: u64,
2641}
2642
2643/// Deduplicated operand read/write patterns (`OpRwFlags` values per position).
2644#[rustfmt::skip]
2645pub static RW_PATTERN_TABLE: [[u32; 6]; 20] = [
2646    [W, R, R, 0, 0, 0],
2647    [W, R, 0, 0, 0, 0],
2648    [W, B, R, 0, 0, 0],
2649    [W, 0, 0, 0, 0, 0],
2650    [R, R, 0, 0, 0, 0],
2651    [R, 0, 0, 0, 0, 0],
2652    [X, R, 0, 0, 0, 0],
2653    [X, 0, 0, 0, 0, 0],
2654    [0, 0, 0, 0, 0, 0],
2655    [W, B, 0, 0, 0, 0],
2656    [B, R, 0, 0, 0, 0],
2657    [R, X, 0, 0, 0, 0],
2658    [W, R, X, 0, 0, 0],
2659    [W, X, 0, 0, 0, 0],
2660    [R, W, 0, 0, 0, 0],
2661    [W, R, R, R, 0, 0],
2662    [0, 0, 0, W, R, 0],
2663    [0, 0, W, R, R, 0],
2664    [R, B, 0, 0, 0, 0],
2665    [R, B, R, 0, 0, 0],
2666];
2667
2668/// Deduplicated operand-class signatures (`ANY`/`GP`/`FP`/`VEC`/`IMM` per position).
2669#[rustfmt::skip]
2670pub static SIGNATURE_TABLE: [[u8; 6]; 45] = [
2671    [GP, GP, GP, ANY, ANY, ANY],
2672    [GP, GP, IMM, ANY, ANY, ANY],
2673    [GP, GP, GP, IMM, ANY, ANY],
2674    [GP, GP, ANY, ANY, ANY, ANY],
2675    [GP, GP, GP, IMM, IMM, ANY],
2676    [GP, IMM, ANY, ANY, ANY, ANY],
2677    [IMM, ANY, ANY, ANY, ANY, ANY],
2678    [ANY, ANY, ANY, ANY, ANY, ANY],
2679    [FP, GP, IMM, ANY, ANY, ANY],
2680    [FP, IMM, ANY, ANY, ANY, ANY],
2681    [GP, FP, IMM, ANY, ANY, ANY],
2682    [GP, ANY, ANY, ANY, ANY, ANY],
2683    [IMM, IMM, ANY, ANY, ANY, ANY],
2684    [GP, IMM, IMM, ANY, ANY, ANY],
2685    [FP, FP, FP, ANY, ANY, ANY],
2686    [FP, FP, FP, IMM, ANY, ANY],
2687    [GP, FP, ANY, ANY, ANY, ANY],
2688    [FP, FP, IMM, ANY, ANY, ANY],
2689    [IMM, IMM, IMM, IMM, IMM, ANY],
2690    [GP, FP, FP, ANY, ANY, ANY],
2691    [FP, FP, ANY, ANY, ANY, ANY],
2692    [FP, FP, FP, FP, IMM, ANY],
2693    [FP, GP, ANY, ANY, ANY, ANY],
2694    [FP, GP, GP, ANY, ANY, ANY],
2695    [GP, GP, IMM, IMM, ANY, ANY],
2696    [IMM, IMM, IMM, GP, GP, ANY],
2697    [IMM, IMM, GP, GP, GP, ANY],
2698    [VEC, VEC, VEC, IMM, ANY, ANY],
2699    [VEC, VEC, GP, IMM, ANY, ANY],
2700    [VEC, VEC, IMM, ANY, ANY, ANY],
2701    [VEC, VEC, VEC, ANY, ANY, ANY],
2702    [VEC, GP, VEC, ANY, ANY, ANY],
2703    [VEC, VEC, IMM, IMM, ANY, ANY],
2704    [VEC, VEC, ANY, ANY, ANY, ANY],
2705    [GP, VEC, IMM, ANY, ANY, ANY],
2706    [VEC, VEC, FP, IMM, ANY, ANY],
2707    [VEC, FP, VEC, ANY, ANY, ANY],
2708    [FP, VEC, ANY, ANY, ANY, ANY],
2709    [VEC, FP, ANY, ANY, ANY, ANY],
2710    [VEC, IMM, ANY, ANY, ANY, ANY],
2711    [VEC, GP, ANY, ANY, ANY, ANY],
2712    [VEC, GP, IMM, IMM, ANY, ANY],
2713    [VEC, GP, VEC, IMM, IMM, ANY],
2714    [VEC, GP, GP, IMM, IMM, ANY],
2715    [GP, VEC, ANY, ANY, ANY, ANY],
2716];
2717
2718/// Deduplicated implicit fixed-register effects (index 0 = none).
2719pub static IMPLICIT_REG_TABLE: [ImplicitRegEffects; 7] = [
2720    ImplicitRegEffects {
2721        read: 0x0,
2722        write: 0x0,
2723    },
2724    ImplicitRegEffects {
2725        read: 0x4,
2726        write: 0x4,
2727    },
2728    ImplicitRegEffects {
2729        read: 0x4,
2730        write: 0x0,
2731    },
2732    ImplicitRegEffects {
2733        read: 0x0,
2734        write: 0x2,
2735    },
2736    ImplicitRegEffects {
2737        read: 0x20,
2738        write: 0x0,
2739    },
2740    ImplicitRegEffects {
2741        read: 0x2,
2742        write: 0x0,
2743    },
2744    ImplicitRegEffects {
2745        read: 0x100000000,
2746        write: 0x0,
2747    },
2748];
2749
2750/// Per-opcode effects, indexed by `Opcode as usize`.
2751#[rustfmt::skip]
2752pub static INST_INFO_TABLE: [InstInfo; 1039] = [
2753    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // add
2754    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // add.uw
2755    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // addi
2756    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // addiw
2757    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // addw
2758    InstInfo { rw_info_index: 0, signature_index: 2, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes32dsi
2759    InstInfo { rw_info_index: 0, signature_index: 2, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes32dsmi
2760    InstInfo { rw_info_index: 0, signature_index: 2, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes32esi
2761    InstInfo { rw_info_index: 0, signature_index: 2, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes32esmi
2762    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes64ds
2763    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes64dsm
2764    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes64es
2765    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes64esm
2766    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes64im
2767    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes64ks1i
2768    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // aes64ks2
2769    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoadd.b
2770    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoadd.d
2771    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoadd.h
2772    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoadd.w
2773    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoand.b
2774    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoand.d
2775    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoand.h
2776    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoand.w
2777    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amocas.b
2778    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amocas.d
2779    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amocas.h
2780    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 16, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amocas.q
2781    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amocas.w
2782    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomax.b
2783    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomax.d
2784    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomax.h
2785    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomax.w
2786    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomaxu.b
2787    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomaxu.d
2788    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomaxu.h
2789    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomaxu.w
2790    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomin.b
2791    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomin.d
2792    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomin.h
2793    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amomin.w
2794    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amominu.b
2795    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amominu.d
2796    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amominu.h
2797    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amominu.w
2798    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoor.b
2799    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoor.d
2800    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoor.h
2801    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoor.w
2802    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoswap.b
2803    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoswap.d
2804    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoswap.h
2805    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoswap.w
2806    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoxor.b
2807    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoxor.d
2808    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoxor.h
2809    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // amoxor.w
2810    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // and
2811    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // andi
2812    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // andn
2813    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // auipc
2814    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bclr
2815    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bclri
2816    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bclri.rv32
2817    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // beq
2818    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // beqz
2819    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bext
2820    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bexti
2821    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bexti.rv32
2822    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bge
2823    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bgeu
2824    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bgez
2825    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bgt
2826    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bgtu
2827    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bgtz
2828    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // binv
2829    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // binvi
2830    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // binvi.rv32
2831    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ble
2832    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bleu
2833    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // blez
2834    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // blt
2835    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bltu
2836    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bltz
2837    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bne
2838    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bnez
2839    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // brev8
2840    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bset
2841    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bseti
2842    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // bseti.rv32
2843    InstInfo { rw_info_index: 6, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.add
2844    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.addi
2845    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 1, flags: 0, read_flags: 0, write_flags: 0 }, // c.addi16sp
2846    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.addi4spn
2847    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.addiw
2848    InstInfo { rw_info_index: 6, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.addw
2849    InstInfo { rw_info_index: 6, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.and
2850    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.andi
2851    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.beqz
2852    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.bnez
2853    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.ebreak
2854    InstInfo { rw_info_index: 9, signature_index: 8, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.fld
2855    InstInfo { rw_info_index: 3, signature_index: 9, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.fldsp
2856    InstInfo { rw_info_index: 9, signature_index: 8, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.flw
2857    InstInfo { rw_info_index: 3, signature_index: 9, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.flwsp
2858    InstInfo { rw_info_index: 10, signature_index: 10, mem_access: MEM_STORE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.fsd
2859    InstInfo { rw_info_index: 5, signature_index: 9, mem_access: MEM_STORE, mem_width: 8, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.fsdsp
2860    InstInfo { rw_info_index: 10, signature_index: 10, mem_access: MEM_STORE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.fsw
2861    InstInfo { rw_info_index: 5, signature_index: 9, mem_access: MEM_STORE, mem_width: 4, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.fswsp
2862    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.j
2863    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 3, flags: 0, read_flags: 0, write_flags: 0 }, // c.jal
2864    InstInfo { rw_info_index: 5, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 3, flags: 0, read_flags: 0, write_flags: 0 }, // c.jalr
2865    InstInfo { rw_info_index: 5, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.jr
2866    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.lbu
2867    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.ld
2868    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.ldsp
2869    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.lh
2870    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.lhu
2871    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.li
2872    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.lui
2873    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.lw
2874    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.lwsp
2875    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.1
2876    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.11
2877    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.13
2878    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.15
2879    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.3
2880    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.5
2881    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.7
2882    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.9
2883    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mop.n
2884    InstInfo { rw_info_index: 6, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mul
2885    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.mv
2886    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.nop
2887    InstInfo { rw_info_index: 7, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.not
2888    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.ntl.all
2889    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.ntl.p1
2890    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.ntl.pall
2891    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.ntl.s1
2892    InstInfo { rw_info_index: 6, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.or
2893    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.sb
2894    InstInfo { rw_info_index: 10, signature_index: 1, mem_access: MEM_STORE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.sd
2895    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_STORE, mem_width: 8, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.sdsp
2896    InstInfo { rw_info_index: 7, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.sext.b
2897    InstInfo { rw_info_index: 7, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.sext.h
2898    InstInfo { rw_info_index: 7, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.sext.w
2899    InstInfo { rw_info_index: 4, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.sh
2900    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.slli
2901    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.slli.rv32
2902    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.srai
2903    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.srai.rv32
2904    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.srli
2905    InstInfo { rw_info_index: 7, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.srli.rv32
2906    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 4, flags: 0, read_flags: 0, write_flags: 0 }, // c.sspopchk.x5
2907    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 5, flags: 0, read_flags: 0, write_flags: 0 }, // c.sspush.x1
2908    InstInfo { rw_info_index: 6, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.sub
2909    InstInfo { rw_info_index: 6, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.subw
2910    InstInfo { rw_info_index: 10, signature_index: 1, mem_access: MEM_STORE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.sw
2911    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_STORE, mem_width: 4, implicit_index: 2, flags: 0, read_flags: 0, write_flags: 0 }, // c.swsp
2912    InstInfo { rw_info_index: 6, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.xor
2913    InstInfo { rw_info_index: 7, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.zext.b
2914    InstInfo { rw_info_index: 7, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.zext.h
2915    InstInfo { rw_info_index: 7, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // c.zext.w
2916    InstInfo { rw_info_index: 5, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cbo.clean
2917    InstInfo { rw_info_index: 5, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cbo.flush
2918    InstInfo { rw_info_index: 5, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cbo.inval
2919    InstInfo { rw_info_index: 5, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cbo.zero
2920    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // clmul
2921    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // clmulh
2922    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // clmulr
2923    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // clz
2924    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // clzw
2925    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cm.jalt
2926    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cm.mva01s
2927    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cm.mvsa01
2928    InstInfo { rw_info_index: 8, signature_index: 12, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cm.pop
2929    InstInfo { rw_info_index: 8, signature_index: 12, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cm.popret
2930    InstInfo { rw_info_index: 8, signature_index: 12, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cm.popretz
2931    InstInfo { rw_info_index: 8, signature_index: 12, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cm.push
2932    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cpop
2933    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // cpopw
2934    InstInfo { rw_info_index: 11, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrc
2935    InstInfo { rw_info_index: 7, signature_index: 12, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrci
2936    InstInfo { rw_info_index: 1, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrr
2937    InstInfo { rw_info_index: 12, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrrc
2938    InstInfo { rw_info_index: 13, signature_index: 13, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrrci
2939    InstInfo { rw_info_index: 12, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrrs
2940    InstInfo { rw_info_index: 13, signature_index: 13, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrrsi
2941    InstInfo { rw_info_index: 12, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrrw
2942    InstInfo { rw_info_index: 13, signature_index: 13, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrrwi
2943    InstInfo { rw_info_index: 11, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrs
2944    InstInfo { rw_info_index: 7, signature_index: 12, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrsi
2945    InstInfo { rw_info_index: 14, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrw
2946    InstInfo { rw_info_index: 3, signature_index: 12, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // csrwi
2947    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ctz
2948    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ctzw
2949    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // czero.eqz
2950    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // czero.nez
2951    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // div
2952    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // divu
2953    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // divuw
2954    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // divw
2955    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: FLAG_VOLATILE, read_flags: 0, write_flags: 0 }, // dret
2956    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: FLAG_VOLATILE, read_flags: 0, write_flags: 0 }, // ebreak
2957    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: FLAG_VOLATILE, read_flags: 0, write_flags: 0 }, // ecall
2958    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fabs.d
2959    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fabs.h
2960    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fabs.q
2961    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fabs.s
2962    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fadd.d
2963    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fadd.h
2964    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fadd.q
2965    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fadd.s
2966    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fclass.d
2967    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fclass.h
2968    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fclass.q
2969    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fclass.s
2970    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.bf16.s
2971    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.d.h
2972    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.d.l
2973    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.d.lu
2974    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.d.q
2975    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.d.s
2976    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.d.w
2977    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.d.wu
2978    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.h.d
2979    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.h.l
2980    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.h.lu
2981    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.h.q
2982    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.h.s
2983    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.h.w
2984    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.h.wu
2985    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.l.d
2986    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.l.h
2987    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.l.q
2988    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.l.s
2989    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.lu.d
2990    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.lu.h
2991    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.lu.q
2992    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.lu.s
2993    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.q.d
2994    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.q.h
2995    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.q.l
2996    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.q.lu
2997    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.q.s
2998    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.q.w
2999    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.q.wu
3000    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.s.bf16
3001    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.s.d
3002    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.s.h
3003    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.s.l
3004    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.s.lu
3005    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.s.q
3006    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.s.w
3007    InstInfo { rw_info_index: 1, signature_index: 8, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.s.wu
3008    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.w.d
3009    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.w.h
3010    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.w.q
3011    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.w.s
3012    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.wu.d
3013    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.wu.h
3014    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.wu.q
3015    InstInfo { rw_info_index: 1, signature_index: 10, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvt.wu.s
3016    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fcvtmod.w.d
3017    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fdiv.d
3018    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fdiv.h
3019    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fdiv.q
3020    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fdiv.s
3021    InstInfo { rw_info_index: 8, signature_index: 18, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fence
3022    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fence.i
3023    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fence.tso
3024    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // feq.d
3025    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // feq.h
3026    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // feq.q
3027    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // feq.s
3028    InstInfo { rw_info_index: 9, signature_index: 8, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fld
3029    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fle.d
3030    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fle.h
3031    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fle.q
3032    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fle.s
3033    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fleq.d
3034    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fleq.h
3035    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fleq.q
3036    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fleq.s
3037    InstInfo { rw_info_index: 9, signature_index: 8, mem_access: MEM_LOAD, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // flh
3038    InstInfo { rw_info_index: 1, signature_index: 20, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fli.d
3039    InstInfo { rw_info_index: 1, signature_index: 20, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fli.h
3040    InstInfo { rw_info_index: 1, signature_index: 20, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fli.q
3041    InstInfo { rw_info_index: 1, signature_index: 20, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fli.s
3042    InstInfo { rw_info_index: 9, signature_index: 8, mem_access: MEM_LOAD, mem_width: 16, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // flq
3043    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // flt.d
3044    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // flt.h
3045    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // flt.q
3046    InstInfo { rw_info_index: 0, signature_index: 19, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // flt.s
3047    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fltq.d
3048    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fltq.h
3049    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fltq.q
3050    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fltq.s
3051    InstInfo { rw_info_index: 9, signature_index: 8, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // flw
3052    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmadd.d
3053    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmadd.h
3054    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmadd.q
3055    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmadd.s
3056    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmax.d
3057    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmax.h
3058    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmax.q
3059    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmax.s
3060    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmaxm.d
3061    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmaxm.h
3062    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmaxm.q
3063    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmaxm.s
3064    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmin.d
3065    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmin.h
3066    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmin.q
3067    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmin.s
3068    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fminm.d
3069    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fminm.h
3070    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fminm.q
3071    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fminm.s
3072    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmsub.d
3073    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmsub.h
3074    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmsub.q
3075    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmsub.s
3076    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmul.d
3077    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmul.h
3078    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmul.q
3079    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fmul.s
3080    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.d
3081    InstInfo { rw_info_index: 1, signature_index: 22, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.d.x
3082    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.h
3083    InstInfo { rw_info_index: 1, signature_index: 22, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.h.x
3084    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.q
3085    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.s
3086    InstInfo { rw_info_index: 1, signature_index: 22, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.s.x
3087    InstInfo { rw_info_index: 1, signature_index: 22, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.w.x
3088    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.x.d
3089    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.x.h
3090    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.x.s
3091    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmv.x.w
3092    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmvh.x.d
3093    InstInfo { rw_info_index: 1, signature_index: 16, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmvh.x.q
3094    InstInfo { rw_info_index: 0, signature_index: 23, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmvp.d.x
3095    InstInfo { rw_info_index: 0, signature_index: 23, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fmvp.q.x
3096    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fneg.d
3097    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fneg.h
3098    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fneg.q
3099    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fneg.s
3100    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fnmadd.d
3101    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fnmadd.h
3102    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fnmadd.q
3103    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fnmadd.s
3104    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fnmsub.d
3105    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fnmsub.h
3106    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fnmsub.q
3107    InstInfo { rw_info_index: 15, signature_index: 21, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fnmsub.s
3108    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FFLAGS.bits() | CpuRwFlags::RISCV_FRM.bits(), write_flags: 0 }, // frcsr
3109    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FFLAGS.bits(), write_flags: 0 }, // frflags
3110    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fround.d
3111    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fround.h
3112    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fround.q
3113    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fround.s
3114    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // froundnx.d
3115    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // froundnx.h
3116    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // froundnx.q
3117    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // froundnx.s
3118    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: 0 }, // frrm
3119    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FFLAGS.bits() | CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() | CpuRwFlags::RISCV_FRM.bits() }, // fscsr
3120    InstInfo { rw_info_index: 10, signature_index: 10, mem_access: MEM_STORE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsd
3121    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FFLAGS.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsflags
3122    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FFLAGS.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsflagsi
3123    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnj.d
3124    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnj.h
3125    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnj.q
3126    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnj.s
3127    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnjn.d
3128    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnjn.h
3129    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnjn.q
3130    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnjn.s
3131    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnjx.d
3132    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnjx.h
3133    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnjx.q
3134    InstInfo { rw_info_index: 0, signature_index: 14, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsgnjx.s
3135    InstInfo { rw_info_index: 10, signature_index: 10, mem_access: MEM_STORE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsh
3136    InstInfo { rw_info_index: 10, signature_index: 10, mem_access: MEM_STORE, mem_width: 16, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsq
3137    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsqrt.d
3138    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsqrt.h
3139    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsqrt.q
3140    InstInfo { rw_info_index: 1, signature_index: 17, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsqrt.s
3141    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FRM.bits() }, // fsrm
3142    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FRM.bits() }, // fsrmi
3143    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsub.d
3144    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsub.h
3145    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsub.q
3146    InstInfo { rw_info_index: 0, signature_index: 15, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: CpuRwFlags::RISCV_FRM.bits(), write_flags: CpuRwFlags::RISCV_FFLAGS.bits() }, // fsub.s
3147    InstInfo { rw_info_index: 10, signature_index: 10, mem_access: MEM_STORE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // fsw
3148    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hfence.gvma
3149    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hfence.vvma
3150    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hinval.gvma
3151    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hinval.vvma
3152    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlv.b
3153    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlv.bu
3154    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlv.d
3155    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlv.h
3156    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlv.hu
3157    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlv.w
3158    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlv.wu
3159    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlvx.hu
3160    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hlvx.wu
3161    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hsv.b
3162    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hsv.d
3163    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hsv.h
3164    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // hsv.w
3165    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // j
3166    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // jal
3167    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // jal.pseudo
3168    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // jalr
3169    InstInfo { rw_info_index: 5, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // jalr.pseudo
3170    InstInfo { rw_info_index: 5, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // jr
3171    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lb
3172    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lbu
3173    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ld
3174    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lh
3175    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lhu
3176    InstInfo { rw_info_index: 8, signature_index: 6, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lpad
3177    InstInfo { rw_info_index: 9, signature_index: 24, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lr.d
3178    InstInfo { rw_info_index: 9, signature_index: 24, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lr.w
3179    InstInfo { rw_info_index: 3, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lui
3180    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lw
3181    InstInfo { rw_info_index: 9, signature_index: 1, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // lwu
3182    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // max
3183    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // maxu
3184    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // min
3185    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // minu
3186    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: FLAG_VOLATILE, read_flags: 0, write_flags: 0 }, // mnret
3187    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.0
3188    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.1
3189    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.10
3190    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.11
3191    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.12
3192    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.13
3193    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.14
3194    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.15
3195    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.16
3196    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.17
3197    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.18
3198    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.19
3199    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.2
3200    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.20
3201    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.21
3202    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.22
3203    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.23
3204    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.24
3205    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.25
3206    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.26
3207    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.27
3208    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.28
3209    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.29
3210    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.3
3211    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.30
3212    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.31
3213    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.4
3214    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.5
3215    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.6
3216    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.7
3217    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.8
3218    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.9
3219    InstInfo { rw_info_index: 16, signature_index: 25, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.r.n
3220    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.0
3221    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.1
3222    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.2
3223    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.3
3224    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.4
3225    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.5
3226    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.6
3227    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.7
3228    InstInfo { rw_info_index: 17, signature_index: 26, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mop.rr.n
3229    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: FLAG_VOLATILE, read_flags: 0, write_flags: 0 }, // mret
3230    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mul
3231    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mulh
3232    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mulhsu
3233    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mulhu
3234    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mulw
3235    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // mv
3236    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // neg
3237    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // nop
3238    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ntl.all
3239    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ntl.p1
3240    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ntl.pall
3241    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ntl.s1
3242    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // or
3243    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // orc.b
3244    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ori
3245    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // orn
3246    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // pack
3247    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // packh
3248    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // packw
3249    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // pause
3250    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // prefetch.i
3251    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // prefetch.r
3252    InstInfo { rw_info_index: 5, signature_index: 5, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // prefetch.w
3253    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rdcycle
3254    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rdcycleh
3255    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rdinstret
3256    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rdinstreth
3257    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rdtime
3258    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rdtimeh
3259    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rem
3260    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // remu
3261    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // remuw
3262    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // remw
3263    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ret
3264    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rev8
3265    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rev8.rv32
3266    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rol
3267    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rolw
3268    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ror
3269    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rori
3270    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rori.rv32
3271    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // roriw
3272    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // rorw
3273    InstInfo { rw_info_index: 10, signature_index: 1, mem_access: MEM_STORE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sb
3274    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sbreak
3275    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_STORE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sc.d
3276    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_STORE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sc.w
3277    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // scall
3278    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sctrclr
3279    InstInfo { rw_info_index: 10, signature_index: 1, mem_access: MEM_STORE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sd
3280    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // seqz
3281    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sext.b
3282    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sext.h
3283    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sext.w
3284    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sfence.inval.ir
3285    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sfence.vma
3286    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sfence.w.inval
3287    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sgtz
3288    InstInfo { rw_info_index: 10, signature_index: 1, mem_access: MEM_STORE, mem_width: 2, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sh
3289    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sh1add
3290    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sh1add.uw
3291    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sh2add
3292    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sh2add.uw
3293    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sh3add
3294    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sh3add.uw
3295    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha256sig0
3296    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha256sig1
3297    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha256sum0
3298    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha256sum1
3299    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sig0
3300    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sig0h
3301    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sig0l
3302    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sig1
3303    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sig1h
3304    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sig1l
3305    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sum0
3306    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sum0r
3307    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sum1
3308    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sha512sum1r
3309    InstInfo { rw_info_index: 4, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sinval.vma
3310    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sll
3311    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // slli
3312    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // slli.rv32
3313    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // slli.uw
3314    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // slliw
3315    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sllw
3316    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // slt
3317    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // slti
3318    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sltiu
3319    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sltu
3320    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sltz
3321    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sm3p0
3322    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sm3p1
3323    InstInfo { rw_info_index: 0, signature_index: 2, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sm4ed
3324    InstInfo { rw_info_index: 0, signature_index: 2, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sm4ks
3325    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // snez
3326    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sra
3327    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // srai
3328    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // srai.rv32
3329    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sraiw
3330    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sraw
3331    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: FLAG_VOLATILE, read_flags: 0, write_flags: 0 }, // sret
3332    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // srl
3333    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // srli
3334    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // srli.rv32
3335    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // srliw
3336    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // srlw
3337    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 8, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ssamoswap.d
3338    InstInfo { rw_info_index: 2, signature_index: 4, mem_access: MEM_READ_MODIFY_WRITE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ssamoswap.w
3339    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 5, flags: 0, read_flags: 0, write_flags: 0 }, // sspopchk.x1
3340    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 4, flags: 0, read_flags: 0, write_flags: 0 }, // sspopchk.x5
3341    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 5, flags: 0, read_flags: 0, write_flags: 0 }, // sspush.x1
3342    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 4, flags: 0, read_flags: 0, write_flags: 0 }, // sspush.x5
3343    InstInfo { rw_info_index: 3, signature_index: 11, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // ssrdp
3344    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sub
3345    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // subw
3346    InstInfo { rw_info_index: 10, signature_index: 1, mem_access: MEM_STORE, mem_width: 4, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // sw
3347    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // unzip
3348    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vaadd.vv
3349    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vaadd.vx
3350    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vaaddu.vv
3351    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vaaddu.vx
3352    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vadc.vim
3353    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vadc.vvm
3354    InstInfo { rw_info_index: 0, signature_index: 31, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vadc.vxm
3355    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vadd.vi
3356    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vadd.vv
3357    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vadd.vx
3358    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesdf.vs
3359    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesdf.vv
3360    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesdm.vs
3361    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesdm.vv
3362    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesef.vs
3363    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesef.vv
3364    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesem.vs
3365    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesem.vv
3366    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaeskf1.vi
3367    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaeskf2.vi
3368    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vaesz.vs
3369    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vand.vi
3370    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vand.vv
3371    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vand.vx
3372    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vandn.vv
3373    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vandn.vx
3374    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vasub.vv
3375    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vasub.vx
3376    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vasubu.vv
3377    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vasubu.vx
3378    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vbrev8.v
3379    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vbrev.v
3380    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vclmul.vv
3381    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vclmul.vx
3382    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vclmulh.vv
3383    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vclmulh.vx
3384    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vclz.v
3385    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vcompress.vm
3386    InstInfo { rw_info_index: 1, signature_index: 34, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vcpop.m
3387    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vcpop.v
3388    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vctz.v
3389    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vdiv.vv
3390    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vdiv.vx
3391    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vdivu.vv
3392    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vdivu.vx
3393    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfadd.vf
3394    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfadd.vv
3395    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfclass.v
3396    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfcvt.f.x.v
3397    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfcvt.f.xu.v
3398    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfcvt.rtz.x.f.v
3399    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfcvt.rtz.xu.f.v
3400    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfcvt.x.f.v
3401    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfcvt.xu.f.v
3402    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfdiv.vf
3403    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfdiv.vv
3404    InstInfo { rw_info_index: 1, signature_index: 34, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfirst.m
3405    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmacc.vf
3406    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmacc.vv
3407    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmadd.vf
3408    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmadd.vv
3409    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmax.vf
3410    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmax.vv
3411    InstInfo { rw_info_index: 0, signature_index: 36, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vfmerge.vfm
3412    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmin.vf
3413    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmin.vv
3414    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmsac.vf
3415    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmsac.vv
3416    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmsub.vf
3417    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmsub.vv
3418    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmul.vf
3419    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfmul.vv
3420    InstInfo { rw_info_index: 1, signature_index: 37, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vfmv.f.s
3421    InstInfo { rw_info_index: 1, signature_index: 38, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vfmv.s.f
3422    InstInfo { rw_info_index: 1, signature_index: 38, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vfmv.v.f
3423    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvt.f.f.w
3424    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvt.f.x.w
3425    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvt.f.xu.w
3426    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvt.rod.f.f.w
3427    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvt.rtz.x.f.w
3428    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvt.rtz.xu.f.w
3429    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvt.x.f.w
3430    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvt.xu.f.w
3431    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfncvtbf16.f.f.w
3432    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfnmacc.vf
3433    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfnmacc.vv
3434    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfnmadd.vf
3435    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfnmadd.vv
3436    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfnmsac.vf
3437    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfnmsac.vv
3438    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfnmsub.vf
3439    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfnmsub.vv
3440    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfrdiv.vf
3441    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfrec7.v
3442    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfredmax.vs
3443    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfredmin.vs
3444    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfredosum.vs
3445    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfredsum.vs
3446    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfredusum.vs
3447    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfrsqrt7.v
3448    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfrsub.vf
3449    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsgnj.vf
3450    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsgnj.vv
3451    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsgnjn.vf
3452    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsgnjn.vv
3453    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsgnjx.vf
3454    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsgnjx.vv
3455    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfslide1down.vf
3456    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfslide1up.vf
3457    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsqrt.v
3458    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsub.vf
3459    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfsub.vv
3460    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwadd.vf
3461    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwadd.vv
3462    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwadd.wf
3463    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwadd.wv
3464    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwcvt.f.f.v
3465    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwcvt.f.x.v
3466    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwcvt.f.xu.v
3467    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwcvt.rtz.x.f.v
3468    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwcvt.rtz.xu.f.v
3469    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwcvt.x.f.v
3470    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwcvt.xu.f.v
3471    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwcvtbf16.f.f.v
3472    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwmacc.vf
3473    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwmacc.vv
3474    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwmaccbf16.vf
3475    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwmaccbf16.vv
3476    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwmsac.vf
3477    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwmsac.vv
3478    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwmul.vf
3479    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwmul.vv
3480    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwnmacc.vf
3481    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwnmacc.vv
3482    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwnmsac.vf
3483    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwnmsac.vv
3484    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwredosum.vs
3485    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwredsum.vs
3486    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwredusum.vs
3487    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwsub.vf
3488    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwsub.vv
3489    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwsub.wf
3490    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vfwsub.wv
3491    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vghsh.vv
3492    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vgmul.vv
3493    InstInfo { rw_info_index: 3, signature_index: 39, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vid.v
3494    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // viota.m
3495    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl1r.v
3496    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl1re16.v
3497    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl1re32.v
3498    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl1re64.v
3499    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl1re8.v
3500    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl2r.v
3501    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl2re16.v
3502    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl2re32.v
3503    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl2re64.v
3504    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl2re8.v
3505    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl4r.v
3506    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl4re16.v
3507    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl4re32.v
3508    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl4re64.v
3509    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl4re8.v
3510    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl8r.v
3511    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl8re16.v
3512    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl8re32.v
3513    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl8re64.v
3514    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vl8re8.v
3515    InstInfo { rw_info_index: 9, signature_index: 41, mem_access: MEM_LOAD, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vle16.v
3516    InstInfo { rw_info_index: 9, signature_index: 41, mem_access: MEM_LOAD, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vle16ff.v
3517    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vle1.v
3518    InstInfo { rw_info_index: 9, signature_index: 41, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vle32.v
3519    InstInfo { rw_info_index: 9, signature_index: 41, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vle32ff.v
3520    InstInfo { rw_info_index: 9, signature_index: 41, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vle64.v
3521    InstInfo { rw_info_index: 9, signature_index: 41, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vle64ff.v
3522    InstInfo { rw_info_index: 9, signature_index: 41, mem_access: MEM_LOAD, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vle8.v
3523    InstInfo { rw_info_index: 9, signature_index: 41, mem_access: MEM_LOAD, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vle8ff.v
3524    InstInfo { rw_info_index: 9, signature_index: 40, mem_access: MEM_LOAD, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vlm.v
3525    InstInfo { rw_info_index: 2, signature_index: 42, mem_access: MEM_LOAD, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vloxei16.v
3526    InstInfo { rw_info_index: 2, signature_index: 42, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vloxei32.v
3527    InstInfo { rw_info_index: 2, signature_index: 42, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vloxei64.v
3528    InstInfo { rw_info_index: 2, signature_index: 42, mem_access: MEM_LOAD, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vloxei8.v
3529    InstInfo { rw_info_index: 2, signature_index: 43, mem_access: MEM_LOAD, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vlse16.v
3530    InstInfo { rw_info_index: 2, signature_index: 43, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vlse32.v
3531    InstInfo { rw_info_index: 2, signature_index: 43, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vlse64.v
3532    InstInfo { rw_info_index: 2, signature_index: 43, mem_access: MEM_LOAD, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vlse8.v
3533    InstInfo { rw_info_index: 2, signature_index: 42, mem_access: MEM_LOAD, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vluxei16.v
3534    InstInfo { rw_info_index: 2, signature_index: 42, mem_access: MEM_LOAD, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vluxei32.v
3535    InstInfo { rw_info_index: 2, signature_index: 42, mem_access: MEM_LOAD, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vluxei64.v
3536    InstInfo { rw_info_index: 2, signature_index: 42, mem_access: MEM_LOAD, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vluxei8.v
3537    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmacc.vv
3538    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmacc.vx
3539    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmadc.vi
3540    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmadc.vim
3541    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmadc.vv
3542    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmadc.vvm
3543    InstInfo { rw_info_index: 0, signature_index: 31, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmadc.vx
3544    InstInfo { rw_info_index: 0, signature_index: 31, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmadc.vxm
3545    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmadd.vv
3546    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmadd.vx
3547    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmand.mm
3548    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmandn.mm
3549    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmandnot.mm
3550    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmax.vv
3551    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmax.vx
3552    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmaxu.vv
3553    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmaxu.vx
3554    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmerge.vim
3555    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmerge.vvm
3556    InstInfo { rw_info_index: 0, signature_index: 31, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmerge.vxm
3557    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmfeq.vf
3558    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmfeq.vv
3559    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmfge.vf
3560    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmfgt.vf
3561    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmfle.vf
3562    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmfle.vv
3563    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmflt.vf
3564    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmflt.vv
3565    InstInfo { rw_info_index: 0, signature_index: 35, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmfne.vf
3566    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmfne.vv
3567    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmin.vv
3568    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmin.vx
3569    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vminu.vv
3570    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vminu.vx
3571    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmnand.mm
3572    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmnor.mm
3573    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmor.mm
3574    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmorn.mm
3575    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmornot.mm
3576    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmsbc.vv
3577    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmsbc.vvm
3578    InstInfo { rw_info_index: 0, signature_index: 31, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmsbc.vx
3579    InstInfo { rw_info_index: 0, signature_index: 31, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmsbc.vxm
3580    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsbf.m
3581    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmseq.vi
3582    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmseq.vv
3583    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmseq.vx
3584    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsgt.vi
3585    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsgt.vx
3586    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsgtu.vi
3587    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsgtu.vx
3588    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsif.m
3589    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsle.vi
3590    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsle.vv
3591    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsle.vx
3592    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsleu.vi
3593    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsleu.vv
3594    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsleu.vx
3595    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmslt.vv
3596    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmslt.vx
3597    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsltu.vv
3598    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsltu.vx
3599    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsne.vi
3600    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsne.vv
3601    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsne.vx
3602    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmsof.m
3603    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmul.vv
3604    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmul.vx
3605    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmulh.vv
3606    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmulh.vx
3607    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmulhsu.vv
3608    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmulhsu.vx
3609    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmulhu.vv
3610    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vmulhu.vx
3611    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv1r.v
3612    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv2r.v
3613    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv4r.v
3614    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv8r.v
3615    InstInfo { rw_info_index: 1, signature_index: 40, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv.s.x
3616    InstInfo { rw_info_index: 3, signature_index: 39, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv.v.i
3617    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv.v.v
3618    InstInfo { rw_info_index: 1, signature_index: 40, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv.v.x
3619    InstInfo { rw_info_index: 1, signature_index: 44, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmv.x.s
3620    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmxnor.mm
3621    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vmxor.mm
3622    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vnclip.wi
3623    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vnclip.wv
3624    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vnclip.wx
3625    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vnclipu.wi
3626    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vnclipu.wv
3627    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vnclipu.wx
3628    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnmsac.vv
3629    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnmsac.vx
3630    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnmsub.vv
3631    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnmsub.vx
3632    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnsra.wi
3633    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnsra.wv
3634    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnsra.wx
3635    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnsrl.wi
3636    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnsrl.wv
3637    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vnsrl.wx
3638    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vor.vi
3639    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vor.vv
3640    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vor.vx
3641    InstInfo { rw_info_index: 1, signature_index: 34, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vpopc.m
3642    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vredand.vs
3643    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vredmax.vs
3644    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vredmaxu.vs
3645    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vredmin.vs
3646    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vredminu.vs
3647    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vredor.vs
3648    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vredsum.vs
3649    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vredxor.vs
3650    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrem.vv
3651    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrem.vx
3652    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vremu.vv
3653    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vremu.vx
3654    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrev8.v
3655    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrgather.vi
3656    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrgather.vv
3657    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrgather.vx
3658    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrgatherei16.vv
3659    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrol.vv
3660    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrol.vx
3661    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vror.vi
3662    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vror.vv
3663    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vror.vx
3664    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrsub.vi
3665    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vrsub.vx
3666    InstInfo { rw_info_index: 18, signature_index: 40, mem_access: MEM_STORE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vs1r.v
3667    InstInfo { rw_info_index: 18, signature_index: 40, mem_access: MEM_STORE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vs2r.v
3668    InstInfo { rw_info_index: 18, signature_index: 40, mem_access: MEM_STORE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vs4r.v
3669    InstInfo { rw_info_index: 18, signature_index: 40, mem_access: MEM_STORE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vs8r.v
3670    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vsadd.vi
3671    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vsadd.vv
3672    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vsadd.vx
3673    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vsaddu.vi
3674    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vsaddu.vv
3675    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vsaddu.vx
3676    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsbc.vvm
3677    InstInfo { rw_info_index: 0, signature_index: 31, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsbc.vxm
3678    InstInfo { rw_info_index: 18, signature_index: 41, mem_access: MEM_STORE, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vse16.v
3679    InstInfo { rw_info_index: 18, signature_index: 40, mem_access: MEM_STORE, mem_width: 1, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vse1.v
3680    InstInfo { rw_info_index: 18, signature_index: 41, mem_access: MEM_STORE, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vse32.v
3681    InstInfo { rw_info_index: 18, signature_index: 41, mem_access: MEM_STORE, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vse64.v
3682    InstInfo { rw_info_index: 18, signature_index: 41, mem_access: MEM_STORE, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vse8.v
3683    InstInfo { rw_info_index: 3, signature_index: 13, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsetivli
3684    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsetvl
3685    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsetvli
3686    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsext.vf2
3687    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsext.vf4
3688    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsext.vf8
3689    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsha2ch.vv
3690    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsha2cl.vv
3691    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsha2ms.vv
3692    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vslide1down.vx
3693    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vslide1up.vx
3694    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vslidedown.vi
3695    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vslidedown.vx
3696    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vslideup.vi
3697    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vslideup.vx
3698    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsll.vi
3699    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsll.vv
3700    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsll.vx
3701    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsm3c.vi
3702    InstInfo { rw_info_index: 0, signature_index: 30, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsm3me.vv
3703    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsm4k.vi
3704    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsm4r.vs
3705    InstInfo { rw_info_index: 1, signature_index: 33, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsm4r.vv
3706    InstInfo { rw_info_index: 18, signature_index: 40, mem_access: MEM_STORE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // vsm.v
3707    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vsmul.vv
3708    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vsmul.vx
3709    InstInfo { rw_info_index: 19, signature_index: 42, mem_access: MEM_STORE, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsoxei16.v
3710    InstInfo { rw_info_index: 19, signature_index: 42, mem_access: MEM_STORE, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsoxei32.v
3711    InstInfo { rw_info_index: 19, signature_index: 42, mem_access: MEM_STORE, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsoxei64.v
3712    InstInfo { rw_info_index: 19, signature_index: 42, mem_access: MEM_STORE, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsoxei8.v
3713    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsra.vi
3714    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsra.vv
3715    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsra.vx
3716    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsrl.vi
3717    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsrl.vv
3718    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsrl.vx
3719    InstInfo { rw_info_index: 19, signature_index: 43, mem_access: MEM_STORE, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsse16.v
3720    InstInfo { rw_info_index: 19, signature_index: 43, mem_access: MEM_STORE, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsse32.v
3721    InstInfo { rw_info_index: 19, signature_index: 43, mem_access: MEM_STORE, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsse64.v
3722    InstInfo { rw_info_index: 19, signature_index: 43, mem_access: MEM_STORE, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsse8.v
3723    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vssra.vi
3724    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vssra.vv
3725    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vssra.vx
3726    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vssrl.vi
3727    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vssrl.vv
3728    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vssrl.vx
3729    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vssub.vv
3730    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vssub.vx
3731    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vssubu.vv
3732    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: CpuRwFlags::RISCV_VXSAT.bits() }, // vssubu.vx
3733    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsub.vv
3734    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsub.vx
3735    InstInfo { rw_info_index: 19, signature_index: 42, mem_access: MEM_STORE, mem_width: 2, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsuxei16.v
3736    InstInfo { rw_info_index: 19, signature_index: 42, mem_access: MEM_STORE, mem_width: 4, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsuxei32.v
3737    InstInfo { rw_info_index: 19, signature_index: 42, mem_access: MEM_STORE, mem_width: 8, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsuxei64.v
3738    InstInfo { rw_info_index: 19, signature_index: 42, mem_access: MEM_STORE, mem_width: 1, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vsuxei8.v
3739    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwadd.vv
3740    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwadd.vx
3741    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwadd.wv
3742    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwadd.wx
3743    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwaddu.vv
3744    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwaddu.vx
3745    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwaddu.wv
3746    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwaddu.wx
3747    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmacc.vv
3748    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmacc.vx
3749    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmaccsu.vv
3750    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmaccsu.vx
3751    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmaccu.vv
3752    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmaccu.vx
3753    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmaccus.vx
3754    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmul.vv
3755    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmul.vx
3756    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmulsu.vv
3757    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmulsu.vx
3758    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmulu.vv
3759    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwmulu.vx
3760    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwredsum.vs
3761    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwredsumu.vs
3762    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsll.vi
3763    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsll.vv
3764    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsll.vx
3765    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsub.vv
3766    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsub.vx
3767    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsub.wv
3768    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsub.wx
3769    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsubu.vv
3770    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsubu.vx
3771    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsubu.wv
3772    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vwsubu.wx
3773    InstInfo { rw_info_index: 1, signature_index: 32, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vxor.vi
3774    InstInfo { rw_info_index: 0, signature_index: 27, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vxor.vv
3775    InstInfo { rw_info_index: 0, signature_index: 28, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vxor.vx
3776    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vzext.vf2
3777    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vzext.vf4
3778    InstInfo { rw_info_index: 1, signature_index: 29, mem_access: MEM_NONE, mem_width: 0, implicit_index: 6, flags: 0, read_flags: 0, write_flags: 0 }, // vzext.vf8
3779    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: FLAG_VOLATILE, read_flags: 0, write_flags: 0 }, // wfi
3780    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // wrs.nto
3781    InstInfo { rw_info_index: 8, signature_index: 7, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // wrs.sto
3782    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // xnor
3783    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // xor
3784    InstInfo { rw_info_index: 1, signature_index: 1, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // xori
3785    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // xperm4
3786    InstInfo { rw_info_index: 0, signature_index: 0, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // xperm8
3787    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // zext.b
3788    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // zext.h
3789    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // zext.h.rv32
3790    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // zext.w
3791    InstInfo { rw_info_index: 1, signature_index: 3, mem_access: MEM_NONE, mem_width: 0, implicit_index: 0, flags: 0, read_flags: 0, write_flags: 0 }, // zip
3792];
3793
3794impl Opcode {
3795    /// Returns the effects database entry for this opcode.
3796    pub fn inst_info(self) -> &'static InstInfo {
3797        &INST_INFO_TABLE[self as usize]
3798    }
3799
3800    /// Returns the implicit fixed-register effects of this opcode.
3801    pub fn implicit_reg_effects(self) -> &'static ImplicitRegEffects {
3802        &IMPLICIT_REG_TABLE[self.inst_info().implicit_index as usize]
3803    }
3804}