asmkit/x86/features/
SGX.rs

1use crate::x86::assembler::*;
2use crate::x86::operands::*;
3use super::super::opcodes::*;
4use crate::core::emitter::*;
5use crate::core::operand::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `ENCLS`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+----------+
16/// | # | Operands |
17/// +---+----------+
18/// | 1 | (none)   |
19/// +---+----------+
20/// ```
21pub trait EnclsEmitter {
22    fn encls(&mut self);
23}
24
25impl<'a> EnclsEmitter for Assembler<'a> {
26    fn encls(&mut self) {
27        self.emit(ENCLS, &NOREG, &NOREG, &NOREG, &NOREG);
28    }
29}
30
31/// `ENCLU`.
32///
33/// Supported operand variants:
34///
35/// ```text
36/// +---+----------+
37/// | # | Operands |
38/// +---+----------+
39/// | 1 | (none)   |
40/// +---+----------+
41/// ```
42pub trait EncluEmitter {
43    fn enclu(&mut self);
44}
45
46impl<'a> EncluEmitter for Assembler<'a> {
47    fn enclu(&mut self) {
48        self.emit(ENCLU, &NOREG, &NOREG, &NOREG, &NOREG);
49    }
50}
51
52/// `ENCLV` (ENCLV). 
53/// The ENCLV instruction invokes the virtualization SGX leaf functions for managing enclaves in a virtualized environment. Software specifies the leaf function by setting the appropriate value in the register EAX as input. The registers RBX, RCX, and RDX have leaf-specific purpose, and may act as input, as output, or may be unused. In non 64-bit mode, the instruction ignores upper 32 bits of the RAX register.
54///
55///
56/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/ENCLV.html).
57///
58/// Supported operand variants:
59///
60/// ```text
61/// +---+----------+
62/// | # | Operands |
63/// +---+----------+
64/// | 1 | (none)   |
65/// +---+----------+
66/// ```
67pub trait EnclvEmitter {
68    fn enclv(&mut self);
69}
70
71impl<'a> EnclvEmitter for Assembler<'a> {
72    fn enclv(&mut self) {
73        self.emit(ENCLV, &NOREG, &NOREG, &NOREG, &NOREG);
74    }
75}
76
77
78impl<'a> Assembler<'a> {
79    /// `ENCLS`.
80    ///
81    /// Supported operand variants:
82    ///
83    /// ```text
84    /// +---+----------+
85    /// | # | Operands |
86    /// +---+----------+
87    /// | 1 | (none)   |
88    /// +---+----------+
89    /// ```
90    #[inline]
91    pub fn encls(&mut self)
92    where Assembler<'a>: EnclsEmitter {
93        <Self as EnclsEmitter>::encls(self);
94    }
95    /// `ENCLU`.
96    ///
97    /// Supported operand variants:
98    ///
99    /// ```text
100    /// +---+----------+
101    /// | # | Operands |
102    /// +---+----------+
103    /// | 1 | (none)   |
104    /// +---+----------+
105    /// ```
106    #[inline]
107    pub fn enclu(&mut self)
108    where Assembler<'a>: EncluEmitter {
109        <Self as EncluEmitter>::enclu(self);
110    }
111    /// `ENCLV` (ENCLV). 
112    /// The ENCLV instruction invokes the virtualization SGX leaf functions for managing enclaves in a virtualized environment. Software specifies the leaf function by setting the appropriate value in the register EAX as input. The registers RBX, RCX, and RDX have leaf-specific purpose, and may act as input, as output, or may be unused. In non 64-bit mode, the instruction ignores upper 32 bits of the RAX register.
113    ///
114    ///
115    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/ENCLV.html).
116    ///
117    /// Supported operand variants:
118    ///
119    /// ```text
120    /// +---+----------+
121    /// | # | Operands |
122    /// +---+----------+
123    /// | 1 | (none)   |
124    /// +---+----------+
125    /// ```
126    #[inline]
127    pub fn enclv(&mut self)
128    where Assembler<'a>: EnclvEmitter {
129        <Self as EnclvEmitter>::enclv(self);
130    }
131}
asmkit/x86/features/SGX.rs

asmkit/x86/features/
SGX.rs
