asmkit/x86/features/
PCLMULQDQ.rs

1use crate::x86::assembler::*;
2use crate::x86::operands::*;
3use super::super::opcodes::*;
4use crate::core::emitter::*;
5use crate::core::operand::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `SSE_PCLMULQDQ` (PCLMULQDQ). 
11/// Performs a carry-less multiplication of two quadwords, selected from the first source and second source operand according to the value of the immediate byte. Bits 4 and 0 are used to select which 64-bit half of each operand to use according to Table 4-13, other bits of the immediate byte are ignored.
12///
13///
14/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/PCLMULQDQ.html).
15///
16/// Supported operand variants:
17///
18/// ```text
19/// +---+---------------+
20/// | # | Operands      |
21/// +---+---------------+
22/// | 1 | Xmm, Mem, Imm |
23/// | 2 | Xmm, Xmm, Imm |
24/// +---+---------------+
25/// ```
26pub trait SsePclmulqdqEmitter<A, B, C> {
27    fn sse_pclmulqdq(&mut self, op0: A, op1: B, op2: C);
28}
29
30impl<'a> SsePclmulqdqEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
31    fn sse_pclmulqdq(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
32        self.emit(SSE_PCLMULQDQRRI, op0.as_operand(), op1.as_operand(), op2.as_operand(), &NOREG);
33    }
34}
35
36impl<'a> SsePclmulqdqEmitter<Xmm, Mem, Imm> for Assembler<'a> {
37    fn sse_pclmulqdq(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
38        self.emit(SSE_PCLMULQDQRMI, op0.as_operand(), op1.as_operand(), op2.as_operand(), &NOREG);
39    }
40}
41
42
43impl<'a> Assembler<'a> {
44    /// `SSE_PCLMULQDQ` (PCLMULQDQ). 
45    /// Performs a carry-less multiplication of two quadwords, selected from the first source and second source operand according to the value of the immediate byte. Bits 4 and 0 are used to select which 64-bit half of each operand to use according to Table 4-13, other bits of the immediate byte are ignored.
46    ///
47    ///
48    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/PCLMULQDQ.html).
49    ///
50    /// Supported operand variants:
51    ///
52    /// ```text
53    /// +---+---------------+
54    /// | # | Operands      |
55    /// +---+---------------+
56    /// | 1 | Xmm, Mem, Imm |
57    /// | 2 | Xmm, Xmm, Imm |
58    /// +---+---------------+
59    /// ```
60    #[inline]
61    pub fn sse_pclmulqdq<A, B, C>(&mut self, op0: A, op1: B, op2: C)
62    where Assembler<'a>: SsePclmulqdqEmitter<A, B, C> {
63        <Self as SsePclmulqdqEmitter<A, B, C>>::sse_pclmulqdq(self, op0, op1, op2);
64    }
65}
asmkit/x86/features/PCLMULQDQ.rs

asmkit/x86/features/
PCLMULQDQ.rs
