asmkit/x86/features/
XSS.rs

1use crate::x86::assembler::*;
2use crate::x86::operands::*;
3use super::super::opcodes::*;
4use crate::core::emitter::*;
5use crate::core::operand::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `XRSTORS` (XRSTORS). 
11/// Performs a full or partial restore of processor state components from the XSAVE area located at the memory address specified by the source operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components restored correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XRSTORS may be executed only if CPL = 0.
12///
13///
14/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/XRSTORS.html).
15///
16/// Supported operand variants:
17///
18/// ```text
19/// +---+----------+
20/// | # | Operands |
21/// +---+----------+
22/// | 1 | Mem      |
23/// +---+----------+
24/// ```
25pub trait XrstorsEmitter<A> {
26    fn xrstors(&mut self, op0: A);
27}
28
29impl<'a> XrstorsEmitter<Mem> for Assembler<'a> {
30    fn xrstors(&mut self, op0: Mem) {
31        self.emit(XRSTORS32M, op0.as_operand(), &NOREG, &NOREG, &NOREG);
32    }
33}
34
35/// `XSAVES` (XSAVES). 
36/// Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), the logicalAND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XSAVES may be executed only if CPL = 0.
37///
38///
39/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/XSAVES.html).
40///
41/// Supported operand variants:
42///
43/// ```text
44/// +---+----------+
45/// | # | Operands |
46/// +---+----------+
47/// | 1 | Mem      |
48/// +---+----------+
49/// ```
50pub trait XsavesEmitter<A> {
51    fn xsaves(&mut self, op0: A);
52}
53
54impl<'a> XsavesEmitter<Mem> for Assembler<'a> {
55    fn xsaves(&mut self, op0: Mem) {
56        self.emit(XSAVES32M, op0.as_operand(), &NOREG, &NOREG, &NOREG);
57    }
58}
59
60
61impl<'a> Assembler<'a> {
62    /// `XRSTORS` (XRSTORS). 
63    /// Performs a full or partial restore of processor state components from the XSAVE area located at the memory address specified by the source operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components restored correspond to the bits set in the requested-feature bitmap (RFBM), which is the logical-AND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XRSTORS may be executed only if CPL = 0.
64    ///
65    ///
66    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/XRSTORS.html).
67    ///
68    /// Supported operand variants:
69    ///
70    /// ```text
71    /// +---+----------+
72    /// | # | Operands |
73    /// +---+----------+
74    /// | 1 | Mem      |
75    /// +---+----------+
76    /// ```
77    #[inline]
78    pub fn xrstors<A>(&mut self, op0: A)
79    where Assembler<'a>: XrstorsEmitter<A> {
80        <Self as XrstorsEmitter<A>>::xrstors(self, op0);
81    }
82    /// `XSAVES` (XSAVES). 
83    /// Performs a full or partial save of processor state components to the XSAVE area located at the memory address specified by the destination operand. The implicit EDX:EAX register pair specifies a 64-bit instruction mask. The specific state components saved correspond to the bits set in the requested-feature bitmap (RFBM), the logicalAND of EDX:EAX and the logical-OR of XCR0 with the IA32_XSS MSR. XSAVES may be executed only if CPL = 0.
84    ///
85    ///
86    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/XSAVES.html).
87    ///
88    /// Supported operand variants:
89    ///
90    /// ```text
91    /// +---+----------+
92    /// | # | Operands |
93    /// +---+----------+
94    /// | 1 | Mem      |
95    /// +---+----------+
96    /// ```
97    #[inline]
98    pub fn xsaves<A>(&mut self, op0: A)
99    where Assembler<'a>: XsavesEmitter<A> {
100        <Self as XsavesEmitter<A>>::xsaves(self, op0);
101    }
102}
asmkit/x86/features/XSS.rs

asmkit/x86/features/
XSS.rs
