asmkit/x86/features/
FSGSBASE.rs

1use crate::x86::assembler::*;
2use crate::x86::operands::*;
3use super::super::opcodes::*;
4use crate::core::emitter::*;
5use crate::core::operand::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `RDFSBASE` (RDFSBASE). 
11/// Loads the general-purpose register indicated by the ModR/M:r/m field with the FS or GS segment base address.
12///
13///
14/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/RDFSBASE%3ARDGSBASE.html).
15///
16/// Supported operand variants:
17///
18/// ```text
19/// +---+----------+
20/// | # | Operands |
21/// +---+----------+
22/// | 1 | Gpd      |
23/// | 2 | Gpq      |
24/// +---+----------+
25/// ```
26pub trait RdfsbaseEmitter<A> {
27    fn rdfsbase(&mut self, op0: A);
28}
29
30impl<'a> RdfsbaseEmitter<Gpd> for Assembler<'a> {
31    fn rdfsbase(&mut self, op0: Gpd) {
32        self.emit(RDFSBASE32R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
33    }
34}
35
36impl<'a> RdfsbaseEmitter<Gpq> for Assembler<'a> {
37    fn rdfsbase(&mut self, op0: Gpq) {
38        self.emit(RDFSBASE64R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
39    }
40}
41
42/// `RDGSBASE` (RDGSBASE). 
43/// Loads the general-purpose register indicated by the ModR/M:r/m field with the FS or GS segment base address.
44///
45///
46/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/RDFSBASE%3ARDGSBASE.html).
47///
48/// Supported operand variants:
49///
50/// ```text
51/// +---+----------+
52/// | # | Operands |
53/// +---+----------+
54/// | 1 | Gpd      |
55/// | 2 | Gpq      |
56/// +---+----------+
57/// ```
58pub trait RdgsbaseEmitter<A> {
59    fn rdgsbase(&mut self, op0: A);
60}
61
62impl<'a> RdgsbaseEmitter<Gpd> for Assembler<'a> {
63    fn rdgsbase(&mut self, op0: Gpd) {
64        self.emit(RDGSBASE32R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
65    }
66}
67
68impl<'a> RdgsbaseEmitter<Gpq> for Assembler<'a> {
69    fn rdgsbase(&mut self, op0: Gpq) {
70        self.emit(RDGSBASE64R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
71    }
72}
73
74/// `WRFSBASE` (WRFSBASE). 
75/// Loads the FS or GS segment base address with the general-purpose register indicated by the modR/M:r/m field.
76///
77///
78/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/WRFSBASE%3AWRGSBASE.html).
79///
80/// Supported operand variants:
81///
82/// ```text
83/// +---+----------+
84/// | # | Operands |
85/// +---+----------+
86/// | 1 | Gpd      |
87/// | 2 | Gpq      |
88/// +---+----------+
89/// ```
90pub trait WrfsbaseEmitter<A> {
91    fn wrfsbase(&mut self, op0: A);
92}
93
94impl<'a> WrfsbaseEmitter<Gpd> for Assembler<'a> {
95    fn wrfsbase(&mut self, op0: Gpd) {
96        self.emit(WRFSBASE32R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
97    }
98}
99
100impl<'a> WrfsbaseEmitter<Gpq> for Assembler<'a> {
101    fn wrfsbase(&mut self, op0: Gpq) {
102        self.emit(WRFSBASE64R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
103    }
104}
105
106/// `WRGSBASE` (WRGSBASE). 
107/// Loads the FS or GS segment base address with the general-purpose register indicated by the modR/M:r/m field.
108///
109///
110/// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/WRFSBASE%3AWRGSBASE.html).
111///
112/// Supported operand variants:
113///
114/// ```text
115/// +---+----------+
116/// | # | Operands |
117/// +---+----------+
118/// | 1 | Gpd      |
119/// | 2 | Gpq      |
120/// +---+----------+
121/// ```
122pub trait WrgsbaseEmitter<A> {
123    fn wrgsbase(&mut self, op0: A);
124}
125
126impl<'a> WrgsbaseEmitter<Gpd> for Assembler<'a> {
127    fn wrgsbase(&mut self, op0: Gpd) {
128        self.emit(WRGSBASE32R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
129    }
130}
131
132impl<'a> WrgsbaseEmitter<Gpq> for Assembler<'a> {
133    fn wrgsbase(&mut self, op0: Gpq) {
134        self.emit(WRGSBASE64R, op0.as_operand(), &NOREG, &NOREG, &NOREG);
135    }
136}
137
138
139impl<'a> Assembler<'a> {
140    /// `RDFSBASE` (RDFSBASE). 
141    /// Loads the general-purpose register indicated by the ModR/M:r/m field with the FS or GS segment base address.
142    ///
143    ///
144    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/RDFSBASE%3ARDGSBASE.html).
145    ///
146    /// Supported operand variants:
147    ///
148    /// ```text
149    /// +---+----------+
150    /// | # | Operands |
151    /// +---+----------+
152    /// | 1 | Gpd      |
153    /// | 2 | Gpq      |
154    /// +---+----------+
155    /// ```
156    #[inline]
157    pub fn rdfsbase<A>(&mut self, op0: A)
158    where Assembler<'a>: RdfsbaseEmitter<A> {
159        <Self as RdfsbaseEmitter<A>>::rdfsbase(self, op0);
160    }
161    /// `RDGSBASE` (RDGSBASE). 
162    /// Loads the general-purpose register indicated by the ModR/M:r/m field with the FS or GS segment base address.
163    ///
164    ///
165    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/RDFSBASE%3ARDGSBASE.html).
166    ///
167    /// Supported operand variants:
168    ///
169    /// ```text
170    /// +---+----------+
171    /// | # | Operands |
172    /// +---+----------+
173    /// | 1 | Gpd      |
174    /// | 2 | Gpq      |
175    /// +---+----------+
176    /// ```
177    #[inline]
178    pub fn rdgsbase<A>(&mut self, op0: A)
179    where Assembler<'a>: RdgsbaseEmitter<A> {
180        <Self as RdgsbaseEmitter<A>>::rdgsbase(self, op0);
181    }
182    /// `WRFSBASE` (WRFSBASE). 
183    /// Loads the FS or GS segment base address with the general-purpose register indicated by the modR/M:r/m field.
184    ///
185    ///
186    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/WRFSBASE%3AWRGSBASE.html).
187    ///
188    /// Supported operand variants:
189    ///
190    /// ```text
191    /// +---+----------+
192    /// | # | Operands |
193    /// +---+----------+
194    /// | 1 | Gpd      |
195    /// | 2 | Gpq      |
196    /// +---+----------+
197    /// ```
198    #[inline]
199    pub fn wrfsbase<A>(&mut self, op0: A)
200    where Assembler<'a>: WrfsbaseEmitter<A> {
201        <Self as WrfsbaseEmitter<A>>::wrfsbase(self, op0);
202    }
203    /// `WRGSBASE` (WRGSBASE). 
204    /// Loads the FS or GS segment base address with the general-purpose register indicated by the modR/M:r/m field.
205    ///
206    ///
207    /// For more details, see the [Intel manual](https://www.felixcloutier.com/x86/WRFSBASE%3AWRGSBASE.html).
208    ///
209    /// Supported operand variants:
210    ///
211    /// ```text
212    /// +---+----------+
213    /// | # | Operands |
214    /// +---+----------+
215    /// | 1 | Gpd      |
216    /// | 2 | Gpq      |
217    /// +---+----------+
218    /// ```
219    #[inline]
220    pub fn wrgsbase<A>(&mut self, op0: A)
221    where Assembler<'a>: WrgsbaseEmitter<A> {
222        <Self as WrgsbaseEmitter<A>>::wrgsbase(self, op0);
223    }
224}
asmkit/x86/features/FSGSBASE.rs

asmkit/x86/features/
FSGSBASE.rs
