1use super::assembler::*;
13use super::operands::*;
14use crate::core::operand::RegType;
15
16pub const W: u32 = 0x1;
17pub const X: u32 = 0x2;
18pub const WX: u32 = W | X;
19
20pub const ZR: u32 = Gp::ID_ZR as u32;
21pub const SP: u32 = Gp::ID_SP as u32;
22
23#[derive(Debug, Clone, Copy, PartialEq, Eq)]
24pub enum RwInfo {
25 R,
26 RW,
27 RX,
28 RRW,
29 RWX,
30 W,
31 WRW,
32 WRX,
33 WRRW,
34 WRRX,
35 WW,
36 X,
37 XRX,
38 XXRRX,
39
40 LDn,
41 STn,
42}
43
44pub const RWI_R: u16 = RwInfo::R as u16;
45pub const RWI_RW: u16 = RwInfo::RW as u16;
46pub const RWI_RX: u16 = RwInfo::RX as u16;
47pub const RWI_RRW: u16 = RwInfo::RRW as u16;
48pub const RWI_RWX: u16 = RwInfo::RWX as u16;
49pub const RWI_W: u16 = RwInfo::W as u16;
50pub const RWI_WRW: u16 = RwInfo::WRW as u16;
51pub const RWI_WRX: u16 = RwInfo::WRX as u16;
52pub const RWI_WRRW: u16 = RwInfo::WRRW as u16;
53pub const RWI_WRRX: u16 = RwInfo::WRRX as u16;
54pub const RWI_WW: u16 = RwInfo::WW as u16;
55pub const RWI_X: u16 = RwInfo::X as u16;
56pub const RWI_XRX: u16 = RwInfo::XRX as u16;
57pub const RWI_XXRRX: u16 = RwInfo::XXRRX as u16;
58pub const RWI_LDN: u16 = RwInfo::LDn as u16;
59pub const RWI_STN: u16 = RwInfo::STn as u16;
60
61impl RwInfo {
62 pub const SPECIAL_START: Self = Self::LDn;
63}
64
65#[derive(Debug, Clone, Copy, PartialEq, Eq)]
66pub enum InstElementType {
67 None = VecElementType::None as isize,
68 B = VecElementType::B as isize,
69 H = VecElementType::H as isize,
70 S = VecElementType::S as isize,
71 D = VecElementType::D as isize,
72 _2H = VecElementType::H2 as isize,
73 _4B = VecElementType::B4 as isize,
74}
75
76#[derive(Debug, Clone, Copy, PartialEq, Eq)]
77pub enum GpType {
78 X,
79 W,
80 XSp,
81}
82
83#[derive(Debug, Clone, Copy, PartialEq, Eq)]
84#[repr(u32)]
85pub enum OpSignature {
86 GpW = Reg::signature_of(RegType::Gp32).bits,
87 GpX = Reg::signature_of(RegType::Gp64).bits,
88 B = Reg::signature_of(RegType::Vec8).bits,
89 H = Reg::signature_of(RegType::Vec16).bits,
90 S = Reg::signature_of(RegType::Vec32).bits,
91 D = Reg::signature_of(RegType::Vec64).bits,
92 Q = Reg::signature_of(RegType::Vec128).bits,
93 V8B = Self::D as u32 | Vec::SIGNATURE_ELEMENT_B,
94 V4H = Self::D as u32 | Vec::SIGNATURE_ELEMENT_H,
95 V2S = Self::D as u32 | Vec::SIGNATURE_ELEMENT_S,
96
97 V16B = Self::Q as u32 | Vec::SIGNATURE_ELEMENT_B,
98 V8H = Self::Q as u32 | Vec::SIGNATURE_ELEMENT_H,
99 V4S = Self::Q as u32 | Vec::SIGNATURE_ELEMENT_S,
100 V2D = Self::Q as u32 | Vec::SIGNATURE_ELEMENT_D,
101}
102
103#[derive(Debug, Clone, Copy, PartialEq, Eq)]
104pub enum HFConv {
105 N,
106 None,
107 A,
108 B,
109 C,
110 D,
111 Count,
112}
113
114pub enum VOType {
115 VB,
116 VBH,
117 VBH4S,
118 VBHS,
119 VBHSD2,
120 VHS,
121 VS,
122
123 VB8H4,
124 VB8H4S2,
125 VB8D1,
126 VH4S2,
127
128 VB16,
129 VB16H8,
130 VB16H8S4,
131 VB16D2,
132 VH8S4,
133 VS4,
134 VD2,
135
136 SVBHS,
137 SVB8H4S2,
138 SVHS,
139 VAny,
140 SVAny,
141
142 Count,
143}
144
145#[derive(Debug, Clone, Copy, PartialEq, Eq)]
146#[repr(u8)]
147pub enum Encoding {
148 None = 0,
149 BaseAddSub,
150 BaseAdr,
151 BaseAtDcIcTlbi,
152 BaseAtomicCasp,
153 BaseAtomicOp,
154 BaseAtomicSt,
155 BaseBfc,
156 BaseBfi,
157 BaseBfm,
158 BaseBfx,
159 BaseBranchCmp,
160 BaseBranchReg,
161 BaseBranchRel,
162 BaseBranchTst,
163 BaseCCmp,
164 BaseCInc,
165 BaseCSel,
166 BaseCSet,
167 BaseCmpCmn,
168 BaseExtend,
169 BaseExtract,
170 BaseLdSt,
171 BaseLdpStp,
172 BaseLdxp,
173 BaseLogical,
174 BaseMinMax,
175 BaseMov,
176 BaseMovKNZ,
177 BaseMrs,
178 BaseMsr,
179 BaseMvnNeg,
180 BaseOp,
181 BaseOpImm,
182 BaseOpX16,
183 BasePrfm,
184 BaseR,
185 BaseRMNoImm,
186 BaseRMSImm10,
187 BaseRMSImm9,
188 BaseRR,
189 BaseRRII,
190 BaseRRR,
191 BaseRRRR,
192 BaseRev,
193 BaseShift,
194 BaseStx,
195 BaseStxp,
196 BaseSys,
197 BaseTst,
198 FSimdPair,
199 FSimdSV,
200 FSimdVV,
201 FSimdVVV,
202 FSimdVVVV,
203 FSimdVVVe,
204 ISimdPair,
205 ISimdSV,
206 ISimdVV,
207 ISimdVVV,
208 ISimdVVVI,
209 ISimdVVVV,
210 ISimdVVVVx,
211 ISimdVVVe,
212 ISimdVVVx,
213 ISimdVVx,
214 ISimdWWV,
215 SimdBicOrr,
216 SimdCmp,
217 SimdDot,
218 SimdDup,
219 SimdFcadd,
220 SimdFccmpFccmpe,
221 SimdFcm,
222 SimdFcmla,
223 SimdFcmpFcmpe,
224 SimdFcsel,
225 SimdFcvt,
226 SimdFcvtLN,
227 SimdFcvtSV,
228 SimdFmlal,
229 SimdFmov,
230 SimdIns,
231 SimdLdNStN,
232 SimdLdSt,
233 SimdLdpStp,
234 SimdLdurStur,
235 SimdMov,
236 SimdMoviMvni,
237 SimdShift,
238 SimdShiftES,
239 SimdSm3tt,
240 SimdSmovUmov,
241 SimdSxtlUxtl,
242 SimdTblTbx,
243
244 Count,
245}
246
247impl TryFrom<u8> for Encoding {
248 type Error = ();
249
250 fn try_from(value: u8) -> Result<Self, Self::Error> {
251 unsafe {
252 if value >= Self::Count as u8 {
253 Err(())
254 } else {
255 Ok(::core::mem::transmute(value))
256 }
257 }
258 }
259}
260
261const HF_C: u32 = HFConv::C as u32;
262
263macro_rules! impl_const_new_zero {
264 ($name:ident { $($field:ident : $ty:ty),* $(,)? }) => {
265 impl $name {
266 pub const fn new($($field: $ty),*) -> Self {
267 Self {
268 $($field),*
269 }
270 }
271 }
272 };
273}
274
275#[derive(Debug, Clone, Copy, Default)]
276pub struct BaseOp {
277 pub opcode: u32,
278}
279
280#[derive(Debug, Clone, Copy, Default)]
281pub struct BaseOpX16 {
282 pub opcode: u32,
283}
284
285#[derive(Debug, Clone, Copy, Default)]
286pub struct BaseOpImm {
287 pub opcode: u32,
288 pub imm_bits: u16,
289 pub imm_offset: u16,
290}
291
292#[derive(Debug, Clone, Copy, Default)]
293pub struct BaseR {
294 pub opcode: u32,
295 pub reg_type: u32,
296 pub reg_hi_id: u32,
297 pub r_shift: u32,
298}
299
300#[derive(Debug, Clone, Copy, Default)]
301pub struct BaseRR {
302 pub opcode: u32,
303 pub a_type: u32,
304 pub a_hi_id: u32,
305 pub a_shift: u32,
306 pub b_type: u32,
307 pub b_hi_id: u32,
308 pub b_shift: u32,
309 pub uniform: u32,
310}
311
312#[derive(Debug, Clone, Copy, Default)]
313pub struct BaseRRR {
314 opcode: u32,
315 pub a_type: u32,
316 pub a_hi_id: u32,
317 pub b_type: u32,
318 pub b_hi_id: u32,
319 pub c_type: u32,
320 pub c_hi_id: u32,
321 pub uniform: u32,
322}
323
324impl BaseRRR {
325 pub const fn opcode(&self) -> u32 {
326 self.opcode << 10
327 }
328}
329
330#[derive(Debug, Clone, Copy, Default)]
331pub struct BaseRRRR {
332 opcode: u32,
333 pub a_type: u32,
334 pub a_hi_id: u32,
335 pub b_type: u32,
336 pub b_hi_id: u32,
337 pub c_type: u32,
338 pub c_hi_id: u32,
339 pub d_type: u32,
340 pub d_hi_id: u32,
341 pub uniform: u32,
342}
343
344impl BaseRRRR {
345 pub const fn opcode(&self) -> u32 {
346 self.opcode << 10
347 }
348}
349
350#[derive(Debug, Clone, Copy, Default)]
351pub struct BaseRRII {
352 opcode: u32,
353 pub a_type: u32,
354 pub a_hi_id: u32,
355 pub b_type: u32,
356 pub b_hi_id: u32,
357 pub a_imm_size: u32,
358 pub a_imm_discard_lsb: u32,
359 pub a_imm_offset: u32,
360 pub b_imm_size: u32,
361 pub b_imm_discard_lsb: u32,
362 pub b_imm_offset: u32,
363}
364
365impl BaseRRII {
366 pub const fn opcode(&self) -> u32 {
367 self.opcode << 10
368 }
369}
370
371#[derive(Debug, Clone, Copy, Default)]
372pub struct BaseAtDcIcTlbi {
373 pub imm_verify_mask: u32,
374 pub imm_verify_data: u32,
375 pub mandatory_reg: u32,
376}
377
378#[derive(Debug, Clone, Copy, Default)]
379pub struct BaseAdcSbc {
380 pub opcode: u32,
381}
382
383#[derive(Debug, Clone, Copy, Default)]
384pub struct BaseMinMax {
385 pub register_op: u32,
386 pub immediate_op: u32,
387}
388
389#[derive(Debug, Clone, Copy, Default)]
390pub struct BaseAddSub {
391 pub shifted_op: u32,
392 pub extended_op: u32,
393 pub immediate_op: u32,
394}
395
396#[derive(Debug, Clone, Copy, Default)]
397pub struct BaseAdr {
398 opcode: u32,
399 pub offset_type: u8,
400}
401
402impl BaseAdr {
403 pub const fn opcode(&self) -> u32 {
404 self.opcode << 10
405 }
406}
407
408#[derive(Debug, Clone, Copy, Default)]
409pub struct BaseBfm {
410 pub opcode: u32,
411}
412
413#[derive(Debug, Clone, Copy, Default)]
414pub struct BaseCmpCmn {
415 pub shifted_op: u32,
416 pub extended_op: u32,
417 pub immediate_op: u32,
418}
419
420#[derive(Debug, Clone, Copy, Default)]
421pub struct BaseExtend {
422 opcode: u32,
423 pub reg_type: u32,
424 pub u: u32,
425}
426
427impl BaseExtend {
428 pub const fn opcode(&self) -> u32 {
429 self.opcode << 10
430 }
431}
432
433#[derive(Debug, Clone, Copy, Default)]
434pub struct BaseLogical {
435 pub shifted_op: u32,
436 pub immediate_op: u32,
437 pub negate_imm: u32,
438}
439
440#[derive(Debug, Clone, Copy, Default)]
441pub struct BaseMvnNeg {
442 pub opcode: u32,
443}
444
445#[derive(Debug, Clone, Copy, Default)]
446pub struct BaseShift {
447 pub register_op: u32,
448 pub immediate_op: u32,
449 pub ror: u32,
450}
451
452impl BaseShift {
453 pub const fn register_op(&self) -> u32 {
454 self.register_op << 10
455 }
456
457 pub const fn immediate_op(&self) -> u32 {
458 self.immediate_op << 10
459 }
460}
461
462#[derive(Debug, Clone, Copy, Default)]
463pub struct BaseTst {
464 pub shifted_op: u32,
465 pub immediate_op: u32,
466}
467
468#[derive(Debug, Clone, Copy, Default)]
469pub struct BaseRMNoImm {
470 opcode: u32,
471 pub reg_type: u32,
472 pub reg_hi_id: u32,
473 pub x_offset: u32,
474}
475
476impl BaseRMNoImm {
477 pub const fn opcode(&self) -> u32 {
478 self.opcode << 10
479 }
480}
481
482#[derive(Debug, Clone, Copy, Default)]
483pub struct BaseRMSImm9 {
484 pub offset_op: u32,
485 pub pre_post_op: u32,
486 pub reg_type: u32,
487 pub reg_hi_id: u32,
488 pub x_offset: u32,
489 pub imm_shift: u32,
490}
491
492impl BaseRMSImm9 {
493 pub const fn offset_op(&self) -> u32 {
494 self.offset_op << 10
495 }
496
497 pub const fn pre_post_op(&self) -> u32 {
498 self.pre_post_op << 10
499 }
500}
501
502#[derive(Debug, Clone, Copy, Default)]
503pub struct BaseRMSImm10 {
504 opcode: u32,
505 pub reg_type: u32,
506 pub reg_hi_id: u32,
507 pub x_offset: u32,
508 pub imm_shift: u32,
509}
510
511impl BaseRMSImm10 {
512 pub const fn opcode(&self) -> u32 {
513 self.opcode << 10
514 }
515}
516
517#[derive(Debug, Clone, Copy, Default)]
518pub struct BasePrfm {
519 pub register_op: u32,
520 pub s_offset_op: u32,
521 pub u_offset_op: u32,
522 pub literal_op: u32,
523}
524
525#[derive(Debug, Clone, Copy, Default)]
526pub struct BaseLdSt {
527 pub u_offset_op: u32,
528 pub pre_post_op: u32,
529 pub register_op: u32,
530 pub literal_op: u32,
531 pub reg_type: u32,
532 pub x_offset: u32,
533 pub u_offset_shift: u32,
534 pub u_alt_inst_id: u32,
535}
536
537#[derive(Debug, Clone, Copy, Default)]
538pub struct BaseLdpStp {
539 pub offset_op: u32,
540 pub pre_post_op: u32,
541 pub reg_type: u32,
542 pub x_offset: u32,
543 pub offset_shift: u32,
544}
545
546#[derive(Debug, Clone, Copy, Default)]
547pub struct BaseStx {
548 opcode: u32,
549 pub reg_type: u32,
550 pub x_offset: u32,
551}
552
553impl BaseStx {
554 pub const fn opcode(&self) -> u32 {
555 self.opcode << 10
556 }
557}
558
559#[derive(Debug, Clone, Copy, Default)]
560pub struct BaseLdxp {
561 opcode: u32,
562 pub reg_type: u32,
563 pub x_offset: u32,
564}
565
566impl BaseLdxp {
567 pub const fn opcode(&self) -> u32 {
568 self.opcode << 10
569 }
570}
571
572#[derive(Debug, Clone, Copy, Default)]
573pub struct BaseStxp {
574 opcode: u32,
575 pub reg_type: u32,
576 pub x_offset: u32,
577}
578
579impl BaseStxp {
580 pub const fn opcode(&self) -> u32 {
581 self.opcode << 10
582 }
583}
584
585#[derive(Debug, Clone, Copy, Default)]
586pub struct BaseAtomicOp {
587 opcode: u32,
588 pub reg_type: u32,
589 pub x_offset: u32,
590 pub zr_reg: u32,
591}
592
593impl BaseAtomicOp {
594 pub const fn opcode(&self) -> u32 {
595 self.opcode << 10
596 }
597}
598
599#[derive(Debug, Clone, Copy, Default)]
600pub struct BaseAtomicSt {
601 opcode: u32,
602 pub reg_type: u32,
603 pub x_offset: u32,
604}
605
606impl BaseAtomicSt {
607 pub const fn opcode(&self) -> u32 {
608 self.opcode << 10
609 }
610}
611
612#[derive(Debug, Clone, Copy, Default)]
613pub struct BaseAtomicCasp {
614 opcode: u32,
615 pub reg_type: u32,
616 pub x_offset: u32,
617}
618
619impl BaseAtomicCasp {
620 pub const fn opcode(&self) -> u32 {
621 self.opcode << 10
622 }
623}
624
625pub type BaseBranchReg = BaseOp;
626pub type BaseBranchRel = BaseOp;
627pub type BaseBranchCmp = BaseOp;
628pub type BaseBranchTst = BaseOp;
629pub type BaseExtract = BaseOp;
630pub type BaseBfc = BaseOp;
631pub type BaseBfi = BaseOp;
632pub type BaseBfx = BaseOp;
633pub type BaseCCmp = BaseOp;
634pub type BaseCInc = BaseOp;
635pub type BaseCSet = BaseOp;
636pub type BaseCSel = BaseOp;
637pub type BaseMovKNZ = BaseOp;
638pub type BaseMull = BaseOp;
639
640#[derive(Debug, Clone, Copy, Default)]
641pub struct FSimdGeneric {
642 scalar_op: u32,
643 scalar_hf: u32,
644 vector_op: u32,
645 vector_hf: u32,
646}
647
648impl FSimdGeneric {
649 pub const fn scalar_op(&self) -> u32 {
650 self.scalar_op << 10
651 }
652
653 pub const fn vector_op(&self) -> u32 {
654 self.vector_op << 10
655 }
656
657 pub const fn scalar_hf(&self) -> u32 {
658 self.scalar_hf
659 }
660
661 pub const fn vector_hf(&self) -> u32 {
662 self.vector_hf
663 }
664}
665
666pub type FSimdVV = FSimdGeneric;
667pub type FSimdVVV = FSimdGeneric;
668pub type FSimdVVVV = FSimdGeneric;
669
670#[derive(Debug, Clone, Copy, Default)]
671pub struct FSimdSV {
672 pub opcode: u32,
673}
674
675#[derive(Debug, Clone, Copy, Default)]
676pub struct FSimdVVVe {
677 scalar_op: u32,
678 scalar_hf: u32,
679 vector_op: u32,
680 element_op: u32,
681}
682
683impl FSimdVVVe {
684 pub const fn scalar_op(&self) -> u32 {
685 self.scalar_op << 10
686 }
687
688 pub const fn scalar_hf(&self) -> u32 {
689 self.scalar_hf
690 }
691
692 pub const fn vector_op(&self) -> u32 {
693 self.vector_op << 10
694 }
695
696 pub const fn vector_hf(&self) -> u32 {
697 HF_C
698 }
699
700 pub const fn element_scalar_op(&self) -> u32 {
701 (self.element_op << 10) | (0x5 << 28)
702 }
703
704 pub const fn element_vector_op(&self) -> u32 {
705 self.element_op << 10
706 }
707}
708
709#[derive(Debug, Clone, Copy, Default)]
710pub struct SimdFcadd {
711 opcode: u32,
712}
713
714impl SimdFcadd {
715 pub const fn opcode(&self) -> u32 {
716 self.opcode << 10
717 }
718}
719
720#[derive(Debug, Clone, Copy, Default)]
721pub struct SimdFcmla {
722 regular_op: u32,
723 element_op: u32,
724}
725
726impl SimdFcmla {
727 pub const fn regular_op(&self) -> u32 {
728 self.regular_op << 10
729 }
730
731 pub const fn element_op(&self) -> u32 {
732 self.element_op << 10
733 }
734}
735
736#[derive(Debug, Clone, Copy, Default)]
737pub struct SimdFccmpFccmpe {
738 opcode: u32,
739}
740
741impl SimdFccmpFccmpe {
742 pub const fn opcode(&self) -> u32 {
743 self.opcode
744 }
745}
746
747#[derive(Debug, Clone, Copy, Default)]
748pub struct SimdFcm {
749 register_op: u32,
750 register_hf: u32,
751 zero_op: u32,
752}
753
754impl SimdFcm {
755 pub const fn has_register_op(&self) -> bool {
756 self.register_op != 0
757 }
758
759 pub const fn has_zero_op(&self) -> bool {
760 self.zero_op != 0
761 }
762
763 pub const fn register_scalar_op(&self) -> u32 {
764 (self.register_op << 10) | (0x5 << 28)
765 }
766
767 pub const fn register_vector_op(&self) -> u32 {
768 self.register_op << 10
769 }
770
771 pub const fn register_scalar_hf(&self) -> u32 {
772 self.register_hf
773 }
774
775 pub const fn register_vector_hf(&self) -> u32 {
776 self.register_hf
777 }
778
779 pub const fn zero_scalar_op(&self) -> u32 {
780 (self.zero_op << 10) | (0x5 << 28)
781 }
782
783 pub const fn zero_vector_op(&self) -> u32 {
784 self.zero_op << 10
785 }
786}
787
788#[derive(Debug, Clone, Copy, Default)]
789pub struct SimdFcmpFcmpe {
790 opcode: u32,
791}
792
793impl SimdFcmpFcmpe {
794 pub const fn opcode(&self) -> u32 {
795 self.opcode
796 }
797}
798
799#[derive(Debug, Clone, Copy, Default)]
800pub struct SimdFcvtLN {
801 opcode: u32,
802 is_cvtxn: u32,
803 has_scalar: u32,
804}
805
806impl SimdFcvtLN {
807 pub const fn scalar_op(&self) -> u32 {
808 (self.opcode << 10) | (0x5 << 28)
809 }
810
811 pub const fn vector_op(&self) -> u32 {
812 self.opcode << 10
813 }
814
815 pub const fn is_cvtxn(&self) -> u32 {
816 self.is_cvtxn
817 }
818
819 pub const fn has_scalar(&self) -> u32 {
820 self.has_scalar
821 }
822}
823
824#[derive(Debug, Clone, Copy, Default)]
825pub struct SimdFcvtSV {
826 vector_int_op: u32,
827 vector_fp_op: u32,
828 general_op: u32,
829 is_float_to_int: u32,
830}
831
832impl SimdFcvtSV {
833 pub const fn scalar_int_op(&self) -> u32 {
834 (self.vector_int_op << 10) | (0x5 << 28)
835 }
836
837 pub const fn vector_int_op(&self) -> u32 {
838 self.vector_int_op << 10
839 }
840
841 pub const fn scalar_fp_op(&self) -> u32 {
842 (self.vector_fp_op << 10) | (0x5 << 28)
843 }
844
845 pub const fn vector_fp_op(&self) -> u32 {
846 self.vector_fp_op << 10
847 }
848
849 pub const fn general_op(&self) -> u32 {
850 self.general_op << 10
851 }
852
853 pub const fn is_float_to_int(&self) -> u32 {
854 self.is_float_to_int
855 }
856
857 pub const fn is_fixed_point(&self) -> bool {
858 self.vector_fp_op != 0
859 }
860}
861
862#[derive(Debug, Clone, Copy, Default)]
863pub struct SimdFmlal {
864 pub vector_op: u32,
865 pub element_op: u32,
866 pub optional_q: u8,
867 pub ta: u8,
868 pub tb: u8,
869 pub t_element: u8,
870}
871
872impl SimdFmlal {
873 pub const fn vector_op(&self) -> u32 {
874 self.vector_op << 10
875 }
876
877 pub const fn element_op(&self) -> u32 {
878 self.element_op << 10
879 }
880
881 pub const fn optional_q(&self) -> u32 {
882 self.optional_q as u32
883 }
884}
885
886#[derive(Debug, Clone, Copy, Default)]
887pub struct FSimdPair {
888 pub scalar_op: u32,
889 pub vector_op: u32,
890}
891
892impl FSimdPair {
893 pub const fn scalar_op(&self) -> u32 {
894 self.scalar_op << 10
895 }
896
897 pub const fn vector_op(&self) -> u32 {
898 self.vector_op << 10
899 }
900}
901
902#[derive(Debug, Clone, Copy, Default)]
903pub struct ISimdVV {
904 opcode: u32,
905 pub vec_op_type: u32,
906}
907
908impl ISimdVV {
909 pub const fn opcode(&self) -> u32 {
910 self.opcode << 10
911 }
912}
913
914#[derive(Debug, Clone, Copy, Default)]
915pub struct ISimdVVx {
916 opcode: u32,
917 pub op0_signature: u32,
918 pub op1_signature: u32,
919}
920
921impl ISimdVVx {
922 pub const fn opcode(&self) -> u32 {
923 self.opcode << 10
924 }
925}
926
927#[derive(Debug, Clone, Copy, Default)]
928pub struct ISimdSV {
929 opcode: u32,
930 pub vec_op_type: u32,
931}
932
933impl ISimdSV {
934 pub const fn opcode(&self) -> u32 {
935 self.opcode << 10
936 }
937}
938
939#[derive(Debug, Clone, Copy, Default)]
940pub struct ISimdVVV {
941 opcode: u32,
942 pub vec_op_type: u32,
943}
944
945impl ISimdVVV {
946 pub const fn opcode(&self) -> u32 {
947 self.opcode << 10
948 }
949}
950
951#[derive(Debug, Clone, Copy, Default)]
952pub struct ISimdVVVx {
953 opcode: u32,
954 pub op0_signature: u32,
955 pub op1_signature: u32,
956 pub op2_signature: u32,
957}
958
959impl ISimdVVVx {
960 pub const fn opcode(&self) -> u32 {
961 self.opcode << 10
962 }
963}
964
965#[derive(Debug, Clone, Copy, Default)]
966pub struct ISimdWWV {
967 opcode: u32,
968 pub vec_op_type: u32,
969}
970
971impl ISimdWWV {
972 pub const fn opcode(&self) -> u32 {
973 self.opcode << 10
974 }
975}
976
977#[derive(Debug, Clone, Copy, Default)]
978pub struct ISimdVVVe {
979 pub regular_op: u32,
980 pub regular_vec_type: u32,
981 pub element_op: u32,
982 pub element_vec_type: u32,
983}
984
985#[derive(Debug, Clone, Copy, Default)]
986pub struct ISimdVVVI {
987 opcode: u32,
988 pub vec_op_type: u32,
989 pub imm_size: u32,
990 pub imm_shift: u32,
991 pub imm64_has_one_bit_less: u32,
992}
993
994impl ISimdVVVI {
995 pub const fn opcode(&self) -> u32 {
996 self.opcode << 10
997 }
998}
999
1000#[derive(Debug, Clone, Copy, Default)]
1001pub struct ISimdVVVV {
1002 pub opcode: u32,
1003 pub vec_op_type: u32,
1004}
1005
1006#[derive(Debug, Clone, Copy, Default)]
1007pub struct ISimdVVVVx {
1008 pub opcode: u32,
1009 pub op0_signature: u32,
1010 pub op1_signature: u32,
1011 pub op2_signature: u32,
1012 pub op3_signature: u32,
1013}
1014
1015#[derive(Debug, Clone, Copy, Default)]
1016pub struct SimdBicOrr {
1017 pub register_op: u32,
1018 pub immediate_op: u32,
1019}
1020
1021#[derive(Debug, Clone, Copy, Default)]
1022pub struct SimdCmp {
1023 pub register_op: u32,
1024 pub zero_op: u32,
1025 pub vec_op_type: u32,
1026}
1027
1028#[derive(Debug, Clone, Copy, Default)]
1029pub struct SimdDot {
1030 pub vector_op: u32,
1031 pub element_op: u32,
1032 pub ta: u8,
1033 pub tb: u8,
1034 pub t_element: u8,
1035}
1036
1037#[derive(Debug, Clone, Copy, Default)]
1038pub struct SimdMoviMvni {
1039 pub opcode: u32,
1040 pub inverted: u32,
1041}
1042
1043#[derive(Debug, Clone, Copy, Default)]
1044pub struct SimdLdSt {
1045 pub u_offset_op: u32,
1046 pub pre_post_op: u32,
1047 pub register_op: u32,
1048 pub literal_op: u32,
1049 pub u_alt_inst_id: u32,
1050}
1051
1052#[derive(Debug, Clone, Copy, Default)]
1053pub struct SimdLdNStN {
1054 pub single_op: u32,
1055 pub multiple_op: u32,
1056 pub n: u32,
1057 pub replicate: u32,
1058}
1059
1060#[derive(Debug, Clone, Copy, Default)]
1061pub struct SimdLdpStp {
1062 pub offset_op: u32,
1063 pub pre_post_op: u32,
1064}
1065
1066#[derive(Debug, Clone, Copy, Default)]
1067pub struct SimdLdurStur {
1068 pub opcode: u32,
1069}
1070
1071#[derive(Debug, Clone, Copy, Default)]
1072pub struct ISimdPair {
1073 pub opcode2: u32,
1074 pub opcode3: u32,
1075 pub op_type3: u32,
1076}
1077
1078#[derive(Debug, Clone, Copy, Default)]
1079pub struct SimdShift {
1080 pub register_op: u32,
1081 pub immediate_op: u32,
1082 pub inverted_imm: u32,
1083 pub vec_op_type: u32,
1084}
1085
1086#[derive(Debug, Clone, Copy, Default)]
1087pub struct SimdShiftES {
1088 pub opcode: u32,
1089 pub vec_op_type: u32,
1090}
1091
1092#[derive(Debug, Clone, Copy, Default)]
1093pub struct SimdSm3tt {
1094 pub opcode: u32,
1095}
1096
1097#[derive(Debug, Clone, Copy, Default)]
1098pub struct SimdSmovUmov {
1099 pub opcode: u32,
1100 pub vec_op_type: u32,
1101 pub is_signed: u32,
1102}
1103
1104#[derive(Debug, Clone, Copy, Default)]
1105pub struct SimdSxtlUxtl {
1106 pub opcode: u32,
1107 pub vec_op_type: u32,
1108}
1109
1110#[derive(Debug, Clone, Copy, Default)]
1111pub struct SimdTblTbx {
1112 pub opcode: u32,
1113}
1114
1115impl_const_new_zero!(BaseOp { opcode: u32 });
1116impl_const_new_zero!(BaseOpX16 { opcode: u32 });
1117impl_const_new_zero!(BaseOpImm {
1118 opcode: u32,
1119 imm_bits: u16,
1120 imm_offset: u16
1121});
1122impl_const_new_zero!(BaseR {
1123 opcode: u32,
1124 reg_type: u32,
1125 reg_hi_id: u32,
1126 r_shift: u32
1127});
1128impl_const_new_zero!(BaseRR {
1129 opcode: u32,
1130 a_type: u32,
1131 a_hi_id: u32,
1132 a_shift: u32,
1133 b_type: u32,
1134 b_hi_id: u32,
1135 b_shift: u32,
1136 uniform: u32,
1137});
1138impl_const_new_zero!(BaseRRR {
1139 opcode: u32,
1140 a_type: u32,
1141 a_hi_id: u32,
1142 b_type: u32,
1143 b_hi_id: u32,
1144 c_type: u32,
1145 c_hi_id: u32,
1146 uniform: u32,
1147});
1148impl_const_new_zero!(BaseRRRR {
1149 opcode: u32,
1150 a_type: u32,
1151 a_hi_id: u32,
1152 b_type: u32,
1153 b_hi_id: u32,
1154 c_type: u32,
1155 c_hi_id: u32,
1156 d_type: u32,
1157 d_hi_id: u32,
1158 uniform: u32,
1159});
1160impl_const_new_zero!(BaseRRII {
1161 opcode: u32,
1162 a_type: u32,
1163 a_hi_id: u32,
1164 b_type: u32,
1165 b_hi_id: u32,
1166 a_imm_size: u32,
1167 a_imm_discard_lsb: u32,
1168 a_imm_offset: u32,
1169 b_imm_size: u32,
1170 b_imm_discard_lsb: u32,
1171 b_imm_offset: u32,
1172});
1173impl_const_new_zero!(BaseAtDcIcTlbi {
1174 imm_verify_mask: u32,
1175 imm_verify_data: u32,
1176 mandatory_reg: u32,
1177});
1178impl_const_new_zero!(BaseAdcSbc { opcode: u32 });
1179impl_const_new_zero!(BaseMinMax {
1180 register_op: u32,
1181 immediate_op: u32
1182});
1183impl_const_new_zero!(BaseAddSub {
1184 shifted_op: u32,
1185 extended_op: u32,
1186 immediate_op: u32
1187});
1188impl_const_new_zero!(BaseAdr {
1189 opcode: u32,
1190 offset_type: u8
1191});
1192impl_const_new_zero!(BaseBfm { opcode: u32 });
1193impl_const_new_zero!(BaseCmpCmn {
1194 shifted_op: u32,
1195 extended_op: u32,
1196 immediate_op: u32
1197});
1198impl_const_new_zero!(BaseExtend {
1199 opcode: u32,
1200 reg_type: u32,
1201 u: u32
1202});
1203impl_const_new_zero!(BaseLogical {
1204 shifted_op: u32,
1205 immediate_op: u32,
1206 negate_imm: u32
1207});
1208impl_const_new_zero!(BaseMvnNeg { opcode: u32 });
1209impl_const_new_zero!(BaseShift {
1210 register_op: u32,
1211 immediate_op: u32,
1212 ror: u32
1213});
1214impl_const_new_zero!(BaseTst {
1215 shifted_op: u32,
1216 immediate_op: u32
1217});
1218impl_const_new_zero!(BaseRMNoImm {
1219 opcode: u32,
1220 reg_type: u32,
1221 reg_hi_id: u32,
1222 x_offset: u32
1223});
1224impl_const_new_zero!(BaseRMSImm9 {
1225 offset_op: u32,
1226 pre_post_op: u32,
1227 reg_type: u32,
1228 reg_hi_id: u32,
1229 x_offset: u32,
1230 imm_shift: u32,
1231});
1232impl_const_new_zero!(BaseRMSImm10 {
1233 opcode: u32,
1234 reg_type: u32,
1235 reg_hi_id: u32,
1236 x_offset: u32,
1237 imm_shift: u32,
1238});
1239impl_const_new_zero!(BasePrfm {
1240 register_op: u32,
1241 s_offset_op: u32,
1242 u_offset_op: u32,
1243 literal_op: u32
1244});
1245impl_const_new_zero!(BaseLdSt {
1246 u_offset_op: u32,
1247 pre_post_op: u32,
1248 register_op: u32,
1249 literal_op: u32,
1250 reg_type: u32,
1251 x_offset: u32,
1252 u_offset_shift: u32,
1253 u_alt_inst_id: u32,
1254});
1255impl_const_new_zero!(BaseLdpStp {
1256 offset_op: u32,
1257 pre_post_op: u32,
1258 reg_type: u32,
1259 x_offset: u32,
1260 offset_shift: u32,
1261});
1262impl_const_new_zero!(BaseStx {
1263 opcode: u32,
1264 reg_type: u32,
1265 x_offset: u32
1266});
1267impl_const_new_zero!(BaseLdxp {
1268 opcode: u32,
1269 reg_type: u32,
1270 x_offset: u32
1271});
1272impl_const_new_zero!(BaseStxp {
1273 opcode: u32,
1274 reg_type: u32,
1275 x_offset: u32
1276});
1277impl_const_new_zero!(BaseAtomicOp {
1278 opcode: u32,
1279 reg_type: u32,
1280 x_offset: u32,
1281 zr_reg: u32
1282});
1283impl_const_new_zero!(BaseAtomicSt {
1284 opcode: u32,
1285 reg_type: u32,
1286 x_offset: u32
1287});
1288impl_const_new_zero!(BaseAtomicCasp {
1289 opcode: u32,
1290 reg_type: u32,
1291 x_offset: u32
1292});
1293
1294impl_const_new_zero!(FSimdGeneric {
1295 scalar_op: u32,
1296 scalar_hf: u32,
1297 vector_op: u32,
1298 vector_hf: u32
1299});
1300impl_const_new_zero!(FSimdSV { opcode: u32 });
1301impl_const_new_zero!(FSimdVVVe {
1302 scalar_op: u32,
1303 scalar_hf: u32,
1304 vector_op: u32,
1305 element_op: u32
1306});
1307impl_const_new_zero!(SimdFcadd { opcode: u32 });
1308impl_const_new_zero!(SimdFcmla {
1309 regular_op: u32,
1310 element_op: u32
1311});
1312impl_const_new_zero!(SimdFccmpFccmpe { opcode: u32 });
1313impl_const_new_zero!(SimdFcm {
1314 register_op: u32,
1315 register_hf: u32,
1316 zero_op: u32
1317});
1318impl_const_new_zero!(SimdFcmpFcmpe { opcode: u32 });
1319impl_const_new_zero!(SimdFcvtLN {
1320 opcode: u32,
1321 is_cvtxn: u32,
1322 has_scalar: u32
1323});
1324impl_const_new_zero!(SimdFcvtSV {
1325 vector_int_op: u32,
1326 vector_fp_op: u32,
1327 general_op: u32,
1328 is_float_to_int: u32,
1329});
1330impl_const_new_zero!(SimdFmlal {
1331 vector_op: u32,
1332 element_op: u32,
1333 optional_q: u8,
1334 ta: u8,
1335 tb: u8,
1336 t_element: u8,
1337});
1338impl_const_new_zero!(FSimdPair {
1339 scalar_op: u32,
1340 vector_op: u32
1341});
1342
1343impl_const_new_zero!(ISimdVV {
1344 opcode: u32,
1345 vec_op_type: u32
1346});
1347impl_const_new_zero!(ISimdVVx {
1348 opcode: u32,
1349 op0_signature: u32,
1350 op1_signature: u32
1351});
1352impl_const_new_zero!(ISimdSV {
1353 opcode: u32,
1354 vec_op_type: u32
1355});
1356impl_const_new_zero!(ISimdVVV {
1357 opcode: u32,
1358 vec_op_type: u32
1359});
1360impl_const_new_zero!(ISimdVVVx {
1361 opcode: u32,
1362 op0_signature: u32,
1363 op1_signature: u32,
1364 op2_signature: u32,
1365});
1366impl_const_new_zero!(ISimdWWV {
1367 opcode: u32,
1368 vec_op_type: u32
1369});
1370impl_const_new_zero!(ISimdVVVe {
1371 regular_op: u32,
1372 regular_vec_type: u32,
1373 element_op: u32,
1374 element_vec_type: u32,
1375});
1376impl_const_new_zero!(ISimdVVVI {
1377 opcode: u32,
1378 vec_op_type: u32,
1379 imm_size: u32,
1380 imm_shift: u32,
1381 imm64_has_one_bit_less: u32,
1382});
1383impl_const_new_zero!(ISimdVVVV {
1384 opcode: u32,
1385 vec_op_type: u32
1386});
1387impl_const_new_zero!(ISimdVVVVx {
1388 opcode: u32,
1389 op0_signature: u32,
1390 op1_signature: u32,
1391 op2_signature: u32,
1392 op3_signature: u32,
1393});
1394impl_const_new_zero!(SimdBicOrr {
1395 register_op: u32,
1396 immediate_op: u32
1397});
1398impl_const_new_zero!(SimdCmp {
1399 register_op: u32,
1400 zero_op: u32,
1401 vec_op_type: u32
1402});
1403impl_const_new_zero!(SimdDot {
1404 vector_op: u32,
1405 element_op: u32,
1406 ta: u8,
1407 tb: u8,
1408 t_element: u8
1409});
1410impl_const_new_zero!(SimdMoviMvni {
1411 opcode: u32,
1412 inverted: u32
1413});
1414impl_const_new_zero!(SimdLdSt {
1415 u_offset_op: u32,
1416 pre_post_op: u32,
1417 register_op: u32,
1418 literal_op: u32,
1419 u_alt_inst_id: u32,
1420});
1421impl_const_new_zero!(SimdLdNStN {
1422 single_op: u32,
1423 multiple_op: u32,
1424 n: u32,
1425 replicate: u32
1426});
1427impl_const_new_zero!(SimdLdpStp {
1428 offset_op: u32,
1429 pre_post_op: u32
1430});
1431impl_const_new_zero!(SimdLdurStur { opcode: u32 });
1432impl_const_new_zero!(ISimdPair {
1433 opcode2: u32,
1434 opcode3: u32,
1435 op_type3: u32
1436});
1437impl_const_new_zero!(SimdShift {
1438 register_op: u32,
1439 immediate_op: u32,
1440 inverted_imm: u32,
1441 vec_op_type: u32
1442});
1443impl_const_new_zero!(SimdShiftES {
1444 opcode: u32,
1445 vec_op_type: u32
1446});
1447impl_const_new_zero!(SimdSm3tt { opcode: u32 });
1448impl_const_new_zero!(SimdSmovUmov {
1449 opcode: u32,
1450 vec_op_type: u32,
1451 is_signed: u32
1452});
1453impl_const_new_zero!(SimdSxtlUxtl {
1454 opcode: u32,
1455 vec_op_type: u32
1456});
1457impl_const_new_zero!(SimdTblTbx { opcode: u32 });
1458
1459#[derive(Debug, Clone, Copy)]
1460pub struct InstInfo {
1461 pub encoding: u8,
1462 pub encoding_data_index: u8,
1463 pub reserved: u16,
1464 pub rw_info_index: u16,
1465 pub flags: u16,
1466}
1467
1468impl InstInfo {
1469 pub const fn new(
1470 encoding: u8,
1471 encoding_data_index: u8,
1472 reserved: u16,
1473 rw_info_index: u16,
1474 flags: u16,
1475 ) -> Self {
1476 Self {
1477 encoding,
1478 encoding_data_index,
1479 reserved,
1480 rw_info_index,
1481 flags,
1482 }
1483 }
1484}
1485
1486#[derive(Debug, Clone, Copy)]
1487pub enum InstFlag {
1488 Cond = 0x00000001,
1489 Pair = 0x00000002,
1490 Long = 0x00000004,
1491 Narrow = 0x00000008,
1492 VH0_15 = 0x00000010,
1493 Consecutive = 0x00000080,
1494}
1495
1496macro_rules! F {
1497 ($name: ident) => {
1498 InstFlag::$name as u16
1499 };
1500}
1501
1502macro_rules! INST {
1503 ($id: ident, $opcode_encoding: ident, $opcode_data: expr, $rw_info_index: expr, $flags: expr, $opcode_data_index: expr) => {
1504 InstInfo::new(
1505 Encoding::$opcode_encoding as u8,
1506 $opcode_data_index as u8,
1507 0,
1508 $rw_info_index,
1509 $flags,
1510 )
1511 };
1512}
1513
1514macro_rules! TABLE {
1515 ($name: ident = {
1516 $(INST(
1517 $id: ident,
1518 $opcode_encoding: ident,
1519 $opcode_data: expr,
1520 $rw_info_index: expr,
1521 $flags: expr,
1522 $opcode_data_index: expr
1523 ),)*
1524 }) => {
1525 pub static $name: &[InstInfo] = &[
1526 $(
1527 INST!(
1528 $id,
1529 $opcode_encoding,
1530 $opcode_data,
1531 $rw_info_index,
1532 $flags,
1533 $opcode_data_index)
1534 ),*
1535 ];
1536 };
1537}
1538
1539TABLE!(INST_INFO_TABLE
1540
1541 = {
1542INST(None , None , (_) , 0 , 0 , 0 ), INST(Abs , BaseRR , (0b01011010110000000010000000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 0 ), INST(Adc , BaseRRR , (0b0001101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 0 ), INST(Adcs , BaseRRR , (0b0011101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 1 ), INST(Add , BaseAddSub , (0b0001011000, 0b0001011001, 0b0010001) , RWI_W , 0 , 0 ), INST(Addg , BaseRRII , (0b1001000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10) , RWI_W , 0 , 0 ), INST(Adds , BaseAddSub , (0b0101011000, 0b0101011001, 0b0110001) , RWI_W , 0 , 1 ), INST(Adr , BaseAdr , (0b0001000000000000000000, OffsetType::kAArch64_ADR) , RWI_W , 0 , 0 ), INST(Adrp , BaseAdr , (0b1001000000000000000000, OffsetType::kAArch64_ADRP) , RWI_W , 0 , 1 ), INST(And , BaseLogical , (0b0001010000, 0b00100100, 0) , RWI_W , 0 , 0 ), INST(Ands , BaseLogical , (0b1101010000, 0b11100100, 0) , RWI_W , 0 , 1 ), INST(Asr , BaseShift , (0b0001101011000000001010, 0b0001001100000000011111, 0) , RWI_W , 0 , 0 ), INST(Asrv , BaseShift , (0b0001101011000000001010, 0b0000000000000000000000, 0) , RWI_W , 0 , 1 ), INST(At , BaseAtDcIcTlbi , (0b00011111110000, 0b00001111000000, true) , RWI_RX , 0 , 0 ), INST(Autda , BaseRR , (0b11011010110000010001100000000000, kX, kZR, 0, kX, kSP, 5, true) , RWI_X , 0 , 1 ), INST(Autdza , BaseR , (0b11011010110000010011101111100000, kX, kZR, 0) , RWI_X , 0 , 0 ), INST(Autdb , BaseRR , (0b11011010110000010001110000000000, kX, kZR, 0, kX, kSP, 5, true) , RWI_X , 0 , 2 ), INST(Autdzb , BaseR , (0b11011010110000010011111111100000, kX, kZR, 0) , RWI_X , 0 , 1 ), INST(Autia , BaseRR , (0b11011010110000010001000000000000, kX, kZR, 0, kX, kSP, 5, true) , RWI_X , 0 , 3 ), INST(Autia1716 , BaseOp , (0b11010101000000110010000110011111) , 0 , 0 , 0 ), INST(Autiasp , BaseOp , (0b11010101000000110010001110111111) , 0 , 0 , 1 ), INST(Autiaz , BaseOp , (0b11010101000000110010001110011111) , 0 , 0 , 2 ), INST(Autib , BaseRR , (0b11011010110000010001010000000000, kX, kZR, 0, kX, kSP, 5, true) , RWI_X , 0 , 4 ), INST(Autib1716 , BaseOp , (0b11010101000000110010000111011111) , 0 , 0 , 3 ), INST(Autibsp , BaseOp , (0b11010101000000110010001111111111) , 0 , 0 , 4 ), INST(Autibz , BaseOp , (0b11010101000000110010001111011111) , 0 , 0 , 5 ), INST(Autiza , BaseR , (0b11011010110000010011001111100000, kX, kZR, 0) , RWI_X , 0 , 2 ), INST(Autizb , BaseR , (0b11011010110000010011011111100000, kX, kZR, 0) , RWI_X , 0 , 3 ), INST(Axflag , BaseOp , (0b11010101000000000100000001011111) , 0 , 0 , 6 ), INST(B , BaseBranchRel , (0b00010100000000000000000000000000) , 0 , F!(Cond) , 0 ), INST(Bc , BaseBranchRel , (0b00010100000000000000000000010000) , 0 , F!(Cond) , 1 ), INST(Bfc , BaseBfc , (0b00110011000000000000001111100000) , RWI_X , 0 , 0 ), INST(Bfi , BaseBfi , (0b00110011000000000000000000000000) , RWI_X , 0 , 0 ), INST(Bfm , BaseBfm , (0b00110011000000000000000000000000) , RWI_X , 0 , 0 ), INST(Bfxil , BaseBfx , (0b00110011000000000000000000000000) , RWI_X , 0 , 0 ), INST(Bic , BaseLogical , (0b0001010001, 0b00100100, 1) , RWI_W , 0 , 2 ), INST(Bics , BaseLogical , (0b1101010001, 0b11100100, 1) , RWI_W , 0 , 3 ), INST(Bl , BaseBranchRel , (0b10010100000000000000000000000000) , 0 , 0 , 2 ), INST(Blr , BaseBranchReg , (0b11010110001111110000000000000000) , RWI_R , 0 , 0 ), INST(Br , BaseBranchReg , (0b11010110000111110000000000000000) , RWI_R , 0 , 1 ), INST(Brk , BaseOpImm , (0b11010100001000000000000000000000, 16, 5) , 0 , 0 , 0 ), INST(Bti , BaseOpImm , (0b11010101000000110010010000011111, 2, 6) , 0 , 0 , 1 ), INST(Cas , BaseAtomicOp , (0b1000100010100000011111, kWX, 30, 0) , RWI_XRX , 0 , 0 ), INST(Casa , BaseAtomicOp , (0b1000100011100000011111, kWX, 30, 1) , RWI_XRX , 0 , 1 ), INST(Casab , BaseAtomicOp , (0b0000100011100000011111, kW , 0 , 1) , RWI_XRX , 0 , 2 ), INST(Casah , BaseAtomicOp , (0b0100100011100000011111, kW , 0 , 1) , RWI_XRX , 0 , 3 ), INST(Casal , BaseAtomicOp , (0b1000100011100000111111, kWX, 30, 1) , RWI_XRX , 0 , 4 ), INST(Casalb , BaseAtomicOp , (0b0000100011100000111111, kW , 0 , 1) , RWI_XRX , 0 , 5 ), INST(Casalh , BaseAtomicOp , (0b0100100011100000111111, kW , 0 , 1) , RWI_XRX , 0 , 6 ), INST(Casb , BaseAtomicOp , (0b0000100010100000011111, kW , 0 , 0) , RWI_XRX , 0 , 7 ), INST(Cash , BaseAtomicOp , (0b0100100010100000011111, kW , 0 , 0) , RWI_XRX , 0 , 8 ), INST(Casl , BaseAtomicOp , (0b1000100010100000111111, kWX, 30, 0) , RWI_XRX , 0 , 9 ), INST(Caslb , BaseAtomicOp , (0b0000100010100000111111, kW , 0 , 0) , RWI_XRX , 0 , 10 ), INST(Caslh , BaseAtomicOp , (0b0100100010100000111111, kW , 0 , 0) , RWI_XRX , 0 , 11 ), INST(Casp , BaseAtomicCasp , (0b0000100000100000011111, kWX, 30) , RWI_XXRRX, F!(Consecutive) , 0 ), INST(Caspa , BaseAtomicCasp , (0b0000100001100000011111, kWX, 30) , RWI_XXRRX, F!(Consecutive) , 1 ), INST(Caspal , BaseAtomicCasp , (0b0000100001100000111111, kWX, 30) , RWI_XXRRX, F!(Consecutive) , 2 ), INST(Caspl , BaseAtomicCasp , (0b0000100000100000111111, kWX, 30) , RWI_XXRRX, F!(Consecutive) , 3 ), INST(Cbnz , BaseBranchCmp , (0b00110101000000000000000000000000) , RWI_R , 0 , 0 ), INST(Cbz , BaseBranchCmp , (0b00110100000000000000000000000000) , RWI_R , 0 , 1 ), INST(Ccmn , BaseCCmp , (0b00111010010000000000000000000000) , RWI_R , 0 , 0 ), INST(Ccmp , BaseCCmp , (0b01111010010000000000000000000000) , RWI_R , 0 , 1 ), INST(Cfinv , BaseOp , (0b11010101000000000100000000011111) , 0 , 0 , 7 ), INST(Chkfeat , BaseOpX16 , (0b11010101000000110010010100011111) , 0 , 0 , 0 ), INST(Cinc , BaseCInc , (0b00011010100000000000010000000000) , RWI_W , 0 , 0 ), INST(Cinv , BaseCInc , (0b01011010100000000000000000000000) , RWI_W , 0 , 1 ), INST(Clrbhb , BaseOp , (0b11010101000000110010001011011111) , 0 , 0 , 8 ), INST(Clrex , BaseOpImm , (0b11010101000000110011000001011111, 4, 8) , 0 , 0 , 2 ), INST(Cls , BaseRR , (0b01011010110000000001010000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 5 ), INST(Clz , BaseRR , (0b01011010110000000001000000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 6 ), INST(Cmn , BaseCmpCmn , (0b0101011000, 0b0101011001, 0b0110001) , RWI_R , 0 , 0 ), INST(Cmp , BaseCmpCmn , (0b1101011000, 0b1101011001, 0b1110001) , RWI_R , 0 , 1 ), INST(Cmpp , BaseRR , (0b10111010110000000000000000011111, kX, kSP, 5, kX, kSP, 16, true) , RWI_R , 0 , 7 ), INST(Cneg , BaseCInc , (0b01011010100000000000010000000000) , RWI_W , 0 , 2 ), INST(Cnt , BaseRR , (0b01011010110000000001110000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 8 ), INST(Crc32b , BaseRRR , (0b0001101011000000010000, kW, kZR, kW, kZR, kW, kZR, false) , RWI_W , 0 , 2 ), INST(Crc32cb , BaseRRR , (0b0001101011000000010100, kW, kZR, kW, kZR, kW, kZR, false) , RWI_W , 0 , 3 ), INST(Crc32ch , BaseRRR , (0b0001101011000000010101, kW, kZR, kW, kZR, kW, kZR, false) , RWI_W , 0 , 4 ), INST(Crc32cw , BaseRRR , (0b0001101011000000010110, kW, kZR, kW, kZR, kW, kZR, false) , RWI_W , 0 , 5 ), INST(Crc32cx , BaseRRR , (0b1001101011000000010111, kW, kZR, kW, kZR, kX, kZR, false) , RWI_W , 0 , 6 ), INST(Crc32h , BaseRRR , (0b0001101011000000010001, kW, kZR, kW, kZR, kW, kZR, false) , RWI_W , 0 , 7 ), INST(Crc32w , BaseRRR , (0b0001101011000000010010, kW, kZR, kW, kZR, kW, kZR, false) , RWI_W , 0 , 8 ), INST(Crc32x , BaseRRR , (0b1001101011000000010011, kW, kZR, kW, kZR, kX, kZR, false) , RWI_W , 0 , 9 ), INST(Csdb , BaseOp , (0b11010101000000110010001010011111) , 0 , 0 , 9 ), INST(Csel , BaseCSel , (0b00011010100000000000000000000000) , RWI_W , 0 , 0 ), INST(Cset , BaseCSet , (0b00011010100111110000011111100000) , RWI_W , 0 , 0 ), INST(Csetm , BaseCSet , (0b01011010100111110000001111100000) , RWI_W , 0 , 1 ), INST(Csinc , BaseCSel , (0b00011010100000000000010000000000) , RWI_W , 0 , 1 ), INST(Csinv , BaseCSel , (0b01011010100000000000000000000000) , RWI_W , 0 , 2 ), INST(Csneg , BaseCSel , (0b01011010100000000000010000000000) , RWI_W , 0 , 3 ), INST(Ctz , BaseRR , (0b01011010110000000001100000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 9 ), INST(Dc , BaseAtDcIcTlbi , (0b00011110000000, 0b00001110000000, true) , RWI_RX , 0 , 1 ), INST(Dcps1 , BaseOpImm , (0b11010100101000000000000000000001, 16, 5) , 0 , 0 , 3 ), INST(Dcps2 , BaseOpImm , (0b11010100101000000000000000000010, 16, 5) , 0 , 0 , 4 ), INST(Dcps3 , BaseOpImm , (0b11010100101000000000000000000011, 16, 5) , 0 , 0 , 5 ), INST(Dgh , BaseOp , (0b11010101000000110010000011011111) , 0 , 0 , 10 ), INST(Dmb , BaseOpImm , (0b11010101000000110011000010111111, 4, 8) , 0 , 0 , 6 ), INST(Drps , BaseOp , (0b11010110101111110000001111100000) , 0 , 0 , 11 ), INST(Dsb , BaseOpImm , (0b11010101000000110011000010011111, 4, 8) , 0 , 0 , 7 ), INST(Eon , BaseLogical , (0b1001010001, 0b10100100, 1) , RWI_W , 0 , 4 ), INST(Eor , BaseLogical , (0b1001010000, 0b10100100, 0) , RWI_W , 0 , 5 ), INST(Esb , BaseOp , (0b11010101000000110010001000011111) , 0 , 0 , 12 ), INST(Extr , BaseExtract , (0b00010011100000000000000000000000) , RWI_W , 0 , 0 ), INST(Eret , BaseOp , (0b11010110100111110000001111100000) , 0 , 0 , 13 ), INST(Gmi , BaseRRR , (0b1001101011000000000101, kX , kZR, kX , kSP, kX , kZR, true) , RWI_W , 0 , 10 ), INST(Hint , BaseOpImm , (0b11010101000000110010000000011111, 7, 5) , 0 , 0 , 8 ), INST(Hlt , BaseOpImm , (0b11010100010000000000000000000000, 16, 5) , 0 , 0 , 9 ), INST(Hvc , BaseOpImm , (0b11010100000000000000000000000010, 16, 5) , 0 , 0 , 10 ), INST(Ic , BaseAtDcIcTlbi , (0b00011110000000, 0b00001110000000, false) , RWI_RX , 0 , 2 ), INST(Isb , BaseOpImm , (0b11010101000000110011000011011111, 4, 8) , 0 , 0 , 11 ), INST(Ldadd , BaseAtomicOp , (0b1011100000100000000000, kWX, 30, 0) , RWI_WRX , 0 , 12 ), INST(Ldadda , BaseAtomicOp , (0b1011100010100000000000, kWX, 30, 1) , RWI_WRX , 0 , 13 ), INST(Ldaddab , BaseAtomicOp , (0b0011100010100000000000, kW , 0 , 1) , RWI_WRX , 0 , 14 ), INST(Ldaddah , BaseAtomicOp , (0b0111100010100000000000, kW , 0 , 1) , RWI_WRX , 0 , 15 ), INST(Ldaddal , BaseAtomicOp , (0b1011100011100000000000, kWX, 30, 1) , RWI_WRX , 0 , 16 ), INST(Ldaddalb , BaseAtomicOp , (0b0011100011100000000000, kW , 0 , 1) , RWI_WRX , 0 , 17 ), INST(Ldaddalh , BaseAtomicOp , (0b0111100011100000000000, kW , 0 , 1) , RWI_WRX , 0 , 18 ), INST(Ldaddb , BaseAtomicOp , (0b0011100000100000000000, kW , 0 , 0) , RWI_WRX , 0 , 19 ), INST(Ldaddh , BaseAtomicOp , (0b0111100000100000000000, kW , 0 , 0) , RWI_WRX , 0 , 20 ), INST(Ldaddl , BaseAtomicOp , (0b1011100001100000000000, kWX, 30, 0) , RWI_WRX , 0 , 21 ), INST(Ldaddlb , BaseAtomicOp , (0b0011100001100000000000, kW , 0 , 0) , RWI_WRX , 0 , 22 ), INST(Ldaddlh , BaseAtomicOp , (0b0111100001100000000000, kW , 0 , 0) , RWI_WRX , 0 , 23 ), INST(Ldar , BaseRMNoImm , (0b1000100011011111111111, kWX, kZR, 30) , RWI_W , 0 , 0 ), INST(Ldarb , BaseRMNoImm , (0b0000100011011111111111, kW , kZR, 0 ) , RWI_W , 0 , 1 ), INST(Ldarh , BaseRMNoImm , (0b0100100011011111111111, kW , kZR, 0 ) , RWI_W , 0 , 2 ), INST(Ldaxp , BaseLdxp , (0b1000100001111111100000, kWX, 30) , RWI_WW , 0 , 0 ), INST(Ldaxr , BaseRMNoImm , (0b1000100001011111111111, kWX, kZR, 30) , RWI_W , 0 , 3 ), INST(Ldaxrb , BaseRMNoImm , (0b0000100001011111111111, kW , kZR, 0 ) , RWI_W , 0 , 4 ), INST(Ldaxrh , BaseRMNoImm , (0b0100100001011111111111, kW , kZR, 0 ) , RWI_W , 0 , 5 ), INST(Ldclr , BaseAtomicOp , (0b1011100000100000000100, kWX, 30, 0) , RWI_WRX , 0 , 24 ), INST(Ldclra , BaseAtomicOp , (0b1011100010100000000100, kWX, 30, 1) , RWI_WRX , 0 , 25 ), INST(Ldclrab , BaseAtomicOp , (0b0011100010100000000100, kW , 0 , 1) , RWI_WRX , 0 , 26 ), INST(Ldclrah , BaseAtomicOp , (0b0111100010100000000100, kW , 0 , 1) , RWI_WRX , 0 , 27 ), INST(Ldclral , BaseAtomicOp , (0b1011100011100000000100, kWX, 30, 1) , RWI_WRX , 0 , 28 ), INST(Ldclralb , BaseAtomicOp , (0b0011100011100000000100, kW , 0 , 1) , RWI_WRX , 0 , 29 ), INST(Ldclralh , BaseAtomicOp , (0b0111100011100000000100, kW , 0 , 1) , RWI_WRX , 0 , 30 ), INST(Ldclrb , BaseAtomicOp , (0b0011100000100000000100, kW , 0 , 0) , RWI_WRX , 0 , 31 ), INST(Ldclrh , BaseAtomicOp , (0b0111100000100000000100, kW , 0 , 0) , RWI_WRX , 0 , 32 ), INST(Ldclrl , BaseAtomicOp , (0b1011100001100000000100, kWX, 30, 0) , RWI_WRX , 0 , 33 ), INST(Ldclrlb , BaseAtomicOp , (0b0011100001100000000100, kW , 0 , 0) , RWI_WRX , 0 , 34 ), INST(Ldclrlh , BaseAtomicOp , (0b0111100001100000000100, kW , 0 , 0) , RWI_WRX , 0 , 35 ), INST(Ldeor , BaseAtomicOp , (0b1011100000100000001000, kWX, 30, 0) , RWI_WRX , 0 , 36 ), INST(Ldeora , BaseAtomicOp , (0b1011100010100000001000, kWX, 30, 1) , RWI_WRX , 0 , 37 ), INST(Ldeorab , BaseAtomicOp , (0b0011100010100000001000, kW , 0 , 1) , RWI_WRX , 0 , 38 ), INST(Ldeorah , BaseAtomicOp , (0b0111100010100000001000, kW , 0 , 1) , RWI_WRX , 0 , 39 ), INST(Ldeoral , BaseAtomicOp , (0b1011100011100000001000, kWX, 30, 1) , RWI_WRX , 0 , 40 ), INST(Ldeoralb , BaseAtomicOp , (0b0011100011100000001000, kW , 0 , 1) , RWI_WRX , 0 , 41 ), INST(Ldeoralh , BaseAtomicOp , (0b0111100011100000001000, kW , 0 , 1) , RWI_WRX , 0 , 42 ), INST(Ldeorb , BaseAtomicOp , (0b0011100000100000001000, kW , 0 , 0) , RWI_WRX , 0 , 43 ), INST(Ldeorh , BaseAtomicOp , (0b0111100000100000001000, kW , 0 , 0) , RWI_WRX , 0 , 44 ), INST(Ldeorl , BaseAtomicOp , (0b1011100001100000001000, kWX, 30, 0) , RWI_WRX , 0 , 45 ), INST(Ldeorlb , BaseAtomicOp , (0b0011100001100000001000, kW , 0 , 0) , RWI_WRX , 0 , 46 ), INST(Ldeorlh , BaseAtomicOp , (0b0111100001100000001000, kW , 0 , 0) , RWI_WRX , 0 , 47 ), INST(Ldg , BaseRMSImm9 , (0b1101100101100000000000, 0b0000000000000000000000, kX , kZR, 0, 4) , RWI_W , 0 , 0 ), INST(Ldgm , BaseRMNoImm , (0b1101100111100000000000, kX , kZR, 0 ) , RWI_W , 0 , 6 ), INST(Ldlar , BaseRMNoImm , (0b1000100011011111011111, kWX, kZR, 30) , RWI_W , 0 , 7 ), INST(Ldlarb , BaseRMNoImm , (0b0000100011011111011111, kW , kZR, 0 ) , RWI_W , 0 , 8 ), INST(Ldlarh , BaseRMNoImm , (0b0100100011011111011111, kW , kZR, 0 ) , RWI_W , 0 , 9 ), INST(Ldnp , BaseLdpStp , (0b0010100001, 0 , kWX, 31, 2) , RWI_WW , 0 , 0 ), INST(Ldp , BaseLdpStp , (0b0010100101, 0b0010100011, kWX, 31, 2) , RWI_WW , 0 , 1 ), INST(Ldpsw , BaseLdpStp , (0b0110100101, 0b0110100011, kX , 0 , 2) , RWI_WW , 0 , 2 ), INST(Ldr , BaseLdSt , (0b1011100101, 0b10111000010, 0b10111000011, 0b00011000, kWX, 30, 2, InstId::Ldur) , RWI_W , 0 , 0 ), INST(Ldraa , BaseRMSImm10 , (0b1111100000100000000001, kX , kZR, 0, 3) , RWI_W , 0 , 0 ), INST(Ldrab , BaseRMSImm10 , (0b1111100010100000000001, kX , kZR, 0, 3) , RWI_W , 0 , 1 ), INST(Ldrb , BaseLdSt , (0b0011100101, 0b00111000010, 0b00111000011, 0 , kW , 0 , 0, InstId::Ldurb) , RWI_W , 0 , 1 ), INST(Ldrh , BaseLdSt , (0b0111100101, 0b01111000010, 0b01111000011, 0 , kW , 0 , 1, InstId::Ldurh) , RWI_W , 0 , 2 ), INST(Ldrsb , BaseLdSt , (0b0011100111, 0b00111000100, 0b00111000111, 0 , kWX, 22, 0, InstId::Ldursb) , RWI_W , 0 , 3 ), INST(Ldrsh , BaseLdSt , (0b0111100111, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, InstId::Ldursh) , RWI_W , 0 , 4 ), INST(Ldrsw , BaseLdSt , (0b1011100110, 0b10111000100, 0b10111000101, 0b10011000, kX , 0 , 2, InstId::Ldursw) , RWI_W , 0 , 5 ), INST(Ldset , BaseAtomicOp , (0b1011100000100000001100, kWX, 30, 0) , RWI_WRX , 0 , 48 ), INST(Ldseta , BaseAtomicOp , (0b1011100010100000001100, kWX, 30, 1) , RWI_WRX , 0 , 49 ), INST(Ldsetab , BaseAtomicOp , (0b0011100010100000001100, kW , 0 , 1) , RWI_WRX , 0 , 50 ), INST(Ldsetah , BaseAtomicOp , (0b0111100010100000001100, kW , 0 , 1) , RWI_WRX , 0 , 51 ), INST(Ldsetal , BaseAtomicOp , (0b1011100011100000001100, kWX, 30, 1) , RWI_WRX , 0 , 52 ), INST(Ldsetalb , BaseAtomicOp , (0b0011100011100000001100, kW , 0 , 1) , RWI_WRX , 0 , 53 ), INST(Ldsetalh , BaseAtomicOp , (0b0111100011100000001100, kW , 0 , 1) , RWI_WRX , 0 , 54 ), INST(Ldsetb , BaseAtomicOp , (0b0011100000100000001100, kW , 0 , 0) , RWI_WRX , 0 , 55 ), INST(Ldseth , BaseAtomicOp , (0b0111100000100000001100, kW , 0 , 0) , RWI_WRX , 0 , 56 ), INST(Ldsetl , BaseAtomicOp , (0b1011100001100000001100, kWX, 30, 0) , RWI_WRX , 0 , 57 ), INST(Ldsetlb , BaseAtomicOp , (0b0011100001100000001100, kW , 0 , 0) , RWI_WRX , 0 , 58 ), INST(Ldsetlh , BaseAtomicOp , (0b0111100001100000001100, kW , 0 , 0) , RWI_WRX , 0 , 59 ), INST(Ldsmax , BaseAtomicOp , (0b1011100000100000010000, kWX, 30, 0) , RWI_WRX , 0 , 60 ), INST(Ldsmaxa , BaseAtomicOp , (0b1011100010100000010000, kWX, 30, 1) , RWI_WRX , 0 , 61 ), INST(Ldsmaxab , BaseAtomicOp , (0b0011100010100000010000, kW , 0 , 1) , RWI_WRX , 0 , 62 ), INST(Ldsmaxah , BaseAtomicOp , (0b0111100010100000010000, kW , 0 , 1) , RWI_WRX , 0 , 63 ), INST(Ldsmaxal , BaseAtomicOp , (0b1011100011100000010000, kWX, 30, 1) , RWI_WRX , 0 , 64 ), INST(Ldsmaxalb , BaseAtomicOp , (0b0011100011100000010000, kW , 0 , 1) , RWI_WRX , 0 , 65 ), INST(Ldsmaxalh , BaseAtomicOp , (0b0111100011100000010000, kW , 0 , 1) , RWI_WRX , 0 , 66 ), INST(Ldsmaxb , BaseAtomicOp , (0b0011100000100000010000, kW , 0 , 0) , RWI_WRX , 0 , 67 ), INST(Ldsmaxh , BaseAtomicOp , (0b0111100000100000010000, kW , 0 , 0) , RWI_WRX , 0 , 68 ), INST(Ldsmaxl , BaseAtomicOp , (0b1011100001100000010000, kWX, 30, 0) , RWI_WRX , 0 , 69 ), INST(Ldsmaxlb , BaseAtomicOp , (0b0011100001100000010000, kW , 0 , 0) , RWI_WRX , 0 , 70 ), INST(Ldsmaxlh , BaseAtomicOp , (0b0111100001100000010000, kW , 0 , 0) , RWI_WRX , 0 , 71 ), INST(Ldsmin , BaseAtomicOp , (0b1011100000100000010100, kWX, 30, 0) , RWI_WRX , 0 , 72 ), INST(Ldsmina , BaseAtomicOp , (0b1011100010100000010100, kWX, 30, 1) , RWI_WRX , 0 , 73 ), INST(Ldsminab , BaseAtomicOp , (0b0011100010100000010100, kW , 0 , 1) , RWI_WRX , 0 , 74 ), INST(Ldsminah , BaseAtomicOp , (0b0111100010100000010100, kW , 0 , 1) , RWI_WRX , 0 , 75 ), INST(Ldsminal , BaseAtomicOp , (0b1011100011100000010100, kWX, 30, 1) , RWI_WRX , 0 , 76 ), INST(Ldsminalb , BaseAtomicOp , (0b0011100011100000010100, kW , 0 , 1) , RWI_WRX , 0 , 77 ), INST(Ldsminalh , BaseAtomicOp , (0b0111100011100000010100, kW , 0 , 1) , RWI_WRX , 0 , 78 ), INST(Ldsminb , BaseAtomicOp , (0b0011100000100000010100, kW , 0 , 0) , RWI_WRX , 0 , 79 ), INST(Ldsminh , BaseAtomicOp , (0b0111100000100000010100, kW , 0 , 0) , RWI_WRX , 0 , 80 ), INST(Ldsminl , BaseAtomicOp , (0b1011100001100000010100, kWX, 30, 0) , RWI_WRX , 0 , 81 ), INST(Ldsminlb , BaseAtomicOp , (0b0011100001100000010100, kW , 0 , 0) , RWI_WRX , 0 , 82 ), INST(Ldsminlh , BaseAtomicOp , (0b0111100001100000010100, kW , 0 , 0) , RWI_WRX , 0 , 83 ), INST(Ldtr , BaseRMSImm9 , (0b1011100001000000000010, 0b0000000000000000000000, kWX, kZR, 30, 0) , RWI_W , 0 , 1 ), INST(Ldtrb , BaseRMSImm9 , (0b0011100001000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0) , RWI_W , 0 , 2 ), INST(Ldtrh , BaseRMSImm9 , (0b0111100001000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0) , RWI_W , 0 , 3 ), INST(Ldtrsb , BaseRMSImm9 , (0b0011100011000000000010, 0b0000000000000000000000, kWX, kZR, 22, 0) , RWI_W , 0 , 4 ), INST(Ldtrsh , BaseRMSImm9 , (0b0111100011000000000010, 0b0000000000000000000000, kWX, kZR, 22, 0) , RWI_W , 0 , 5 ), INST(Ldtrsw , BaseRMSImm9 , (0b1011100010000000000010, 0b0000000000000000000000, kX , kZR, 0 , 0) , RWI_W , 0 , 6 ), INST(Ldumax , BaseAtomicOp , (0b1011100000100000011000, kWX, 30, 0) , RWI_WRX , 0 , 84 ), INST(Ldumaxa , BaseAtomicOp , (0b1011100010100000011000, kWX, 30, 1) , RWI_WRX , 0 , 85 ), INST(Ldumaxab , BaseAtomicOp , (0b0011100010100000011000, kW , 0 , 1) , RWI_WRX , 0 , 86 ), INST(Ldumaxah , BaseAtomicOp , (0b0111100010100000011000, kW , 0 , 1) , RWI_WRX , 0 , 87 ), INST(Ldumaxal , BaseAtomicOp , (0b1011100011100000011000, kWX, 30, 1) , RWI_WRX , 0 , 88 ), INST(Ldumaxalb , BaseAtomicOp , (0b0011100011100000011000, kW , 0 , 1) , RWI_WRX , 0 , 89 ), INST(Ldumaxalh , BaseAtomicOp , (0b0111100011100000011000, kW , 0 , 1) , RWI_WRX , 0 , 90 ), INST(Ldumaxb , BaseAtomicOp , (0b0011100000100000011000, kW , 0 , 0) , RWI_WRX , 0 , 91 ), INST(Ldumaxh , BaseAtomicOp , (0b0111100000100000011000, kW , 0 , 0) , RWI_WRX , 0 , 92 ), INST(Ldumaxl , BaseAtomicOp , (0b1011100001100000011000, kWX, 30, 0) , RWI_WRX , 0 , 93 ), INST(Ldumaxlb , BaseAtomicOp , (0b0011100001100000011000, kW , 0 , 0) , RWI_WRX , 0 , 94 ), INST(Ldumaxlh , BaseAtomicOp , (0b0111100001100000011000, kW , 0 , 0) , RWI_WRX , 0 , 95 ), INST(Ldumin , BaseAtomicOp , (0b1011100000100000011100, kWX, 30, 0) , RWI_WRX , 0 , 96 ), INST(Ldumina , BaseAtomicOp , (0b1011100010100000011100, kWX, 30, 1) , RWI_WRX , 0 , 97 ), INST(Lduminab , BaseAtomicOp , (0b0011100010100000011100, kW , 0 , 1) , RWI_WRX , 0 , 98 ), INST(Lduminah , BaseAtomicOp , (0b0111100010100000011100, kW , 0 , 1) , RWI_WRX , 0 , 99 ), INST(Lduminal , BaseAtomicOp , (0b1011100011100000011100, kWX, 30, 1) , RWI_WRX , 0 , 100), INST(Lduminalb , BaseAtomicOp , (0b0011100011100000011100, kW , 0 , 1) , RWI_WRX , 0 , 101), INST(Lduminalh , BaseAtomicOp , (0b0111100011100000011100, kW , 0 , 1) , RWI_WRX , 0 , 102), INST(Lduminb , BaseAtomicOp , (0b0011100000100000011100, kW , 0 , 0) , RWI_WRX , 0 , 103), INST(Lduminh , BaseAtomicOp , (0b0111100000100000011100, kW , 0 , 0) , RWI_WRX , 0 , 104), INST(Lduminl , BaseAtomicOp , (0b1011100001100000011100, kWX, 30, 0) , RWI_WRX , 0 , 105), INST(Lduminlb , BaseAtomicOp , (0b0011100001100000011100, kW , 0 , 0) , RWI_WRX , 0 , 106), INST(Lduminlh , BaseAtomicOp , (0b0111100001100000011100, kW , 0 , 0) , RWI_WRX , 0 , 107), INST(Ldur , BaseRMSImm9 , (0b1011100001000000000000, 0b0000000000000000000000, kWX, kZR, 30, 0) , RWI_W , 0 , 7 ), INST(Ldurb , BaseRMSImm9 , (0b0011100001000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0) , RWI_W , 0 , 8 ), INST(Ldurh , BaseRMSImm9 , (0b0111100001000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0) , RWI_W , 0 , 9 ), INST(Ldursb , BaseRMSImm9 , (0b0011100011000000000000, 0b0000000000000000000000, kWX, kZR, 22, 0) , RWI_W , 0 , 10 ), INST(Ldursh , BaseRMSImm9 , (0b0111100011000000000000, 0b0000000000000000000000, kWX, kZR, 22, 0) , RWI_W , 0 , 11 ), INST(Ldursw , BaseRMSImm9 , (0b1011100010000000000000, 0b0000000000000000000000, kX , kZR, 0 , 0) , RWI_W , 0 , 12 ), INST(Ldxp , BaseLdxp , (0b1000100001111111000000, kWX, 30) , RWI_WW , 0 , 1 ), INST(Ldxr , BaseRMNoImm , (0b1000100001011111011111, kWX, kZR, 30) , RWI_W , 0 , 10 ), INST(Ldxrb , BaseRMNoImm , (0b0000100001011111011111, kW , kZR, 0 ) , RWI_W , 0 , 11 ), INST(Ldxrh , BaseRMNoImm , (0b0100100001011111011111, kW , kZR, 0 ) , RWI_W , 0 , 12 ), INST(Lsl , BaseShift , (0b0001101011000000001000, 0b0101001100000000000000, 0) , RWI_W , 0 , 2 ), INST(Lslv , BaseShift , (0b0001101011000000001000, 0b0000000000000000000000, 0) , RWI_W , 0 , 3 ), INST(Lsr , BaseShift , (0b0001101011000000001001, 0b0101001100000000011111, 0) , RWI_W , 0 , 4 ), INST(Lsrv , BaseShift , (0b0001101011000000001001, 0b0000000000000000000000, 0) , RWI_W , 0 , 5 ), INST(Madd , BaseRRRR , (0b0001101100000000000000, kWX, kZR, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 0 ), INST(Mneg , BaseRRR , (0b0001101100000000111111, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 11 ), INST(Mov , BaseMov , (_) , RWI_W , 0 , 0 ), INST(Movk , BaseMovKNZ , (0b01110010100000000000000000000000) , RWI_X , 0 , 0 ), INST(Movn , BaseMovKNZ , (0b00010010100000000000000000000000) , RWI_W , 0 , 1 ), INST(Movz , BaseMovKNZ , (0b01010010100000000000000000000000) , RWI_W , 0 , 2 ), INST(Mrs , BaseMrs , (_) , RWI_W , 0 , 0 ), INST(Msr , BaseMsr , (_) , RWI_W , 0 , 0 ), INST(Msub , BaseRRRR , (0b0001101100000000100000, kWX, kZR, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 1 ), INST(Mul , BaseRRR , (0b0001101100000000011111, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 12 ), INST(Mvn , BaseMvnNeg , (0b00101010001000000000001111100000) , RWI_W , 0 , 0 ), INST(Neg , BaseMvnNeg , (0b01001011000000000000001111100000) , RWI_W , 0 , 1 ), INST(Negs , BaseMvnNeg , (0b01101011000000000000001111100000) , RWI_W , 0 , 2 ), INST(Ngc , BaseRR , (0b01011010000000000000001111100000, kWX, kZR, 0, kWX, kZR, 16, true) , RWI_W , 0 , 10 ), INST(Ngcs , BaseRR , (0b01111010000000000000001111100000, kWX, kZR, 0, kWX, kZR, 16, true) , RWI_W , 0 , 11 ), INST(Nop , BaseOp , (0b11010101000000110010000000011111) , 0 , 0 , 14 ), INST(Orn , BaseLogical , (0b0101010001, 0b01100100, 1) , RWI_W , 0 , 6 ), INST(Orr , BaseLogical , (0b0101010000, 0b01100100, 0) , RWI_W , 0 , 7 ), INST(Pacda , BaseRR , (0b11011010110000010000100000000000, kX, kZR, 0, kX, kSP, 5, true) , RWI_X , 0 , 12 ), INST(Pacdb , BaseRR , (0b11011010110000010000110000000000, kX, kZR, 0, kX, kSP, 5, true) , RWI_X , 0 , 13 ), INST(Pacdza , BaseR , (0b11011010110000010010101111100000, kX, kZR, 0) , RWI_X , 0 , 4 ), INST(Pacdzb , BaseR , (0b11011010110000010010111111100000, kX, kZR, 0) , RWI_X , 0 , 5 ), INST(Pacga , BaseRRR , (0b1001101011000000001100, kX, kZR, kX, kZR, kX, kSP, false) , RWI_W , 0 , 13 ), INST(Prfm , BasePrfm , (0b11111000101, 0b1111100110, 0b11111000100, 0b11011000) , RWI_R , 0 , 0 ), INST(Pssbb , BaseOp , (0b11010101000000110011010010011111) , 0 , 0 , 15 ), INST(Rbit , BaseRR , (0b01011010110000000000000000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 14 ), INST(Ret , BaseBranchReg , (0b11010110010111110000000000000000) , RWI_R , 0 , 2 ), INST(Rev , BaseRev , (_) , RWI_W , 0 , 0 ), INST(Rev16 , BaseRR , (0b01011010110000000000010000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 15 ), INST(Rev32 , BaseRR , (0b11011010110000000000100000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 16 ), INST(Rev64 , BaseRR , (0b11011010110000000000110000000000, kWX, kZR, 0, kWX, kZR, 5, true) , RWI_W , 0 , 17 ), INST(Ror , BaseShift , (0b0001101011000000001011, 0b0001001110000000000000, 1) , RWI_W , 0 , 6 ), INST(Rorv , BaseShift , (0b0001101011000000001011, 0b0000000000000000000000, 1) , RWI_W , 0 , 7 ), INST(Sbc , BaseRRR , (0b0101101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 14 ), INST(Sbcs , BaseRRR , (0b0111101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 15 ), INST(Sbfiz , BaseBfi , (0b00010011000000000000000000000000) , RWI_W , 0 , 1 ), INST(Sbfm , BaseBfm , (0b00010011000000000000000000000000) , RWI_W , 0 , 1 ), INST(Sbfx , BaseBfx , (0b00010011000000000000000000000000) , RWI_W , 0 , 1 ), INST(Sdiv , BaseRRR , (0b0001101011000000000011, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 16 ), INST(Setf8 , BaseR , (0b00111010000000000000100000001101, kW, kZR, 5) , 0 , 0 , 6 ), INST(Setf16 , BaseR , (0b00111010000000000100100000001101, kW, kZR, 5) , 0 , 0 , 7 ), INST(Sev , BaseOp , (0b11010101000000110010000010011111) , 0 , 0 , 16 ), INST(Sevl , BaseOp , (0b11010101000000110010000010111111) , 0 , 0 , 17 ), INST(Smaddl , BaseRRRR , (0b1001101100100000000000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false) , RWI_W , 0 , 2 ), INST(Smax , BaseMinMax , (0b00011010110000000110000000000000, 0b00010001110000000000000000000000) , RWI_W , 0 , 0 ), INST(Smc , BaseOpImm , (0b11010100000000000000000000000011, 16, 5) , 0 , 0 , 12 ), INST(Smin , BaseMinMax , (0b00011010110000000110100000000000, 0b00010001110010000000000000000000) , RWI_W , 0 , 1 ), INST(Smnegl , BaseRRR , (0b1001101100100000111111, kX , kZR, kW , kZR, kW , kZR, false) , RWI_W , 0 , 17 ), INST(Smsubl , BaseRRRR , (0b1001101100100000100000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false) , RWI_W , 0 , 3 ), INST(Smulh , BaseRRR , (0b1001101101000000011111, kX , kZR, kX , kZR, kX , kZR, true) , RWI_W , 0 , 18 ), INST(Smull , BaseRRR , (0b1001101100100000011111, kX , kZR, kW , kZR, kW , kZR, false) , RWI_W , 0 , 19 ), INST(Ssbb , BaseOp , (0b11010101000000110011000010011111) , 0 , 0 , 18 ), INST(St2g , BaseRMSImm9 , (0b1101100110100000000010, 0b1101100110100000000001, kX, kSP, 0, 4) , RWI_RW , 0 , 13 ), INST(Stadd , BaseAtomicSt , (0b1011100000100000000000, kWX, 30) , RWI_RX , 0 , 0 ), INST(Staddl , BaseAtomicSt , (0b1011100001100000000000, kWX, 30) , RWI_RX , 0 , 1 ), INST(Staddb , BaseAtomicSt , (0b0011100000100000000000, kW , 0 ) , RWI_RX , 0 , 2 ), INST(Staddlb , BaseAtomicSt , (0b0011100001100000000000, kW , 0 ) , RWI_RX , 0 , 3 ), INST(Staddh , BaseAtomicSt , (0b0111100000100000000000, kW , 0 ) , RWI_RX , 0 , 4 ), INST(Staddlh , BaseAtomicSt , (0b0111100001100000000000, kW , 0 ) , RWI_RX , 0 , 5 ), INST(Stclr , BaseAtomicSt , (0b1011100000100000000100, kWX, 30) , RWI_RX , 0 , 6 ), INST(Stclrl , BaseAtomicSt , (0b1011100001100000000100, kWX, 30) , RWI_RX , 0 , 7 ), INST(Stclrb , BaseAtomicSt , (0b0011100000100000000100, kW , 0 ) , RWI_RX , 0 , 8 ), INST(Stclrlb , BaseAtomicSt , (0b0011100001100000000100, kW , 0 ) , RWI_RX , 0 , 9 ), INST(Stclrh , BaseAtomicSt , (0b0111100000100000000100, kW , 0 ) , RWI_RX , 0 , 10 ), INST(Stclrlh , BaseAtomicSt , (0b0111100001100000000100, kW , 0 ) , RWI_RX , 0 , 11 ), INST(Steor , BaseAtomicSt , (0b1011100000100000001000, kWX, 30) , RWI_RX , 0 , 12 ), INST(Steorl , BaseAtomicSt , (0b1011100001100000001000, kWX, 30) , RWI_RX , 0 , 13 ), INST(Steorb , BaseAtomicSt , (0b0011100000100000001000, kW , 0 ) , RWI_RX , 0 , 14 ), INST(Steorlb , BaseAtomicSt , (0b0011100001100000001000, kW , 0 ) , RWI_RX , 0 , 15 ), INST(Steorh , BaseAtomicSt , (0b0111100000100000001000, kW , 0 ) , RWI_RX , 0 , 16 ), INST(Steorlh , BaseAtomicSt , (0b0111100001100000001000, kW , 0 ) , RWI_RX , 0 , 17 ), INST(Stg , BaseRMSImm9 , (0b1101100100100000000010, 0b1101100100100000000001, kX, kSP, 0, 4) , RWI_RW , 0 , 14 ), INST(Stgm , BaseRMNoImm , (0b1101100110100000000000, kX , kZR, 0 ) , RWI_RW , 0 , 13 ), INST(Stgp , BaseLdpStp , (0b0110100100, 0b0110100010, kX, 0, 4) , RWI_RRW , 0 , 3 ), INST(Stllr , BaseRMNoImm , (0b1000100010011111011111, kWX, kZR, 30) , RWI_RW , 0 , 14 ), INST(Stllrb , BaseRMNoImm , (0b0000100010011111011111, kW , kZR, 0 ) , RWI_RW , 0 , 15 ), INST(Stllrh , BaseRMNoImm , (0b0100100010011111011111, kW , kZR, 0 ) , RWI_RW , 0 , 16 ), INST(Stlr , BaseRMNoImm , (0b1000100010011111111111, kWX, kZR, 30) , RWI_RW , 0 , 17 ), INST(Stlrb , BaseRMNoImm , (0b0000100010011111111111, kW , kZR, 0 ) , RWI_RW , 0 , 18 ), INST(Stlrh , BaseRMNoImm , (0b0100100010011111111111, kW , kZR, 0 ) , RWI_RW , 0 , 19 ), INST(Stlxp , BaseStxp , (0b1000100000100000100000, kWX, 30) , RWI_WRRX , 0 , 0 ), INST(Stlxr , BaseAtomicOp , (0b1000100000000000111111, kWX, 30, 1) , RWI_WRX , 0 , 108), INST(Stlxrb , BaseAtomicOp , (0b0000100000000000111111, kW , 0 , 1) , RWI_WRX , 0 , 109), INST(Stlxrh , BaseAtomicOp , (0b0100100000000000111111, kW , 0 , 1) , RWI_WRX , 0 , 110), INST(Stnp , BaseLdpStp , (0b0010100000, 0 , kWX, 31, 2) , RWI_RRW , 0 , 4 ), INST(Stp , BaseLdpStp , (0b0010100100, 0b0010100010, kWX, 31, 2) , RWI_RRW , 0 , 5 ), INST(Str , BaseLdSt , (0b1011100100, 0b10111000000, 0b10111000001, 0 , kWX, 30, 2, InstId::Stur) , RWI_RW , 0 , 6 ), INST(Strb , BaseLdSt , (0b0011100100, 0b00111000000, 0b00111000001, 0 , kW , 30, 0, InstId::Sturb) , RWI_RW , 0 , 7 ), INST(Strh , BaseLdSt , (0b0111100100, 0b01111000000, 0b01111000001, 0 , kWX, 30, 1, InstId::Sturh) , RWI_RW , 0 , 8 ), INST(Stset , BaseAtomicSt , (0b1011100000100000001100, kWX, 30) , RWI_RX , 0 , 18 ), INST(Stsetl , BaseAtomicSt , (0b1011100001100000001100, kWX, 30) , RWI_RX , 0 , 19 ), INST(Stsetb , BaseAtomicSt , (0b0011100000100000001100, kW , 0 ) , RWI_RX , 0 , 20 ), INST(Stsetlb , BaseAtomicSt , (0b0011100001100000001100, kW , 0 ) , RWI_RX , 0 , 21 ), INST(Stseth , BaseAtomicSt , (0b0111100000100000001100, kW , 0 ) , RWI_RX , 0 , 22 ), INST(Stsetlh , BaseAtomicSt , (0b0111100001100000001100, kW , 0 ) , RWI_RX , 0 , 23 ), INST(Stsmax , BaseAtomicSt , (0b1011100000100000010000, kWX, 30) , RWI_RX , 0 , 24 ), INST(Stsmaxl , BaseAtomicSt , (0b1011100001100000010000, kWX, 30) , RWI_RX , 0 , 25 ), INST(Stsmaxb , BaseAtomicSt , (0b0011100000100000010000, kW , 0 ) , RWI_RX , 0 , 26 ), INST(Stsmaxlb , BaseAtomicSt , (0b0011100001100000010000, kW , 0 ) , RWI_RX , 0 , 27 ), INST(Stsmaxh , BaseAtomicSt , (0b0111100000100000010000, kW , 0 ) , RWI_RX , 0 , 28 ), INST(Stsmaxlh , BaseAtomicSt , (0b0111100001100000010000, kW , 0 ) , RWI_RX , 0 , 29 ), INST(Stsmin , BaseAtomicSt , (0b1011100000100000010100, kWX, 30) , RWI_RX , 0 , 30 ), INST(Stsminl , BaseAtomicSt , (0b1011100001100000010100, kWX, 30) , RWI_RX , 0 , 31 ), INST(Stsminb , BaseAtomicSt , (0b0011100000100000010100, kW , 0 ) , RWI_RX , 0 , 32 ), INST(Stsminlb , BaseAtomicSt , (0b0011100001100000010100, kW , 0 ) , RWI_RX , 0 , 33 ), INST(Stsminh , BaseAtomicSt , (0b0111100000100000010100, kW , 0 ) , RWI_RX , 0 , 34 ), INST(Stsminlh , BaseAtomicSt , (0b0111100001100000010100, kW , 0 ) , RWI_RX , 0 , 35 ), INST(Sttr , BaseRMSImm9 , (0b1011100000000000000010, 0b0000000000000000000000, kWX, kZR, 30, 0) , RWI_RW , 0 , 15 ), INST(Sttrb , BaseRMSImm9 , (0b0011100000000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0) , RWI_RW , 0 , 16 ), INST(Sttrh , BaseRMSImm9 , (0b0111100000000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0) , RWI_RW , 0 , 17 ), INST(Stumax , BaseAtomicSt , (0b1011100000100000011000, kWX, 30) , RWI_RX , 0 , 36 ), INST(Stumaxl , BaseAtomicSt , (0b1011100001100000011000, kWX, 30) , RWI_RX , 0 , 37 ), INST(Stumaxb , BaseAtomicSt , (0b0011100000100000011000, kW , 0 ) , RWI_RX , 0 , 38 ), INST(Stumaxlb , BaseAtomicSt , (0b0011100001100000011000, kW , 0 ) , RWI_RX , 0 , 39 ), INST(Stumaxh , BaseAtomicSt , (0b0111100000100000011000, kW , 0 ) , RWI_RX , 0 , 40 ), INST(Stumaxlh , BaseAtomicSt , (0b0111100001100000011000, kW , 0 ) , RWI_RX , 0 , 41 ), INST(Stumin , BaseAtomicSt , (0b1011100000100000011100, kWX, 30) , RWI_RX , 0 , 42 ), INST(Stuminl , BaseAtomicSt , (0b1011100001100000011100, kWX, 30) , RWI_RX , 0 , 43 ), INST(Stuminb , BaseAtomicSt , (0b0011100000100000011100, kW , 0 ) , RWI_RX , 0 , 44 ), INST(Stuminlb , BaseAtomicSt , (0b0011100001100000011100, kW , 0 ) , RWI_RX , 0 , 45 ), INST(Stuminh , BaseAtomicSt , (0b0111100000100000011100, kW , 0 ) , RWI_RX , 0 , 46 ), INST(Stuminlh , BaseAtomicSt , (0b0111100001100000011100, kW , 0 ) , RWI_RX , 0 , 47 ), INST(Stur , BaseRMSImm9 , (0b1011100000000000000000, 0b0000000000000000000000, kWX, kZR, 30, 0) , RWI_RW , 0 , 18 ), INST(Sturb , BaseRMSImm9 , (0b0011100000000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0) , RWI_RW , 0 , 19 ), INST(Sturh , BaseRMSImm9 , (0b0111100000000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0) , RWI_RW , 0 , 20 ), INST(Stxp , BaseStxp , (0b1000100000100000000000, kWX, 30) , RWI_WRRW , 0 , 1 ), INST(Stxr , BaseStx , (0b1000100000000000011111, kWX, 30) , RWI_WRW , 0 , 0 ), INST(Stxrb , BaseStx , (0b0000100000000000011111, kW , 0 ) , RWI_WRW , 0 , 1 ), INST(Stxrh , BaseStx , (0b0100100000000000011111, kW , 0 ) , RWI_WRW , 0 , 2 ), INST(Stz2g , BaseRMSImm9 , (0b1101100111100000000010, 0b1101100111100000000001, kX , kSP, 0, 4) , RWI_RW , 0 , 21 ), INST(Stzg , BaseRMSImm9 , (0b1101100101100000000010, 0b1101100101100000000001, kX , kSP, 0, 4) , RWI_RW , 0 , 22 ), INST(Stzgm , BaseRMNoImm , (0b1101100100100000000000, kX , kZR, 0) , RWI_RW , 0 , 20 ), INST(Sub , BaseAddSub , (0b1001011000, 0b1001011001, 0b1010001) , RWI_W , 0 , 2 ), INST(Subg , BaseRRII , (0b1101000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10) , RWI_W , 0 , 1 ), INST(Subp , BaseRRR , (0b1001101011000000000000, kX, kZR, kX, kSP, kX, kSP, false) , RWI_W , 0 , 20 ), INST(Subps , BaseRRR , (0b1011101011000000000000, kX, kZR, kX, kSP, kX, kSP, false) , RWI_W , 0 , 21 ), INST(Subs , BaseAddSub , (0b1101011000, 0b1101011001, 0b1110001) , RWI_W , 0 , 3 ), INST(Svc , BaseOpImm , (0b11010100000000000000000000000001, 16, 5) , 0 , 0 , 13 ), INST(Swp , BaseAtomicOp , (0b1011100000100000100000, kWX, 30, 1) , RWI_RWX , 0 , 111), INST(Swpa , BaseAtomicOp , (0b1011100010100000100000, kWX, 30, 1) , RWI_RWX , 0 , 112), INST(Swpab , BaseAtomicOp , (0b0011100010100000100000, kW , 0 , 1) , RWI_RWX , 0 , 113), INST(Swpah , BaseAtomicOp , (0b0111100010100000100000, kW , 0 , 1) , RWI_RWX , 0 , 114), INST(Swpal , BaseAtomicOp , (0b1011100011100000100000, kWX, 30, 1) , RWI_RWX , 0 , 115), INST(Swpalb , BaseAtomicOp , (0b0011100011100000100000, kW , 0 , 1) , RWI_RWX , 0 , 116), INST(Swpalh , BaseAtomicOp , (0b0111100011100000100000, kW , 0 , 1) , RWI_RWX , 0 , 117), INST(Swpb , BaseAtomicOp , (0b0011100000100000100000, kW , 0 , 1) , RWI_RWX , 0 , 118), INST(Swph , BaseAtomicOp , (0b0111100000100000100000, kW , 0 , 1) , RWI_RWX , 0 , 119), INST(Swpl , BaseAtomicOp , (0b1011100001100000100000, kWX, 30, 1) , RWI_RWX , 0 , 120), INST(Swplb , BaseAtomicOp , (0b0011100001100000100000, kW , 0 , 1) , RWI_RWX , 0 , 121), INST(Swplh , BaseAtomicOp , (0b0111100001100000100000, kW , 0 , 1) , RWI_RWX , 0 , 122), INST(Sxtb , BaseExtend , (0b0001001100000000000111, kWX, 0) , RWI_W , 0 , 0 ), INST(Sxth , BaseExtend , (0b0001001100000000001111, kWX, 0) , RWI_W , 0 , 1 ), INST(Sxtw , BaseExtend , (0b1001001101000000011111, kX , 0) , RWI_W , 0 , 2 ), INST(Sys , BaseSys , (_) , RWI_W , 0 , 0 ), INST(Tlbi , BaseAtDcIcTlbi , (0b00011110000000, 0b00010000000000, false) , RWI_RX , 0 , 3 ), INST(Tst , BaseTst , (0b1101010000, 0b111001000) , RWI_R , 0 , 0 ), INST(Tbnz , BaseBranchTst , (0b00110111000000000000000000000000) , RWI_R , 0 , 0 ), INST(Tbz , BaseBranchTst , (0b00110110000000000000000000000000) , RWI_R , 0 , 1 ), INST(Ubfiz , BaseBfi , (0b01010011000000000000000000000000) , RWI_W , 0 , 2 ), INST(Ubfm , BaseBfm , (0b01010011000000000000000000000000) , RWI_W , 0 , 2 ), INST(Ubfx , BaseBfx , (0b01010011000000000000000000000000) , RWI_W , 0 , 2 ), INST(Udf , BaseOpImm , (0b00000000000000000000000000000000, 16, 0) , 0 , 0 , 14 ), INST(Udiv , BaseRRR , (0b0001101011000000000010, kWX, kZR, kWX, kZR, kWX, kZR, true) , RWI_W , 0 , 22 ), INST(Umaddl , BaseRRRR , (0b1001101110100000000000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false) , RWI_W , 0 , 4 ), INST(Umax , BaseMinMax , (0b00011010110000000110010000000000, 0b00010001110001000000000000000000) , RWI_W , 0 , 2 ), INST(Umin , BaseMinMax , (0b00011010110000000110110000000000, 0b00010001110011000000000000000000) , RWI_W , 0 , 3 ), INST(Umnegl , BaseRRR , (0b1001101110100000111111, kX , kZR, kW , kZR, kW , kZR, false) , RWI_W , 0 , 23 ), INST(Umull , BaseRRR , (0b1001101110100000011111, kX , kZR, kW , kZR, kW , kZR, false) , RWI_W , 0 , 24 ), INST(Umulh , BaseRRR , (0b1001101111000000011111, kX , kZR, kX , kZR, kX , kZR, false) , RWI_W , 0 , 25 ), INST(Umsubl , BaseRRRR , (0b1001101110100000100000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false) , RWI_W , 0 , 5 ), INST(Uxtb , BaseExtend , (0b0101001100000000000111, kW, 1) , RWI_W , 0 , 3 ), INST(Uxth , BaseExtend , (0b0101001100000000001111, kW, 1) , RWI_W , 0 , 4 ), INST(Wfe , BaseOp , (0b11010101000000110010000001011111) , 0 , 0 , 19 ), INST(Wfi , BaseOp , (0b11010101000000110010000001111111) , 0 , 0 , 20 ), INST(Xaflag , BaseOp , (0b11010101000000000100000000111111) , 0 , 0 , 21 ), INST(Xpacd , BaseR , (0b11011010110000010100011111100000, kX, kZR, 0) , RWI_X , 0 , 8 ), INST(Xpaci , BaseR , (0b11011010110000010100001111100000, kX, kZR, 0) , RWI_X , 0 , 9 ), INST(Xpaclri , BaseOp , (0b11010101000000110010000011111111) , RWI_X , 0 , 22 ), INST(Yield , BaseOp , (0b11010101000000110010000000111111) , 0 , 0 , 23 ), INST(Abs_v , ISimdVV , (0b0000111000100000101110, kVO_V_Any) , RWI_W , 0 , 0 ), INST(Add_v , ISimdVVV , (0b0000111000100000100001, kVO_V_Any) , RWI_W , 0 , 0 ), INST(Addhn_v , ISimdVVV , (0b0000111000100000010000, kVO_V_B8H4S2) , RWI_W , F!(Narrow) , 1 ), INST(Addhn2_v , ISimdVVV , (0b0100111000100000010000, kVO_V_B16H8S4) , RWI_W , F!(Narrow) , 2 ), INST(Addp_v , ISimdPair , (0b0101111000110001101110, 0b0000111000100000101111, kVO_V_Any) , RWI_W , F!(Pair) , 0 ), INST(Addv_v , ISimdSV , (0b0000111000110001101110, kVO_V_BH_4S) , RWI_W , 0 , 0 ), INST(Aesd_v , ISimdVVx , (0b0100111000101000010110, kOp_V16B, kOp_V16B) , RWI_X , 0 , 0 ), INST(Aese_v , ISimdVVx , (0b0100111000101000010010, kOp_V16B, kOp_V16B) , RWI_X , 0 , 1 ), INST(Aesimc_v , ISimdVVx , (0b0100111000101000011110, kOp_V16B, kOp_V16B) , RWI_W , 0 , 2 ), INST(Aesmc_v , ISimdVVx , (0b0100111000101000011010, kOp_V16B, kOp_V16B) , RWI_W , 0 , 3 ), INST(And_v , ISimdVVV , (0b0000111000100000000111, kVO_V_B) , RWI_W , 0 , 3 ), INST(Bcax_v , ISimdVVVV , (0b1100111000100000000000, kVO_V_B16) , RWI_W , 0 , 0 ), INST(Bfcvt_v , ISimdVVx , (0b0001111001100011010000, kOp_H, kOp_S) , RWI_W , 0 , 4 ), INST(Bfcvtn_v , ISimdVVx , (0b0000111010100001011010, kOp_V4H, kOp_V4S) , RWI_W , F!(Narrow) , 5 ), INST(Bfcvtn2_v , ISimdVVx , (0b0100111010100001011010, kOp_V8H, kOp_V4S) , RWI_W , F!(Narrow) , 6 ), INST(Bfdot_v , SimdDot , (0b0010111001000000111111, 0b0000111101000000111100, kET_S, kET_H, kET_2H) , RWI_X , 0 , 0 ), INST(Bfmlalb_v , SimdFmlal , (0b0010111011000000111111, 0b0000111111000000111100, 0, kET_S, kET_H, kET_H) , RWI_X , F!(VH0_15) , 0 ), INST(Bfmlalt_v , SimdFmlal , (0b0110111011000000111111, 0b0100111111000000111100, 0, kET_S, kET_H, kET_H) , RWI_X , F!(VH0_15) , 1 ), INST(Bfmmla_v , ISimdVVVx , (0b0110111001000000111011, kOp_V4S, kOp_V8H, kOp_V8H) , RWI_X , F!(Long) , 0 ), INST(Bic_v , SimdBicOrr , (0b0000111001100000000111, 0b0010111100000000000001) , RWI_W , 0 , 0 ), INST(Bif_v , ISimdVVV , (0b0010111011100000000111, kVO_V_B) , RWI_X , 0 , 4 ), INST(Bit_v , ISimdVVV , (0b0010111010100000000111, kVO_V_B) , RWI_X , 0 , 5 ), INST(Bsl_v , ISimdVVV , (0b0010111001100000000111, kVO_V_B) , RWI_X , 0 , 6 ), INST(Cls_v , ISimdVV , (0b0000111000100000010010, kVO_V_BHS) , RWI_W , 0 , 1 ), INST(Clz_v , ISimdVV , (0b0010111000100000010010, kVO_V_BHS) , RWI_W , 0 , 2 ), INST(Cmeq_v , SimdCmp , (0b0010111000100000100011, 0b0000111000100000100110, kVO_V_Any) , RWI_W , 0 , 0 ), INST(Cmge_v , SimdCmp , (0b0000111000100000001111, 0b0010111000100000100010, kVO_V_Any) , RWI_W , 0 , 1 ), INST(Cmgt_v , SimdCmp , (0b0000111000100000001101, 0b0000111000100000100010, kVO_V_Any) , RWI_W , 0 , 2 ), INST(Cmhi_v , SimdCmp , (0b0010111000100000001101, 0b0000000000000000000000, kVO_V_Any) , RWI_W , 0 , 3 ), INST(Cmhs_v , SimdCmp , (0b0010111000100000001111, 0b0000000000000000000000, kVO_V_Any) , RWI_W , 0 , 4 ), INST(Cmle_v , SimdCmp , (0b0000000000000000000000, 0b0010111000100000100110, kVO_V_Any) , RWI_W , 0 , 5 ), INST(Cmlt_v , SimdCmp , (0b0000000000000000000000, 0b0000111000100000101010, kVO_V_Any) , RWI_W , 0 , 6 ), INST(Cmtst_v , ISimdVVV , (0b0000111000100000100011, kVO_V_Any) , RWI_W , 0 , 7 ), INST(Cnt_v , ISimdVV , (0b0000111000100000010110, kVO_V_B) , RWI_W , 0 , 3 ), INST(Dup_v , SimdDup , (_) , RWI_W , 0 , 0 ), INST(Eor_v , ISimdVVV , (0b0010111000100000000111, kVO_V_B) , RWI_W , 0 , 8 ), INST(Eor3_v , ISimdVVVV , (0b1100111000000000000000, kVO_V_B16) , RWI_W , 0 , 1 ), INST(Ext_v , ISimdVVVI , (0b0010111000000000000000, kVO_V_B, 4, 11, 1) , RWI_W , 0 , 0 ), INST(Fabd_v , FSimdVVV , (0b0111111010100000110101, kHF_C, 0b0010111010100000110101, kHF_C) , RWI_W , 0 , 0 ), INST(Fabs_v , FSimdVV , (0b0001111000100000110000, kHF_A, 0b0000111010100000111110, kHF_B) , RWI_W , 0 , 0 ), INST(Facge_v , FSimdVVV , (0b0111111000100000111011, kHF_C, 0b0010111000100000111011, kHF_C) , RWI_W , 0 , 1 ), INST(Facgt_v , FSimdVVV , (0b0111111010100000111011, kHF_C, 0b0010111010100000111011, kHF_C) , RWI_W , 0 , 2 ), INST(Fadd_v , FSimdVVV , (0b0001111000100000001010, kHF_A, 0b0000111000100000110101, kHF_C) , RWI_W , 0 , 3 ), INST(Faddp_v , FSimdPair , (0b0111111000110000110110, 0b0010111000100000110101) , RWI_W , 0 , 0 ), INST(Fcadd_v , SimdFcadd , (0b0010111000000000111001) , RWI_W , 0 , 0 ), INST(Fccmp_v , SimdFccmpFccmpe , (0b00011110001000000000010000000000) , RWI_R , 0 , 0 ), INST(Fccmpe_v , SimdFccmpFccmpe , (0b00011110001000000000010000010000) , RWI_R , 0 , 1 ), INST(Fcmeq_v , SimdFcm , (0b0000111000100000111001, kHF_C, 0b0000111010100000110110) , RWI_W , 0 , 0 ), INST(Fcmge_v , SimdFcm , (0b0010111000100000111001, kHF_C, 0b0010111010100000110010) , RWI_W , 0 , 1 ), INST(Fcmgt_v , SimdFcm , (0b0010111010100000111001, kHF_C, 0b0000111010100000110010) , RWI_W , 0 , 2 ), INST(Fcmla_v , SimdFcmla , (0b0010111000000000110001, 0b0010111100000000000100) , RWI_X , 0 , 0 ), INST(Fcmle_v , SimdFcm , (0b0000000000000000000000, kHF_C, 0b0010111010100000110110) , RWI_W , 0 , 3 ), INST(Fcmlt_v , SimdFcm , (0b0000000000000000000000, kHF_C, 0b0000111010100000111010) , RWI_W , 0 , 4 ), INST(Fcmp_v , SimdFcmpFcmpe , (0b00011110001000000010000000000000) , RWI_R , 0 , 0 ), INST(Fcmpe_v , SimdFcmpFcmpe , (0b00011110001000000010000000010000) , RWI_R , 0 , 1 ), INST(Fcsel_v , SimdFcsel , (_) , RWI_W , 0 , 0 ), INST(Fcvt_v , SimdFcvt , (_) , RWI_W , 0 , 0 ), INST(Fcvtas_v , SimdFcvtSV , (0b0000111000100001110010, 0b0000000000000000000000, 0b0001111000100100000000, 1) , RWI_W , 0 , 0 ), INST(Fcvtau_v , SimdFcvtSV , (0b0010111000100001110010, 0b0000000000000000000000, 0b0001111000100101000000, 1) , RWI_W , 0 , 1 ), INST(Fcvtl_v , SimdFcvtLN , (0b0000111000100001011110, 0, 0) , RWI_W , F!(Long) , 0 ), INST(Fcvtl2_v , SimdFcvtLN , (0b0100111000100001011110, 0, 0) , RWI_W , F!(Long) , 1 ), INST(Fcvtms_v , SimdFcvtSV , (0b0000111000100001101110, 0b0000000000000000000000, 0b0001111000110000000000, 1) , RWI_W , 0 , 2 ), INST(Fcvtmu_v , SimdFcvtSV , (0b0010111000100001101110, 0b0000000000000000000000, 0b0001111000110001000000, 1) , RWI_W , 0 , 3 ), INST(Fcvtn_v , SimdFcvtLN , (0b0000111000100001011010, 0, 0) , RWI_W , F!(Narrow) , 2 ), INST(Fcvtn2_v , SimdFcvtLN , (0b0100111000100001011010, 0, 0) , RWI_X , F!(Narrow) , 3 ), INST(Fcvtns_v , SimdFcvtSV , (0b0000111000100001101010, 0b0000000000000000000000, 0b0001111000100000000000, 1) , RWI_W , 0 , 4 ), INST(Fcvtnu_v , SimdFcvtSV , (0b0010111000100001101010, 0b0000000000000000000000, 0b0001111000100001000000, 1) , RWI_W , 0 , 5 ), INST(Fcvtps_v , SimdFcvtSV , (0b0000111010100001101010, 0b0000000000000000000000, 0b0001111000101000000000, 1) , RWI_W , 0 , 6 ), INST(Fcvtpu_v , SimdFcvtSV , (0b0010111010100001101010, 0b0000000000000000000000, 0b0001111000101001000000, 1) , RWI_W , 0 , 7 ), INST(Fcvtxn_v , SimdFcvtLN , (0b0010111000100001011010, 1, 1) , RWI_W , F!(Narrow) , 4 ), INST(Fcvtxn2_v , SimdFcvtLN , (0b0110111000100001011010, 1, 0) , RWI_X , F!(Narrow) , 5 ), INST(Fcvtzs_v , SimdFcvtSV , (0b0000111010100001101110, 0b0000111100000000111111, 0b0001111000111000000000, 1) , RWI_W , 0 , 8 ), INST(Fcvtzu_v , SimdFcvtSV , (0b0010111010100001101110, 0b0010111100000000111111, 0b0001111000111001000000, 1) , RWI_W , 0 , 9 ), INST(Fdiv_v , FSimdVVV , (0b0001111000100000000110, kHF_A, 0b0010111000100000111111, kHF_C) , RWI_W , 0 , 4 ), INST(Fjcvtzs_v , ISimdVVx , (0b0001111001111110000000, kOp_GpW, kOp_D) , RWI_W , 0 , 7 ), INST(Fmadd_v , FSimdVVVV , (0b0001111100000000000000, kHF_A, 0b0000000000000000000000, kHF_N) , RWI_W , 0 , 0 ), INST(Fmax_v , FSimdVVV , (0b0001111000100000010010, kHF_A, 0b0000111000100000111101, kHF_C) , RWI_W , 0 , 5 ), INST(Fmaxnm_v , FSimdVVV , (0b0001111000100000011010, kHF_A, 0b0000111000100000110001, kHF_C) , RWI_W , 0 , 6 ), INST(Fmaxnmp_v , FSimdPair , (0b0111111000110000110010, 0b0010111000100000110001) , RWI_W , 0 , 1 ), INST(Fmaxnmv_v , FSimdSV , (0b0010111000110000110010) , RWI_W , 0 , 0 ), INST(Fmaxp_v , FSimdPair , (0b0111111000110000111110, 0b0010111000100000111101) , RWI_W , 0 , 2 ), INST(Fmaxv_v , FSimdSV , (0b0010111000110000111110) , RWI_W , 0 , 1 ), INST(Fmin_v , FSimdVVV , (0b0001111000100000010110, kHF_A, 0b0000111010100000111101, kHF_C) , RWI_W , 0 , 7 ), INST(Fminnm_v , FSimdVVV , (0b0001111000100000011110, kHF_A, 0b0000111010100000110001, kHF_C) , RWI_W , 0 , 8 ), INST(Fminnmp_v , FSimdPair , (0b0111111010110000110010, 0b0010111010100000110001) , RWI_W , 0 , 3 ), INST(Fminnmv_v , FSimdSV , (0b0010111010110000110010) , RWI_W , 0 , 2 ), INST(Fminp_v , FSimdPair , (0b0111111010110000111110, 0b0010111010100000111101) , RWI_W , 0 , 4 ), INST(Fminv_v , FSimdSV , (0b0010111010110000111110) , RWI_W , 0 , 3 ), INST(Fmla_v , FSimdVVVe , (0b0000000000000000000000, kHF_N, 0b0000111000100000110011, 0b0000111110000000000100) , RWI_X , F!(VH0_15) , 0 ), INST(Fmlal_v , SimdFmlal , (0b0000111000100000111011, 0b0000111110000000000000, 1, kET_S, kET_H, kET_H) , RWI_X , F!(VH0_15) , 2 ), INST(Fmlal2_v , SimdFmlal , (0b0010111000100000110011, 0b0010111110000000100000, 1, kET_S, kET_H, kET_H) , RWI_X , F!(VH0_15) , 3 ), INST(Fmls_v , FSimdVVVe , (0b0000000000000000000000, kHF_N, 0b0000111010100000110011, 0b0000111110000000010100) , RWI_X , F!(VH0_15) , 1 ), INST(Fmlsl_v , SimdFmlal , (0b0000111010100000111011, 0b0000111110000000010000, 1, kET_S, kET_H, kET_H) , RWI_X , F!(VH0_15) , 4 ), INST(Fmlsl2_v , SimdFmlal , (0b0010111010100000110011, 0b0010111110000000110000, 1, kET_S, kET_H, kET_H) , RWI_X , F!(VH0_15) , 5 ), INST(Fmov_v , SimdFmov , (_) , RWI_W , 0 , 0 ), INST(Fmsub_v , FSimdVVVV , (0b0001111100000000100000, kHF_A, 0b0000000000000000000000, kHF_N) , RWI_W , 0 , 1 ), INST(Fmul_v , FSimdVVVe , (0b0001111000100000000010, kHF_A, 0b0010111000100000110111, 0b0000111110000000100100) , RWI_W , F!(VH0_15) , 2 ), INST(Fmulx_v , FSimdVVVe , (0b0101111000100000110111, kHF_C, 0b0000111000100000110111, 0b0010111110000000100100) , RWI_W , F!(VH0_15) , 3 ), INST(Fneg_v , FSimdVV , (0b0001111000100001010000, kHF_A, 0b0010111010100000111110, kHF_B) , RWI_W , 0 , 1 ), INST(Fnmadd_v , FSimdVVVV , (0b0001111100100000000000, kHF_A, 0b0000000000000000000000, kHF_N) , RWI_W , 0 , 2 ), INST(Fnmsub_v , FSimdVVVV , (0b0001111100100000100000, kHF_A, 0b0000000000000000000000, kHF_N) , RWI_W , 0 , 3 ), INST(Fnmul_v , FSimdVVV , (0b0001111000100000100010, kHF_A, 0b0000000000000000000000, kHF_N) , RWI_W , 0 , 9 ), INST(Frecpe_v , FSimdVV , (0b0101111010100001110110, kHF_B, 0b0000111010100001110110, kHF_B) , RWI_W , 0 , 2 ), INST(Frecps_v , FSimdVVV , (0b0101111000100000111111, kHF_C, 0b0000111000100000111111, kHF_C) , RWI_W , 0 , 10 ), INST(Frecpx_v , FSimdVV , (0b0101111010100001111110, kHF_B, 0b0000000000000000000000, kHF_N) , RWI_W , 0 , 3 ), INST(Frint32x_v , FSimdVV , (0b0001111000101000110000, kHF_N, 0b0010111000100001111010, kHF_N) , RWI_W , 0 , 4 ), INST(Frint32z_v , FSimdVV , (0b0001111000101000010000, kHF_N, 0b0000111000100001111010, kHF_N) , RWI_W , 0 , 5 ), INST(Frint64x_v , FSimdVV , (0b0001111000101001110000, kHF_N, 0b0010111000100001111110, kHF_N) , RWI_W , 0 , 6 ), INST(Frint64z_v , FSimdVV , (0b0001111000101001010000, kHF_N, 0b0000111000100001111110, kHF_N) , RWI_W , 0 , 7 ), INST(Frinta_v , FSimdVV , (0b0001111000100110010000, kHF_A, 0b0010111000100001100010, kHF_B) , RWI_W , 0 , 8 ), INST(Frinti_v , FSimdVV , (0b0001111000100111110000, kHF_A, 0b0010111010100001100110, kHF_B) , RWI_W , 0 , 9 ), INST(Frintm_v , FSimdVV , (0b0001111000100101010000, kHF_A, 0b0000111000100001100110, kHF_B) , RWI_W , 0 , 10 ), INST(Frintn_v , FSimdVV , (0b0001111000100100010000, kHF_A, 0b0000111000100001100010, kHF_B) , RWI_W , 0 , 11 ), INST(Frintp_v , FSimdVV , (0b0001111000100100110000, kHF_A, 0b0000111010100001100010, kHF_B) , RWI_W , 0 , 12 ), INST(Frintx_v , FSimdVV , (0b0001111000100111010000, kHF_A, 0b0010111000100001100110, kHF_B) , RWI_W , 0 , 13 ), INST(Frintz_v , FSimdVV , (0b0001111000100101110000, kHF_A, 0b0000111010100001100110, kHF_B) , RWI_W , 0 , 14 ), INST(Frsqrte_v , FSimdVV , (0b0111111010100001110110, kHF_B, 0b0010111010100001110110, kHF_B) , RWI_W , 0 , 15 ), INST(Frsqrts_v , FSimdVVV , (0b0101111010100000111111, kHF_C, 0b0000111010100000111111, kHF_C) , RWI_W , 0 , 11 ), INST(Fsqrt_v , FSimdVV , (0b0001111000100001110000, kHF_A, 0b0010111010100001111110, kHF_B) , RWI_W , 0 , 16 ), INST(Fsub_v , FSimdVVV , (0b0001111000100000001110, kHF_A, 0b0000111010100000110101, kHF_C) , RWI_W , 0 , 12 ), INST(Ins_v , SimdIns , (_) , RWI_X , 0 , 0 ), INST(Ld1_v , SimdLdNStN , (0b0000110101000000000000, 0b0000110001000000001000, 1, 0) , RWI_LDN , F!(Consecutive) , 0 ), INST(Ld1r_v , SimdLdNStN , (0b0000110101000000110000, 0b0000000000000000000000, 1, 1) , RWI_LDN , F!(Consecutive) , 1 ), INST(Ld2_v , SimdLdNStN , (0b0000110101100000000000, 0b0000110001000000100000, 2, 0) , RWI_LDN , F!(Consecutive) , 2 ), INST(Ld2r_v , SimdLdNStN , (0b0000110101100000110000, 0b0000000000000000000000, 2, 1) , RWI_LDN , F!(Consecutive) , 3 ), INST(Ld3_v , SimdLdNStN , (0b0000110101000000001000, 0b0000110001000000010000, 3, 0) , RWI_LDN , F!(Consecutive) , 4 ), INST(Ld3r_v , SimdLdNStN , (0b0000110101000000111000, 0b0000000000000000000000, 3, 1) , RWI_LDN , F!(Consecutive) , 5 ), INST(Ld4_v , SimdLdNStN , (0b0000110101100000001000, 0b0000110001000000000000, 4, 0) , RWI_LDN , F!(Consecutive) , 6 ), INST(Ld4r_v , SimdLdNStN , (0b0000110101100000111000, 0b0000000000000000000000, 4, 1) , RWI_LDN , F!(Consecutive) , 7 ), INST(Ldnp_v , SimdLdpStp , (0b0010110001, 0b0000000000) , RWI_WW , 0 , 0 ), INST(Ldp_v , SimdLdpStp , (0b0010110101, 0b0010110011) , RWI_WW , 0 , 1 ), INST(Ldr_v , SimdLdSt , (0b0011110101, 0b00111100010, 0b00111100011, 0b00011100, InstId::Ldur_v) , RWI_W , 0 , 0 ), INST(Ldur_v , SimdLdurStur , (0b0011110001000000000000) , RWI_W , 0 , 0 ), INST(Mla_v , ISimdVVVe , (0b0000111000100000100101, kVO_V_BHS, 0b0010111100000000000000, kVO_V_HS) , RWI_X , F!(VH0_15) , 0 ), INST(Mls_v , ISimdVVVe , (0b0010111000100000100101, kVO_V_BHS, 0b0010111100000000010000, kVO_V_HS) , RWI_X , F!(VH0_15) , 1 ), INST(Mov_v , SimdMov , (_) , RWI_W , 0 , 0 ), INST(Movi_v , SimdMoviMvni , (0b0000111100000000000001, 0) , RWI_W , 0 , 0 ), INST(Mul_v , ISimdVVVe , (0b0000111000100000100111, kVO_V_BHS, 0b0000111100000000100000, kVO_V_HS) , RWI_W , F!(VH0_15) , 2 ), INST(Mvn_v , ISimdVV , (0b0010111000100000010110, kVO_V_B) , RWI_W , 0 , 4 ), INST(Mvni_v , SimdMoviMvni , (0b0000111100000000000001, 1) , RWI_W , 0 , 1 ), INST(Neg_v , ISimdVV , (0b0010111000100000101110, kVO_V_Any) , RWI_W , 0 , 5 ), INST(Not_v , ISimdVV , (0b0010111000100000010110, kVO_V_B) , RWI_W , 0 , 6 ), INST(Orn_v , ISimdVVV , (0b0000111011100000000111, kVO_V_B) , RWI_W , 0 , 9 ), INST(Orr_v , SimdBicOrr , (0b0000111010100000000111, 0b0000111100000000000001) , RWI_W , 0 , 1 ), INST(Pmul_v , ISimdVVV , (0b0010111000100000100111, kVO_V_B) , RWI_W , 0 , 10 ), INST(Pmull_v , ISimdVVV , (0b0000111000100000111000, kVO_V_B8D1) , RWI_W , F!(Long) , 11 ), INST(Pmull2_v , ISimdVVV , (0b0100111000100000111000, kVO_V_B16D2) , RWI_W , F!(Long) , 12 ), INST(Raddhn_v , ISimdVVV , (0b0010111000100000010000, kVO_V_B8H4S2) , RWI_W , F!(Narrow) , 13 ), INST(Raddhn2_v , ISimdVVV , (0b0110111000100000010000, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 14 ), INST(Rax1_v , ISimdVVV , (0b1100111001100000100011, kVO_V_D2) , RWI_W , 0 , 15 ), INST(Rbit_v , ISimdVV , (0b0010111001100000010110, kVO_V_B) , RWI_W , 0 , 7 ), INST(Rev16_v , ISimdVV , (0b0000111000100000000110, kVO_V_B) , RWI_W , 0 , 8 ), INST(Rev32_v , ISimdVV , (0b0010111000100000000010, kVO_V_BH) , RWI_W , 0 , 9 ), INST(Rev64_v , ISimdVV , (0b0000111000100000000010, kVO_V_BHS) , RWI_W , 0 , 10 ), INST(Rshrn_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000100011, 1, kVO_V_B8H4S2) , RWI_W , F!(Narrow) , 0 ), INST(Rshrn2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000100011, 1, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 1 ), INST(Rsubhn_v , ISimdVVV , (0b0010111000100000011000, kVO_V_B8H4S2) , RWI_W , F!(Narrow) , 16 ), INST(Rsubhn2_v , ISimdVVV , (0b0110111000100000011000, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 17 ), INST(Saba_v , ISimdVVV , (0b0000111000100000011111, kVO_V_BHS) , RWI_X , 0 , 18 ), INST(Sabal_v , ISimdVVV , (0b0000111000100000010100, kVO_V_B8H4S2) , RWI_X , F!(Long) , 19 ), INST(Sabal2_v , ISimdVVV , (0b0100111000100000010100, kVO_V_B16H8S4) , RWI_X , F!(Long) , 20 ), INST(Sabd_v , ISimdVVV , (0b0000111000100000011101, kVO_V_BHS) , RWI_W , 0 , 21 ), INST(Sabdl_v , ISimdVVV , (0b0000111000100000011100, kVO_V_B8H4S2) , RWI_W , F!(Long) , 22 ), INST(Sabdl2_v , ISimdVVV , (0b0100111000100000011100, kVO_V_B16H8S4) , RWI_W , F!(Long) , 23 ), INST(Sadalp_v , ISimdVV , (0b0000111000100000011010, kVO_V_BHS) , RWI_X , F!(Long) | F!(Pair) , 11 ), INST(Saddl_v , ISimdVVV , (0b0000111000100000000000, kVO_V_B8H4S2) , RWI_W , F!(Long) , 24 ), INST(Saddl2_v , ISimdVVV , (0b0100111000100000000000, kVO_V_B16H8S4) , RWI_W , F!(Long) , 25 ), INST(Saddlp_v , ISimdVV , (0b0000111000100000001010, kVO_V_BHS) , RWI_W , F!(Long) | F!(Pair) , 12 ), INST(Saddlv_v , ISimdSV , (0b0000111000110000001110, kVO_V_BH_4S) , RWI_W , F!(Long) , 1 ), INST(Saddw_v , ISimdWWV , (0b0000111000100000000100, kVO_V_B8H4S2) , RWI_W , 0 , 0 ), INST(Saddw2_v , ISimdWWV , (0b0000111000100000000100, kVO_V_B16H8S4) , RWI_W , 0 , 1 ), INST(Scvtf_v , SimdFcvtSV , (0b0000111000100001110110, 0b0000111100000000111001, 0b0001111000100010000000, 0) , RWI_W , 0 , 10 ), INST(Sdot_v , SimdDot , (0b0000111010000000100101, 0b0000111110000000111000, kET_S, kET_B, kET_4B) , RWI_X , 0 , 1 ), INST(Sha1c_v , ISimdVVVx , (0b0101111000000000000000, kOp_Q, kOp_S, kOp_V4S) , RWI_X , 0 , 1 ), INST(Sha1h_v , ISimdVVx , (0b0101111000101000000010, kOp_S, kOp_S) , RWI_W , 0 , 8 ), INST(Sha1m_v , ISimdVVVx , (0b0101111000000000001000, kOp_Q, kOp_S, kOp_V4S) , RWI_X , 0 , 2 ), INST(Sha1p_v , ISimdVVVx , (0b0101111000000000000100, kOp_Q, kOp_S, kOp_V4S) , RWI_X , 0 , 3 ), INST(Sha1su0_v , ISimdVVVx , (0b0101111000000000001100, kOp_V4S, kOp_V4S, kOp_V4S) , RWI_X , 0 , 4 ), INST(Sha1su1_v , ISimdVVx , (0b0101111000101000000110, kOp_V4S, kOp_V4S) , RWI_X , 0 , 9 ), INST(Sha256h_v , ISimdVVVx , (0b0101111000000000010000, kOp_Q, kOp_Q, kOp_V4S) , RWI_X , 0 , 5 ), INST(Sha256h2_v , ISimdVVVx , (0b0101111000000000010100, kOp_Q, kOp_Q, kOp_V4S) , RWI_X , 0 , 6 ), INST(Sha256su0_v , ISimdVVx , (0b0101111000101000001010, kOp_V4S, kOp_V4S) , RWI_X , 0 , 10 ), INST(Sha256su1_v , ISimdVVVx , (0b0101111000000000011000, kOp_V4S, kOp_V4S, kOp_V4S) , RWI_X , 0 , 7 ), INST(Sha512h_v , ISimdVVVx , (0b1100111001100000100000, kOp_Q, kOp_Q, kOp_V2D) , RWI_X , 0 , 8 ), INST(Sha512h2_v , ISimdVVVx , (0b1100111001100000100001, kOp_Q, kOp_Q, kOp_V2D) , RWI_X , 0 , 9 ), INST(Sha512su0_v , ISimdVVx , (0b1100111011000000100000, kOp_V2D, kOp_V2D) , RWI_X , 0 , 11 ), INST(Sha512su1_v , ISimdVVVx , (0b1100111001100000100010, kOp_V2D, kOp_V2D, kOp_V2D) , RWI_X , 0 , 10 ), INST(Shadd_v , ISimdVVV , (0b0000111000100000000001, kVO_V_BHS) , RWI_W , 0 , 26 ), INST(Shl_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000010101, 0, kVO_V_Any) , RWI_W , 0 , 2 ), INST(Shll_v , SimdShiftES , (0b0010111000100001001110, kVO_V_B8H4S2) , RWI_W , F!(Long) , 0 ), INST(Shll2_v , SimdShiftES , (0b0110111000100001001110, kVO_V_B16H8S4) , RWI_W , F!(Long) , 1 ), INST(Shrn_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000100001, 1, kVO_V_B8H4S2) , RWI_W , F!(Narrow) , 3 ), INST(Shrn2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000100001, 1, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 4 ), INST(Shsub_v , ISimdVVV , (0b0000111000100000001001, kVO_V_BHS) , RWI_W , 0 , 27 ), INST(Sli_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000010101, 0, kVO_V_Any) , RWI_X , 0 , 5 ), INST(Sm3partw1_v , ISimdVVVx , (0b1100111001100000110000, kOp_V4S, kOp_V4S, kOp_V4S) , RWI_X , 0 , 11 ), INST(Sm3partw2_v , ISimdVVVx , (0b1100111001100000110001, kOp_V4S, kOp_V4S, kOp_V4S) , RWI_X , 0 , 12 ), INST(Sm3ss1_v , ISimdVVVVx , (0b1100111001000000000000, kOp_V4S, kOp_V4S, kOp_V4S, kOp_V4S) , RWI_W , 0 , 0 ), INST(Sm3tt1a_v , SimdSm3tt , (0b1100111001000000100000) , RWI_X , 0 , 0 ), INST(Sm3tt1b_v , SimdSm3tt , (0b1100111001000000100001) , RWI_X , 0 , 1 ), INST(Sm3tt2a_v , SimdSm3tt , (0b1100111001000000100010) , RWI_X , 0 , 2 ), INST(Sm3tt2b_v , SimdSm3tt , (0b1100111001000000100011) , RWI_X , 0 , 3 ), INST(Sm4e_v , ISimdVVx , (0b1100111011000000100001, kOp_V4S, kOp_V4S) , RWI_X , 0 , 12 ), INST(Sm4ekey_v , ISimdVVVx , (0b1100111001100000110010, kOp_V4S, kOp_V4S, kOp_V4S) , RWI_X , 0 , 13 ), INST(Smax_v , ISimdVVV , (0b0000111000100000011001, kVO_V_BHS) , RWI_W , 0 , 28 ), INST(Smaxp_v , ISimdVVV , (0b0000111000100000101001, kVO_V_BHS) , RWI_W , 0 , 29 ), INST(Smaxv_v , ISimdSV , (0b0000111000110000101010, kVO_V_BH_4S) , RWI_W , 0 , 2 ), INST(Smin_v , ISimdVVV , (0b0000111000100000011011, kVO_V_BHS) , RWI_W , 0 , 30 ), INST(Sminp_v , ISimdVVV , (0b0000111000100000101011, kVO_V_BHS) , RWI_W , 0 , 31 ), INST(Sminv_v , ISimdSV , (0b0000111000110001101010, kVO_V_BH_4S) , RWI_W , 0 , 3 ), INST(Smlal_v , ISimdVVVe , (0b0000111000100000100000, kVO_V_B8H4S2, 0b0000111100000000001000, kVO_V_H4S2) , RWI_X , F!(Long) | F!(VH0_15) , 3 ), INST(Smlal2_v , ISimdVVVe , (0b0100111000100000100000, kVO_V_B16H8S4, 0b0100111100000000001000, kVO_V_H8S4) , RWI_X , F!(Long) | F!(VH0_15) , 4 ), INST(Smlsl_v , ISimdVVVe , (0b0000111000100000101000, kVO_V_B8H4S2, 0b0000111100000000011000, kVO_V_H4S2) , RWI_X , F!(Long) | F!(VH0_15) , 5 ), INST(Smlsl2_v , ISimdVVVe , (0b0100111000100000101000, kVO_V_B16H8S4, 0b0100111100000000011000, kVO_V_H8S4) , RWI_X , F!(Long) | F!(VH0_15) , 6 ), INST(Smmla_v , ISimdVVVx , (0b0100111010000000101001, kOp_V4S, kOp_V16B, kOp_V16B) , RWI_X , 0 , 14 ), INST(Smov_v , SimdSmovUmov , (0b0000111000000000001011, kVO_V_BHS, 1) , RWI_W , 0 , 0 ), INST(Smull_v , ISimdVVVe , (0b0000111000100000110000, kVO_V_B8H4S2, 0b0000111100000000101000, kVO_V_H4S2) , RWI_W , F!(Long) | F!(VH0_15) , 7 ), INST(Smull2_v , ISimdVVVe , (0b0100111000100000110000, kVO_V_B16H8S4, 0b0100111100000000101000, kVO_V_H8S4) , RWI_W , F!(Long) | F!(VH0_15) , 8 ), INST(Sqabs_v , ISimdVV , (0b0000111000100000011110, kVO_SV_Any) , RWI_W , 0 , 13 ), INST(Sqadd_v , ISimdVVV , (0b0000111000100000000011, kVO_SV_Any) , RWI_W , 0 , 32 ), INST(Sqdmlal_v , ISimdVVVe , (0b0000111000100000100100, kVO_SV_BHS, 0b0000111100000000001100, kVO_V_H4S2) , RWI_X , F!(Long) | F!(VH0_15) , 9 ), INST(Sqdmlal2_v , ISimdVVVe , (0b0100111000100000100100, kVO_V_B16H8S4, 0b0100111100000000001100, kVO_V_H8S4) , RWI_X , F!(Long) | F!(VH0_15) , 10 ), INST(Sqdmlsl_v , ISimdVVVe , (0b0000111000100000101100, kVO_SV_BHS, 0b0000111100000000011100, kVO_V_H4S2) , RWI_X , F!(Long) | F!(VH0_15) , 11 ), INST(Sqdmlsl2_v , ISimdVVVe , (0b0100111000100000101100, kVO_V_B16H8S4, 0b0100111100000000011100, kVO_V_H8S4) , RWI_X , F!(Long) | F!(VH0_15) , 12 ), INST(Sqdmulh_v , ISimdVVVe , (0b0000111000100000101101, kVO_SV_HS, 0b0000111100000000110000, kVO_SV_HS) , RWI_W , F!(VH0_15) , 13 ), INST(Sqdmull_v , ISimdVVVe , (0b0000111000100000110100, kVO_SV_BHS, 0b0000111100000000101100, kVO_V_H4S2) , RWI_W , F!(Long) | F!(VH0_15) , 14 ), INST(Sqdmull2_v , ISimdVVVe , (0b0100111000100000110100, kVO_V_B16H8S4, 0b0100111100000000101100, kVO_V_H8S4) , RWI_W , F!(Long) | F!(VH0_15) , 15 ), INST(Sqneg_v , ISimdVV , (0b0010111000100000011110, kVO_SV_Any) , RWI_W , 0 , 14 ), INST(Sqrdmlah_v , ISimdVVVe , (0b0010111000000000100001, kVO_SV_HS, 0b0010111100000000110100, kVO_SV_HS) , RWI_X , F!(VH0_15) , 16 ), INST(Sqrdmlsh_v , ISimdVVVe , (0b0010111000000000100011, kVO_SV_HS, 0b0010111100000000111100, kVO_SV_HS) , RWI_X , F!(VH0_15) , 17 ), INST(Sqrdmulh_v , ISimdVVVe , (0b0010111000100000101101, kVO_SV_HS, 0b0000111100000000110100, kVO_SV_HS) , RWI_W , F!(VH0_15) , 18 ), INST(Sqrshl_v , SimdShift , (0b0000111000100000010111, 0b0000000000000000000000, 1, kVO_SV_Any) , RWI_W , 0 , 6 ), INST(Sqrshrn_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000100111, 1, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 7 ), INST(Sqrshrn2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000100111, 1, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 8 ), INST(Sqrshrun_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000100011, 1, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 9 ), INST(Sqrshrun2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000100011, 1, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 10 ), INST(Sqshl_v , SimdShift , (0b0000111000100000010011, 0b0000111100000000011101, 0, kVO_SV_Any) , RWI_W , 0 , 11 ), INST(Sqshlu_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000011001, 0, kVO_SV_Any) , RWI_W , 0 , 12 ), INST(Sqshrn_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000100101, 1, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 13 ), INST(Sqshrn2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000100101, 1, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 14 ), INST(Sqshrun_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000100001, 1, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 15 ), INST(Sqshrun2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000100001, 1, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 16 ), INST(Sqsub_v , ISimdVVV , (0b0000111000100000001011, kVO_SV_Any) , RWI_W , 0 , 33 ), INST(Sqxtn_v , ISimdVV , (0b0000111000100001010010, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 15 ), INST(Sqxtn2_v , ISimdVV , (0b0100111000100001010010, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 16 ), INST(Sqxtun_v , ISimdVV , (0b0010111000100001001010, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 17 ), INST(Sqxtun2_v , ISimdVV , (0b0110111000100001001010, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 18 ), INST(Srhadd_v , ISimdVVV , (0b0000111000100000000101, kVO_V_BHS) , RWI_W , 0 , 34 ), INST(Sri_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000010001, 1, kVO_V_Any) , RWI_W , 0 , 17 ), INST(Srshl_v , SimdShift , (0b0000111000100000010101, 0b0000000000000000000000, 0, kVO_V_Any) , RWI_W , 0 , 18 ), INST(Srshr_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000001001, 1, kVO_V_Any) , RWI_W , 0 , 19 ), INST(Srsra_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000001101, 1, kVO_V_Any) , RWI_X , 0 , 20 ), INST(Sshl_v , SimdShift , (0b0000111000100000010001, 0b0000000000000000000000, 0, kVO_V_Any) , RWI_W , 0 , 21 ), INST(Sshll_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000101001, 0, kVO_V_B8H4S2) , RWI_W , F!(Long) , 22 ), INST(Sshll2_v , SimdShift , (0b0000000000000000000000, 0b0100111100000000101001, 0, kVO_V_B16H8S4) , RWI_W , F!(Long) , 23 ), INST(Sshr_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000000001, 1, kVO_V_Any) , RWI_W , 0 , 24 ), INST(Ssra_v , SimdShift , (0b0000000000000000000000, 0b0000111100000000000101, 1, kVO_V_Any) , RWI_X , 0 , 25 ), INST(Ssubl_v , ISimdVVV , (0b0000111000100000001000, kVO_V_B8H4S2) , RWI_W , F!(Long) , 35 ), INST(Ssubl2_v , ISimdVVV , (0b0100111000100000001000, kVO_V_B16H8S4) , RWI_W , F!(Long) , 36 ), INST(Ssubw_v , ISimdWWV , (0b0000111000100000001100, kVO_V_B8H4S2) , RWI_W , 0 , 2 ), INST(Ssubw2_v , ISimdWWV , (0b0000111000100000001100, kVO_V_B16H8S4) , RWI_X , 0 , 3 ), INST(St1_v , SimdLdNStN , (0b0000110100000000000000, 0b0000110000000000001000, 1, 0) , RWI_STN , F!(Consecutive) , 8 ), INST(St2_v , SimdLdNStN , (0b0000110100100000000000, 0b0000110000000000100000, 2, 0) , RWI_STN , F!(Consecutive) , 9 ), INST(St3_v , SimdLdNStN , (0b0000110100000000001000, 0b0000110000000000010000, 3, 0) , RWI_STN , F!(Consecutive) , 10 ), INST(St4_v , SimdLdNStN , (0b0000110100100000001000, 0b0000110000000000000000, 4, 0) , RWI_STN , F!(Consecutive) , 11 ), INST(Stnp_v , SimdLdpStp , (0b0010110000, 0b0000000000) , RWI_RRW , 0 , 2 ), INST(Stp_v , SimdLdpStp , (0b0010110100, 0b0010110010) , RWI_RRW , 0 , 3 ), INST(Str_v , SimdLdSt , (0b0011110100, 0b00111100000, 0b00111100001, 0b00000000, InstId::Stur_v) , RWI_RW , 0 , 1 ), INST(Stur_v , SimdLdurStur , (0b0011110000000000000000) , RWI_RW , 0 , 1 ), INST(Sub_v , ISimdVVV , (0b0010111000100000100001, kVO_V_Any) , RWI_W , 0 , 37 ), INST(Subhn_v , ISimdVVV , (0b0000111000100000011000, kVO_V_B8H4S2) , RWI_W , F!(Narrow) , 38 ), INST(Subhn2_v , ISimdVVV , (0b0000111000100000011000, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 39 ), INST(Sudot_v , SimdDot , (0b0000000000000000000000, 0b0000111100000000111100, kET_S, kET_B, kET_4B) , RWI_X , 0 , 2 ), INST(Suqadd_v , ISimdVV , (0b0000111000100000001110, kVO_SV_Any) , RWI_X , 0 , 19 ), INST(Sxtl_v , SimdSxtlUxtl , (0b0000111100000000101001, kVO_V_B8H4S2) , RWI_W , F!(Long) , 0 ), INST(Sxtl2_v , SimdSxtlUxtl , (0b0100111100000000101001, kVO_V_B16H8S4) , RWI_W , F!(Long) , 1 ), INST(Tbl_v , SimdTblTbx , (0b0000111000000000000000) , RWI_W , 0 , 0 ), INST(Tbx_v , SimdTblTbx , (0b0000111000000000000100) , RWI_W , 0 , 1 ), INST(Trn1_v , ISimdVVV , (0b0000111000000000001010, kVO_V_BHS_D2) , RWI_W , 0 , 40 ), INST(Trn2_v , ISimdVVV , (0b0000111000000000011010, kVO_V_BHS_D2) , RWI_W , 0 , 41 ), INST(Uaba_v , ISimdVVV , (0b0010111000100000011111, kVO_V_BHS) , RWI_X , 0 , 42 ), INST(Uabal_v , ISimdVVV , (0b0010111000100000010100, kVO_V_B8H4S2) , RWI_X , F!(Long) , 43 ), INST(Uabal2_v , ISimdVVV , (0b0110111000100000010100, kVO_V_B16H8S4) , RWI_X , F!(Long) , 44 ), INST(Uabd_v , ISimdVVV , (0b0010111000100000011101, kVO_V_BHS) , RWI_W , 0 , 45 ), INST(Uabdl_v , ISimdVVV , (0b0010111000100000011100, kVO_V_B8H4S2) , RWI_W , F!(Long) , 46 ), INST(Uabdl2_v , ISimdVVV , (0b0110111000100000011100, kVO_V_B16H8S4) , RWI_W , F!(Long) , 47 ), INST(Uadalp_v , ISimdVV , (0b0010111000100000011010, kVO_V_BHS) , RWI_X , F!(Long) | F!(Pair) , 20 ), INST(Uaddl_v , ISimdVVV , (0b0010111000100000000000, kVO_V_B8H4S2) , RWI_W , F!(Long) , 48 ), INST(Uaddl2_v , ISimdVVV , (0b0110111000100000000000, kVO_V_B16H8S4) , RWI_W , F!(Long) , 49 ), INST(Uaddlp_v , ISimdVV , (0b0010111000100000001010, kVO_V_BHS) , RWI_W , F!(Long) | F!(Pair) , 21 ), INST(Uaddlv_v , ISimdSV , (0b0010111000110000001110, kVO_V_BH_4S) , RWI_W , F!(Long) , 4 ), INST(Uaddw_v , ISimdWWV , (0b0010111000100000000100, kVO_V_B8H4S2) , RWI_W , 0 , 4 ), INST(Uaddw2_v , ISimdWWV , (0b0010111000100000000100, kVO_V_B16H8S4) , RWI_W , 0 , 5 ), INST(Ucvtf_v , SimdFcvtSV , (0b0010111000100001110110, 0b0010111100000000111001, 0b0001111000100011000000, 0) , RWI_W , 0 , 11 ), INST(Udot_v , SimdDot , (0b0010111010000000100101, 0b0010111110000000111000, kET_S, kET_B, kET_4B) , RWI_X , 0 , 3 ), INST(Uhadd_v , ISimdVVV , (0b0010111000100000000001, kVO_V_BHS) , RWI_W , 0 , 50 ), INST(Uhsub_v , ISimdVVV , (0b0010111000100000001001, kVO_V_BHS) , RWI_W , 0 , 51 ), INST(Umax_v , ISimdVVV , (0b0010111000100000011001, kVO_V_BHS) , RWI_W , 0 , 52 ), INST(Umaxp_v , ISimdVVV , (0b0010111000100000101001, kVO_V_BHS) , RWI_W , 0 , 53 ), INST(Umaxv_v , ISimdSV , (0b0010111000110000101010, kVO_V_BH_4S) , RWI_W , 0 , 5 ), INST(Umin_v , ISimdVVV , (0b0010111000100000011011, kVO_V_BHS) , RWI_W , 0 , 54 ), INST(Uminp_v , ISimdVVV , (0b0010111000100000101011, kVO_V_BHS) , RWI_W , 0 , 55 ), INST(Uminv_v , ISimdSV , (0b0010111000110001101010, kVO_V_BH_4S) , RWI_W , 0 , 6 ), INST(Umlal_v , ISimdVVVe , (0b0010111000100000100000, kVO_V_B8H4S2, 0b0010111100000000001000, kVO_V_H4S2) , RWI_X , F!(Long) | F!(VH0_15) , 19 ), INST(Umlal2_v , ISimdVVVe , (0b0110111000100000100000, kVO_V_B16H8S4, 0b0010111100000000001000, kVO_V_H8S4) , RWI_X , F!(Long) | F!(VH0_15) , 20 ), INST(Umlsl_v , ISimdVVVe , (0b0010111000100000101000, kVO_V_B8H4S2, 0b0010111100000000011000, kVO_V_H4S2) , RWI_X , F!(Long) | F!(VH0_15) , 21 ), INST(Umlsl2_v , ISimdVVVe , (0b0110111000100000101000, kVO_V_B16H8S4, 0b0110111100000000011000, kVO_V_H8S4) , RWI_X , F!(Long) | F!(VH0_15) , 22 ), INST(Ummla_v , ISimdVVVx , (0b0110111010000000101001, kOp_V4S, kOp_V16B, kOp_V16B) , RWI_X , 0 , 15 ), INST(Umov_v , SimdSmovUmov , (0b0000111000000000001111, kVO_V_Any, 0) , RWI_W , 0 , 1 ), INST(Umull_v , ISimdVVVe , (0b0010111000100000110000, kVO_V_B8H4S2, 0b0010111100000000101000, kVO_V_H4S2) , RWI_W , F!(Long) | F!(VH0_15) , 23 ), INST(Umull2_v , ISimdVVVe , (0b0110111000100000110000, kVO_V_B16H8S4, 0b0110111100000000101000, kVO_V_H8S4) , RWI_W , F!(Long) | F!(VH0_15) , 24 ), INST(Uqadd_v , ISimdVVV , (0b0010111000100000000011, kVO_SV_Any) , RWI_W , 0 , 56 ), INST(Uqrshl_v , SimdShift , (0b0010111000100000010111, 0b0000000000000000000000, 0, kVO_SV_Any) , RWI_W , 0 , 26 ), INST(Uqrshrn_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000100111, 1, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 27 ), INST(Uqrshrn2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000100111, 1, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 28 ), INST(Uqshl_v , SimdShift , (0b0010111000100000010011, 0b0010111100000000011101, 0, kVO_SV_Any) , RWI_W , 0 , 29 ), INST(Uqshrn_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000100101, 1, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 30 ), INST(Uqshrn2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000100101, 1, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 31 ), INST(Uqsub_v , ISimdVVV , (0b0010111000100000001011, kVO_SV_Any) , RWI_W , 0 , 57 ), INST(Uqxtn_v , ISimdVV , (0b0010111000100001010010, kVO_SV_B8H4S2) , RWI_W , F!(Narrow) , 22 ), INST(Uqxtn2_v , ISimdVV , (0b0110111000100001010010, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 23 ), INST(Urecpe_v , ISimdVV , (0b0000111010100001110010, kVO_V_S) , RWI_W , 0 , 24 ), INST(Urhadd_v , ISimdVVV , (0b0010111000100000000101, kVO_V_BHS) , RWI_W , 0 , 58 ), INST(Urshl_v , SimdShift , (0b0010111000100000010101, 0b0000000000000000000000, 0, kVO_V_Any) , RWI_W , 0 , 32 ), INST(Urshr_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000001001, 1, kVO_V_Any) , RWI_W , 0 , 33 ), INST(Ursqrte_v , ISimdVV , (0b0010111010100001110010, kVO_V_S) , RWI_W , 0 , 25 ), INST(Ursra_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000001101, 1, kVO_V_Any) , RWI_X , 0 , 34 ), INST(Usdot_v , SimdDot , (0b0000111010000000100111, 0b0000111110000000111100, kET_S, kET_B, kET_4B) , RWI_X , 0 , 4 ), INST(Ushl_v , SimdShift , (0b0010111000100000010001, 0b0000000000000000000000, 0, kVO_V_Any) , RWI_W , 0 , 35 ), INST(Ushll_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000101001, 0, kVO_V_B8H4S2) , RWI_W , F!(Long) , 36 ), INST(Ushll2_v , SimdShift , (0b0000000000000000000000, 0b0110111100000000101001, 0, kVO_V_B16H8S4) , RWI_W , F!(Long) , 37 ), INST(Ushr_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000000001, 1, kVO_V_Any) , RWI_W , 0 , 38 ), INST(Usmmla_v , ISimdVVVx , (0b0100111010000000101011, kOp_V4S, kOp_V16B, kOp_V16B) , RWI_X , 0 , 16 ), INST(Usqadd_v , ISimdVV , (0b0010111000100000001110, kVO_SV_Any) , RWI_X , 0 , 26 ), INST(Usra_v , SimdShift , (0b0000000000000000000000, 0b0010111100000000000101, 1, kVO_V_Any) , RWI_X , 0 , 39 ), INST(Usubl_v , ISimdVVV , (0b0010111000100000001000, kVO_V_B8H4S2) , RWI_W , F!(Long) , 59 ), INST(Usubl2_v , ISimdVVV , (0b0110111000100000001000, kVO_V_B16H8S4) , RWI_W , F!(Long) , 60 ), INST(Usubw_v , ISimdWWV , (0b0010111000100000001100, kVO_V_B8H4S2) , RWI_W , 0 , 6 ), INST(Usubw2_v , ISimdWWV , (0b0010111000100000001100, kVO_V_B16H8S4) , RWI_W , 0 , 7 ), INST(Uxtl_v , SimdSxtlUxtl , (0b0010111100000000101001, kVO_V_B8H4S2) , RWI_W , F!(Long) , 2 ), INST(Uxtl2_v , SimdSxtlUxtl , (0b0110111100000000101001, kVO_V_B16H8S4) , RWI_W , F!(Long) , 3 ), INST(Uzp1_v , ISimdVVV , (0b0000111000000000000110, kVO_V_BHS_D2) , RWI_W , 0 , 61 ), INST(Uzp2_v , ISimdVVV , (0b0000111000000000010110, kVO_V_BHS_D2) , RWI_W , 0 , 62 ), INST(Xar_v , ISimdVVVI , (0b1100111001100000100011, kVO_V_D2, 6, 10, 0) , RWI_W , 0 , 1 ), INST(Xtn_v , ISimdVV , (0b0000111000100001001010, kVO_V_B8H4S2) , RWI_W , F!(Narrow) , 27 ), INST(Xtn2_v , ISimdVV , (0b0100111000100001001010, kVO_V_B16H8S4) , RWI_X , F!(Narrow) , 28 ), INST(Zip1_v , ISimdVVV , (0b0000111000000000001110, kVO_V_BHS_D2) , RWI_W , 0 , 63 ), INST(Zip2_v , ISimdVVV , (0b0000111000000000011110, kVO_V_BHS_D2) , RWI_W , 0 , 64 ), });
2324
2325pub const BASE_ADD_SUB: [BaseAddSub; 4] = [
2326 BaseAddSub::new(0b0001011000, 0b0001011001, 0b0010001), BaseAddSub::new(0b0101011000, 0b0101011001, 0b0110001), BaseAddSub::new(0b1001011000, 0b1001011001, 0b1010001), BaseAddSub::new(0b1101011000, 0b1101011001, 0b1110001), ];
2331
2332macro_rules! table_new {
2333 ($ty:ident, { $({ $($e:expr),* $(,)? }),* $(,)? }) => {
2334 [$( $ty::new($($e as u64 as _),*) ),*]
2335 };
2336}
2337
2338const kW: u32 = W;
2339const kX: u32 = X;
2340const kWX: u32 = WX;
2341const kZR: u32 = ZR;
2342const kSP: u32 = SP;
2343
2344const kHF_N: u32 = HFConv::N as u32;
2345const kHF_A: u32 = HFConv::A as u32;
2346const kHF_B: u32 = HFConv::B as u32;
2347const kHF_C: u32 = HFConv::C as u32;
2348
2349const kET_B: u8 = InstElementType::B as u8;
2350const kET_H: u8 = InstElementType::H as u8;
2351const kET_S: u8 = InstElementType::S as u8;
2352const kET_2H: u8 = InstElementType::_2H as u8;
2353const kET_4B: u8 = InstElementType::_4B as u8;
2354
2355const kOp_GpW: u32 = OpSignature::GpW as u32;
2356const kOp_H: u32 = OpSignature::H as u32;
2357const kOp_S: u32 = OpSignature::S as u32;
2358const kOp_D: u32 = OpSignature::D as u32;
2359const kOp_Q: u32 = OpSignature::Q as u32;
2360const kOp_V4H: u32 = OpSignature::V4H as u32;
2361const kOp_V8H: u32 = OpSignature::V8H as u32;
2362const kOp_V4S: u32 = OpSignature::V4S as u32;
2363const kOp_V2D: u32 = OpSignature::V2D as u32;
2364const kOp_V16B: u32 = OpSignature::V16B as u32;
2365
2366const kVO_V_B: u32 = VOType::VB as u32;
2367const kVO_V_BH: u32 = VOType::VBH as u32;
2368const kVO_V_BH_4S: u32 = VOType::VBH4S as u32;
2369const kVO_V_BHS: u32 = VOType::VBHS as u32;
2370const kVO_V_BHS_D2: u32 = VOType::VBHSD2 as u32;
2371const kVO_V_HS: u32 = VOType::VHS as u32;
2372const kVO_V_S: u32 = VOType::VS as u32;
2373const kVO_V_B8H4S2: u32 = VOType::VB8H4S2 as u32;
2374const kVO_V_B8D1: u32 = VOType::VB8D1 as u32;
2375const kVO_V_H4S2: u32 = VOType::VH4S2 as u32;
2376const kVO_V_B16: u32 = VOType::VB16 as u32;
2377const kVO_V_B16H8S4: u32 = VOType::VB16H8S4 as u32;
2378const kVO_V_B16D2: u32 = VOType::VB16D2 as u32;
2379const kVO_V_H8S4: u32 = VOType::VH8S4 as u32;
2380const kVO_V_D2: u32 = VOType::VD2 as u32;
2381const kVO_SV_BHS: u32 = VOType::SVBHS as u32;
2382const kVO_SV_B8H4S2: u32 = VOType::SVB8H4S2 as u32;
2383const kVO_SV_HS: u32 = VOType::SVHS as u32;
2384const kVO_V_Any: u32 = VOType::VAny as u32;
2385const kVO_SV_Any: u32 = VOType::SVAny as u32;
2386
2387pub const BASE_ADR: [BaseAdr; 2] = table_new!(BaseAdr, {
2388 { 0b0001000000000000000000, OffsetType::Adr as u8 }, { 0b1001000000000000000000, OffsetType::Adrp as u8 } });
2391
2392pub const BASE_AT_DC_IC_TLBI: [BaseAtDcIcTlbi; 4] = table_new!(BaseAtDcIcTlbi, {
2393 { 0b00011111110000, 0b00001111000000, true }, { 0b00011110000000, 0b00001110000000, true }, { 0b00011110000000, 0b00001110000000, false }, { 0b00011110000000, 0b00010000000000, false } });
2398
2399pub const BASE_ATOMIC_CASP: [BaseAtomicCasp; 4] = table_new!(BaseAtomicCasp, {
2400 { 0b0000100000100000011111, kWX, 30 }, { 0b0000100001100000011111, kWX, 30 }, { 0b0000100001100000111111, kWX, 30 }, { 0b0000100000100000111111, kWX, 30 } });
2405
2406pub const BASE_ATOMIC_OP: [BaseAtomicOp; 123] = table_new!(BaseAtomicOp, {
2407 { 0b1000100010100000011111, kWX, 30, 0 }, { 0b1000100011100000011111, kWX, 30, 1 }, { 0b0000100011100000011111, kW , 0 , 1 }, { 0b0100100011100000011111, kW , 0 , 1 }, { 0b1000100011100000111111, kWX, 30, 1 }, { 0b0000100011100000111111, kW , 0 , 1 }, { 0b0100100011100000111111, kW , 0 , 1 }, { 0b0000100010100000011111, kW , 0 , 0 }, { 0b0100100010100000011111, kW , 0 , 0 }, { 0b1000100010100000111111, kWX, 30, 0 }, { 0b0000100010100000111111, kW , 0 , 0 }, { 0b0100100010100000111111, kW , 0 , 0 }, { 0b1011100000100000000000, kWX, 30, 0 }, { 0b1011100010100000000000, kWX, 30, 1 }, { 0b0011100010100000000000, kW , 0 , 1 }, { 0b0111100010100000000000, kW , 0 , 1 }, { 0b1011100011100000000000, kWX, 30, 1 }, { 0b0011100011100000000000, kW , 0 , 1 }, { 0b0111100011100000000000, kW , 0 , 1 }, { 0b0011100000100000000000, kW , 0 , 0 }, { 0b0111100000100000000000, kW , 0 , 0 }, { 0b1011100001100000000000, kWX, 30, 0 }, { 0b0011100001100000000000, kW , 0 , 0 }, { 0b0111100001100000000000, kW , 0 , 0 }, { 0b1011100000100000000100, kWX, 30, 0 }, { 0b1011100010100000000100, kWX, 30, 1 }, { 0b0011100010100000000100, kW , 0 , 1 }, { 0b0111100010100000000100, kW , 0 , 1 }, { 0b1011100011100000000100, kWX, 30, 1 }, { 0b0011100011100000000100, kW , 0 , 1 }, { 0b0111100011100000000100, kW , 0 , 1 }, { 0b0011100000100000000100, kW , 0 , 0 }, { 0b0111100000100000000100, kW , 0 , 0 }, { 0b1011100001100000000100, kWX, 30, 0 }, { 0b0011100001100000000100, kW , 0 , 0 }, { 0b0111100001100000000100, kW , 0 , 0 }, { 0b1011100000100000001000, kWX, 30, 0 }, { 0b1011100010100000001000, kWX, 30, 1 }, { 0b0011100010100000001000, kW , 0 , 1 }, { 0b0111100010100000001000, kW , 0 , 1 }, { 0b1011100011100000001000, kWX, 30, 1 }, { 0b0011100011100000001000, kW , 0 , 1 }, { 0b0111100011100000001000, kW , 0 , 1 }, { 0b0011100000100000001000, kW , 0 , 0 }, { 0b0111100000100000001000, kW , 0 , 0 }, { 0b1011100001100000001000, kWX, 30, 0 }, { 0b0011100001100000001000, kW , 0 , 0 }, { 0b0111100001100000001000, kW , 0 , 0 }, { 0b1011100000100000001100, kWX, 30, 0 }, { 0b1011100010100000001100, kWX, 30, 1 }, { 0b0011100010100000001100, kW , 0 , 1 }, { 0b0111100010100000001100, kW , 0 , 1 }, { 0b1011100011100000001100, kWX, 30, 1 }, { 0b0011100011100000001100, kW , 0 , 1 }, { 0b0111100011100000001100, kW , 0 , 1 }, { 0b0011100000100000001100, kW , 0 , 0 }, { 0b0111100000100000001100, kW , 0 , 0 }, { 0b1011100001100000001100, kWX, 30, 0 }, { 0b0011100001100000001100, kW , 0 , 0 }, { 0b0111100001100000001100, kW , 0 , 0 }, { 0b1011100000100000010000, kWX, 30, 0 }, { 0b1011100010100000010000, kWX, 30, 1 }, { 0b0011100010100000010000, kW , 0 , 1 }, { 0b0111100010100000010000, kW , 0 , 1 }, { 0b1011100011100000010000, kWX, 30, 1 }, { 0b0011100011100000010000, kW , 0 , 1 }, { 0b0111100011100000010000, kW , 0 , 1 }, { 0b0011100000100000010000, kW , 0 , 0 }, { 0b0111100000100000010000, kW , 0 , 0 }, { 0b1011100001100000010000, kWX, 30, 0 }, { 0b0011100001100000010000, kW , 0 , 0 }, { 0b0111100001100000010000, kW , 0 , 0 }, { 0b1011100000100000010100, kWX, 30, 0 }, { 0b1011100010100000010100, kWX, 30, 1 }, { 0b0011100010100000010100, kW , 0 , 1 }, { 0b0111100010100000010100, kW , 0 , 1 }, { 0b1011100011100000010100, kWX, 30, 1 }, { 0b0011100011100000010100, kW , 0 , 1 }, { 0b0111100011100000010100, kW , 0 , 1 }, { 0b0011100000100000010100, kW , 0 , 0 }, { 0b0111100000100000010100, kW , 0 , 0 }, { 0b1011100001100000010100, kWX, 30, 0 }, { 0b0011100001100000010100, kW , 0 , 0 }, { 0b0111100001100000010100, kW , 0 , 0 }, { 0b1011100000100000011000, kWX, 30, 0 }, { 0b1011100010100000011000, kWX, 30, 1 }, { 0b0011100010100000011000, kW , 0 , 1 }, { 0b0111100010100000011000, kW , 0 , 1 }, { 0b1011100011100000011000, kWX, 30, 1 }, { 0b0011100011100000011000, kW , 0 , 1 }, { 0b0111100011100000011000, kW , 0 , 1 }, { 0b0011100000100000011000, kW , 0 , 0 }, { 0b0111100000100000011000, kW , 0 , 0 }, { 0b1011100001100000011000, kWX, 30, 0 }, { 0b0011100001100000011000, kW , 0 , 0 }, { 0b0111100001100000011000, kW , 0 , 0 }, { 0b1011100000100000011100, kWX, 30, 0 }, { 0b1011100010100000011100, kWX, 30, 1 }, { 0b0011100010100000011100, kW , 0 , 1 }, { 0b0111100010100000011100, kW , 0 , 1 }, { 0b1011100011100000011100, kWX, 30, 1 }, { 0b0011100011100000011100, kW , 0 , 1 }, { 0b0111100011100000011100, kW , 0 , 1 }, { 0b0011100000100000011100, kW , 0 , 0 }, { 0b0111100000100000011100, kW , 0 , 0 }, { 0b1011100001100000011100, kWX, 30, 0 }, { 0b0011100001100000011100, kW , 0 , 0 }, { 0b0111100001100000011100, kW , 0 , 0 }, { 0b1000100000000000111111, kWX, 30, 1 }, { 0b0000100000000000111111, kW , 0 , 1 }, { 0b0100100000000000111111, kW , 0 , 1 }, { 0b1011100000100000100000, kWX, 30, 1 }, { 0b1011100010100000100000, kWX, 30, 1 }, { 0b0011100010100000100000, kW , 0 , 1 }, { 0b0111100010100000100000, kW , 0 , 1 }, { 0b1011100011100000100000, kWX, 30, 1 }, { 0b0011100011100000100000, kW , 0 , 1 }, { 0b0111100011100000100000, kW , 0 , 1 }, { 0b0011100000100000100000, kW , 0 , 1 }, { 0b0111100000100000100000, kW , 0 , 1 }, { 0b1011100001100000100000, kWX, 30, 1 }, { 0b0011100001100000100000, kW , 0 , 1 }, { 0b0111100001100000100000, kW , 0 , 1 } });
2531
2532pub const BASE_ATOMIC_ST: [BaseAtomicSt; 48] = table_new!(BaseAtomicSt, {
2533 { 0b1011100000100000000000, kWX, 30 }, { 0b1011100001100000000000, kWX, 30 }, { 0b0011100000100000000000, kW , 0 }, { 0b0011100001100000000000, kW , 0 }, { 0b0111100000100000000000, kW , 0 }, { 0b0111100001100000000000, kW , 0 }, { 0b1011100000100000000100, kWX, 30 }, { 0b1011100001100000000100, kWX, 30 }, { 0b0011100000100000000100, kW , 0 }, { 0b0011100001100000000100, kW , 0 }, { 0b0111100000100000000100, kW , 0 }, { 0b0111100001100000000100, kW , 0 }, { 0b1011100000100000001000, kWX, 30 }, { 0b1011100001100000001000, kWX, 30 }, { 0b0011100000100000001000, kW , 0 }, { 0b0011100001100000001000, kW , 0 }, { 0b0111100000100000001000, kW , 0 }, { 0b0111100001100000001000, kW , 0 }, { 0b1011100000100000001100, kWX, 30 }, { 0b1011100001100000001100, kWX, 30 }, { 0b0011100000100000001100, kW , 0 }, { 0b0011100001100000001100, kW , 0 }, { 0b0111100000100000001100, kW , 0 }, { 0b0111100001100000001100, kW , 0 }, { 0b1011100000100000010000, kWX, 30 }, { 0b1011100001100000010000, kWX, 30 }, { 0b0011100000100000010000, kW , 0 }, { 0b0011100001100000010000, kW , 0 }, { 0b0111100000100000010000, kW , 0 }, { 0b0111100001100000010000, kW , 0 }, { 0b1011100000100000010100, kWX, 30 }, { 0b1011100001100000010100, kWX, 30 }, { 0b0011100000100000010100, kW , 0 }, { 0b0011100001100000010100, kW , 0 }, { 0b0111100000100000010100, kW , 0 }, { 0b0111100001100000010100, kW , 0 }, { 0b1011100000100000011000, kWX, 30 }, { 0b1011100001100000011000, kWX, 30 }, { 0b0011100000100000011000, kW , 0 }, { 0b0011100001100000011000, kW , 0 }, { 0b0111100000100000011000, kW , 0 }, { 0b0111100001100000011000, kW , 0 }, { 0b1011100000100000011100, kWX, 30 }, { 0b1011100001100000011100, kWX, 30 }, { 0b0011100000100000011100, kW , 0 }, { 0b0011100001100000011100, kW , 0 }, { 0b0111100000100000011100, kW , 0 }, { 0b0111100001100000011100, kW , 0 } });
2582
2583pub const BASE_BFC: [BaseBfc; 1] = table_new!(BaseBfc, {
2584 { 0b00110011000000000000001111100000 } });
2586
2587pub const BASE_BFI: [BaseBfi; 3] = table_new!(BaseBfi, {
2588 { 0b00110011000000000000000000000000 }, { 0b00010011000000000000000000000000 }, { 0b01010011000000000000000000000000 } });
2592
2593pub const BASE_BFM: [BaseBfm; 3] = table_new!(BaseBfm, {
2594 { 0b00110011000000000000000000000000 }, { 0b00010011000000000000000000000000 }, { 0b01010011000000000000000000000000 } });
2598
2599pub const BASE_BFX: [BaseBfx; 3] = table_new!(BaseBfx, {
2600 { 0b00110011000000000000000000000000 }, { 0b00010011000000000000000000000000 }, { 0b01010011000000000000000000000000 } });
2604
2605pub const BASE_BRANCH_CMP: [BaseBranchCmp; 2] = table_new!(BaseBranchCmp, {
2606 { 0b00110101000000000000000000000000 }, { 0b00110100000000000000000000000000 } });
2609
2610pub const BASE_BRANCH_REG: [BaseBranchReg; 3] = table_new!(BaseBranchReg, {
2611 { 0b11010110001111110000000000000000u32 as i32 }, { 0b11010110000111110000000000000000u32 as i32 }, { 0b11010110010111110000000000000000u32 as i32 } });
2615
2616pub const BASE_BRANCH_REL: [BaseBranchRel; 3] = table_new!(BaseBranchRel, {
2617 { 0b00010100000000000000000000000000 }, { 0b00010100000000000000000000010000 }, { 0b10010100000000000000000000000000u32 as i32 } });
2621
2622pub const BASE_BRANCH_TST: [BaseBranchTst; 2] = table_new!(BaseBranchTst, {
2623 { 0b00110111000000000000000000000000 }, { 0b00110110000000000000000000000000 } });
2626
2627pub const BASE_C_CMP: [BaseCCmp; 2] = table_new!(BaseCCmp, {
2628 { 0b00111010010000000000000000000000 }, { 0b01111010010000000000000000000000 } });
2631
2632pub const BASE_C_INC: [BaseCInc; 3] = table_new!(BaseCInc, {
2633 { 0b00011010100000000000010000000000 }, { 0b01011010100000000000000000000000 }, { 0b01011010100000000000010000000000 } });
2637
2638pub const BASE_C_SEL: [BaseCSel; 4] = table_new!(BaseCSel, {
2639 { 0b00011010100000000000000000000000 }, { 0b00011010100000000000010000000000 }, { 0b01011010100000000000000000000000 }, { 0b01011010100000000000010000000000 } });
2644
2645pub const BASE_C_SET: [BaseCSet; 2] = table_new!(BaseCSet, {
2646 { 0b00011010100111110000011111100000 }, { 0b01011010100111110000001111100000 } });
2649
2650pub const BASE_CMP_CMN: [BaseCmpCmn; 2] = table_new!(BaseCmpCmn, {
2651 { 0b0101011000, 0b0101011001, 0b0110001 }, { 0b1101011000, 0b1101011001, 0b1110001 } });
2654
2655pub const BASE_EXTEND: [BaseExtend; 5] = table_new!(BaseExtend, {
2656 { 0b0001001100000000000111, kWX, 0 }, { 0b0001001100000000001111, kWX, 0 }, { 0b1001001101000000011111, kX , 0 }, { 0b0101001100000000000111, kW, 1 }, { 0b0101001100000000001111, kW, 1 } });
2662
2663pub const BASE_EXTRACT: [BaseExtract; 1] = table_new!(BaseExtract, {
2664 { 0b00010011100000000000000000000000 } });
2666
2667pub const BASE_LD_ST: [BaseLdSt; 9] = table_new!(BaseLdSt, {
2668 { 0b1011100101, 0b10111000010, 0b10111000011, 0b00011000, kWX, 30, 2, InstId::Ldur }, { 0b0011100101, 0b00111000010, 0b00111000011, 0 , kW , 0 , 0, InstId::Ldurb }, { 0b0111100101, 0b01111000010, 0b01111000011, 0 , kW , 0 , 1, InstId::Ldurh }, { 0b0011100111, 0b00111000100, 0b00111000111, 0 , kWX, 22, 0, InstId::Ldursb }, { 0b0111100111, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, InstId::Ldursh }, { 0b1011100110, 0b10111000100, 0b10111000101, 0b10011000, kX , 0 , 2, InstId::Ldursw }, { 0b1011100100, 0b10111000000, 0b10111000001, 0 , kWX, 30, 2, InstId::Stur }, { 0b0011100100, 0b00111000000, 0b00111000001, 0 , kW , 30, 0, InstId::Sturb }, { 0b0111100100, 0b01111000000, 0b01111000001, 0 , kWX, 30, 1, InstId::Sturh } });
2678
2679pub const BASE_LDP_STP: [BaseLdpStp; 6] = table_new!(BaseLdpStp, {
2680 { 0b0010100001, 0 , kWX, 31, 2 }, { 0b0010100101, 0b0010100011, kWX, 31, 2 }, { 0b0110100101, 0b0110100011, kX , 0 , 2 }, { 0b0110100100, 0b0110100010, kX, 0, 4 }, { 0b0010100000, 0 , kWX, 31, 2 }, { 0b0010100100, 0b0010100010, kWX, 31, 2 } });
2687
2688pub const BASE_LDXP: [BaseLdxp; 2] = table_new!(BaseLdxp, {
2689 { 0b1000100001111111100000, kWX, 30 }, { 0b1000100001111111000000, kWX, 30 } });
2692
2693pub const BASE_LOGICAL: [BaseLogical; 8] = table_new!(BaseLogical, {
2694 { 0b0001010000, 0b00100100, 0 }, { 0b1101010000, 0b11100100, 0 }, { 0b0001010001, 0b00100100, 1 }, { 0b1101010001, 0b11100100, 1 }, { 0b1001010001, 0b10100100, 1 }, { 0b1001010000, 0b10100100, 0 }, { 0b0101010001, 0b01100100, 1 }, { 0b0101010000, 0b01100100, 0 } });
2703
2704pub const BASE_MIN_MAX: [BaseMinMax; 4] = table_new!(BaseMinMax, {
2705 { 0b00011010110000000110000000000000, 0b00010001110000000000000000000000 }, { 0b00011010110000000110100000000000, 0b00010001110010000000000000000000 }, { 0b00011010110000000110010000000000, 0b00010001110001000000000000000000 }, { 0b00011010110000000110110000000000, 0b00010001110011000000000000000000 } });
2710
2711pub const BASE_MOV_KNZ: [BaseMovKNZ; 3] = table_new!(BaseMovKNZ, {
2712 { 0b01110010100000000000000000000000 }, { 0b00010010100000000000000000000000 }, { 0b01010010100000000000000000000000 } });
2716
2717pub const BASE_MVN_NEG: [BaseMvnNeg; 3] = table_new!(BaseMvnNeg, {
2718 { 0b00101010001000000000001111100000 }, { 0b01001011000000000000001111100000 }, { 0b01101011000000000000001111100000 } });
2722
2723pub const BASE_OP: [BaseOp; 24] = table_new!(BaseOp, {
2724 { 0b11010101000000110010000110011111 }, { 0b11010101000000110010001110111111 }, { 0b11010101000000110010001110011111 }, { 0b11010101000000110010000111011111 }, { 0b11010101000000110010001111111111 }, { 0b11010101000000110010001111011111 }, { 0b11010101000000000100000001011111 }, { 0b11010101000000000100000000011111 }, { 0b11010101000000110010001011011111 }, { 0b11010101000000110010001010011111 }, { 0b11010101000000110010000011011111 }, { 0b11010110101111110000001111100000 }, { 0b11010101000000110010001000011111 }, { 0b11010110100111110000001111100000 }, { 0b11010101000000110010000000011111 }, { 0b11010101000000110011010010011111 }, { 0b11010101000000110010000010011111 }, { 0b11010101000000110010000010111111 }, { 0b11010101000000110011000010011111 }, { 0b11010101000000110010000001011111 }, { 0b11010101000000110010000001111111 }, { 0b11010101000000000100000000111111 }, { 0b11010101000000110010000011111111 }, { 0b11010101000000110010000000111111 } });
2749
2750pub const BASE_OP_IMM: [BaseOpImm; 15] = table_new!(BaseOpImm, {
2751 { 0b11010100001000000000000000000000, 16, 5 }, { 0b11010101000000110010010000011111, 2, 6 }, { 0b11010101000000110011000001011111, 4, 8 }, { 0b11010100101000000000000000000001, 16, 5 }, { 0b11010100101000000000000000000010, 16, 5 }, { 0b11010100101000000000000000000011, 16, 5 }, { 0b11010101000000110011000010111111, 4, 8 }, { 0b11010101000000110011000010011111, 4, 8 }, { 0b11010101000000110010000000011111, 7, 5 }, { 0b11010100010000000000000000000000, 16, 5 }, { 0b11010100000000000000000000000010, 16, 5 }, { 0b11010101000000110011000011011111, 4, 8 }, { 0b11010100000000000000000000000011, 16, 5 }, { 0b11010100000000000000000000000001, 16, 5 }, { 0b00000000000000000000000000000000, 16, 0 } });
2767
2768pub const BASE_OP_X16: [BaseOpX16; 1] = table_new!(BaseOpX16, {
2769 { 0b11010101000000110010010100011111 } });
2771
2772pub const BASE_PRFM: [BasePrfm; 1] = table_new!(BasePrfm, {
2773 { 0b11111000101, 0b1111100110, 0b11111000100, 0b11011000 } });
2775
2776pub const BASE_R: [BaseR; 10] = table_new!(BaseR, {
2777 { 0b11011010110000010011101111100000, kX, kZR, 0 }, { 0b11011010110000010011111111100000, kX, kZR, 0 }, { 0b11011010110000010011001111100000, kX, kZR, 0 }, { 0b11011010110000010011011111100000, kX, kZR, 0 }, { 0b11011010110000010010101111100000, kX, kZR, 0 }, { 0b11011010110000010010111111100000, kX, kZR, 0 }, { 0b00111010000000000000100000001101, kW, kZR, 5 }, { 0b00111010000000000100100000001101, kW, kZR, 5 }, { 0b11011010110000010100011111100000, kX, kZR, 0 }, { 0b11011010110000010100001111100000, kX, kZR, 0 } });
2788
2789pub const BASE_RM_NO_IMM: [BaseRMNoImm; 21] = table_new!(BaseRMNoImm, {
2790 { 0b1000100011011111111111, kWX, kZR, 30 }, { 0b0000100011011111111111, kW , kZR, 0 }, { 0b0100100011011111111111, kW , kZR, 0 }, { 0b1000100001011111111111, kWX, kZR, 30 }, { 0b0000100001011111111111, kW , kZR, 0 }, { 0b0100100001011111111111, kW , kZR, 0 }, { 0b1101100111100000000000, kX , kZR, 0 }, { 0b1000100011011111011111, kWX, kZR, 30 }, { 0b0000100011011111011111, kW , kZR, 0 }, { 0b0100100011011111011111, kW , kZR, 0 }, { 0b1000100001011111011111, kWX, kZR, 30 }, { 0b0000100001011111011111, kW , kZR, 0 }, { 0b0100100001011111011111, kW , kZR, 0 }, { 0b1101100110100000000000, kX , kZR, 0 }, { 0b1000100010011111011111, kWX, kZR, 30 }, { 0b0000100010011111011111, kW , kZR, 0 }, { 0b0100100010011111011111, kW , kZR, 0 }, { 0b1000100010011111111111, kWX, kZR, 30 }, { 0b0000100010011111111111, kW , kZR, 0 }, { 0b0100100010011111111111, kW , kZR, 0 }, { 0b1101100100100000000000, kX , kZR, 0 } });
2812
2813pub const BASE_RM_SIMM10: [BaseRMSImm10; 2] = table_new!(BaseRMSImm10, {
2814 { 0b1111100000100000000001, kX , kZR, 0, 3 }, { 0b1111100010100000000001, kX , kZR, 0, 3 } });
2817
2818pub const BASE_RM_SIMM9: [BaseRMSImm9; 23] = table_new!(BaseRMSImm9, {
2819 { 0b1101100101100000000000, 0b0000000000000000000000, kX , kZR, 0, 4 }, { 0b1011100001000000000010, 0b0000000000000000000000, kWX, kZR, 30, 0 }, { 0b0011100001000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0 }, { 0b0111100001000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0 }, { 0b0011100011000000000010, 0b0000000000000000000000, kWX, kZR, 22, 0 }, { 0b0111100011000000000010, 0b0000000000000000000000, kWX, kZR, 22, 0 }, { 0b1011100010000000000010, 0b0000000000000000000000, kX , kZR, 0 , 0 }, { 0b1011100001000000000000, 0b0000000000000000000000, kWX, kZR, 30, 0 }, { 0b0011100001000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0 }, { 0b0111100001000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0 }, { 0b0011100011000000000000, 0b0000000000000000000000, kWX, kZR, 22, 0 }, { 0b0111100011000000000000, 0b0000000000000000000000, kWX, kZR, 22, 0 }, { 0b1011100010000000000000, 0b0000000000000000000000, kX , kZR, 0 , 0 }, { 0b1101100110100000000010, 0b1101100110100000000001, kX, kSP, 0, 4 }, { 0b1101100100100000000010, 0b1101100100100000000001, kX, kSP, 0, 4 }, { 0b1011100000000000000010, 0b0000000000000000000000, kWX, kZR, 30, 0 }, { 0b0011100000000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0 }, { 0b0111100000000000000010, 0b0000000000000000000000, kW , kZR, 0 , 0 }, { 0b1011100000000000000000, 0b0000000000000000000000, kWX, kZR, 30, 0 }, { 0b0011100000000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0 }, { 0b0111100000000000000000, 0b0000000000000000000000, kW , kZR, 0 , 0 }, { 0b1101100111100000000010, 0b1101100111100000000001, kX , kSP, 0, 4 }, { 0b1101100101100000000010, 0b1101100101100000000001, kX , kSP, 0, 4 } });
2843
2844pub const BASE_RR: [BaseRR; 18] = table_new!(BaseRR, {
2845 { 0b01011010110000000010000000000000, kWX, kZR, 0, kWX, kZR, 5, true }, { 0b11011010110000010001100000000000, kX, kZR, 0, kX, kSP, 5, true }, { 0b11011010110000010001110000000000, kX, kZR, 0, kX, kSP, 5, true }, { 0b11011010110000010001000000000000, kX, kZR, 0, kX, kSP, 5, true }, { 0b11011010110000010001010000000000, kX, kZR, 0, kX, kSP, 5, true }, { 0b01011010110000000001010000000000, kWX, kZR, 0, kWX, kZR, 5, true }, { 0b01011010110000000001000000000000, kWX, kZR, 0, kWX, kZR, 5, true }, { 0b10111010110000000000000000011111, kX, kSP, 5, kX, kSP, 16, true }, { 0b01011010110000000001110000000000, kWX, kZR, 0, kWX, kZR, 5, true }, { 0b01011010110000000001100000000000, kWX, kZR, 0, kWX, kZR, 5, true }, { 0b01011010000000000000001111100000, kWX, kZR, 0, kWX, kZR, 16, true }, { 0b01111010000000000000001111100000, kWX, kZR, 0, kWX, kZR, 16, true }, { 0b11011010110000010000100000000000, kX, kZR, 0, kX, kSP, 5, true }, { 0b11011010110000010000110000000000, kX, kZR, 0, kX, kSP, 5, true }, { 0b01011010110000000000000000000000, kWX, kZR, 0, kWX, kZR, 5, true }, { 0b01011010110000000000010000000000, kWX, kZR, 0, kWX, kZR, 5, true }, { 0b11011010110000000000100000000000, kWX, kZR, 0, kWX, kZR, 5, true }, { 0b11011010110000000000110000000000, kWX, kZR, 0, kWX, kZR, 5, true } });
2864
2865pub const BASE_RRII: [BaseRRII; 2] = table_new!(BaseRRII, {
2866 { 0b1001000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10 }, { 0b1101000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10 } });
2869
2870pub const BASE_RRR: [BaseRRR; 26] = table_new!(BaseRRR, {
2871 { 0b0001101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b0011101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b0001101011000000010000, kW, kZR, kW, kZR, kW, kZR, false }, { 0b0001101011000000010100, kW, kZR, kW, kZR, kW, kZR, false }, { 0b0001101011000000010101, kW, kZR, kW, kZR, kW, kZR, false }, { 0b0001101011000000010110, kW, kZR, kW, kZR, kW, kZR, false }, { 0b1001101011000000010111, kW, kZR, kW, kZR, kX, kZR, false }, { 0b0001101011000000010001, kW, kZR, kW, kZR, kW, kZR, false }, { 0b0001101011000000010010, kW, kZR, kW, kZR, kW, kZR, false }, { 0b1001101011000000010011, kW, kZR, kW, kZR, kX, kZR, false }, { 0b1001101011000000000101, kX , kZR, kX , kSP, kX , kZR, true }, { 0b0001101100000000111111, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b0001101100000000011111, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b1001101011000000001100, kX, kZR, kX, kZR, kX, kSP, false }, { 0b0101101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b0111101000000000000000, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b0001101011000000000011, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b1001101100100000111111, kX , kZR, kW , kZR, kW , kZR, false }, { 0b1001101101000000011111, kX , kZR, kX , kZR, kX , kZR, true }, { 0b1001101100100000011111, kX , kZR, kW , kZR, kW , kZR, false }, { 0b1001101011000000000000, kX, kZR, kX, kSP, kX, kSP, false }, { 0b1011101011000000000000, kX, kZR, kX, kSP, kX, kSP, false }, { 0b0001101011000000000010, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b1001101110100000111111, kX , kZR, kW , kZR, kW , kZR, false }, { 0b1001101110100000011111, kX , kZR, kW , kZR, kW , kZR, false }, { 0b1001101111000000011111, kX , kZR, kX , kZR, kX , kZR, false } });
2898
2899pub const BASE_RRRR: [BaseRRRR; 6] = table_new!(BaseRRRR, {
2900 { 0b0001101100000000000000, kWX, kZR, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b0001101100000000100000, kWX, kZR, kWX, kZR, kWX, kZR, kWX, kZR, true }, { 0b1001101100100000000000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false }, { 0b1001101100100000100000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false }, { 0b1001101110100000000000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false }, { 0b1001101110100000100000, kX , kZR, kW , kZR, kW , kZR, kX , kZR, false } });
2907
2908pub const BASE_SHIFT: [BaseShift; 8] = table_new!(BaseShift, {
2909 { 0b0001101011000000001010, 0b0001001100000000011111, 0 }, { 0b0001101011000000001010, 0b0000000000000000000000, 0 }, { 0b0001101011000000001000, 0b0101001100000000000000, 0 }, { 0b0001101011000000001000, 0b0000000000000000000000, 0 }, { 0b0001101011000000001001, 0b0101001100000000011111, 0 }, { 0b0001101011000000001001, 0b0000000000000000000000, 0 }, { 0b0001101011000000001011, 0b0001001110000000000000, 1 }, { 0b0001101011000000001011, 0b0000000000000000000000, 1 } });
2918
2919pub const BASE_STX: [BaseStx; 3] = table_new!(BaseStx, {
2920 { 0b1000100000000000011111, kWX, 30 }, { 0b0000100000000000011111, kW , 0 }, { 0b0100100000000000011111, kW , 0 } });
2924
2925pub const BASE_STXP: [BaseStxp; 2] = table_new!(BaseStxp, {
2926 { 0b1000100000100000100000, kWX, 30 }, { 0b1000100000100000000000, kWX, 30 } });
2929
2930pub const BASE_TST: [BaseTst; 1] = table_new!(BaseTst, {
2931 { 0b1101010000, 0b111001000 } });
2933
2934pub const F_SIMD_PAIR: [FSimdPair; 5] = table_new!(FSimdPair, {
2935 { 0b0111111000110000110110, 0b0010111000100000110101 }, { 0b0111111000110000110010, 0b0010111000100000110001 }, { 0b0111111000110000111110, 0b0010111000100000111101 }, { 0b0111111010110000110010, 0b0010111010100000110001 }, { 0b0111111010110000111110, 0b0010111010100000111101 } });
2941
2942pub const F_SIMD_SV: [FSimdSV; 4] = table_new!(FSimdSV, {
2943 { 0b0010111000110000110010 }, { 0b0010111000110000111110 }, { 0b0010111010110000110010 }, { 0b0010111010110000111110 } });
2948
2949pub const F_SIMD_VV: [FSimdVV; 17] = table_new!(FSimdVV, {
2950 { 0b0001111000100000110000, kHF_A, 0b0000111010100000111110, kHF_B }, { 0b0001111000100001010000, kHF_A, 0b0010111010100000111110, kHF_B }, { 0b0101111010100001110110, kHF_B, 0b0000111010100001110110, kHF_B }, { 0b0101111010100001111110, kHF_B, 0b0000000000000000000000, kHF_N }, { 0b0001111000101000110000, kHF_N, 0b0010111000100001111010, kHF_N }, { 0b0001111000101000010000, kHF_N, 0b0000111000100001111010, kHF_N }, { 0b0001111000101001110000, kHF_N, 0b0010111000100001111110, kHF_N }, { 0b0001111000101001010000, kHF_N, 0b0000111000100001111110, kHF_N }, { 0b0001111000100110010000, kHF_A, 0b0010111000100001100010, kHF_B }, { 0b0001111000100111110000, kHF_A, 0b0010111010100001100110, kHF_B }, { 0b0001111000100101010000, kHF_A, 0b0000111000100001100110, kHF_B }, { 0b0001111000100100010000, kHF_A, 0b0000111000100001100010, kHF_B }, { 0b0001111000100100110000, kHF_A, 0b0000111010100001100010, kHF_B }, { 0b0001111000100111010000, kHF_A, 0b0010111000100001100110, kHF_B }, { 0b0001111000100101110000, kHF_A, 0b0000111010100001100110, kHF_B }, { 0b0111111010100001110110, kHF_B, 0b0010111010100001110110, kHF_B }, { 0b0001111000100001110000, kHF_A, 0b0010111010100001111110, kHF_B } });
2968
2969pub const F_SIMD_VVV: [FSimdVVV; 13] = table_new!(FSimdVVV, {
2970 { 0b0111111010100000110101, kHF_C, 0b0010111010100000110101, kHF_C }, { 0b0111111000100000111011, kHF_C, 0b0010111000100000111011, kHF_C }, { 0b0111111010100000111011, kHF_C, 0b0010111010100000111011, kHF_C }, { 0b0001111000100000001010, kHF_A, 0b0000111000100000110101, kHF_C }, { 0b0001111000100000000110, kHF_A, 0b0010111000100000111111, kHF_C }, { 0b0001111000100000010010, kHF_A, 0b0000111000100000111101, kHF_C }, { 0b0001111000100000011010, kHF_A, 0b0000111000100000110001, kHF_C }, { 0b0001111000100000010110, kHF_A, 0b0000111010100000111101, kHF_C }, { 0b0001111000100000011110, kHF_A, 0b0000111010100000110001, kHF_C }, { 0b0001111000100000100010, kHF_A, 0b0000000000000000000000, kHF_N }, { 0b0101111000100000111111, kHF_C, 0b0000111000100000111111, kHF_C }, { 0b0101111010100000111111, kHF_C, 0b0000111010100000111111, kHF_C }, { 0b0001111000100000001110, kHF_A, 0b0000111010100000110101, kHF_C } });
2984
2985pub const F_SIMD_VVVV: [FSimdVVVV; 4] = table_new!(FSimdVVVV, {
2986 { 0b0001111100000000000000, kHF_A, 0b0000000000000000000000, kHF_N }, { 0b0001111100000000100000, kHF_A, 0b0000000000000000000000, kHF_N }, { 0b0001111100100000000000, kHF_A, 0b0000000000000000000000, kHF_N }, { 0b0001111100100000100000, kHF_A, 0b0000000000000000000000, kHF_N } });
2991
2992pub const F_SIMD_VVVE: [FSimdVVVe; 4] = table_new!(FSimdVVVe, {
2993 { 0b0000000000000000000000, kHF_N, 0b0000111000100000110011, 0b0000111110000000000100 }, { 0b0000000000000000000000, kHF_N, 0b0000111010100000110011, 0b0000111110000000010100 }, { 0b0001111000100000000010, kHF_A, 0b0010111000100000110111, 0b0000111110000000100100 }, { 0b0101111000100000110111, kHF_C, 0b0000111000100000110111, 0b0010111110000000100100 } });
2998
2999pub const I_SIMD_PAIR: [ISimdPair; 1] = table_new!(ISimdPair, {
3000 { 0b0101111000110001101110, 0b0000111000100000101111, kVO_V_Any } });
3002
3003pub const I_SIMD_SV: [ISimdSV; 7] = table_new!(ISimdSV, {
3004 { 0b0000111000110001101110, kVO_V_BH_4S }, { 0b0000111000110000001110, kVO_V_BH_4S }, { 0b0000111000110000101010, kVO_V_BH_4S }, { 0b0000111000110001101010, kVO_V_BH_4S }, { 0b0010111000110000001110, kVO_V_BH_4S }, { 0b0010111000110000101010, kVO_V_BH_4S }, { 0b0010111000110001101010, kVO_V_BH_4S } });
3012
3013pub const I_SIMD_VV: [ISimdVV; 29] = table_new!(ISimdVV, {
3014 { 0b0000111000100000101110, kVO_V_Any }, { 0b0000111000100000010010, kVO_V_BHS }, { 0b0010111000100000010010, kVO_V_BHS }, { 0b0000111000100000010110, kVO_V_B }, { 0b0010111000100000010110, kVO_V_B }, { 0b0010111000100000101110, kVO_V_Any }, { 0b0010111000100000010110, kVO_V_B }, { 0b0010111001100000010110, kVO_V_B }, { 0b0000111000100000000110, kVO_V_B }, { 0b0010111000100000000010, kVO_V_BH }, { 0b0000111000100000000010, kVO_V_BHS }, { 0b0000111000100000011010, kVO_V_BHS }, { 0b0000111000100000001010, kVO_V_BHS }, { 0b0000111000100000011110, kVO_SV_Any }, { 0b0010111000100000011110, kVO_SV_Any }, { 0b0000111000100001010010, kVO_SV_B8H4S2 }, { 0b0100111000100001010010, kVO_V_B16H8S4 }, { 0b0010111000100001001010, kVO_SV_B8H4S2 }, { 0b0110111000100001001010, kVO_V_B16H8S4 }, { 0b0000111000100000001110, kVO_SV_Any }, { 0b0010111000100000011010, kVO_V_BHS }, { 0b0010111000100000001010, kVO_V_BHS }, { 0b0010111000100001010010, kVO_SV_B8H4S2 }, { 0b0110111000100001010010, kVO_V_B16H8S4 }, { 0b0000111010100001110010, kVO_V_S }, { 0b0010111010100001110010, kVO_V_S }, { 0b0010111000100000001110, kVO_SV_Any }, { 0b0000111000100001001010, kVO_V_B8H4S2 }, { 0b0100111000100001001010, kVO_V_B16H8S4 } });
3044
3045pub const I_SIMD_VVV: [ISimdVVV; 65] = table_new!(ISimdVVV, {
3046 { 0b0000111000100000100001, kVO_V_Any }, { 0b0000111000100000010000, kVO_V_B8H4S2 }, { 0b0100111000100000010000, kVO_V_B16H8S4 }, { 0b0000111000100000000111, kVO_V_B }, { 0b0010111011100000000111, kVO_V_B }, { 0b0010111010100000000111, kVO_V_B }, { 0b0010111001100000000111, kVO_V_B }, { 0b0000111000100000100011, kVO_V_Any }, { 0b0010111000100000000111, kVO_V_B }, { 0b0000111011100000000111, kVO_V_B }, { 0b0010111000100000100111, kVO_V_B }, { 0b0000111000100000111000, kVO_V_B8D1 }, { 0b0100111000100000111000, kVO_V_B16D2 }, { 0b0010111000100000010000, kVO_V_B8H4S2 }, { 0b0110111000100000010000, kVO_V_B16H8S4 }, { 0b1100111001100000100011, kVO_V_D2 }, { 0b0010111000100000011000, kVO_V_B8H4S2 }, { 0b0110111000100000011000, kVO_V_B16H8S4 }, { 0b0000111000100000011111, kVO_V_BHS }, { 0b0000111000100000010100, kVO_V_B8H4S2 }, { 0b0100111000100000010100, kVO_V_B16H8S4 }, { 0b0000111000100000011101, kVO_V_BHS }, { 0b0000111000100000011100, kVO_V_B8H4S2 }, { 0b0100111000100000011100, kVO_V_B16H8S4 }, { 0b0000111000100000000000, kVO_V_B8H4S2 }, { 0b0100111000100000000000, kVO_V_B16H8S4 }, { 0b0000111000100000000001, kVO_V_BHS }, { 0b0000111000100000001001, kVO_V_BHS }, { 0b0000111000100000011001, kVO_V_BHS }, { 0b0000111000100000101001, kVO_V_BHS }, { 0b0000111000100000011011, kVO_V_BHS }, { 0b0000111000100000101011, kVO_V_BHS }, { 0b0000111000100000000011, kVO_SV_Any }, { 0b0000111000100000001011, kVO_SV_Any }, { 0b0000111000100000000101, kVO_V_BHS }, { 0b0000111000100000001000, kVO_V_B8H4S2 }, { 0b0100111000100000001000, kVO_V_B16H8S4 }, { 0b0010111000100000100001, kVO_V_Any }, { 0b0000111000100000011000, kVO_V_B8H4S2 }, { 0b0000111000100000011000, kVO_V_B16H8S4 }, { 0b0000111000000000001010, kVO_V_BHS_D2 }, { 0b0000111000000000011010, kVO_V_BHS_D2 }, { 0b0010111000100000011111, kVO_V_BHS }, { 0b0010111000100000010100, kVO_V_B8H4S2 }, { 0b0110111000100000010100, kVO_V_B16H8S4 }, { 0b0010111000100000011101, kVO_V_BHS }, { 0b0010111000100000011100, kVO_V_B8H4S2 }, { 0b0110111000100000011100, kVO_V_B16H8S4 }, { 0b0010111000100000000000, kVO_V_B8H4S2 }, { 0b0110111000100000000000, kVO_V_B16H8S4 }, { 0b0010111000100000000001, kVO_V_BHS }, { 0b0010111000100000001001, kVO_V_BHS }, { 0b0010111000100000011001, kVO_V_BHS }, { 0b0010111000100000101001, kVO_V_BHS }, { 0b0010111000100000011011, kVO_V_BHS }, { 0b0010111000100000101011, kVO_V_BHS }, { 0b0010111000100000000011, kVO_SV_Any }, { 0b0010111000100000001011, kVO_SV_Any }, { 0b0010111000100000000101, kVO_V_BHS }, { 0b0010111000100000001000, kVO_V_B8H4S2 }, { 0b0110111000100000001000, kVO_V_B16H8S4 }, { 0b0000111000000000000110, kVO_V_BHS_D2 }, { 0b0000111000000000010110, kVO_V_BHS_D2 }, { 0b0000111000000000001110, kVO_V_BHS_D2 }, { 0b0000111000000000011110, kVO_V_BHS_D2 } });
3112
3113pub const I_SIMD_VVVI: [ISimdVVVI; 2] = table_new!(ISimdVVVI, {
3114 { 0b0010111000000000000000, kVO_V_B, 4, 11, 1 }, { 0b1100111001100000100011, kVO_V_D2, 6, 10, 0 } });
3117
3118pub const I_SIMD_VVVV: [ISimdVVVV; 2] = table_new!(ISimdVVVV, {
3119 { 0b1100111000100000000000, kVO_V_B16 }, { 0b1100111000000000000000, kVO_V_B16 } });
3122
3123pub const I_SIMD_VVVVX: [ISimdVVVVx; 1] = table_new!(ISimdVVVVx, {
3124 { 0b1100111001000000000000, kOp_V4S, kOp_V4S, kOp_V4S, kOp_V4S } });
3126
3127pub const I_SIMD_VVVE: [ISimdVVVe; 25] = table_new!(ISimdVVVe, {
3128 { 0b0000111000100000100101, kVO_V_BHS, 0b0010111100000000000000, kVO_V_HS }, { 0b0010111000100000100101, kVO_V_BHS, 0b0010111100000000010000, kVO_V_HS }, { 0b0000111000100000100111, kVO_V_BHS, 0b0000111100000000100000, kVO_V_HS }, { 0b0000111000100000100000, kVO_V_B8H4S2, 0b0000111100000000001000, kVO_V_H4S2 }, { 0b0100111000100000100000, kVO_V_B16H8S4, 0b0100111100000000001000, kVO_V_H8S4 }, { 0b0000111000100000101000, kVO_V_B8H4S2, 0b0000111100000000011000, kVO_V_H4S2 }, { 0b0100111000100000101000, kVO_V_B16H8S4, 0b0100111100000000011000, kVO_V_H8S4 }, { 0b0000111000100000110000, kVO_V_B8H4S2, 0b0000111100000000101000, kVO_V_H4S2 }, { 0b0100111000100000110000, kVO_V_B16H8S4, 0b0100111100000000101000, kVO_V_H8S4 }, { 0b0000111000100000100100, kVO_SV_BHS, 0b0000111100000000001100, kVO_V_H4S2 }, { 0b0100111000100000100100, kVO_V_B16H8S4, 0b0100111100000000001100, kVO_V_H8S4 }, { 0b0000111000100000101100, kVO_SV_BHS, 0b0000111100000000011100, kVO_V_H4S2 }, { 0b0100111000100000101100, kVO_V_B16H8S4, 0b0100111100000000011100, kVO_V_H8S4 }, { 0b0000111000100000101101, kVO_SV_HS, 0b0000111100000000110000, kVO_SV_HS }, { 0b0000111000100000110100, kVO_SV_BHS, 0b0000111100000000101100, kVO_V_H4S2 }, { 0b0100111000100000110100, kVO_V_B16H8S4, 0b0100111100000000101100, kVO_V_H8S4 }, { 0b0010111000000000100001, kVO_SV_HS, 0b0010111100000000110100, kVO_SV_HS }, { 0b0010111000000000100011, kVO_SV_HS, 0b0010111100000000111100, kVO_SV_HS }, { 0b0010111000100000101101, kVO_SV_HS, 0b0000111100000000110100, kVO_SV_HS }, { 0b0010111000100000100000, kVO_V_B8H4S2, 0b0010111100000000001000, kVO_V_H4S2 }, { 0b0110111000100000100000, kVO_V_B16H8S4, 0b0010111100000000001000, kVO_V_H8S4 }, { 0b0010111000100000101000, kVO_V_B8H4S2, 0b0010111100000000011000, kVO_V_H4S2 }, { 0b0110111000100000101000, kVO_V_B16H8S4, 0b0110111100000000011000, kVO_V_H8S4 }, { 0b0010111000100000110000, kVO_V_B8H4S2, 0b0010111100000000101000, kVO_V_H4S2 }, { 0b0110111000100000110000, kVO_V_B16H8S4, 0b0110111100000000101000, kVO_V_H8S4 } });
3154
3155pub const I_SIMD_VVVX: [ISimdVVVx; 17] = table_new!(ISimdVVVx, {
3156 { 0b0110111001000000111011, kOp_V4S, kOp_V8H, kOp_V8H }, { 0b0101111000000000000000, kOp_Q, kOp_S, kOp_V4S }, { 0b0101111000000000001000, kOp_Q, kOp_S, kOp_V4S }, { 0b0101111000000000000100, kOp_Q, kOp_S, kOp_V4S }, { 0b0101111000000000001100, kOp_V4S, kOp_V4S, kOp_V4S }, { 0b0101111000000000010000, kOp_Q, kOp_Q, kOp_V4S }, { 0b0101111000000000010100, kOp_Q, kOp_Q, kOp_V4S }, { 0b0101111000000000011000, kOp_V4S, kOp_V4S, kOp_V4S }, { 0b1100111001100000100000, kOp_Q, kOp_Q, kOp_V2D }, { 0b1100111001100000100001, kOp_Q, kOp_Q, kOp_V2D }, { 0b1100111001100000100010, kOp_V2D, kOp_V2D, kOp_V2D }, { 0b1100111001100000110000, kOp_V4S, kOp_V4S, kOp_V4S }, { 0b1100111001100000110001, kOp_V4S, kOp_V4S, kOp_V4S }, { 0b1100111001100000110010, kOp_V4S, kOp_V4S, kOp_V4S }, { 0b0100111010000000101001, kOp_V4S, kOp_V16B, kOp_V16B }, { 0b0110111010000000101001, kOp_V4S, kOp_V16B, kOp_V16B }, { 0b0100111010000000101011, kOp_V4S, kOp_V16B, kOp_V16B } });
3174
3175pub const I_SIMD_VVX: [ISimdVVx; 13] = table_new!(ISimdVVx, {
3176 { 0b0100111000101000010110, kOp_V16B, kOp_V16B }, { 0b0100111000101000010010, kOp_V16B, kOp_V16B }, { 0b0100111000101000011110, kOp_V16B, kOp_V16B }, { 0b0100111000101000011010, kOp_V16B, kOp_V16B }, { 0b0001111001100011010000, kOp_H, kOp_S }, { 0b0000111010100001011010, kOp_V4H, kOp_V4S }, { 0b0100111010100001011010, kOp_V8H, kOp_V4S }, { 0b0001111001111110000000, kOp_GpW, kOp_D }, { 0b0101111000101000000010, kOp_S, kOp_S }, { 0b0101111000101000000110, kOp_V4S, kOp_V4S }, { 0b0101111000101000001010, kOp_V4S, kOp_V4S }, { 0b1100111011000000100000, kOp_V2D, kOp_V2D }, { 0b1100111011000000100001, kOp_V4S, kOp_V4S } });
3190
3191pub const I_SIMD_WWV: [ISimdWWV; 8] = table_new!(ISimdWWV, {
3192 { 0b0000111000100000000100, kVO_V_B8H4S2 }, { 0b0000111000100000000100, kVO_V_B16H8S4 }, { 0b0000111000100000001100, kVO_V_B8H4S2 }, { 0b0000111000100000001100, kVO_V_B16H8S4 }, { 0b0010111000100000000100, kVO_V_B8H4S2 }, { 0b0010111000100000000100, kVO_V_B16H8S4 }, { 0b0010111000100000001100, kVO_V_B8H4S2 }, { 0b0010111000100000001100, kVO_V_B16H8S4 } });
3201
3202pub const SIMD_BIC_ORR: [SimdBicOrr; 2] = table_new!(SimdBicOrr, {
3203 { 0b0000111001100000000111, 0b0010111100000000000001 }, { 0b0000111010100000000111, 0b0000111100000000000001 } });
3206
3207pub const SIMD_CMP: [SimdCmp; 7] = table_new!(SimdCmp, {
3208 { 0b0010111000100000100011, 0b0000111000100000100110, kVO_V_Any }, { 0b0000111000100000001111, 0b0010111000100000100010, kVO_V_Any }, { 0b0000111000100000001101, 0b0000111000100000100010, kVO_V_Any }, { 0b0010111000100000001101, 0b0000000000000000000000, kVO_V_Any }, { 0b0010111000100000001111, 0b0000000000000000000000, kVO_V_Any }, { 0b0000000000000000000000, 0b0010111000100000100110, kVO_V_Any }, { 0b0000000000000000000000, 0b0000111000100000101010, kVO_V_Any } });
3216
3217pub const SIMD_DOT: [SimdDot; 5] = table_new!(SimdDot, {
3218 { 0b0010111001000000111111, 0b0000111101000000111100, kET_S, kET_H, kET_2H }, { 0b0000111010000000100101, 0b0000111110000000111000, kET_S, kET_B, kET_4B }, { 0b0000000000000000000000, 0b0000111100000000111100, kET_S, kET_B, kET_4B }, { 0b0010111010000000100101, 0b0010111110000000111000, kET_S, kET_B, kET_4B }, { 0b0000111010000000100111, 0b0000111110000000111100, kET_S, kET_B, kET_4B } });
3224
3225pub const SIMD_FCADD: [SimdFcadd; 1] = table_new!(SimdFcadd, {
3226 { 0b0010111000000000111001 } });
3228
3229pub const SIMD_FCCMP_FCCMPE: [SimdFccmpFccmpe; 2] = table_new!(SimdFccmpFccmpe, {
3230 { 0b00011110001000000000010000000000 }, { 0b00011110001000000000010000010000 } });
3233
3234pub const SIMD_FCM: [SimdFcm; 5] = table_new!(SimdFcm, {
3235 { 0b0000111000100000111001, kHF_C, 0b0000111010100000110110 }, { 0b0010111000100000111001, kHF_C, 0b0010111010100000110010 }, { 0b0010111010100000111001, kHF_C, 0b0000111010100000110010 }, { 0b0000000000000000000000, kHF_C, 0b0010111010100000110110 }, { 0b0000000000000000000000, kHF_C, 0b0000111010100000111010 } });
3241
3242pub const SIMD_FCMLA: [SimdFcmla; 1] = table_new!(SimdFcmla, {
3243 { 0b0010111000000000110001, 0b0010111100000000000100 } });
3245
3246pub const SIMD_FCMP_FCMPE: [SimdFcmpFcmpe; 2] = table_new!(SimdFcmpFcmpe, {
3247 { 0b00011110001000000010000000000000 }, { 0b00011110001000000010000000010000 } });
3250
3251pub const SIMD_FCVT_LN: [SimdFcvtLN; 6] = table_new!(SimdFcvtLN, {
3252 { 0b0000111000100001011110, 0, 0 }, { 0b0100111000100001011110, 0, 0 }, { 0b0000111000100001011010, 0, 0 }, { 0b0100111000100001011010, 0, 0 }, { 0b0010111000100001011010, 1, 1 }, { 0b0110111000100001011010, 1, 0 } });
3259
3260pub const SIMD_FCVT_SV: [SimdFcvtSV; 12] = table_new!(SimdFcvtSV, {
3261 { 0b0000111000100001110010, 0b0000000000000000000000, 0b0001111000100100000000, 1 }, { 0b0010111000100001110010, 0b0000000000000000000000, 0b0001111000100101000000, 1 }, { 0b0000111000100001101110, 0b0000000000000000000000, 0b0001111000110000000000, 1 }, { 0b0010111000100001101110, 0b0000000000000000000000, 0b0001111000110001000000, 1 }, { 0b0000111000100001101010, 0b0000000000000000000000, 0b0001111000100000000000, 1 }, { 0b0010111000100001101010, 0b0000000000000000000000, 0b0001111000100001000000, 1 }, { 0b0000111010100001101010, 0b0000000000000000000000, 0b0001111000101000000000, 1 }, { 0b0010111010100001101010, 0b0000000000000000000000, 0b0001111000101001000000, 1 }, { 0b0000111010100001101110, 0b0000111100000000111111, 0b0001111000111000000000, 1 }, { 0b0010111010100001101110, 0b0010111100000000111111, 0b0001111000111001000000, 1 }, { 0b0000111000100001110110, 0b0000111100000000111001, 0b0001111000100010000000, 0 }, { 0b0010111000100001110110, 0b0010111100000000111001, 0b0001111000100011000000, 0 } });
3274
3275pub const SIMD_FMLAL: [SimdFmlal; 6] = table_new!(SimdFmlal, {
3276 { 0b0010111011000000111111, 0b0000111111000000111100, 0, kET_S, kET_H, kET_H }, { 0b0110111011000000111111, 0b0100111111000000111100, 0, kET_S, kET_H, kET_H }, { 0b0000111000100000111011, 0b0000111110000000000000, 1, kET_S, kET_H, kET_H }, { 0b0010111000100000110011, 0b0010111110000000100000, 1, kET_S, kET_H, kET_H }, { 0b0000111010100000111011, 0b0000111110000000010000, 1, kET_S, kET_H, kET_H }, { 0b0010111010100000110011, 0b0010111110000000110000, 1, kET_S, kET_H, kET_H } });
3283
3284pub const SIMD_LD_N_ST_N: [SimdLdNStN; 12] = table_new!(SimdLdNStN, {
3285 { 0b0000110101000000000000, 0b0000110001000000001000, 1, 0 }, { 0b0000110101000000110000, 0b0000000000000000000000, 1, 1 }, { 0b0000110101100000000000, 0b0000110001000000100000, 2, 0 }, { 0b0000110101100000110000, 0b0000000000000000000000, 2, 1 }, { 0b0000110101000000001000, 0b0000110001000000010000, 3, 0 }, { 0b0000110101000000111000, 0b0000000000000000000000, 3, 1 }, { 0b0000110101100000001000, 0b0000110001000000000000, 4, 0 }, { 0b0000110101100000111000, 0b0000000000000000000000, 4, 1 }, { 0b0000110100000000000000, 0b0000110000000000001000, 1, 0 }, { 0b0000110100100000000000, 0b0000110000000000100000, 2, 0 }, { 0b0000110100000000001000, 0b0000110000000000010000, 3, 0 }, { 0b0000110100100000001000, 0b0000110000000000000000, 4, 0 } });
3298
3299pub const SIMD_LD_ST: [SimdLdSt; 2] = table_new!(SimdLdSt, {
3300 { 0b0011110101, 0b00111100010, 0b00111100011, 0b00011100, InstId::Ldur_v }, { 0b0011110100, 0b00111100000, 0b00111100001, 0b00000000, InstId::Stur_v } });
3303
3304pub const SIMD_LDP_STP: [SimdLdpStp; 4] = table_new!(SimdLdpStp, {
3305 { 0b0010110001, 0b0000000000 }, { 0b0010110101, 0b0010110011 }, { 0b0010110000, 0b0000000000 }, { 0b0010110100, 0b0010110010 } });
3310
3311pub const SIMD_LDUR_STUR: [SimdLdurStur; 2] = table_new!(SimdLdurStur, {
3312 { 0b0011110001000000000000 }, { 0b0011110000000000000000 } });
3315
3316pub const SIMD_MOVI_MVNI: [SimdMoviMvni; 2] = table_new!(SimdMoviMvni, {
3317 { 0b0000111100000000000001, 0 }, { 0b0000111100000000000001, 1 } });
3320
3321pub const SIMD_SHIFT: [SimdShift; 40] = table_new!(SimdShift, {
3322 { 0b0000000000000000000000, 0b0000111100000000100011, 1, kVO_V_B8H4S2 }, { 0b0000000000000000000000, 0b0100111100000000100011, 1, kVO_V_B16H8S4 }, { 0b0000000000000000000000, 0b0000111100000000010101, 0, kVO_V_Any }, { 0b0000000000000000000000, 0b0000111100000000100001, 1, kVO_V_B8H4S2 }, { 0b0000000000000000000000, 0b0100111100000000100001, 1, kVO_V_B16H8S4 }, { 0b0000000000000000000000, 0b0010111100000000010101, 0, kVO_V_Any }, { 0b0000111000100000010111, 0b0000000000000000000000, 1, kVO_SV_Any }, { 0b0000000000000000000000, 0b0000111100000000100111, 1, kVO_SV_B8H4S2 }, { 0b0000000000000000000000, 0b0100111100000000100111, 1, kVO_V_B16H8S4 }, { 0b0000000000000000000000, 0b0010111100000000100011, 1, kVO_SV_B8H4S2 }, { 0b0000000000000000000000, 0b0110111100000000100011, 1, kVO_V_B16H8S4 }, { 0b0000111000100000010011, 0b0000111100000000011101, 0, kVO_SV_Any }, { 0b0000000000000000000000, 0b0010111100000000011001, 0, kVO_SV_Any }, { 0b0000000000000000000000, 0b0000111100000000100101, 1, kVO_SV_B8H4S2 }, { 0b0000000000000000000000, 0b0100111100000000100101, 1, kVO_V_B16H8S4 }, { 0b0000000000000000000000, 0b0010111100000000100001, 1, kVO_SV_B8H4S2 }, { 0b0000000000000000000000, 0b0110111100000000100001, 1, kVO_V_B16H8S4 }, { 0b0000000000000000000000, 0b0010111100000000010001, 1, kVO_V_Any }, { 0b0000111000100000010101, 0b0000000000000000000000, 0, kVO_V_Any }, { 0b0000000000000000000000, 0b0000111100000000001001, 1, kVO_V_Any }, { 0b0000000000000000000000, 0b0000111100000000001101, 1, kVO_V_Any }, { 0b0000111000100000010001, 0b0000000000000000000000, 0, kVO_V_Any }, { 0b0000000000000000000000, 0b0000111100000000101001, 0, kVO_V_B8H4S2 }, { 0b0000000000000000000000, 0b0100111100000000101001, 0, kVO_V_B16H8S4 }, { 0b0000000000000000000000, 0b0000111100000000000001, 1, kVO_V_Any }, { 0b0000000000000000000000, 0b0000111100000000000101, 1, kVO_V_Any }, { 0b0010111000100000010111, 0b0000000000000000000000, 0, kVO_SV_Any }, { 0b0000000000000000000000, 0b0010111100000000100111, 1, kVO_SV_B8H4S2 }, { 0b0000000000000000000000, 0b0110111100000000100111, 1, kVO_V_B16H8S4 }, { 0b0010111000100000010011, 0b0010111100000000011101, 0, kVO_SV_Any }, { 0b0000000000000000000000, 0b0010111100000000100101, 1, kVO_SV_B8H4S2 }, { 0b0000000000000000000000, 0b0110111100000000100101, 1, kVO_V_B16H8S4 }, { 0b0010111000100000010101, 0b0000000000000000000000, 0, kVO_V_Any }, { 0b0000000000000000000000, 0b0010111100000000001001, 1, kVO_V_Any }, { 0b0000000000000000000000, 0b0010111100000000001101, 1, kVO_V_Any }, { 0b0010111000100000010001, 0b0000000000000000000000, 0, kVO_V_Any }, { 0b0000000000000000000000, 0b0010111100000000101001, 0, kVO_V_B8H4S2 }, { 0b0000000000000000000000, 0b0110111100000000101001, 0, kVO_V_B16H8S4 }, { 0b0000000000000000000000, 0b0010111100000000000001, 1, kVO_V_Any }, { 0b0000000000000000000000, 0b0010111100000000000101, 1, kVO_V_Any } });
3363
3364pub const SIMD_SHIFT_ES: [SimdShiftES; 2] = table_new!(SimdShiftES, {
3365 { 0b0010111000100001001110, kVO_V_B8H4S2 }, { 0b0110111000100001001110, kVO_V_B16H8S4 } });
3368
3369pub const SIMD_SM3TT: [SimdSm3tt; 4] = table_new!(SimdSm3tt, {
3370 { 0b1100111001000000100000 }, { 0b1100111001000000100001 }, { 0b1100111001000000100010 }, { 0b1100111001000000100011 } });
3375
3376pub const SIMD_SMOV_UMOV: [SimdSmovUmov; 2] = table_new!(SimdSmovUmov, {
3377 { 0b0000111000000000001011, kVO_V_BHS, 1 }, { 0b0000111000000000001111, kVO_V_Any, 0 } });
3380
3381pub const SIMD_SXTL_UXTL: [SimdSxtlUxtl; 4] = table_new!(SimdSxtlUxtl, {
3382 { 0b0000111100000000101001, kVO_V_B8H4S2 }, { 0b0100111100000000101001, kVO_V_B16H8S4 }, { 0b0010111100000000101001, kVO_V_B8H4S2 }, { 0b0110111100000000101001, kVO_V_B16H8S4 } });
3387
3388pub const SIMD_TBL_TBX: [SimdTblTbx; 2] = table_new!(SimdTblTbx, {
3389 { 0b0000111000000000000000 }, { 0b0000111000000000000100 } });
3392
3393pub static INST_NAME_STRING_TABLE: &[u8] = b"autia1716autibldsmaxalhldsminalldumaxallduminalsha256su0sha512su1sm3partwsqrshrunldaddalldclralldeoralldsetallbstsmaxstsminstumaxstuminfrint32z64x64zh2sqdmlalsl2sqdmulsqrdmlaulhn2sqshruuqrshrspchkfeacrc32cstaddstclrsteorstsetxpaclbfcvtbfmlaltfcvtxfjcvtzfmaxnmfminnmfrsqrraddrsubsha1sm3tt12a2bsm4ekeysqxtuuqshrursqrsetfrev8";
3394#[rustfmt::skip]
3395pub static INST_NAME_INDEX_TABLE: &[u32] = &[
3396 0x80000000, 0x80004C41, 0x80000C81, 0x80098C81, 0x80001081, 0x80039081, 0x80099081, 0x80004881, 0x80084881, 0x800011C1, 0x800991C1, 0x80004A61, 0x800B4A61, 0x80000281, 0x801252A1, 0x83A252A1, 0x802252A1, 0x85A252A1, 0x8014D2A1, 0x00009000, 0x20BF5000, 0xB414D2A1, 0x8024D2A1, 0x40055009, 0x20BF5009, 0xB424D2A1, 0x83A4D2A1, 0x85A4D2A1, 0x8E161B01, 0x80000002, 0x80000062, 0x80000CC2, 0x800024C2, 0x800034C2, 0x80C4E0C2, 0x80000D22, 0x80098D22, 0x80000182, 0x80004982, 0x80000242, 0x80002E42, 0x80002682, 0x80004C23, 0x8000CC23, 0x8020CC23, 0x8080CC23, 0x80C0CC23, 0x84C0CC23, 0x90C0CC23, 0x80014C23, 0x80044C23, 0x80064C23, 0x80264C23, 0x80864C23, 0x80084C23, 0x80184C23, 0x98184C23, 0x80C84C23, 0x800D3843, 0x80006843, 0x80073463, 0x80083463, 0x816724C3, 0x100260C1, 0x8001B923, 0x800B3923, 0x84814983, 0x8182C983, 0x80004D83, 0x80006983, 0x800039A3, 0x800041A3, 0x800841A3, 0x800395C3, 0x800051C3, 0x85DF0E43, 0x100D60C7, 0x101660C7, 0x104860C7, 0x101360C7, 0x91DF0E43, 0xAFDF0E43, 0xB1DF0E43, 0x80011263, 0x80061663, 0x800A1663, 0x80DA1663, 0x80372663, 0x81672663, 0x8072BA63, 0x80006A83, 0x80000064, 0x81C9C064, 0x81D9C064, 0x81E9C064, 0x800020E4, 0x800009A4, 0x8009C244, 0x80000A64, 0x800039E5, 0x800049E5, 0x80000A65, 0x80095305, 0x800A1645, 0x800025A7, 0x800A3928, 0x80005188, 0x80000EC8, 0x80000069, 0x80000A69, 0x8042048C, 0x8242048C, 0x100D6051, 0x10166051, 0x00007051, 0x100D7051, 0x10167051, 0x8442048C, 0x9042048C, 0x9842048C, 0x206D5051, 0x20155051, 0x8009048C, 0x8029048C, 0x8089048C, 0x810C048C, 0x812C048C, 0x852C048C, 0x912C048C, 0x81260C8C, 0x83260C8C, 0x100D6058, 0x10166058, 0x00007058, 0x100D7058, 0x10167058, 0x85260C8C, 0x91260C8C, 0x99260C8C, 0x206D5058, 0x20155058, 0x8127948C, 0x8327948C, 0x100D605F, 0x1016605F, 0x0000705F, 0x100D705F, 0x1016705F, 0x8527948C, 0x9127948C, 0x9927948C, 0x206D505F, 0x2015505F, 0x80001C8C, 0x80069C8C, 0x8120B08C, 0x8520B08C, 0x9120B08C, 0x8008388C, 0x8000408C, 0x8179C08C, 0x8000488C, 0x8010C88C, 0x8020C88C, 0x8001488C, 0x8004488C, 0x8029C88C, 0x8089C88C, 0x8179C88C, 0x8142CC8C, 0x8342CC8C, 0x100D6066, 0x10166066, 0x00007066, 0x100D7066, 0x10167066, 0x8542CC8C, 0x9142CC8C, 0x9942CC8C, 0x206D5066, 0x20155066, 0xB016CC8C, 0x0000700E, 0x100D700E, 0x1016700E, 0x0000800E, 0x100D800E, 0x1016800E, 0x100D600E, 0x1016600E, 0x100E600E, 0x206D600E, 0x2015600E, 0x9C96CC8C, 0x00007017, 0x100D7017, 0x10167017, 0x00008017, 0x100D8017, 0x10168017, 0x100D6017, 0x10166017, 0x100E6017, 0x206D6017, 0x20156017, 0x8009508C, 0x8029508C, 0x8089508C, 0x8539508C, 0x9139508C, 0xAF39508C, 0xB016D48C, 0x0000701F, 0x100D701F, 0x1016701F, 0x0000801F, 0x100D801F, 0x1016801F, 0x100D601F, 0x1016601F, 0x100E601F, 0x206D601F, 0x2015601F, 0x9C96D48C, 0x00007027, 0x100D7027, 0x10167027, 0x00008027, 0x100D8027, 0x10168027, 0x100D6027, 0x10166027, 0x100E6027, 0x206D6027, 0x20156027, 0x8009548C, 0x8029548C, 0x8089548C, 0x8539548C, 0x9139548C, 0xAF39548C, 0x8008608C, 0x8009608C, 0x8029608C, 0x8089608C, 0x8000326C, 0x800B326C, 0x80004A6C, 0x800B4A6C, 0x8002102D, 0x800395CD, 0x800059ED, 0x8005D9ED, 0x800759ED, 0x800D59ED, 0x80004E4D, 0x80004A6D, 0x8001566D, 0x800032AD, 0x80003ACD, 0x80001CAE, 0x80099CAE, 0x80000CEE, 0x80098CEE, 0x800041EE, 0x80003A4F, 0x80004A4F, 0x80120C30, 0x80220C30, 0x83A20C30, 0x85A20C30, 0x80138C30, 0x80069A50, 0x80214E70, 0x800A2452, 0x800050B2, 0x800058B2, 0x2007313E, 0x81DF58B2, 0x208F313E, 0x800049F2, 0x800B49F2, 0x80000C53, 0x80098C53, 0x81A49853, 0x80069853, 0x800C1853, 0x800B2493, 0x1141413A, 0x2007413A, 0x800058B3, 0x800658B3, 0x984205B3, 0x800C05B3, 0x80000DB3, 0x800725B3, 0x9872B9B3, 0x982ACDB3, 0x808655B3, 0x80C655B3, 0x80010A73, 0x8003F693, 0x80420693, 0x98420693, 0x84420693, 0x206D50CD, 0x90420693, 0x201550CD, 0x81260E93, 0x99260E93, 0x85260E93, 0x206D50D2, 0x91260E93, 0x201550D2, 0x81279693, 0x99279693, 0x85279693, 0x206D50D7, 0x91279693, 0x201550D7, 0x80001E93, 0x80069E93, 0x80081E93, 0x81263293, 0x85263293, 0x91263293, 0x80093293, 0x80293293, 0x80893293, 0x810C3293, 0x812C3293, 0x852C3293, 0x912C3293, 0x80083A93, 0x80004293, 0x80004A93, 0x80014A93, 0x80044A93, 0x8142CE93, 0x9942CE93, 0x8542CE93, 0x206D50DC, 0x9142CE93, 0x201550DC, 0xB016CE93, 0x100E606F, 0x100D606F, 0x206D606F, 0x1016606F, 0x2015606F, 0x9C96CE93, 0x100E6075, 0x100D6075, 0x206D6075, 0x10166075, 0x20156075, 0x80095293, 0x80295293, 0x80895293, 0xB016D693, 0x100E607B, 0x100D607B, 0x206D607B, 0x1016607B, 0x2015607B, 0x9C96D693, 0x100E6081, 0x100D6081, 0x206D6081, 0x10166081, 0x20156081, 0x80095693, 0x80295693, 0x80895693, 0x80086293, 0x80096293, 0x80296293, 0x80896293, 0x807EEA93, 0x8003EA93, 0x80D3EA93, 0x80000AB3, 0x80038AB3, 0x80080AB3, 0x81380AB3, 0x80098AB3, 0x80000ED3, 0x800042F3, 0x8000C2F3, 0x8020C2F3, 0x8080C2F3, 0x80C0C2F3, 0x84C0C2F3, 0x90C0C2F3, 0x800142F3, 0x800442F3, 0x800642F3, 0x802642F3, 0x808642F3, 0x80015313, 0x80045313, 0x800BD313, 0x80004F33, 0x80048994, 0x80005274, 0x800D3854, 0x80006854, 0x81A49855, 0x80069855, 0x800C1855, 0x80001895, 0x800B2495, 0x984205B5, 0x800C05B5, 0x800725B5, 0x9872B9B5, 0x80C655B5, 0x808655B5, 0x982ACDB5, 0x80015315, 0x80045315, 0x800014D7, 0x800024D7, 0x8E161838, 0x80418618, 0x80918618, 0x208850E1, 0x80461539, 0x80004C41, 0x80001081, 0x80E41081, 0xBAE41081, 0x80081081, 0x800B1081, 0x80024CA1, 0x8002CCA1, 0x86D4CCA1, 0x8036CCA1, 0x800011C1, 0x800C0462, 0x814B0CC2, 0x9D4B0CC2, 0x20B150E6, 0x814790C2, 0x206D50EB, 0x20F050EB, 0x82C6B4C2, 0x80000D22, 0x80001922, 0x80005122, 0x80003262, 0x80004D83, 0x80006983, 0x800895A3, 0x80029DA3, 0x800A1DA3, 0x8004A1A3, 0x8009A1A3, 0x8002B1A3, 0x800A31A3, 0x8149D1A3, 0x800051C3, 0x800042A4, 0x800049E5, 0x800F49E5, 0x80005305, 0x80020826, 0x80098826, 0x80538C26, 0x81438C26, 0x80021026, 0x81021026, 0x80420466, 0x81068C66, 0x8B068C66, 0x8112B466, 0x8053B466, 0x8143B466, 0x80163466, 0x80563466, 0x81463466, 0x80083466, 0x80583466, 0x80C2CC66, 0x800A5866, 0xA61A5866, 0xAA1A5866, 0x80CA5866, 0xBACA5866, 0xA6DA5866, 0xAADA5866, 0x80EA5866, 0xBAEA5866, 0xA6EA5866, 0xAAEA5866, 0xA70A5866, 0xAB0A5866, 0x9D8A5866, 0x20B150F2, 0xA7AA5866, 0xABAA5866, 0x800B2486, 0x101060F7, 0x804205A6, 0x800C05A6, 0x9AEC05A6, 0x104460FD, 0x10E960FD, 0x810C05A6, 0x816C05A6, 0x800725A6, 0x9AE725A6, 0x10446103, 0x10E96103, 0x810725A6, 0x816725A6, 0x8000B1A6, 0x80C0B1A6, 0xBAC0B1A6, 0x8009B1A6, 0x80C9B1A6, 0xBAC9B1A6, 0x800B3DA6, 0x802ACDA6, 0x800655A6, 0x818655A6, 0x800395C6, 0x8840B5C6, 0x8559B5C6, 0x80CAB5C6, 0x8B019646, 0xA7019646, 0xB1019646, 0x10137087, 0x108E7087, 0x308F5087, 0x30925087, 0x83472646, 0x93472646, 0x9B472646, 0x9D472646, 0xA1472646, 0xB1472646, 0xB5472646, 0x20D85109, 0x20705109, 0x81494666, 0x80015666, 0x80004DC9, 0x8000708C, 0x8009708C, 0x8000748C, 0x8009748C, 0x8000788C, 0x8009788C, 0x80007C8C, 0x80097C8C, 0x8008388C, 0x8000408C, 0x8000488C, 0x8009548C, 0x8000058D, 0x80004D8D, 0x800059ED, 0x8004D9ED, 0x800032AD, 0x80003ACD, 0x8004BACD, 0x80001CAE, 0x800051EE, 0x80003A4F, 0x80004A4F, 0x800655B0, 0x80C655B0, 0xBAC655B0, 0x9C821032, 0x30B0410E, 0x800E6032, 0x800A2452, 0x2007313E, 0x81DF58B2, 0x208F313E, 0x80E92272, 0xBAE92272, 0x9C815672, 0x30B04112, 0x80008833, 0x80C08833, 0xBAC08833, 0x80020833, 0x80C20833, 0xBAC20833, 0xA0C09033, 0x80C21033, 0xBAC21033, 0xA0C21033, 0xACC21033, 0x81721033, 0xBB721033, 0x806A5873, 0x800A3C93, 0x803E0513, 0x808E0513, 0x80DE0513, 0x810E0513, 0x30354116, 0x303E4116, 0x1016602F, 0x2095602F, 0x0000902F, 0x1005802F, 0x10166038, 0x20956038, 0x30356038, 0x303E6038, 0x80420513, 0x80003113, 0x80063113, 0x81D63113, 0x80074913, 0x81D74913, 0x802ACD13, 0x80002593, 0x10058041, 0x10328041, 0xB939F9B3, 0x1000611A, 0x100D611A, 0x2120511A, 0x2122511A, 0x8002FDB3, 0x00007124, 0x800C05B3, 0x810C05B3, 0x816C05B3, 0x800725B3, 0x810725B3, 0x816725B3, 0x80C0B1B3, 0xBAC0B1B3, 0x80C9B1B3, 0xBAC9B1B3, 0x801635B3, 0x800B3DB3, 0x80C655B3, 0xBAC655B3, 0x81310633, 0x80420633, 0x00007097, 0x10327097, 0x209E5097, 0x309E5097, 0x101660A1, 0x100E60A1, 0x209F60A1, 0x8072BA33, 0x101670A7, 0x202F60A7, 0x30AE50A7, 0x9889CA33, 0x101C6049, 0x20B16049, 0x00008049, 0x10328049, 0x80C44E33, 0xAAC44E33, 0x9D244E33, 0x20B150B3, 0x101C60B3, 0x20B160B3, 0x802ACE33, 0x80EA6233, 0xBAEA6233, 0x9D5A6233, 0x20B1512B, 0x8840A253, 0x80002653, 0x80C44E53, 0x81244E53, 0x80194E53, 0x80062273, 0x80C62273, 0xBAC62273, 0x80092273, 0x8000CA73, 0x80C15673, 0xBAC15673, 0x81715673, 0xBB715673, 0x80007293, 0x80007693, 0x80007A93, 0x80007E93, 0x80083A93, 0x80004293, 0x80004A93, 0x80095693, 0x80000AB3, 0x80E40AB3, 0xBAE40AB3, 0x814792B3, 0x8840C6B3, 0x80065313, 0x81D65313, 0x80003054, 0x80006054, 0x800E3A54, 0x800EBA54, 0x80008835, 0x80C08835, 0xBAC08835, 0x80020835, 0x80C20835, 0xBAC20835, 0xA0C09035, 0x80C21035, 0xBAC21035, 0xA0C21035, 0xACC21035, 0x81721035, 0xBB721035, 0x806A5875, 0x800A3C95, 0x80420515, 0x802ACD15, 0x800C05B5, 0x810C05B5, 0x816C05B5, 0x800725B5, 0x810725B5, 0x816725B5, 0x80C0B1B5, 0xBAC0B1B5, 0x80C9B1B5, 0xBAC9B1B5, 0x801635B5, 0x800B3DB5, 0x80C655B5, 0xBAC655B5, 0x80420635, 0x9889CA35, 0x101C60B9, 0x20B160B9, 0x80C44E35, 0x9D244E35, 0x20B15130, 0x802ACE35, 0x80EA6235, 0xBAEA6235, 0x8B019655, 0x8840A255, 0x80C44E55, 0x81244E55, 0x20D85135, 0x80194E55, 0x81479275, 0x80062275, 0x80C62275, 0xBAC62275, 0x80092275, 0x82C6B675, 0x8840C675, 0x8000CA75, 0x80C15675, 0xBAC15675, 0x81715675, 0xBB715675, 0x80065315, 0x81D65315, 0x800E4355, 0x800EC355, 0x80004838, 0x80003A98, 0x800EBA98, 0x800E413A, 0x800EC13A ];
4173
4174#[rustfmt::skip]
4175#[derive(Debug, Clone, Copy, PartialEq, Eq)]
4176#[allow(non_camel_case_types)]
4177#[repr(u32)]
4178pub enum InstId {
4179 None = 0, Abs, Adc, Adcs, Add, Addg, Adds, Adr, Adrp, And, Ands, Asr, Asrv, At, Autda, Autdza, Autdb, Autdzb, Autia, Autia1716, Autiasp, Autiaz, Autib, Autib1716, Autibsp, Autibz, Autiza, Autizb, Axflag, B, Bc, Bfc, Bfi, Bfm, Bfxil, Bic, Bics, Bl, Blr, Br, Brk, Bti, Cas, Casa, Casab, Casah, Casal, Casalb, Casalh, Casb, Cash, Casl, Caslb, Caslh, Casp, Caspa, Caspal, Caspl, Cbnz, Cbz, Ccmn, Ccmp, Cfinv, Chkfeat, Cinc, Cinv, Clrbhb, Clrex, Cls, Clz, Cmn, Cmp, Cmpp, Cneg, Cnt, Crc32b, Crc32cb, Crc32ch, Crc32cw, Crc32cx, Crc32h, Crc32w, Crc32x, Csdb, Csel, Cset, Csetm, Csinc, Csinv, Csneg, Ctz, Dc, Dcps1, Dcps2, Dcps3, Dgh, Dmb, Drps, Dsb, Eon, Eor, Esb, Extr, Eret, Gmi, Hint, Hlt, Hvc, Ic, Isb, Ldadd, Ldadda, Ldaddab, Ldaddah, Ldaddal, Ldaddalb, Ldaddalh, Ldaddb, Ldaddh, Ldaddl, Ldaddlb, Ldaddlh, Ldar, Ldarb, Ldarh, Ldaxp, Ldaxr, Ldaxrb, Ldaxrh, Ldclr, Ldclra, Ldclrab, Ldclrah, Ldclral, Ldclralb, Ldclralh, Ldclrb, Ldclrh, Ldclrl, Ldclrlb, Ldclrlh, Ldeor, Ldeora, Ldeorab, Ldeorah, Ldeoral, Ldeoralb, Ldeoralh, Ldeorb, Ldeorh, Ldeorl, Ldeorlb, Ldeorlh, Ldg, Ldgm, Ldlar, Ldlarb, Ldlarh, Ldnp, Ldp, Ldpsw, Ldr, Ldraa, Ldrab, Ldrb, Ldrh, Ldrsb, Ldrsh, Ldrsw, Ldset, Ldseta, Ldsetab, Ldsetah, Ldsetal, Ldsetalb, Ldsetalh, Ldsetb, Ldseth, Ldsetl, Ldsetlb, Ldsetlh, Ldsmax, Ldsmaxa, Ldsmaxab, Ldsmaxah, Ldsmaxal, Ldsmaxalb, Ldsmaxalh, Ldsmaxb, Ldsmaxh, Ldsmaxl, Ldsmaxlb, Ldsmaxlh, Ldsmin, Ldsmina, Ldsminab, Ldsminah, Ldsminal, Ldsminalb, Ldsminalh, Ldsminb, Ldsminh, Ldsminl, Ldsminlb, Ldsminlh, Ldtr, Ldtrb, Ldtrh, Ldtrsb, Ldtrsh, Ldtrsw, Ldumax, Ldumaxa, Ldumaxab, Ldumaxah, Ldumaxal, Ldumaxalb, Ldumaxalh, Ldumaxb, Ldumaxh, Ldumaxl, Ldumaxlb, Ldumaxlh, Ldumin, Ldumina, Lduminab, Lduminah, Lduminal, Lduminalb, Lduminalh, Lduminb, Lduminh, Lduminl, Lduminlb, Lduminlh, Ldur, Ldurb, Ldurh, Ldursb, Ldursh, Ldursw, Ldxp, Ldxr, Ldxrb, Ldxrh, Lsl, Lslv, Lsr, Lsrv, Madd, Mneg, Mov, Movk, Movn, Movz, Mrs, Msr, Msub, Mul, Mvn, Neg, Negs, Ngc, Ngcs, Nop, Orn, Orr, Pacda, Pacdb, Pacdza, Pacdzb, Pacga, Prfm, Pssbb, Rbit, Ret, Rev, Rev16, Rev32, Rev64, Ror, Rorv, Sbc, Sbcs, Sbfiz, Sbfm, Sbfx, Sdiv, Setf8, Setf16, Sev, Sevl, Smaddl, Smax, Smc, Smin, Smnegl, Smsubl, Smulh, Smull, Ssbb, St2g, Stadd, Staddl, Staddb, Staddlb, Staddh, Staddlh, Stclr, Stclrl, Stclrb, Stclrlb, Stclrh, Stclrlh, Steor, Steorl, Steorb, Steorlb, Steorh, Steorlh, Stg, Stgm, Stgp, Stllr, Stllrb, Stllrh, Stlr, Stlrb, Stlrh, Stlxp, Stlxr, Stlxrb, Stlxrh, Stnp, Stp, Str, Strb, Strh, Stset, Stsetl, Stsetb, Stsetlb, Stseth, Stsetlh, Stsmax, Stsmaxl, Stsmaxb, Stsmaxlb, Stsmaxh, Stsmaxlh, Stsmin, Stsminl, Stsminb, Stsminlb, Stsminh, Stsminlh, Sttr, Sttrb, Sttrh, Stumax, Stumaxl, Stumaxb, Stumaxlb, Stumaxh, Stumaxlh, Stumin, Stuminl, Stuminb, Stuminlb, Stuminh, Stuminlh, Stur, Sturb, Sturh, Stxp, Stxr, Stxrb, Stxrh, Stz2g, Stzg, Stzgm, Sub, Subg, Subp, Subps, Subs, Svc, Swp, Swpa, Swpab, Swpah, Swpal, Swpalb, Swpalh, Swpb, Swph, Swpl, Swplb, Swplh, Sxtb, Sxth, Sxtw, Sys, Tlbi, Tst, Tbnz, Tbz, Ubfiz, Ubfm, Ubfx, Udf, Udiv, Umaddl, Umax, Umin, Umnegl, Umull, Umulh, Umsubl, Uxtb, Uxth, Wfe, Wfi, Xaflag, Xpacd, Xpaci, Xpaclri, Yield, Abs_v, Add_v, Addhn_v, Addhn2_v, Addp_v, Addv_v, Aesd_v, Aese_v, Aesimc_v, Aesmc_v, And_v, Bcax_v, Bfcvt_v, Bfcvtn_v, Bfcvtn2_v, Bfdot_v, Bfmlalb_v, Bfmlalt_v, Bfmmla_v, Bic_v, Bif_v, Bit_v, Bsl_v, Cls_v, Clz_v, Cmeq_v, Cmge_v, Cmgt_v, Cmhi_v, Cmhs_v, Cmle_v, Cmlt_v, Cmtst_v, Cnt_v, Dup_v, Eor_v, Eor3_v, Ext_v, Fabd_v, Fabs_v, Facge_v, Facgt_v, Fadd_v, Faddp_v, Fcadd_v, Fccmp_v, Fccmpe_v, Fcmeq_v, Fcmge_v, Fcmgt_v, Fcmla_v, Fcmle_v, Fcmlt_v, Fcmp_v, Fcmpe_v, Fcsel_v, Fcvt_v, Fcvtas_v, Fcvtau_v, Fcvtl_v, Fcvtl2_v, Fcvtms_v, Fcvtmu_v, Fcvtn_v, Fcvtn2_v, Fcvtns_v, Fcvtnu_v, Fcvtps_v, Fcvtpu_v, Fcvtxn_v, Fcvtxn2_v, Fcvtzs_v, Fcvtzu_v, Fdiv_v, Fjcvtzs_v, Fmadd_v, Fmax_v, Fmaxnm_v, Fmaxnmp_v, Fmaxnmv_v, Fmaxp_v, Fmaxv_v, Fmin_v, Fminnm_v, Fminnmp_v, Fminnmv_v, Fminp_v, Fminv_v, Fmla_v, Fmlal_v, Fmlal2_v, Fmls_v, Fmlsl_v, Fmlsl2_v, Fmov_v, Fmsub_v, Fmul_v, Fmulx_v, Fneg_v, Fnmadd_v, Fnmsub_v, Fnmul_v, Frecpe_v, Frecps_v, Frecpx_v, Frint32x_v, Frint32z_v, Frint64x_v, Frint64z_v, Frinta_v, Frinti_v, Frintm_v, Frintn_v, Frintp_v, Frintx_v, Frintz_v, Frsqrte_v, Frsqrts_v, Fsqrt_v, Fsub_v, Ins_v, Ld1_v, Ld1r_v, Ld2_v, Ld2r_v, Ld3_v, Ld3r_v, Ld4_v, Ld4r_v, Ldnp_v, Ldp_v, Ldr_v, Ldur_v, Mla_v, Mls_v, Mov_v, Movi_v, Mul_v, Mvn_v, Mvni_v, Neg_v, Not_v, Orn_v, Orr_v, Pmul_v, Pmull_v, Pmull2_v, Raddhn_v, Raddhn2_v, Rax1_v, Rbit_v, Rev16_v, Rev32_v, Rev64_v, Rshrn_v, Rshrn2_v, Rsubhn_v, Rsubhn2_v, Saba_v, Sabal_v, Sabal2_v, Sabd_v, Sabdl_v, Sabdl2_v, Sadalp_v, Saddl_v, Saddl2_v, Saddlp_v, Saddlv_v, Saddw_v, Saddw2_v, Scvtf_v, Sdot_v, Sha1c_v, Sha1h_v, Sha1m_v, Sha1p_v, Sha1su0_v, Sha1su1_v, Sha256h_v, Sha256h2_v, Sha256su0_v, Sha256su1_v, Sha512h_v, Sha512h2_v, Sha512su0_v, Sha512su1_v, Shadd_v, Shl_v, Shll_v, Shll2_v, Shrn_v, Shrn2_v, Shsub_v, Sli_v, Sm3partw1_v, Sm3partw2_v, Sm3ss1_v, Sm3tt1a_v, Sm3tt1b_v, Sm3tt2a_v, Sm3tt2b_v, Sm4e_v, Sm4ekey_v, Smax_v, Smaxp_v, Smaxv_v, Smin_v, Sminp_v, Sminv_v, Smlal_v, Smlal2_v, Smlsl_v, Smlsl2_v, Smmla_v, Smov_v, Smull_v, Smull2_v, Sqabs_v, Sqadd_v, Sqdmlal_v, Sqdmlal2_v, Sqdmlsl_v, Sqdmlsl2_v, Sqdmulh_v, Sqdmull_v, Sqdmull2_v, Sqneg_v, Sqrdmlah_v, Sqrdmlsh_v, Sqrdmulh_v, Sqrshl_v, Sqrshrn_v, Sqrshrn2_v, Sqrshrun_v, Sqrshrun2_v, Sqshl_v, Sqshlu_v, Sqshrn_v, Sqshrn2_v, Sqshrun_v, Sqshrun2_v, Sqsub_v, Sqxtn_v, Sqxtn2_v, Sqxtun_v, Sqxtun2_v, Srhadd_v, Sri_v, Srshl_v, Srshr_v, Srsra_v, Sshl_v, Sshll_v, Sshll2_v, Sshr_v, Ssra_v, Ssubl_v, Ssubl2_v, Ssubw_v, Ssubw2_v, St1_v, St2_v, St3_v, St4_v, Stnp_v, Stp_v, Str_v, Stur_v, Sub_v, Subhn_v, Subhn2_v, Sudot_v, Suqadd_v, Sxtl_v, Sxtl2_v, Tbl_v, Tbx_v, Trn1_v, Trn2_v, Uaba_v, Uabal_v, Uabal2_v, Uabd_v, Uabdl_v, Uabdl2_v, Uadalp_v, Uaddl_v, Uaddl2_v, Uaddlp_v, Uaddlv_v, Uaddw_v, Uaddw2_v, Ucvtf_v, Udot_v, Uhadd_v, Uhsub_v, Umax_v, Umaxp_v, Umaxv_v, Umin_v, Uminp_v, Uminv_v, Umlal_v, Umlal2_v, Umlsl_v, Umlsl2_v, Ummla_v, Umov_v, Umull_v, Umull2_v, Uqadd_v, Uqrshl_v, Uqrshrn_v, Uqrshrn2_v, Uqshl_v, Uqshrn_v, Uqshrn2_v, Uqsub_v, Uqxtn_v, Uqxtn2_v, Urecpe_v, Urhadd_v, Urshl_v, Urshr_v, Ursqrte_v, Ursra_v, Usdot_v, Ushl_v, Ushll_v, Ushll2_v, Ushr_v, Usmmla_v, Usqadd_v, Usra_v, Usubl_v, Usubl2_v, Usubw_v, Usubw2_v, Uxtl_v, Uxtl2_v, Uzp1_v, Uzp2_v, Xar_v, Xtn_v, Xtn2_v, Zip1_v, Zip2_v, _Count
4956}