asmkit/x86/features/
SSSE3.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `MMX_PABSB`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+----------+
16/// | # | Operands |
17/// +---+----------+
18/// | 1 | Mm, Mem  |
19/// | 2 | Mm, Mm   |
20/// +---+----------+
21/// ```
22pub trait MmxPabsbEmitter<A, B> {
23    fn mmx_pabsb(&mut self, op0: A, op1: B);
24}
25
26impl<'a> MmxPabsbEmitter<Mm, Mm> for Assembler<'a> {
27    fn mmx_pabsb(&mut self, op0: Mm, op1: Mm) {
28        self.emit(
29            MMX_PABSBRR,
30            op0.as_operand(),
31            op1.as_operand(),
32            &NOREG,
33            &NOREG,
34        );
35    }
36}
37
38impl<'a> MmxPabsbEmitter<Mm, Mem> for Assembler<'a> {
39    fn mmx_pabsb(&mut self, op0: Mm, op1: Mem) {
40        self.emit(
41            MMX_PABSBRM,
42            op0.as_operand(),
43            op1.as_operand(),
44            &NOREG,
45            &NOREG,
46        );
47    }
48}
49
50/// `MMX_PABSD`.
51///
52/// Supported operand variants:
53///
54/// ```text
55/// +---+----------+
56/// | # | Operands |
57/// +---+----------+
58/// | 1 | Mm, Mem  |
59/// | 2 | Mm, Mm   |
60/// +---+----------+
61/// ```
62pub trait MmxPabsdEmitter<A, B> {
63    fn mmx_pabsd(&mut self, op0: A, op1: B);
64}
65
66impl<'a> MmxPabsdEmitter<Mm, Mm> for Assembler<'a> {
67    fn mmx_pabsd(&mut self, op0: Mm, op1: Mm) {
68        self.emit(
69            MMX_PABSDRR,
70            op0.as_operand(),
71            op1.as_operand(),
72            &NOREG,
73            &NOREG,
74        );
75    }
76}
77
78impl<'a> MmxPabsdEmitter<Mm, Mem> for Assembler<'a> {
79    fn mmx_pabsd(&mut self, op0: Mm, op1: Mem) {
80        self.emit(
81            MMX_PABSDRM,
82            op0.as_operand(),
83            op1.as_operand(),
84            &NOREG,
85            &NOREG,
86        );
87    }
88}
89
90/// `MMX_PABSW`.
91///
92/// Supported operand variants:
93///
94/// ```text
95/// +---+----------+
96/// | # | Operands |
97/// +---+----------+
98/// | 1 | Mm, Mem  |
99/// | 2 | Mm, Mm   |
100/// +---+----------+
101/// ```
102pub trait MmxPabswEmitter<A, B> {
103    fn mmx_pabsw(&mut self, op0: A, op1: B);
104}
105
106impl<'a> MmxPabswEmitter<Mm, Mm> for Assembler<'a> {
107    fn mmx_pabsw(&mut self, op0: Mm, op1: Mm) {
108        self.emit(
109            MMX_PABSWRR,
110            op0.as_operand(),
111            op1.as_operand(),
112            &NOREG,
113            &NOREG,
114        );
115    }
116}
117
118impl<'a> MmxPabswEmitter<Mm, Mem> for Assembler<'a> {
119    fn mmx_pabsw(&mut self, op0: Mm, op1: Mem) {
120        self.emit(
121            MMX_PABSWRM,
122            op0.as_operand(),
123            op1.as_operand(),
124            &NOREG,
125            &NOREG,
126        );
127    }
128}
129
130/// `MMX_PALIGNR`.
131///
132/// Supported operand variants:
133///
134/// ```text
135/// +---+--------------+
136/// | # | Operands     |
137/// +---+--------------+
138/// | 1 | Mm, Mem, Imm |
139/// | 2 | Mm, Mm, Imm  |
140/// +---+--------------+
141/// ```
142pub trait MmxPalignrEmitter<A, B, C> {
143    fn mmx_palignr(&mut self, op0: A, op1: B, op2: C);
144}
145
146impl<'a> MmxPalignrEmitter<Mm, Mm, Imm> for Assembler<'a> {
147    fn mmx_palignr(&mut self, op0: Mm, op1: Mm, op2: Imm) {
148        self.emit(
149            MMX_PALIGNRRRI,
150            op0.as_operand(),
151            op1.as_operand(),
152            op2.as_operand(),
153            &NOREG,
154        );
155    }
156}
157
158impl<'a> MmxPalignrEmitter<Mm, Mem, Imm> for Assembler<'a> {
159    fn mmx_palignr(&mut self, op0: Mm, op1: Mem, op2: Imm) {
160        self.emit(
161            MMX_PALIGNRRMI,
162            op0.as_operand(),
163            op1.as_operand(),
164            op2.as_operand(),
165            &NOREG,
166        );
167    }
168}
169
170/// `MMX_PHADDD`.
171///
172/// Supported operand variants:
173///
174/// ```text
175/// +---+----------+
176/// | # | Operands |
177/// +---+----------+
178/// | 1 | Mm, Mem  |
179/// | 2 | Mm, Mm   |
180/// +---+----------+
181/// ```
182pub trait MmxPhadddEmitter<A, B> {
183    fn mmx_phaddd(&mut self, op0: A, op1: B);
184}
185
186impl<'a> MmxPhadddEmitter<Mm, Mm> for Assembler<'a> {
187    fn mmx_phaddd(&mut self, op0: Mm, op1: Mm) {
188        self.emit(
189            MMX_PHADDDRR,
190            op0.as_operand(),
191            op1.as_operand(),
192            &NOREG,
193            &NOREG,
194        );
195    }
196}
197
198impl<'a> MmxPhadddEmitter<Mm, Mem> for Assembler<'a> {
199    fn mmx_phaddd(&mut self, op0: Mm, op1: Mem) {
200        self.emit(
201            MMX_PHADDDRM,
202            op0.as_operand(),
203            op1.as_operand(),
204            &NOREG,
205            &NOREG,
206        );
207    }
208}
209
210/// `MMX_PHADDSW`.
211///
212/// Supported operand variants:
213///
214/// ```text
215/// +---+----------+
216/// | # | Operands |
217/// +---+----------+
218/// | 1 | Mm, Mem  |
219/// | 2 | Mm, Mm   |
220/// +---+----------+
221/// ```
222pub trait MmxPhaddswEmitter<A, B> {
223    fn mmx_phaddsw(&mut self, op0: A, op1: B);
224}
225
226impl<'a> MmxPhaddswEmitter<Mm, Mm> for Assembler<'a> {
227    fn mmx_phaddsw(&mut self, op0: Mm, op1: Mm) {
228        self.emit(
229            MMX_PHADDSWRR,
230            op0.as_operand(),
231            op1.as_operand(),
232            &NOREG,
233            &NOREG,
234        );
235    }
236}
237
238impl<'a> MmxPhaddswEmitter<Mm, Mem> for Assembler<'a> {
239    fn mmx_phaddsw(&mut self, op0: Mm, op1: Mem) {
240        self.emit(
241            MMX_PHADDSWRM,
242            op0.as_operand(),
243            op1.as_operand(),
244            &NOREG,
245            &NOREG,
246        );
247    }
248}
249
250/// `MMX_PHADDW`.
251///
252/// Supported operand variants:
253///
254/// ```text
255/// +---+----------+
256/// | # | Operands |
257/// +---+----------+
258/// | 1 | Mm, Mem  |
259/// | 2 | Mm, Mm   |
260/// +---+----------+
261/// ```
262pub trait MmxPhaddwEmitter<A, B> {
263    fn mmx_phaddw(&mut self, op0: A, op1: B);
264}
265
266impl<'a> MmxPhaddwEmitter<Mm, Mm> for Assembler<'a> {
267    fn mmx_phaddw(&mut self, op0: Mm, op1: Mm) {
268        self.emit(
269            MMX_PHADDWRR,
270            op0.as_operand(),
271            op1.as_operand(),
272            &NOREG,
273            &NOREG,
274        );
275    }
276}
277
278impl<'a> MmxPhaddwEmitter<Mm, Mem> for Assembler<'a> {
279    fn mmx_phaddw(&mut self, op0: Mm, op1: Mem) {
280        self.emit(
281            MMX_PHADDWRM,
282            op0.as_operand(),
283            op1.as_operand(),
284            &NOREG,
285            &NOREG,
286        );
287    }
288}
289
290/// `MMX_PHSUBD`.
291///
292/// Supported operand variants:
293///
294/// ```text
295/// +---+----------+
296/// | # | Operands |
297/// +---+----------+
298/// | 1 | Mm, Mem  |
299/// | 2 | Mm, Mm   |
300/// +---+----------+
301/// ```
302pub trait MmxPhsubdEmitter<A, B> {
303    fn mmx_phsubd(&mut self, op0: A, op1: B);
304}
305
306impl<'a> MmxPhsubdEmitter<Mm, Mm> for Assembler<'a> {
307    fn mmx_phsubd(&mut self, op0: Mm, op1: Mm) {
308        self.emit(
309            MMX_PHSUBDRR,
310            op0.as_operand(),
311            op1.as_operand(),
312            &NOREG,
313            &NOREG,
314        );
315    }
316}
317
318impl<'a> MmxPhsubdEmitter<Mm, Mem> for Assembler<'a> {
319    fn mmx_phsubd(&mut self, op0: Mm, op1: Mem) {
320        self.emit(
321            MMX_PHSUBDRM,
322            op0.as_operand(),
323            op1.as_operand(),
324            &NOREG,
325            &NOREG,
326        );
327    }
328}
329
330/// `MMX_PHSUBSW`.
331///
332/// Supported operand variants:
333///
334/// ```text
335/// +---+----------+
336/// | # | Operands |
337/// +---+----------+
338/// | 1 | Mm, Mem  |
339/// | 2 | Mm, Mm   |
340/// +---+----------+
341/// ```
342pub trait MmxPhsubswEmitter<A, B> {
343    fn mmx_phsubsw(&mut self, op0: A, op1: B);
344}
345
346impl<'a> MmxPhsubswEmitter<Mm, Mm> for Assembler<'a> {
347    fn mmx_phsubsw(&mut self, op0: Mm, op1: Mm) {
348        self.emit(
349            MMX_PHSUBSWRR,
350            op0.as_operand(),
351            op1.as_operand(),
352            &NOREG,
353            &NOREG,
354        );
355    }
356}
357
358impl<'a> MmxPhsubswEmitter<Mm, Mem> for Assembler<'a> {
359    fn mmx_phsubsw(&mut self, op0: Mm, op1: Mem) {
360        self.emit(
361            MMX_PHSUBSWRM,
362            op0.as_operand(),
363            op1.as_operand(),
364            &NOREG,
365            &NOREG,
366        );
367    }
368}
369
370/// `MMX_PHSUBW`.
371///
372/// Supported operand variants:
373///
374/// ```text
375/// +---+----------+
376/// | # | Operands |
377/// +---+----------+
378/// | 1 | Mm, Mem  |
379/// | 2 | Mm, Mm   |
380/// +---+----------+
381/// ```
382pub trait MmxPhsubwEmitter<A, B> {
383    fn mmx_phsubw(&mut self, op0: A, op1: B);
384}
385
386impl<'a> MmxPhsubwEmitter<Mm, Mm> for Assembler<'a> {
387    fn mmx_phsubw(&mut self, op0: Mm, op1: Mm) {
388        self.emit(
389            MMX_PHSUBWRR,
390            op0.as_operand(),
391            op1.as_operand(),
392            &NOREG,
393            &NOREG,
394        );
395    }
396}
397
398impl<'a> MmxPhsubwEmitter<Mm, Mem> for Assembler<'a> {
399    fn mmx_phsubw(&mut self, op0: Mm, op1: Mem) {
400        self.emit(
401            MMX_PHSUBWRM,
402            op0.as_operand(),
403            op1.as_operand(),
404            &NOREG,
405            &NOREG,
406        );
407    }
408}
409
410/// `MMX_PMADDUBSW`.
411///
412/// Supported operand variants:
413///
414/// ```text
415/// +---+----------+
416/// | # | Operands |
417/// +---+----------+
418/// | 1 | Mm, Mem  |
419/// | 2 | Mm, Mm   |
420/// +---+----------+
421/// ```
422pub trait MmxPmaddubswEmitter<A, B> {
423    fn mmx_pmaddubsw(&mut self, op0: A, op1: B);
424}
425
426impl<'a> MmxPmaddubswEmitter<Mm, Mm> for Assembler<'a> {
427    fn mmx_pmaddubsw(&mut self, op0: Mm, op1: Mm) {
428        self.emit(
429            MMX_PMADDUBSWRR,
430            op0.as_operand(),
431            op1.as_operand(),
432            &NOREG,
433            &NOREG,
434        );
435    }
436}
437
438impl<'a> MmxPmaddubswEmitter<Mm, Mem> for Assembler<'a> {
439    fn mmx_pmaddubsw(&mut self, op0: Mm, op1: Mem) {
440        self.emit(
441            MMX_PMADDUBSWRM,
442            op0.as_operand(),
443            op1.as_operand(),
444            &NOREG,
445            &NOREG,
446        );
447    }
448}
449
450/// `MMX_PMULHRSW`.
451///
452/// Supported operand variants:
453///
454/// ```text
455/// +---+----------+
456/// | # | Operands |
457/// +---+----------+
458/// | 1 | Mm, Mem  |
459/// | 2 | Mm, Mm   |
460/// +---+----------+
461/// ```
462pub trait MmxPmulhrswEmitter<A, B> {
463    fn mmx_pmulhrsw(&mut self, op0: A, op1: B);
464}
465
466impl<'a> MmxPmulhrswEmitter<Mm, Mm> for Assembler<'a> {
467    fn mmx_pmulhrsw(&mut self, op0: Mm, op1: Mm) {
468        self.emit(
469            MMX_PMULHRSWRR,
470            op0.as_operand(),
471            op1.as_operand(),
472            &NOREG,
473            &NOREG,
474        );
475    }
476}
477
478impl<'a> MmxPmulhrswEmitter<Mm, Mem> for Assembler<'a> {
479    fn mmx_pmulhrsw(&mut self, op0: Mm, op1: Mem) {
480        self.emit(
481            MMX_PMULHRSWRM,
482            op0.as_operand(),
483            op1.as_operand(),
484            &NOREG,
485            &NOREG,
486        );
487    }
488}
489
490/// `MMX_PSHUFB`.
491///
492/// Supported operand variants:
493///
494/// ```text
495/// +---+----------+
496/// | # | Operands |
497/// +---+----------+
498/// | 1 | Mm, Mem  |
499/// | 2 | Mm, Mm   |
500/// +---+----------+
501/// ```
502pub trait MmxPshufbEmitter<A, B> {
503    fn mmx_pshufb(&mut self, op0: A, op1: B);
504}
505
506impl<'a> MmxPshufbEmitter<Mm, Mm> for Assembler<'a> {
507    fn mmx_pshufb(&mut self, op0: Mm, op1: Mm) {
508        self.emit(
509            MMX_PSHUFBRR,
510            op0.as_operand(),
511            op1.as_operand(),
512            &NOREG,
513            &NOREG,
514        );
515    }
516}
517
518impl<'a> MmxPshufbEmitter<Mm, Mem> for Assembler<'a> {
519    fn mmx_pshufb(&mut self, op0: Mm, op1: Mem) {
520        self.emit(
521            MMX_PSHUFBRM,
522            op0.as_operand(),
523            op1.as_operand(),
524            &NOREG,
525            &NOREG,
526        );
527    }
528}
529
530/// `MMX_PSIGNB`.
531///
532/// Supported operand variants:
533///
534/// ```text
535/// +---+----------+
536/// | # | Operands |
537/// +---+----------+
538/// | 1 | Mm, Mem  |
539/// | 2 | Mm, Mm   |
540/// +---+----------+
541/// ```
542pub trait MmxPsignbEmitter<A, B> {
543    fn mmx_psignb(&mut self, op0: A, op1: B);
544}
545
546impl<'a> MmxPsignbEmitter<Mm, Mm> for Assembler<'a> {
547    fn mmx_psignb(&mut self, op0: Mm, op1: Mm) {
548        self.emit(
549            MMX_PSIGNBRR,
550            op0.as_operand(),
551            op1.as_operand(),
552            &NOREG,
553            &NOREG,
554        );
555    }
556}
557
558impl<'a> MmxPsignbEmitter<Mm, Mem> for Assembler<'a> {
559    fn mmx_psignb(&mut self, op0: Mm, op1: Mem) {
560        self.emit(
561            MMX_PSIGNBRM,
562            op0.as_operand(),
563            op1.as_operand(),
564            &NOREG,
565            &NOREG,
566        );
567    }
568}
569
570/// `MMX_PSIGND`.
571///
572/// Supported operand variants:
573///
574/// ```text
575/// +---+----------+
576/// | # | Operands |
577/// +---+----------+
578/// | 1 | Mm, Mem  |
579/// | 2 | Mm, Mm   |
580/// +---+----------+
581/// ```
582pub trait MmxPsigndEmitter<A, B> {
583    fn mmx_psignd(&mut self, op0: A, op1: B);
584}
585
586impl<'a> MmxPsigndEmitter<Mm, Mm> for Assembler<'a> {
587    fn mmx_psignd(&mut self, op0: Mm, op1: Mm) {
588        self.emit(
589            MMX_PSIGNDRR,
590            op0.as_operand(),
591            op1.as_operand(),
592            &NOREG,
593            &NOREG,
594        );
595    }
596}
597
598impl<'a> MmxPsigndEmitter<Mm, Mem> for Assembler<'a> {
599    fn mmx_psignd(&mut self, op0: Mm, op1: Mem) {
600        self.emit(
601            MMX_PSIGNDRM,
602            op0.as_operand(),
603            op1.as_operand(),
604            &NOREG,
605            &NOREG,
606        );
607    }
608}
609
610/// `MMX_PSIGNW`.
611///
612/// Supported operand variants:
613///
614/// ```text
615/// +---+----------+
616/// | # | Operands |
617/// +---+----------+
618/// | 1 | Mm, Mem  |
619/// | 2 | Mm, Mm   |
620/// +---+----------+
621/// ```
622pub trait MmxPsignwEmitter<A, B> {
623    fn mmx_psignw(&mut self, op0: A, op1: B);
624}
625
626impl<'a> MmxPsignwEmitter<Mm, Mm> for Assembler<'a> {
627    fn mmx_psignw(&mut self, op0: Mm, op1: Mm) {
628        self.emit(
629            MMX_PSIGNWRR,
630            op0.as_operand(),
631            op1.as_operand(),
632            &NOREG,
633            &NOREG,
634        );
635    }
636}
637
638impl<'a> MmxPsignwEmitter<Mm, Mem> for Assembler<'a> {
639    fn mmx_psignw(&mut self, op0: Mm, op1: Mem) {
640        self.emit(
641            MMX_PSIGNWRM,
642            op0.as_operand(),
643            op1.as_operand(),
644            &NOREG,
645            &NOREG,
646        );
647    }
648}
649
650/// `SSE_PABSB`.
651///
652/// Supported operand variants:
653///
654/// ```text
655/// +---+----------+
656/// | # | Operands |
657/// +---+----------+
658/// | 1 | Xmm, Mem |
659/// | 2 | Xmm, Xmm |
660/// +---+----------+
661/// ```
662pub trait SsePabsbEmitter<A, B> {
663    fn sse_pabsb(&mut self, op0: A, op1: B);
664}
665
666impl<'a> SsePabsbEmitter<Xmm, Xmm> for Assembler<'a> {
667    fn sse_pabsb(&mut self, op0: Xmm, op1: Xmm) {
668        self.emit(
669            SSE_PABSBRR,
670            op0.as_operand(),
671            op1.as_operand(),
672            &NOREG,
673            &NOREG,
674        );
675    }
676}
677
678impl<'a> SsePabsbEmitter<Xmm, Mem> for Assembler<'a> {
679    fn sse_pabsb(&mut self, op0: Xmm, op1: Mem) {
680        self.emit(
681            SSE_PABSBRM,
682            op0.as_operand(),
683            op1.as_operand(),
684            &NOREG,
685            &NOREG,
686        );
687    }
688}
689
690/// `SSE_PABSD`.
691///
692/// Supported operand variants:
693///
694/// ```text
695/// +---+----------+
696/// | # | Operands |
697/// +---+----------+
698/// | 1 | Xmm, Mem |
699/// | 2 | Xmm, Xmm |
700/// +---+----------+
701/// ```
702pub trait SsePabsdEmitter<A, B> {
703    fn sse_pabsd(&mut self, op0: A, op1: B);
704}
705
706impl<'a> SsePabsdEmitter<Xmm, Xmm> for Assembler<'a> {
707    fn sse_pabsd(&mut self, op0: Xmm, op1: Xmm) {
708        self.emit(
709            SSE_PABSDRR,
710            op0.as_operand(),
711            op1.as_operand(),
712            &NOREG,
713            &NOREG,
714        );
715    }
716}
717
718impl<'a> SsePabsdEmitter<Xmm, Mem> for Assembler<'a> {
719    fn sse_pabsd(&mut self, op0: Xmm, op1: Mem) {
720        self.emit(
721            SSE_PABSDRM,
722            op0.as_operand(),
723            op1.as_operand(),
724            &NOREG,
725            &NOREG,
726        );
727    }
728}
729
730/// `SSE_PABSW`.
731///
732/// Supported operand variants:
733///
734/// ```text
735/// +---+----------+
736/// | # | Operands |
737/// +---+----------+
738/// | 1 | Xmm, Mem |
739/// | 2 | Xmm, Xmm |
740/// +---+----------+
741/// ```
742pub trait SsePabswEmitter<A, B> {
743    fn sse_pabsw(&mut self, op0: A, op1: B);
744}
745
746impl<'a> SsePabswEmitter<Xmm, Xmm> for Assembler<'a> {
747    fn sse_pabsw(&mut self, op0: Xmm, op1: Xmm) {
748        self.emit(
749            SSE_PABSWRR,
750            op0.as_operand(),
751            op1.as_operand(),
752            &NOREG,
753            &NOREG,
754        );
755    }
756}
757
758impl<'a> SsePabswEmitter<Xmm, Mem> for Assembler<'a> {
759    fn sse_pabsw(&mut self, op0: Xmm, op1: Mem) {
760        self.emit(
761            SSE_PABSWRM,
762            op0.as_operand(),
763            op1.as_operand(),
764            &NOREG,
765            &NOREG,
766        );
767    }
768}
769
770/// `SSE_PALIGNR`.
771///
772/// Supported operand variants:
773///
774/// ```text
775/// +---+---------------+
776/// | # | Operands      |
777/// +---+---------------+
778/// | 1 | Xmm, Mem, Imm |
779/// | 2 | Xmm, Xmm, Imm |
780/// +---+---------------+
781/// ```
782pub trait SsePalignrEmitter<A, B, C> {
783    fn sse_palignr(&mut self, op0: A, op1: B, op2: C);
784}
785
786impl<'a> SsePalignrEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
787    fn sse_palignr(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
788        self.emit(
789            SSE_PALIGNRRRI,
790            op0.as_operand(),
791            op1.as_operand(),
792            op2.as_operand(),
793            &NOREG,
794        );
795    }
796}
797
798impl<'a> SsePalignrEmitter<Xmm, Mem, Imm> for Assembler<'a> {
799    fn sse_palignr(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
800        self.emit(
801            SSE_PALIGNRRMI,
802            op0.as_operand(),
803            op1.as_operand(),
804            op2.as_operand(),
805            &NOREG,
806        );
807    }
808}
809
810/// `SSE_PHADDD`.
811///
812/// Supported operand variants:
813///
814/// ```text
815/// +---+----------+
816/// | # | Operands |
817/// +---+----------+
818/// | 1 | Xmm, Mem |
819/// | 2 | Xmm, Xmm |
820/// +---+----------+
821/// ```
822pub trait SsePhadddEmitter<A, B> {
823    fn sse_phaddd(&mut self, op0: A, op1: B);
824}
825
826impl<'a> SsePhadddEmitter<Xmm, Xmm> for Assembler<'a> {
827    fn sse_phaddd(&mut self, op0: Xmm, op1: Xmm) {
828        self.emit(
829            SSE_PHADDDRR,
830            op0.as_operand(),
831            op1.as_operand(),
832            &NOREG,
833            &NOREG,
834        );
835    }
836}
837
838impl<'a> SsePhadddEmitter<Xmm, Mem> for Assembler<'a> {
839    fn sse_phaddd(&mut self, op0: Xmm, op1: Mem) {
840        self.emit(
841            SSE_PHADDDRM,
842            op0.as_operand(),
843            op1.as_operand(),
844            &NOREG,
845            &NOREG,
846        );
847    }
848}
849
850/// `SSE_PHADDSW`.
851///
852/// Supported operand variants:
853///
854/// ```text
855/// +---+----------+
856/// | # | Operands |
857/// +---+----------+
858/// | 1 | Xmm, Mem |
859/// | 2 | Xmm, Xmm |
860/// +---+----------+
861/// ```
862pub trait SsePhaddswEmitter<A, B> {
863    fn sse_phaddsw(&mut self, op0: A, op1: B);
864}
865
866impl<'a> SsePhaddswEmitter<Xmm, Xmm> for Assembler<'a> {
867    fn sse_phaddsw(&mut self, op0: Xmm, op1: Xmm) {
868        self.emit(
869            SSE_PHADDSWRR,
870            op0.as_operand(),
871            op1.as_operand(),
872            &NOREG,
873            &NOREG,
874        );
875    }
876}
877
878impl<'a> SsePhaddswEmitter<Xmm, Mem> for Assembler<'a> {
879    fn sse_phaddsw(&mut self, op0: Xmm, op1: Mem) {
880        self.emit(
881            SSE_PHADDSWRM,
882            op0.as_operand(),
883            op1.as_operand(),
884            &NOREG,
885            &NOREG,
886        );
887    }
888}
889
890/// `SSE_PHADDW`.
891///
892/// Supported operand variants:
893///
894/// ```text
895/// +---+----------+
896/// | # | Operands |
897/// +---+----------+
898/// | 1 | Xmm, Mem |
899/// | 2 | Xmm, Xmm |
900/// +---+----------+
901/// ```
902pub trait SsePhaddwEmitter<A, B> {
903    fn sse_phaddw(&mut self, op0: A, op1: B);
904}
905
906impl<'a> SsePhaddwEmitter<Xmm, Xmm> for Assembler<'a> {
907    fn sse_phaddw(&mut self, op0: Xmm, op1: Xmm) {
908        self.emit(
909            SSE_PHADDWRR,
910            op0.as_operand(),
911            op1.as_operand(),
912            &NOREG,
913            &NOREG,
914        );
915    }
916}
917
918impl<'a> SsePhaddwEmitter<Xmm, Mem> for Assembler<'a> {
919    fn sse_phaddw(&mut self, op0: Xmm, op1: Mem) {
920        self.emit(
921            SSE_PHADDWRM,
922            op0.as_operand(),
923            op1.as_operand(),
924            &NOREG,
925            &NOREG,
926        );
927    }
928}
929
930/// `SSE_PHSUBD`.
931///
932/// Supported operand variants:
933///
934/// ```text
935/// +---+----------+
936/// | # | Operands |
937/// +---+----------+
938/// | 1 | Xmm, Mem |
939/// | 2 | Xmm, Xmm |
940/// +---+----------+
941/// ```
942pub trait SsePhsubdEmitter<A, B> {
943    fn sse_phsubd(&mut self, op0: A, op1: B);
944}
945
946impl<'a> SsePhsubdEmitter<Xmm, Xmm> for Assembler<'a> {
947    fn sse_phsubd(&mut self, op0: Xmm, op1: Xmm) {
948        self.emit(
949            SSE_PHSUBDRR,
950            op0.as_operand(),
951            op1.as_operand(),
952            &NOREG,
953            &NOREG,
954        );
955    }
956}
957
958impl<'a> SsePhsubdEmitter<Xmm, Mem> for Assembler<'a> {
959    fn sse_phsubd(&mut self, op0: Xmm, op1: Mem) {
960        self.emit(
961            SSE_PHSUBDRM,
962            op0.as_operand(),
963            op1.as_operand(),
964            &NOREG,
965            &NOREG,
966        );
967    }
968}
969
970/// `SSE_PHSUBSW`.
971///
972/// Supported operand variants:
973///
974/// ```text
975/// +---+----------+
976/// | # | Operands |
977/// +---+----------+
978/// | 1 | Xmm, Mem |
979/// | 2 | Xmm, Xmm |
980/// +---+----------+
981/// ```
982pub trait SsePhsubswEmitter<A, B> {
983    fn sse_phsubsw(&mut self, op0: A, op1: B);
984}
985
986impl<'a> SsePhsubswEmitter<Xmm, Xmm> for Assembler<'a> {
987    fn sse_phsubsw(&mut self, op0: Xmm, op1: Xmm) {
988        self.emit(
989            SSE_PHSUBSWRR,
990            op0.as_operand(),
991            op1.as_operand(),
992            &NOREG,
993            &NOREG,
994        );
995    }
996}
997
998impl<'a> SsePhsubswEmitter<Xmm, Mem> for Assembler<'a> {
999    fn sse_phsubsw(&mut self, op0: Xmm, op1: Mem) {
1000        self.emit(
1001            SSE_PHSUBSWRM,
1002            op0.as_operand(),
1003            op1.as_operand(),
1004            &NOREG,
1005            &NOREG,
1006        );
1007    }
1008}
1009
1010/// `SSE_PHSUBW`.
1011///
1012/// Supported operand variants:
1013///
1014/// ```text
1015/// +---+----------+
1016/// | # | Operands |
1017/// +---+----------+
1018/// | 1 | Xmm, Mem |
1019/// | 2 | Xmm, Xmm |
1020/// +---+----------+
1021/// ```
1022pub trait SsePhsubwEmitter<A, B> {
1023    fn sse_phsubw(&mut self, op0: A, op1: B);
1024}
1025
1026impl<'a> SsePhsubwEmitter<Xmm, Xmm> for Assembler<'a> {
1027    fn sse_phsubw(&mut self, op0: Xmm, op1: Xmm) {
1028        self.emit(
1029            SSE_PHSUBWRR,
1030            op0.as_operand(),
1031            op1.as_operand(),
1032            &NOREG,
1033            &NOREG,
1034        );
1035    }
1036}
1037
1038impl<'a> SsePhsubwEmitter<Xmm, Mem> for Assembler<'a> {
1039    fn sse_phsubw(&mut self, op0: Xmm, op1: Mem) {
1040        self.emit(
1041            SSE_PHSUBWRM,
1042            op0.as_operand(),
1043            op1.as_operand(),
1044            &NOREG,
1045            &NOREG,
1046        );
1047    }
1048}
1049
1050/// `SSE_PMADDUBSW`.
1051///
1052/// Supported operand variants:
1053///
1054/// ```text
1055/// +---+----------+
1056/// | # | Operands |
1057/// +---+----------+
1058/// | 1 | Xmm, Mem |
1059/// | 2 | Xmm, Xmm |
1060/// +---+----------+
1061/// ```
1062pub trait SsePmaddubswEmitter<A, B> {
1063    fn sse_pmaddubsw(&mut self, op0: A, op1: B);
1064}
1065
1066impl<'a> SsePmaddubswEmitter<Xmm, Xmm> for Assembler<'a> {
1067    fn sse_pmaddubsw(&mut self, op0: Xmm, op1: Xmm) {
1068        self.emit(
1069            SSE_PMADDUBSWRR,
1070            op0.as_operand(),
1071            op1.as_operand(),
1072            &NOREG,
1073            &NOREG,
1074        );
1075    }
1076}
1077
1078impl<'a> SsePmaddubswEmitter<Xmm, Mem> for Assembler<'a> {
1079    fn sse_pmaddubsw(&mut self, op0: Xmm, op1: Mem) {
1080        self.emit(
1081            SSE_PMADDUBSWRM,
1082            op0.as_operand(),
1083            op1.as_operand(),
1084            &NOREG,
1085            &NOREG,
1086        );
1087    }
1088}
1089
1090/// `SSE_PMULHRSW`.
1091///
1092/// Supported operand variants:
1093///
1094/// ```text
1095/// +---+----------+
1096/// | # | Operands |
1097/// +---+----------+
1098/// | 1 | Xmm, Mem |
1099/// | 2 | Xmm, Xmm |
1100/// +---+----------+
1101/// ```
1102pub trait SsePmulhrswEmitter<A, B> {
1103    fn sse_pmulhrsw(&mut self, op0: A, op1: B);
1104}
1105
1106impl<'a> SsePmulhrswEmitter<Xmm, Xmm> for Assembler<'a> {
1107    fn sse_pmulhrsw(&mut self, op0: Xmm, op1: Xmm) {
1108        self.emit(
1109            SSE_PMULHRSWRR,
1110            op0.as_operand(),
1111            op1.as_operand(),
1112            &NOREG,
1113            &NOREG,
1114        );
1115    }
1116}
1117
1118impl<'a> SsePmulhrswEmitter<Xmm, Mem> for Assembler<'a> {
1119    fn sse_pmulhrsw(&mut self, op0: Xmm, op1: Mem) {
1120        self.emit(
1121            SSE_PMULHRSWRM,
1122            op0.as_operand(),
1123            op1.as_operand(),
1124            &NOREG,
1125            &NOREG,
1126        );
1127    }
1128}
1129
1130/// `SSE_PSHUFB`.
1131///
1132/// Supported operand variants:
1133///
1134/// ```text
1135/// +---+----------+
1136/// | # | Operands |
1137/// +---+----------+
1138/// | 1 | Xmm, Mem |
1139/// | 2 | Xmm, Xmm |
1140/// +---+----------+
1141/// ```
1142pub trait SsePshufbEmitter<A, B> {
1143    fn sse_pshufb(&mut self, op0: A, op1: B);
1144}
1145
1146impl<'a> SsePshufbEmitter<Xmm, Xmm> for Assembler<'a> {
1147    fn sse_pshufb(&mut self, op0: Xmm, op1: Xmm) {
1148        self.emit(
1149            SSE_PSHUFBRR,
1150            op0.as_operand(),
1151            op1.as_operand(),
1152            &NOREG,
1153            &NOREG,
1154        );
1155    }
1156}
1157
1158impl<'a> SsePshufbEmitter<Xmm, Mem> for Assembler<'a> {
1159    fn sse_pshufb(&mut self, op0: Xmm, op1: Mem) {
1160        self.emit(
1161            SSE_PSHUFBRM,
1162            op0.as_operand(),
1163            op1.as_operand(),
1164            &NOREG,
1165            &NOREG,
1166        );
1167    }
1168}
1169
1170/// `SSE_PSIGNB`.
1171///
1172/// Supported operand variants:
1173///
1174/// ```text
1175/// +---+----------+
1176/// | # | Operands |
1177/// +---+----------+
1178/// | 1 | Xmm, Mem |
1179/// | 2 | Xmm, Xmm |
1180/// +---+----------+
1181/// ```
1182pub trait SsePsignbEmitter<A, B> {
1183    fn sse_psignb(&mut self, op0: A, op1: B);
1184}
1185
1186impl<'a> SsePsignbEmitter<Xmm, Xmm> for Assembler<'a> {
1187    fn sse_psignb(&mut self, op0: Xmm, op1: Xmm) {
1188        self.emit(
1189            SSE_PSIGNBRR,
1190            op0.as_operand(),
1191            op1.as_operand(),
1192            &NOREG,
1193            &NOREG,
1194        );
1195    }
1196}
1197
1198impl<'a> SsePsignbEmitter<Xmm, Mem> for Assembler<'a> {
1199    fn sse_psignb(&mut self, op0: Xmm, op1: Mem) {
1200        self.emit(
1201            SSE_PSIGNBRM,
1202            op0.as_operand(),
1203            op1.as_operand(),
1204            &NOREG,
1205            &NOREG,
1206        );
1207    }
1208}
1209
1210/// `SSE_PSIGND`.
1211///
1212/// Supported operand variants:
1213///
1214/// ```text
1215/// +---+----------+
1216/// | # | Operands |
1217/// +---+----------+
1218/// | 1 | Xmm, Mem |
1219/// | 2 | Xmm, Xmm |
1220/// +---+----------+
1221/// ```
1222pub trait SsePsigndEmitter<A, B> {
1223    fn sse_psignd(&mut self, op0: A, op1: B);
1224}
1225
1226impl<'a> SsePsigndEmitter<Xmm, Xmm> for Assembler<'a> {
1227    fn sse_psignd(&mut self, op0: Xmm, op1: Xmm) {
1228        self.emit(
1229            SSE_PSIGNDRR,
1230            op0.as_operand(),
1231            op1.as_operand(),
1232            &NOREG,
1233            &NOREG,
1234        );
1235    }
1236}
1237
1238impl<'a> SsePsigndEmitter<Xmm, Mem> for Assembler<'a> {
1239    fn sse_psignd(&mut self, op0: Xmm, op1: Mem) {
1240        self.emit(
1241            SSE_PSIGNDRM,
1242            op0.as_operand(),
1243            op1.as_operand(),
1244            &NOREG,
1245            &NOREG,
1246        );
1247    }
1248}
1249
1250/// `SSE_PSIGNW`.
1251///
1252/// Supported operand variants:
1253///
1254/// ```text
1255/// +---+----------+
1256/// | # | Operands |
1257/// +---+----------+
1258/// | 1 | Xmm, Mem |
1259/// | 2 | Xmm, Xmm |
1260/// +---+----------+
1261/// ```
1262pub trait SsePsignwEmitter<A, B> {
1263    fn sse_psignw(&mut self, op0: A, op1: B);
1264}
1265
1266impl<'a> SsePsignwEmitter<Xmm, Xmm> for Assembler<'a> {
1267    fn sse_psignw(&mut self, op0: Xmm, op1: Xmm) {
1268        self.emit(
1269            SSE_PSIGNWRR,
1270            op0.as_operand(),
1271            op1.as_operand(),
1272            &NOREG,
1273            &NOREG,
1274        );
1275    }
1276}
1277
1278impl<'a> SsePsignwEmitter<Xmm, Mem> for Assembler<'a> {
1279    fn sse_psignw(&mut self, op0: Xmm, op1: Mem) {
1280        self.emit(
1281            SSE_PSIGNWRM,
1282            op0.as_operand(),
1283            op1.as_operand(),
1284            &NOREG,
1285            &NOREG,
1286        );
1287    }
1288}
1289
1290impl<'a> Assembler<'a> {
1291    /// `MMX_PABSB`.
1292    ///
1293    /// Supported operand variants:
1294    ///
1295    /// ```text
1296    /// +---+----------+
1297    /// | # | Operands |
1298    /// +---+----------+
1299    /// | 1 | Mm, Mem  |
1300    /// | 2 | Mm, Mm   |
1301    /// +---+----------+
1302    /// ```
1303    #[inline]
1304    pub fn mmx_pabsb<A, B>(&mut self, op0: A, op1: B)
1305    where
1306        Assembler<'a>: MmxPabsbEmitter<A, B>,
1307    {
1308        <Self as MmxPabsbEmitter<A, B>>::mmx_pabsb(self, op0, op1);
1309    }
1310    /// `MMX_PABSD`.
1311    ///
1312    /// Supported operand variants:
1313    ///
1314    /// ```text
1315    /// +---+----------+
1316    /// | # | Operands |
1317    /// +---+----------+
1318    /// | 1 | Mm, Mem  |
1319    /// | 2 | Mm, Mm   |
1320    /// +---+----------+
1321    /// ```
1322    #[inline]
1323    pub fn mmx_pabsd<A, B>(&mut self, op0: A, op1: B)
1324    where
1325        Assembler<'a>: MmxPabsdEmitter<A, B>,
1326    {
1327        <Self as MmxPabsdEmitter<A, B>>::mmx_pabsd(self, op0, op1);
1328    }
1329    /// `MMX_PABSW`.
1330    ///
1331    /// Supported operand variants:
1332    ///
1333    /// ```text
1334    /// +---+----------+
1335    /// | # | Operands |
1336    /// +---+----------+
1337    /// | 1 | Mm, Mem  |
1338    /// | 2 | Mm, Mm   |
1339    /// +---+----------+
1340    /// ```
1341    #[inline]
1342    pub fn mmx_pabsw<A, B>(&mut self, op0: A, op1: B)
1343    where
1344        Assembler<'a>: MmxPabswEmitter<A, B>,
1345    {
1346        <Self as MmxPabswEmitter<A, B>>::mmx_pabsw(self, op0, op1);
1347    }
1348    /// `MMX_PALIGNR`.
1349    ///
1350    /// Supported operand variants:
1351    ///
1352    /// ```text
1353    /// +---+--------------+
1354    /// | # | Operands     |
1355    /// +---+--------------+
1356    /// | 1 | Mm, Mem, Imm |
1357    /// | 2 | Mm, Mm, Imm  |
1358    /// +---+--------------+
1359    /// ```
1360    #[inline]
1361    pub fn mmx_palignr<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1362    where
1363        Assembler<'a>: MmxPalignrEmitter<A, B, C>,
1364    {
1365        <Self as MmxPalignrEmitter<A, B, C>>::mmx_palignr(self, op0, op1, op2);
1366    }
1367    /// `MMX_PHADDD`.
1368    ///
1369    /// Supported operand variants:
1370    ///
1371    /// ```text
1372    /// +---+----------+
1373    /// | # | Operands |
1374    /// +---+----------+
1375    /// | 1 | Mm, Mem  |
1376    /// | 2 | Mm, Mm   |
1377    /// +---+----------+
1378    /// ```
1379    #[inline]
1380    pub fn mmx_phaddd<A, B>(&mut self, op0: A, op1: B)
1381    where
1382        Assembler<'a>: MmxPhadddEmitter<A, B>,
1383    {
1384        <Self as MmxPhadddEmitter<A, B>>::mmx_phaddd(self, op0, op1);
1385    }
1386    /// `MMX_PHADDSW`.
1387    ///
1388    /// Supported operand variants:
1389    ///
1390    /// ```text
1391    /// +---+----------+
1392    /// | # | Operands |
1393    /// +---+----------+
1394    /// | 1 | Mm, Mem  |
1395    /// | 2 | Mm, Mm   |
1396    /// +---+----------+
1397    /// ```
1398    #[inline]
1399    pub fn mmx_phaddsw<A, B>(&mut self, op0: A, op1: B)
1400    where
1401        Assembler<'a>: MmxPhaddswEmitter<A, B>,
1402    {
1403        <Self as MmxPhaddswEmitter<A, B>>::mmx_phaddsw(self, op0, op1);
1404    }
1405    /// `MMX_PHADDW`.
1406    ///
1407    /// Supported operand variants:
1408    ///
1409    /// ```text
1410    /// +---+----------+
1411    /// | # | Operands |
1412    /// +---+----------+
1413    /// | 1 | Mm, Mem  |
1414    /// | 2 | Mm, Mm   |
1415    /// +---+----------+
1416    /// ```
1417    #[inline]
1418    pub fn mmx_phaddw<A, B>(&mut self, op0: A, op1: B)
1419    where
1420        Assembler<'a>: MmxPhaddwEmitter<A, B>,
1421    {
1422        <Self as MmxPhaddwEmitter<A, B>>::mmx_phaddw(self, op0, op1);
1423    }
1424    /// `MMX_PHSUBD`.
1425    ///
1426    /// Supported operand variants:
1427    ///
1428    /// ```text
1429    /// +---+----------+
1430    /// | # | Operands |
1431    /// +---+----------+
1432    /// | 1 | Mm, Mem  |
1433    /// | 2 | Mm, Mm   |
1434    /// +---+----------+
1435    /// ```
1436    #[inline]
1437    pub fn mmx_phsubd<A, B>(&mut self, op0: A, op1: B)
1438    where
1439        Assembler<'a>: MmxPhsubdEmitter<A, B>,
1440    {
1441        <Self as MmxPhsubdEmitter<A, B>>::mmx_phsubd(self, op0, op1);
1442    }
1443    /// `MMX_PHSUBSW`.
1444    ///
1445    /// Supported operand variants:
1446    ///
1447    /// ```text
1448    /// +---+----------+
1449    /// | # | Operands |
1450    /// +---+----------+
1451    /// | 1 | Mm, Mem  |
1452    /// | 2 | Mm, Mm   |
1453    /// +---+----------+
1454    /// ```
1455    #[inline]
1456    pub fn mmx_phsubsw<A, B>(&mut self, op0: A, op1: B)
1457    where
1458        Assembler<'a>: MmxPhsubswEmitter<A, B>,
1459    {
1460        <Self as MmxPhsubswEmitter<A, B>>::mmx_phsubsw(self, op0, op1);
1461    }
1462    /// `MMX_PHSUBW`.
1463    ///
1464    /// Supported operand variants:
1465    ///
1466    /// ```text
1467    /// +---+----------+
1468    /// | # | Operands |
1469    /// +---+----------+
1470    /// | 1 | Mm, Mem  |
1471    /// | 2 | Mm, Mm   |
1472    /// +---+----------+
1473    /// ```
1474    #[inline]
1475    pub fn mmx_phsubw<A, B>(&mut self, op0: A, op1: B)
1476    where
1477        Assembler<'a>: MmxPhsubwEmitter<A, B>,
1478    {
1479        <Self as MmxPhsubwEmitter<A, B>>::mmx_phsubw(self, op0, op1);
1480    }
1481    /// `MMX_PMADDUBSW`.
1482    ///
1483    /// Supported operand variants:
1484    ///
1485    /// ```text
1486    /// +---+----------+
1487    /// | # | Operands |
1488    /// +---+----------+
1489    /// | 1 | Mm, Mem  |
1490    /// | 2 | Mm, Mm   |
1491    /// +---+----------+
1492    /// ```
1493    #[inline]
1494    pub fn mmx_pmaddubsw<A, B>(&mut self, op0: A, op1: B)
1495    where
1496        Assembler<'a>: MmxPmaddubswEmitter<A, B>,
1497    {
1498        <Self as MmxPmaddubswEmitter<A, B>>::mmx_pmaddubsw(self, op0, op1);
1499    }
1500    /// `MMX_PMULHRSW`.
1501    ///
1502    /// Supported operand variants:
1503    ///
1504    /// ```text
1505    /// +---+----------+
1506    /// | # | Operands |
1507    /// +---+----------+
1508    /// | 1 | Mm, Mem  |
1509    /// | 2 | Mm, Mm   |
1510    /// +---+----------+
1511    /// ```
1512    #[inline]
1513    pub fn mmx_pmulhrsw<A, B>(&mut self, op0: A, op1: B)
1514    where
1515        Assembler<'a>: MmxPmulhrswEmitter<A, B>,
1516    {
1517        <Self as MmxPmulhrswEmitter<A, B>>::mmx_pmulhrsw(self, op0, op1);
1518    }
1519    /// `MMX_PSHUFB`.
1520    ///
1521    /// Supported operand variants:
1522    ///
1523    /// ```text
1524    /// +---+----------+
1525    /// | # | Operands |
1526    /// +---+----------+
1527    /// | 1 | Mm, Mem  |
1528    /// | 2 | Mm, Mm   |
1529    /// +---+----------+
1530    /// ```
1531    #[inline]
1532    pub fn mmx_pshufb<A, B>(&mut self, op0: A, op1: B)
1533    where
1534        Assembler<'a>: MmxPshufbEmitter<A, B>,
1535    {
1536        <Self as MmxPshufbEmitter<A, B>>::mmx_pshufb(self, op0, op1);
1537    }
1538    /// `MMX_PSIGNB`.
1539    ///
1540    /// Supported operand variants:
1541    ///
1542    /// ```text
1543    /// +---+----------+
1544    /// | # | Operands |
1545    /// +---+----------+
1546    /// | 1 | Mm, Mem  |
1547    /// | 2 | Mm, Mm   |
1548    /// +---+----------+
1549    /// ```
1550    #[inline]
1551    pub fn mmx_psignb<A, B>(&mut self, op0: A, op1: B)
1552    where
1553        Assembler<'a>: MmxPsignbEmitter<A, B>,
1554    {
1555        <Self as MmxPsignbEmitter<A, B>>::mmx_psignb(self, op0, op1);
1556    }
1557    /// `MMX_PSIGND`.
1558    ///
1559    /// Supported operand variants:
1560    ///
1561    /// ```text
1562    /// +---+----------+
1563    /// | # | Operands |
1564    /// +---+----------+
1565    /// | 1 | Mm, Mem  |
1566    /// | 2 | Mm, Mm   |
1567    /// +---+----------+
1568    /// ```
1569    #[inline]
1570    pub fn mmx_psignd<A, B>(&mut self, op0: A, op1: B)
1571    where
1572        Assembler<'a>: MmxPsigndEmitter<A, B>,
1573    {
1574        <Self as MmxPsigndEmitter<A, B>>::mmx_psignd(self, op0, op1);
1575    }
1576    /// `MMX_PSIGNW`.
1577    ///
1578    /// Supported operand variants:
1579    ///
1580    /// ```text
1581    /// +---+----------+
1582    /// | # | Operands |
1583    /// +---+----------+
1584    /// | 1 | Mm, Mem  |
1585    /// | 2 | Mm, Mm   |
1586    /// +---+----------+
1587    /// ```
1588    #[inline]
1589    pub fn mmx_psignw<A, B>(&mut self, op0: A, op1: B)
1590    where
1591        Assembler<'a>: MmxPsignwEmitter<A, B>,
1592    {
1593        <Self as MmxPsignwEmitter<A, B>>::mmx_psignw(self, op0, op1);
1594    }
1595    /// `SSE_PABSB`.
1596    ///
1597    /// Supported operand variants:
1598    ///
1599    /// ```text
1600    /// +---+----------+
1601    /// | # | Operands |
1602    /// +---+----------+
1603    /// | 1 | Xmm, Mem |
1604    /// | 2 | Xmm, Xmm |
1605    /// +---+----------+
1606    /// ```
1607    #[inline]
1608    pub fn sse_pabsb<A, B>(&mut self, op0: A, op1: B)
1609    where
1610        Assembler<'a>: SsePabsbEmitter<A, B>,
1611    {
1612        <Self as SsePabsbEmitter<A, B>>::sse_pabsb(self, op0, op1);
1613    }
1614    /// `SSE_PABSD`.
1615    ///
1616    /// Supported operand variants:
1617    ///
1618    /// ```text
1619    /// +---+----------+
1620    /// | # | Operands |
1621    /// +---+----------+
1622    /// | 1 | Xmm, Mem |
1623    /// | 2 | Xmm, Xmm |
1624    /// +---+----------+
1625    /// ```
1626    #[inline]
1627    pub fn sse_pabsd<A, B>(&mut self, op0: A, op1: B)
1628    where
1629        Assembler<'a>: SsePabsdEmitter<A, B>,
1630    {
1631        <Self as SsePabsdEmitter<A, B>>::sse_pabsd(self, op0, op1);
1632    }
1633    /// `SSE_PABSW`.
1634    ///
1635    /// Supported operand variants:
1636    ///
1637    /// ```text
1638    /// +---+----------+
1639    /// | # | Operands |
1640    /// +---+----------+
1641    /// | 1 | Xmm, Mem |
1642    /// | 2 | Xmm, Xmm |
1643    /// +---+----------+
1644    /// ```
1645    #[inline]
1646    pub fn sse_pabsw<A, B>(&mut self, op0: A, op1: B)
1647    where
1648        Assembler<'a>: SsePabswEmitter<A, B>,
1649    {
1650        <Self as SsePabswEmitter<A, B>>::sse_pabsw(self, op0, op1);
1651    }
1652    /// `SSE_PALIGNR`.
1653    ///
1654    /// Supported operand variants:
1655    ///
1656    /// ```text
1657    /// +---+---------------+
1658    /// | # | Operands      |
1659    /// +---+---------------+
1660    /// | 1 | Xmm, Mem, Imm |
1661    /// | 2 | Xmm, Xmm, Imm |
1662    /// +---+---------------+
1663    /// ```
1664    #[inline]
1665    pub fn sse_palignr<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1666    where
1667        Assembler<'a>: SsePalignrEmitter<A, B, C>,
1668    {
1669        <Self as SsePalignrEmitter<A, B, C>>::sse_palignr(self, op0, op1, op2);
1670    }
1671    /// `SSE_PHADDD`.
1672    ///
1673    /// Supported operand variants:
1674    ///
1675    /// ```text
1676    /// +---+----------+
1677    /// | # | Operands |
1678    /// +---+----------+
1679    /// | 1 | Xmm, Mem |
1680    /// | 2 | Xmm, Xmm |
1681    /// +---+----------+
1682    /// ```
1683    #[inline]
1684    pub fn sse_phaddd<A, B>(&mut self, op0: A, op1: B)
1685    where
1686        Assembler<'a>: SsePhadddEmitter<A, B>,
1687    {
1688        <Self as SsePhadddEmitter<A, B>>::sse_phaddd(self, op0, op1);
1689    }
1690    /// `SSE_PHADDSW`.
1691    ///
1692    /// Supported operand variants:
1693    ///
1694    /// ```text
1695    /// +---+----------+
1696    /// | # | Operands |
1697    /// +---+----------+
1698    /// | 1 | Xmm, Mem |
1699    /// | 2 | Xmm, Xmm |
1700    /// +---+----------+
1701    /// ```
1702    #[inline]
1703    pub fn sse_phaddsw<A, B>(&mut self, op0: A, op1: B)
1704    where
1705        Assembler<'a>: SsePhaddswEmitter<A, B>,
1706    {
1707        <Self as SsePhaddswEmitter<A, B>>::sse_phaddsw(self, op0, op1);
1708    }
1709    /// `SSE_PHADDW`.
1710    ///
1711    /// Supported operand variants:
1712    ///
1713    /// ```text
1714    /// +---+----------+
1715    /// | # | Operands |
1716    /// +---+----------+
1717    /// | 1 | Xmm, Mem |
1718    /// | 2 | Xmm, Xmm |
1719    /// +---+----------+
1720    /// ```
1721    #[inline]
1722    pub fn sse_phaddw<A, B>(&mut self, op0: A, op1: B)
1723    where
1724        Assembler<'a>: SsePhaddwEmitter<A, B>,
1725    {
1726        <Self as SsePhaddwEmitter<A, B>>::sse_phaddw(self, op0, op1);
1727    }
1728    /// `SSE_PHSUBD`.
1729    ///
1730    /// Supported operand variants:
1731    ///
1732    /// ```text
1733    /// +---+----------+
1734    /// | # | Operands |
1735    /// +---+----------+
1736    /// | 1 | Xmm, Mem |
1737    /// | 2 | Xmm, Xmm |
1738    /// +---+----------+
1739    /// ```
1740    #[inline]
1741    pub fn sse_phsubd<A, B>(&mut self, op0: A, op1: B)
1742    where
1743        Assembler<'a>: SsePhsubdEmitter<A, B>,
1744    {
1745        <Self as SsePhsubdEmitter<A, B>>::sse_phsubd(self, op0, op1);
1746    }
1747    /// `SSE_PHSUBSW`.
1748    ///
1749    /// Supported operand variants:
1750    ///
1751    /// ```text
1752    /// +---+----------+
1753    /// | # | Operands |
1754    /// +---+----------+
1755    /// | 1 | Xmm, Mem |
1756    /// | 2 | Xmm, Xmm |
1757    /// +---+----------+
1758    /// ```
1759    #[inline]
1760    pub fn sse_phsubsw<A, B>(&mut self, op0: A, op1: B)
1761    where
1762        Assembler<'a>: SsePhsubswEmitter<A, B>,
1763    {
1764        <Self as SsePhsubswEmitter<A, B>>::sse_phsubsw(self, op0, op1);
1765    }
1766    /// `SSE_PHSUBW`.
1767    ///
1768    /// Supported operand variants:
1769    ///
1770    /// ```text
1771    /// +---+----------+
1772    /// | # | Operands |
1773    /// +---+----------+
1774    /// | 1 | Xmm, Mem |
1775    /// | 2 | Xmm, Xmm |
1776    /// +---+----------+
1777    /// ```
1778    #[inline]
1779    pub fn sse_phsubw<A, B>(&mut self, op0: A, op1: B)
1780    where
1781        Assembler<'a>: SsePhsubwEmitter<A, B>,
1782    {
1783        <Self as SsePhsubwEmitter<A, B>>::sse_phsubw(self, op0, op1);
1784    }
1785    /// `SSE_PMADDUBSW`.
1786    ///
1787    /// Supported operand variants:
1788    ///
1789    /// ```text
1790    /// +---+----------+
1791    /// | # | Operands |
1792    /// +---+----------+
1793    /// | 1 | Xmm, Mem |
1794    /// | 2 | Xmm, Xmm |
1795    /// +---+----------+
1796    /// ```
1797    #[inline]
1798    pub fn sse_pmaddubsw<A, B>(&mut self, op0: A, op1: B)
1799    where
1800        Assembler<'a>: SsePmaddubswEmitter<A, B>,
1801    {
1802        <Self as SsePmaddubswEmitter<A, B>>::sse_pmaddubsw(self, op0, op1);
1803    }
1804    /// `SSE_PMULHRSW`.
1805    ///
1806    /// Supported operand variants:
1807    ///
1808    /// ```text
1809    /// +---+----------+
1810    /// | # | Operands |
1811    /// +---+----------+
1812    /// | 1 | Xmm, Mem |
1813    /// | 2 | Xmm, Xmm |
1814    /// +---+----------+
1815    /// ```
1816    #[inline]
1817    pub fn sse_pmulhrsw<A, B>(&mut self, op0: A, op1: B)
1818    where
1819        Assembler<'a>: SsePmulhrswEmitter<A, B>,
1820    {
1821        <Self as SsePmulhrswEmitter<A, B>>::sse_pmulhrsw(self, op0, op1);
1822    }
1823    /// `SSE_PSHUFB`.
1824    ///
1825    /// Supported operand variants:
1826    ///
1827    /// ```text
1828    /// +---+----------+
1829    /// | # | Operands |
1830    /// +---+----------+
1831    /// | 1 | Xmm, Mem |
1832    /// | 2 | Xmm, Xmm |
1833    /// +---+----------+
1834    /// ```
1835    #[inline]
1836    pub fn sse_pshufb<A, B>(&mut self, op0: A, op1: B)
1837    where
1838        Assembler<'a>: SsePshufbEmitter<A, B>,
1839    {
1840        <Self as SsePshufbEmitter<A, B>>::sse_pshufb(self, op0, op1);
1841    }
1842    /// `SSE_PSIGNB`.
1843    ///
1844    /// Supported operand variants:
1845    ///
1846    /// ```text
1847    /// +---+----------+
1848    /// | # | Operands |
1849    /// +---+----------+
1850    /// | 1 | Xmm, Mem |
1851    /// | 2 | Xmm, Xmm |
1852    /// +---+----------+
1853    /// ```
1854    #[inline]
1855    pub fn sse_psignb<A, B>(&mut self, op0: A, op1: B)
1856    where
1857        Assembler<'a>: SsePsignbEmitter<A, B>,
1858    {
1859        <Self as SsePsignbEmitter<A, B>>::sse_psignb(self, op0, op1);
1860    }
1861    /// `SSE_PSIGND`.
1862    ///
1863    /// Supported operand variants:
1864    ///
1865    /// ```text
1866    /// +---+----------+
1867    /// | # | Operands |
1868    /// +---+----------+
1869    /// | 1 | Xmm, Mem |
1870    /// | 2 | Xmm, Xmm |
1871    /// +---+----------+
1872    /// ```
1873    #[inline]
1874    pub fn sse_psignd<A, B>(&mut self, op0: A, op1: B)
1875    where
1876        Assembler<'a>: SsePsigndEmitter<A, B>,
1877    {
1878        <Self as SsePsigndEmitter<A, B>>::sse_psignd(self, op0, op1);
1879    }
1880    /// `SSE_PSIGNW`.
1881    ///
1882    /// Supported operand variants:
1883    ///
1884    /// ```text
1885    /// +---+----------+
1886    /// | # | Operands |
1887    /// +---+----------+
1888    /// | 1 | Xmm, Mem |
1889    /// | 2 | Xmm, Xmm |
1890    /// +---+----------+
1891    /// ```
1892    #[inline]
1893    pub fn sse_psignw<A, B>(&mut self, op0: A, op1: B)
1894    where
1895        Assembler<'a>: SsePsignwEmitter<A, B>,
1896    {
1897        <Self as SsePsignwEmitter<A, B>>::sse_psignw(self, op0, op1);
1898    }
1899}
asmkit/x86/features/SSSE3.rs

asmkit/x86/features/
SSSE3.rs
