asmkit/x86/features/
AVX512_VNNI.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `VPDPBUSD`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+---------------+
16/// | # | Operands      |
17/// +---+---------------+
18/// | 1 | Xmm, Xmm, Mem |
19/// | 2 | Xmm, Xmm, Xmm |
20/// | 3 | Ymm, Ymm, Mem |
21/// | 4 | Ymm, Ymm, Ymm |
22/// | 5 | Zmm, Zmm, Mem |
23/// | 6 | Zmm, Zmm, Zmm |
24/// +---+---------------+
25/// ```
26pub trait VpdpbusdEmitter<A, B, C> {
27    fn vpdpbusd(&mut self, op0: A, op1: B, op2: C);
28}
29
30impl<'a> VpdpbusdEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
31    fn vpdpbusd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
32        self.emit(
33            VPDPBUSD128RRR,
34            op0.as_operand(),
35            op1.as_operand(),
36            op2.as_operand(),
37            &NOREG,
38        );
39    }
40}
41
42impl<'a> VpdpbusdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
43    fn vpdpbusd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
44        self.emit(
45            VPDPBUSD128RRM,
46            op0.as_operand(),
47            op1.as_operand(),
48            op2.as_operand(),
49            &NOREG,
50        );
51    }
52}
53
54impl<'a> VpdpbusdEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
55    fn vpdpbusd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
56        self.emit(
57            VPDPBUSD256RRR,
58            op0.as_operand(),
59            op1.as_operand(),
60            op2.as_operand(),
61            &NOREG,
62        );
63    }
64}
65
66impl<'a> VpdpbusdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
67    fn vpdpbusd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
68        self.emit(
69            VPDPBUSD256RRM,
70            op0.as_operand(),
71            op1.as_operand(),
72            op2.as_operand(),
73            &NOREG,
74        );
75    }
76}
77
78impl<'a> VpdpbusdEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
79    fn vpdpbusd(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
80        self.emit(
81            VPDPBUSD512RRR,
82            op0.as_operand(),
83            op1.as_operand(),
84            op2.as_operand(),
85            &NOREG,
86        );
87    }
88}
89
90impl<'a> VpdpbusdEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
91    fn vpdpbusd(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
92        self.emit(
93            VPDPBUSD512RRM,
94            op0.as_operand(),
95            op1.as_operand(),
96            op2.as_operand(),
97            &NOREG,
98        );
99    }
100}
101
102/// `VPDPBUSDS`.
103///
104/// Supported operand variants:
105///
106/// ```text
107/// +---+---------------+
108/// | # | Operands      |
109/// +---+---------------+
110/// | 1 | Xmm, Xmm, Mem |
111/// | 2 | Xmm, Xmm, Xmm |
112/// | 3 | Ymm, Ymm, Mem |
113/// | 4 | Ymm, Ymm, Ymm |
114/// | 5 | Zmm, Zmm, Mem |
115/// | 6 | Zmm, Zmm, Zmm |
116/// +---+---------------+
117/// ```
118pub trait VpdpbusdsEmitter<A, B, C> {
119    fn vpdpbusds(&mut self, op0: A, op1: B, op2: C);
120}
121
122impl<'a> VpdpbusdsEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
123    fn vpdpbusds(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
124        self.emit(
125            VPDPBUSDS128RRR,
126            op0.as_operand(),
127            op1.as_operand(),
128            op2.as_operand(),
129            &NOREG,
130        );
131    }
132}
133
134impl<'a> VpdpbusdsEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
135    fn vpdpbusds(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
136        self.emit(
137            VPDPBUSDS128RRM,
138            op0.as_operand(),
139            op1.as_operand(),
140            op2.as_operand(),
141            &NOREG,
142        );
143    }
144}
145
146impl<'a> VpdpbusdsEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
147    fn vpdpbusds(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
148        self.emit(
149            VPDPBUSDS256RRR,
150            op0.as_operand(),
151            op1.as_operand(),
152            op2.as_operand(),
153            &NOREG,
154        );
155    }
156}
157
158impl<'a> VpdpbusdsEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
159    fn vpdpbusds(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
160        self.emit(
161            VPDPBUSDS256RRM,
162            op0.as_operand(),
163            op1.as_operand(),
164            op2.as_operand(),
165            &NOREG,
166        );
167    }
168}
169
170impl<'a> VpdpbusdsEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
171    fn vpdpbusds(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
172        self.emit(
173            VPDPBUSDS512RRR,
174            op0.as_operand(),
175            op1.as_operand(),
176            op2.as_operand(),
177            &NOREG,
178        );
179    }
180}
181
182impl<'a> VpdpbusdsEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
183    fn vpdpbusds(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
184        self.emit(
185            VPDPBUSDS512RRM,
186            op0.as_operand(),
187            op1.as_operand(),
188            op2.as_operand(),
189            &NOREG,
190        );
191    }
192}
193
194/// `VPDPBUSDS_MASK`.
195///
196/// Supported operand variants:
197///
198/// ```text
199/// +---+---------------+
200/// | # | Operands      |
201/// +---+---------------+
202/// | 1 | Xmm, Xmm, Mem |
203/// | 2 | Xmm, Xmm, Xmm |
204/// | 3 | Ymm, Ymm, Mem |
205/// | 4 | Ymm, Ymm, Ymm |
206/// | 5 | Zmm, Zmm, Mem |
207/// | 6 | Zmm, Zmm, Zmm |
208/// +---+---------------+
209/// ```
210pub trait VpdpbusdsMaskEmitter<A, B, C> {
211    fn vpdpbusds_mask(&mut self, op0: A, op1: B, op2: C);
212}
213
214impl<'a> VpdpbusdsMaskEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
215    fn vpdpbusds_mask(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
216        self.emit(
217            VPDPBUSDS128RRR_MASK,
218            op0.as_operand(),
219            op1.as_operand(),
220            op2.as_operand(),
221            &NOREG,
222        );
223    }
224}
225
226impl<'a> VpdpbusdsMaskEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
227    fn vpdpbusds_mask(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
228        self.emit(
229            VPDPBUSDS128RRM_MASK,
230            op0.as_operand(),
231            op1.as_operand(),
232            op2.as_operand(),
233            &NOREG,
234        );
235    }
236}
237
238impl<'a> VpdpbusdsMaskEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
239    fn vpdpbusds_mask(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
240        self.emit(
241            VPDPBUSDS256RRR_MASK,
242            op0.as_operand(),
243            op1.as_operand(),
244            op2.as_operand(),
245            &NOREG,
246        );
247    }
248}
249
250impl<'a> VpdpbusdsMaskEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
251    fn vpdpbusds_mask(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
252        self.emit(
253            VPDPBUSDS256RRM_MASK,
254            op0.as_operand(),
255            op1.as_operand(),
256            op2.as_operand(),
257            &NOREG,
258        );
259    }
260}
261
262impl<'a> VpdpbusdsMaskEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
263    fn vpdpbusds_mask(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
264        self.emit(
265            VPDPBUSDS512RRR_MASK,
266            op0.as_operand(),
267            op1.as_operand(),
268            op2.as_operand(),
269            &NOREG,
270        );
271    }
272}
273
274impl<'a> VpdpbusdsMaskEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
275    fn vpdpbusds_mask(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
276        self.emit(
277            VPDPBUSDS512RRM_MASK,
278            op0.as_operand(),
279            op1.as_operand(),
280            op2.as_operand(),
281            &NOREG,
282        );
283    }
284}
285
286/// `VPDPBUSDS_MASKZ`.
287///
288/// Supported operand variants:
289///
290/// ```text
291/// +---+---------------+
292/// | # | Operands      |
293/// +---+---------------+
294/// | 1 | Xmm, Xmm, Mem |
295/// | 2 | Xmm, Xmm, Xmm |
296/// | 3 | Ymm, Ymm, Mem |
297/// | 4 | Ymm, Ymm, Ymm |
298/// | 5 | Zmm, Zmm, Mem |
299/// | 6 | Zmm, Zmm, Zmm |
300/// +---+---------------+
301/// ```
302pub trait VpdpbusdsMaskzEmitter<A, B, C> {
303    fn vpdpbusds_maskz(&mut self, op0: A, op1: B, op2: C);
304}
305
306impl<'a> VpdpbusdsMaskzEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
307    fn vpdpbusds_maskz(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
308        self.emit(
309            VPDPBUSDS128RRR_MASKZ,
310            op0.as_operand(),
311            op1.as_operand(),
312            op2.as_operand(),
313            &NOREG,
314        );
315    }
316}
317
318impl<'a> VpdpbusdsMaskzEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
319    fn vpdpbusds_maskz(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
320        self.emit(
321            VPDPBUSDS128RRM_MASKZ,
322            op0.as_operand(),
323            op1.as_operand(),
324            op2.as_operand(),
325            &NOREG,
326        );
327    }
328}
329
330impl<'a> VpdpbusdsMaskzEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
331    fn vpdpbusds_maskz(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
332        self.emit(
333            VPDPBUSDS256RRR_MASKZ,
334            op0.as_operand(),
335            op1.as_operand(),
336            op2.as_operand(),
337            &NOREG,
338        );
339    }
340}
341
342impl<'a> VpdpbusdsMaskzEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
343    fn vpdpbusds_maskz(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
344        self.emit(
345            VPDPBUSDS256RRM_MASKZ,
346            op0.as_operand(),
347            op1.as_operand(),
348            op2.as_operand(),
349            &NOREG,
350        );
351    }
352}
353
354impl<'a> VpdpbusdsMaskzEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
355    fn vpdpbusds_maskz(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
356        self.emit(
357            VPDPBUSDS512RRR_MASKZ,
358            op0.as_operand(),
359            op1.as_operand(),
360            op2.as_operand(),
361            &NOREG,
362        );
363    }
364}
365
366impl<'a> VpdpbusdsMaskzEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
367    fn vpdpbusds_maskz(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
368        self.emit(
369            VPDPBUSDS512RRM_MASKZ,
370            op0.as_operand(),
371            op1.as_operand(),
372            op2.as_operand(),
373            &NOREG,
374        );
375    }
376}
377
378/// `VPDPBUSD_MASK`.
379///
380/// Supported operand variants:
381///
382/// ```text
383/// +---+---------------+
384/// | # | Operands      |
385/// +---+---------------+
386/// | 1 | Xmm, Xmm, Mem |
387/// | 2 | Xmm, Xmm, Xmm |
388/// | 3 | Ymm, Ymm, Mem |
389/// | 4 | Ymm, Ymm, Ymm |
390/// | 5 | Zmm, Zmm, Mem |
391/// | 6 | Zmm, Zmm, Zmm |
392/// +---+---------------+
393/// ```
394pub trait VpdpbusdMaskEmitter<A, B, C> {
395    fn vpdpbusd_mask(&mut self, op0: A, op1: B, op2: C);
396}
397
398impl<'a> VpdpbusdMaskEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
399    fn vpdpbusd_mask(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
400        self.emit(
401            VPDPBUSD128RRR_MASK,
402            op0.as_operand(),
403            op1.as_operand(),
404            op2.as_operand(),
405            &NOREG,
406        );
407    }
408}
409
410impl<'a> VpdpbusdMaskEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
411    fn vpdpbusd_mask(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
412        self.emit(
413            VPDPBUSD128RRM_MASK,
414            op0.as_operand(),
415            op1.as_operand(),
416            op2.as_operand(),
417            &NOREG,
418        );
419    }
420}
421
422impl<'a> VpdpbusdMaskEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
423    fn vpdpbusd_mask(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
424        self.emit(
425            VPDPBUSD256RRR_MASK,
426            op0.as_operand(),
427            op1.as_operand(),
428            op2.as_operand(),
429            &NOREG,
430        );
431    }
432}
433
434impl<'a> VpdpbusdMaskEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
435    fn vpdpbusd_mask(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
436        self.emit(
437            VPDPBUSD256RRM_MASK,
438            op0.as_operand(),
439            op1.as_operand(),
440            op2.as_operand(),
441            &NOREG,
442        );
443    }
444}
445
446impl<'a> VpdpbusdMaskEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
447    fn vpdpbusd_mask(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
448        self.emit(
449            VPDPBUSD512RRR_MASK,
450            op0.as_operand(),
451            op1.as_operand(),
452            op2.as_operand(),
453            &NOREG,
454        );
455    }
456}
457
458impl<'a> VpdpbusdMaskEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
459    fn vpdpbusd_mask(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
460        self.emit(
461            VPDPBUSD512RRM_MASK,
462            op0.as_operand(),
463            op1.as_operand(),
464            op2.as_operand(),
465            &NOREG,
466        );
467    }
468}
469
470/// `VPDPBUSD_MASKZ`.
471///
472/// Supported operand variants:
473///
474/// ```text
475/// +---+---------------+
476/// | # | Operands      |
477/// +---+---------------+
478/// | 1 | Xmm, Xmm, Mem |
479/// | 2 | Xmm, Xmm, Xmm |
480/// | 3 | Ymm, Ymm, Mem |
481/// | 4 | Ymm, Ymm, Ymm |
482/// | 5 | Zmm, Zmm, Mem |
483/// | 6 | Zmm, Zmm, Zmm |
484/// +---+---------------+
485/// ```
486pub trait VpdpbusdMaskzEmitter<A, B, C> {
487    fn vpdpbusd_maskz(&mut self, op0: A, op1: B, op2: C);
488}
489
490impl<'a> VpdpbusdMaskzEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
491    fn vpdpbusd_maskz(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
492        self.emit(
493            VPDPBUSD128RRR_MASKZ,
494            op0.as_operand(),
495            op1.as_operand(),
496            op2.as_operand(),
497            &NOREG,
498        );
499    }
500}
501
502impl<'a> VpdpbusdMaskzEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
503    fn vpdpbusd_maskz(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
504        self.emit(
505            VPDPBUSD128RRM_MASKZ,
506            op0.as_operand(),
507            op1.as_operand(),
508            op2.as_operand(),
509            &NOREG,
510        );
511    }
512}
513
514impl<'a> VpdpbusdMaskzEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
515    fn vpdpbusd_maskz(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
516        self.emit(
517            VPDPBUSD256RRR_MASKZ,
518            op0.as_operand(),
519            op1.as_operand(),
520            op2.as_operand(),
521            &NOREG,
522        );
523    }
524}
525
526impl<'a> VpdpbusdMaskzEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
527    fn vpdpbusd_maskz(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
528        self.emit(
529            VPDPBUSD256RRM_MASKZ,
530            op0.as_operand(),
531            op1.as_operand(),
532            op2.as_operand(),
533            &NOREG,
534        );
535    }
536}
537
538impl<'a> VpdpbusdMaskzEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
539    fn vpdpbusd_maskz(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
540        self.emit(
541            VPDPBUSD512RRR_MASKZ,
542            op0.as_operand(),
543            op1.as_operand(),
544            op2.as_operand(),
545            &NOREG,
546        );
547    }
548}
549
550impl<'a> VpdpbusdMaskzEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
551    fn vpdpbusd_maskz(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
552        self.emit(
553            VPDPBUSD512RRM_MASKZ,
554            op0.as_operand(),
555            op1.as_operand(),
556            op2.as_operand(),
557            &NOREG,
558        );
559    }
560}
561
562/// `VPDPWSSD`.
563///
564/// Supported operand variants:
565///
566/// ```text
567/// +---+---------------+
568/// | # | Operands      |
569/// +---+---------------+
570/// | 1 | Xmm, Xmm, Mem |
571/// | 2 | Xmm, Xmm, Xmm |
572/// | 3 | Ymm, Ymm, Mem |
573/// | 4 | Ymm, Ymm, Ymm |
574/// | 5 | Zmm, Zmm, Mem |
575/// | 6 | Zmm, Zmm, Zmm |
576/// +---+---------------+
577/// ```
578pub trait VpdpwssdEmitter<A, B, C> {
579    fn vpdpwssd(&mut self, op0: A, op1: B, op2: C);
580}
581
582impl<'a> VpdpwssdEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
583    fn vpdpwssd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
584        self.emit(
585            VPDPWSSD128RRR,
586            op0.as_operand(),
587            op1.as_operand(),
588            op2.as_operand(),
589            &NOREG,
590        );
591    }
592}
593
594impl<'a> VpdpwssdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
595    fn vpdpwssd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
596        self.emit(
597            VPDPWSSD128RRM,
598            op0.as_operand(),
599            op1.as_operand(),
600            op2.as_operand(),
601            &NOREG,
602        );
603    }
604}
605
606impl<'a> VpdpwssdEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
607    fn vpdpwssd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
608        self.emit(
609            VPDPWSSD256RRR,
610            op0.as_operand(),
611            op1.as_operand(),
612            op2.as_operand(),
613            &NOREG,
614        );
615    }
616}
617
618impl<'a> VpdpwssdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
619    fn vpdpwssd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
620        self.emit(
621            VPDPWSSD256RRM,
622            op0.as_operand(),
623            op1.as_operand(),
624            op2.as_operand(),
625            &NOREG,
626        );
627    }
628}
629
630impl<'a> VpdpwssdEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
631    fn vpdpwssd(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
632        self.emit(
633            VPDPWSSD512RRR,
634            op0.as_operand(),
635            op1.as_operand(),
636            op2.as_operand(),
637            &NOREG,
638        );
639    }
640}
641
642impl<'a> VpdpwssdEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
643    fn vpdpwssd(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
644        self.emit(
645            VPDPWSSD512RRM,
646            op0.as_operand(),
647            op1.as_operand(),
648            op2.as_operand(),
649            &NOREG,
650        );
651    }
652}
653
654/// `VPDPWSSDS`.
655///
656/// Supported operand variants:
657///
658/// ```text
659/// +---+---------------+
660/// | # | Operands      |
661/// +---+---------------+
662/// | 1 | Xmm, Xmm, Mem |
663/// | 2 | Xmm, Xmm, Xmm |
664/// | 3 | Ymm, Ymm, Mem |
665/// | 4 | Ymm, Ymm, Ymm |
666/// | 5 | Zmm, Zmm, Mem |
667/// | 6 | Zmm, Zmm, Zmm |
668/// +---+---------------+
669/// ```
670pub trait VpdpwssdsEmitter<A, B, C> {
671    fn vpdpwssds(&mut self, op0: A, op1: B, op2: C);
672}
673
674impl<'a> VpdpwssdsEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
675    fn vpdpwssds(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
676        self.emit(
677            VPDPWSSDS128RRR,
678            op0.as_operand(),
679            op1.as_operand(),
680            op2.as_operand(),
681            &NOREG,
682        );
683    }
684}
685
686impl<'a> VpdpwssdsEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
687    fn vpdpwssds(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
688        self.emit(
689            VPDPWSSDS128RRM,
690            op0.as_operand(),
691            op1.as_operand(),
692            op2.as_operand(),
693            &NOREG,
694        );
695    }
696}
697
698impl<'a> VpdpwssdsEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
699    fn vpdpwssds(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
700        self.emit(
701            VPDPWSSDS256RRR,
702            op0.as_operand(),
703            op1.as_operand(),
704            op2.as_operand(),
705            &NOREG,
706        );
707    }
708}
709
710impl<'a> VpdpwssdsEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
711    fn vpdpwssds(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
712        self.emit(
713            VPDPWSSDS256RRM,
714            op0.as_operand(),
715            op1.as_operand(),
716            op2.as_operand(),
717            &NOREG,
718        );
719    }
720}
721
722impl<'a> VpdpwssdsEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
723    fn vpdpwssds(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
724        self.emit(
725            VPDPWSSDS512RRR,
726            op0.as_operand(),
727            op1.as_operand(),
728            op2.as_operand(),
729            &NOREG,
730        );
731    }
732}
733
734impl<'a> VpdpwssdsEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
735    fn vpdpwssds(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
736        self.emit(
737            VPDPWSSDS512RRM,
738            op0.as_operand(),
739            op1.as_operand(),
740            op2.as_operand(),
741            &NOREG,
742        );
743    }
744}
745
746/// `VPDPWSSDS_MASK`.
747///
748/// Supported operand variants:
749///
750/// ```text
751/// +---+---------------+
752/// | # | Operands      |
753/// +---+---------------+
754/// | 1 | Xmm, Xmm, Mem |
755/// | 2 | Xmm, Xmm, Xmm |
756/// | 3 | Ymm, Ymm, Mem |
757/// | 4 | Ymm, Ymm, Ymm |
758/// | 5 | Zmm, Zmm, Mem |
759/// | 6 | Zmm, Zmm, Zmm |
760/// +---+---------------+
761/// ```
762pub trait VpdpwssdsMaskEmitter<A, B, C> {
763    fn vpdpwssds_mask(&mut self, op0: A, op1: B, op2: C);
764}
765
766impl<'a> VpdpwssdsMaskEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
767    fn vpdpwssds_mask(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
768        self.emit(
769            VPDPWSSDS128RRR_MASK,
770            op0.as_operand(),
771            op1.as_operand(),
772            op2.as_operand(),
773            &NOREG,
774        );
775    }
776}
777
778impl<'a> VpdpwssdsMaskEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
779    fn vpdpwssds_mask(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
780        self.emit(
781            VPDPWSSDS128RRM_MASK,
782            op0.as_operand(),
783            op1.as_operand(),
784            op2.as_operand(),
785            &NOREG,
786        );
787    }
788}
789
790impl<'a> VpdpwssdsMaskEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
791    fn vpdpwssds_mask(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
792        self.emit(
793            VPDPWSSDS256RRR_MASK,
794            op0.as_operand(),
795            op1.as_operand(),
796            op2.as_operand(),
797            &NOREG,
798        );
799    }
800}
801
802impl<'a> VpdpwssdsMaskEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
803    fn vpdpwssds_mask(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
804        self.emit(
805            VPDPWSSDS256RRM_MASK,
806            op0.as_operand(),
807            op1.as_operand(),
808            op2.as_operand(),
809            &NOREG,
810        );
811    }
812}
813
814impl<'a> VpdpwssdsMaskEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
815    fn vpdpwssds_mask(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
816        self.emit(
817            VPDPWSSDS512RRR_MASK,
818            op0.as_operand(),
819            op1.as_operand(),
820            op2.as_operand(),
821            &NOREG,
822        );
823    }
824}
825
826impl<'a> VpdpwssdsMaskEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
827    fn vpdpwssds_mask(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
828        self.emit(
829            VPDPWSSDS512RRM_MASK,
830            op0.as_operand(),
831            op1.as_operand(),
832            op2.as_operand(),
833            &NOREG,
834        );
835    }
836}
837
838/// `VPDPWSSDS_MASKZ`.
839///
840/// Supported operand variants:
841///
842/// ```text
843/// +---+---------------+
844/// | # | Operands      |
845/// +---+---------------+
846/// | 1 | Xmm, Xmm, Mem |
847/// | 2 | Xmm, Xmm, Xmm |
848/// | 3 | Ymm, Ymm, Mem |
849/// | 4 | Ymm, Ymm, Ymm |
850/// | 5 | Zmm, Zmm, Mem |
851/// | 6 | Zmm, Zmm, Zmm |
852/// +---+---------------+
853/// ```
854pub trait VpdpwssdsMaskzEmitter<A, B, C> {
855    fn vpdpwssds_maskz(&mut self, op0: A, op1: B, op2: C);
856}
857
858impl<'a> VpdpwssdsMaskzEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
859    fn vpdpwssds_maskz(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
860        self.emit(
861            VPDPWSSDS128RRR_MASKZ,
862            op0.as_operand(),
863            op1.as_operand(),
864            op2.as_operand(),
865            &NOREG,
866        );
867    }
868}
869
870impl<'a> VpdpwssdsMaskzEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
871    fn vpdpwssds_maskz(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
872        self.emit(
873            VPDPWSSDS128RRM_MASKZ,
874            op0.as_operand(),
875            op1.as_operand(),
876            op2.as_operand(),
877            &NOREG,
878        );
879    }
880}
881
882impl<'a> VpdpwssdsMaskzEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
883    fn vpdpwssds_maskz(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
884        self.emit(
885            VPDPWSSDS256RRR_MASKZ,
886            op0.as_operand(),
887            op1.as_operand(),
888            op2.as_operand(),
889            &NOREG,
890        );
891    }
892}
893
894impl<'a> VpdpwssdsMaskzEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
895    fn vpdpwssds_maskz(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
896        self.emit(
897            VPDPWSSDS256RRM_MASKZ,
898            op0.as_operand(),
899            op1.as_operand(),
900            op2.as_operand(),
901            &NOREG,
902        );
903    }
904}
905
906impl<'a> VpdpwssdsMaskzEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
907    fn vpdpwssds_maskz(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
908        self.emit(
909            VPDPWSSDS512RRR_MASKZ,
910            op0.as_operand(),
911            op1.as_operand(),
912            op2.as_operand(),
913            &NOREG,
914        );
915    }
916}
917
918impl<'a> VpdpwssdsMaskzEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
919    fn vpdpwssds_maskz(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
920        self.emit(
921            VPDPWSSDS512RRM_MASKZ,
922            op0.as_operand(),
923            op1.as_operand(),
924            op2.as_operand(),
925            &NOREG,
926        );
927    }
928}
929
930/// `VPDPWSSD_MASK`.
931///
932/// Supported operand variants:
933///
934/// ```text
935/// +---+---------------+
936/// | # | Operands      |
937/// +---+---------------+
938/// | 1 | Xmm, Xmm, Mem |
939/// | 2 | Xmm, Xmm, Xmm |
940/// | 3 | Ymm, Ymm, Mem |
941/// | 4 | Ymm, Ymm, Ymm |
942/// | 5 | Zmm, Zmm, Mem |
943/// | 6 | Zmm, Zmm, Zmm |
944/// +---+---------------+
945/// ```
946pub trait VpdpwssdMaskEmitter<A, B, C> {
947    fn vpdpwssd_mask(&mut self, op0: A, op1: B, op2: C);
948}
949
950impl<'a> VpdpwssdMaskEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
951    fn vpdpwssd_mask(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
952        self.emit(
953            VPDPWSSD128RRR_MASK,
954            op0.as_operand(),
955            op1.as_operand(),
956            op2.as_operand(),
957            &NOREG,
958        );
959    }
960}
961
962impl<'a> VpdpwssdMaskEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
963    fn vpdpwssd_mask(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
964        self.emit(
965            VPDPWSSD128RRM_MASK,
966            op0.as_operand(),
967            op1.as_operand(),
968            op2.as_operand(),
969            &NOREG,
970        );
971    }
972}
973
974impl<'a> VpdpwssdMaskEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
975    fn vpdpwssd_mask(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
976        self.emit(
977            VPDPWSSD256RRR_MASK,
978            op0.as_operand(),
979            op1.as_operand(),
980            op2.as_operand(),
981            &NOREG,
982        );
983    }
984}
985
986impl<'a> VpdpwssdMaskEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
987    fn vpdpwssd_mask(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
988        self.emit(
989            VPDPWSSD256RRM_MASK,
990            op0.as_operand(),
991            op1.as_operand(),
992            op2.as_operand(),
993            &NOREG,
994        );
995    }
996}
997
998impl<'a> VpdpwssdMaskEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
999    fn vpdpwssd_mask(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
1000        self.emit(
1001            VPDPWSSD512RRR_MASK,
1002            op0.as_operand(),
1003            op1.as_operand(),
1004            op2.as_operand(),
1005            &NOREG,
1006        );
1007    }
1008}
1009
1010impl<'a> VpdpwssdMaskEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
1011    fn vpdpwssd_mask(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
1012        self.emit(
1013            VPDPWSSD512RRM_MASK,
1014            op0.as_operand(),
1015            op1.as_operand(),
1016            op2.as_operand(),
1017            &NOREG,
1018        );
1019    }
1020}
1021
1022/// `VPDPWSSD_MASKZ`.
1023///
1024/// Supported operand variants:
1025///
1026/// ```text
1027/// +---+---------------+
1028/// | # | Operands      |
1029/// +---+---------------+
1030/// | 1 | Xmm, Xmm, Mem |
1031/// | 2 | Xmm, Xmm, Xmm |
1032/// | 3 | Ymm, Ymm, Mem |
1033/// | 4 | Ymm, Ymm, Ymm |
1034/// | 5 | Zmm, Zmm, Mem |
1035/// | 6 | Zmm, Zmm, Zmm |
1036/// +---+---------------+
1037/// ```
1038pub trait VpdpwssdMaskzEmitter<A, B, C> {
1039    fn vpdpwssd_maskz(&mut self, op0: A, op1: B, op2: C);
1040}
1041
1042impl<'a> VpdpwssdMaskzEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
1043    fn vpdpwssd_maskz(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
1044        self.emit(
1045            VPDPWSSD128RRR_MASKZ,
1046            op0.as_operand(),
1047            op1.as_operand(),
1048            op2.as_operand(),
1049            &NOREG,
1050        );
1051    }
1052}
1053
1054impl<'a> VpdpwssdMaskzEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
1055    fn vpdpwssd_maskz(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
1056        self.emit(
1057            VPDPWSSD128RRM_MASKZ,
1058            op0.as_operand(),
1059            op1.as_operand(),
1060            op2.as_operand(),
1061            &NOREG,
1062        );
1063    }
1064}
1065
1066impl<'a> VpdpwssdMaskzEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
1067    fn vpdpwssd_maskz(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
1068        self.emit(
1069            VPDPWSSD256RRR_MASKZ,
1070            op0.as_operand(),
1071            op1.as_operand(),
1072            op2.as_operand(),
1073            &NOREG,
1074        );
1075    }
1076}
1077
1078impl<'a> VpdpwssdMaskzEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
1079    fn vpdpwssd_maskz(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
1080        self.emit(
1081            VPDPWSSD256RRM_MASKZ,
1082            op0.as_operand(),
1083            op1.as_operand(),
1084            op2.as_operand(),
1085            &NOREG,
1086        );
1087    }
1088}
1089
1090impl<'a> VpdpwssdMaskzEmitter<Zmm, Zmm, Zmm> for Assembler<'a> {
1091    fn vpdpwssd_maskz(&mut self, op0: Zmm, op1: Zmm, op2: Zmm) {
1092        self.emit(
1093            VPDPWSSD512RRR_MASKZ,
1094            op0.as_operand(),
1095            op1.as_operand(),
1096            op2.as_operand(),
1097            &NOREG,
1098        );
1099    }
1100}
1101
1102impl<'a> VpdpwssdMaskzEmitter<Zmm, Zmm, Mem> for Assembler<'a> {
1103    fn vpdpwssd_maskz(&mut self, op0: Zmm, op1: Zmm, op2: Mem) {
1104        self.emit(
1105            VPDPWSSD512RRM_MASKZ,
1106            op0.as_operand(),
1107            op1.as_operand(),
1108            op2.as_operand(),
1109            &NOREG,
1110        );
1111    }
1112}
1113
1114impl<'a> Assembler<'a> {
1115    /// `VPDPBUSD`.
1116    ///
1117    /// Supported operand variants:
1118    ///
1119    /// ```text
1120    /// +---+---------------+
1121    /// | # | Operands      |
1122    /// +---+---------------+
1123    /// | 1 | Xmm, Xmm, Mem |
1124    /// | 2 | Xmm, Xmm, Xmm |
1125    /// | 3 | Ymm, Ymm, Mem |
1126    /// | 4 | Ymm, Ymm, Ymm |
1127    /// | 5 | Zmm, Zmm, Mem |
1128    /// | 6 | Zmm, Zmm, Zmm |
1129    /// +---+---------------+
1130    /// ```
1131    #[inline]
1132    pub fn vpdpbusd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1133    where
1134        Assembler<'a>: VpdpbusdEmitter<A, B, C>,
1135    {
1136        <Self as VpdpbusdEmitter<A, B, C>>::vpdpbusd(self, op0, op1, op2);
1137    }
1138    /// `VPDPBUSDS`.
1139    ///
1140    /// Supported operand variants:
1141    ///
1142    /// ```text
1143    /// +---+---------------+
1144    /// | # | Operands      |
1145    /// +---+---------------+
1146    /// | 1 | Xmm, Xmm, Mem |
1147    /// | 2 | Xmm, Xmm, Xmm |
1148    /// | 3 | Ymm, Ymm, Mem |
1149    /// | 4 | Ymm, Ymm, Ymm |
1150    /// | 5 | Zmm, Zmm, Mem |
1151    /// | 6 | Zmm, Zmm, Zmm |
1152    /// +---+---------------+
1153    /// ```
1154    #[inline]
1155    pub fn vpdpbusds<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1156    where
1157        Assembler<'a>: VpdpbusdsEmitter<A, B, C>,
1158    {
1159        <Self as VpdpbusdsEmitter<A, B, C>>::vpdpbusds(self, op0, op1, op2);
1160    }
1161    /// `VPDPBUSDS_MASK`.
1162    ///
1163    /// Supported operand variants:
1164    ///
1165    /// ```text
1166    /// +---+---------------+
1167    /// | # | Operands      |
1168    /// +---+---------------+
1169    /// | 1 | Xmm, Xmm, Mem |
1170    /// | 2 | Xmm, Xmm, Xmm |
1171    /// | 3 | Ymm, Ymm, Mem |
1172    /// | 4 | Ymm, Ymm, Ymm |
1173    /// | 5 | Zmm, Zmm, Mem |
1174    /// | 6 | Zmm, Zmm, Zmm |
1175    /// +---+---------------+
1176    /// ```
1177    #[inline]
1178    pub fn vpdpbusds_mask<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1179    where
1180        Assembler<'a>: VpdpbusdsMaskEmitter<A, B, C>,
1181    {
1182        <Self as VpdpbusdsMaskEmitter<A, B, C>>::vpdpbusds_mask(self, op0, op1, op2);
1183    }
1184    /// `VPDPBUSDS_MASKZ`.
1185    ///
1186    /// Supported operand variants:
1187    ///
1188    /// ```text
1189    /// +---+---------------+
1190    /// | # | Operands      |
1191    /// +---+---------------+
1192    /// | 1 | Xmm, Xmm, Mem |
1193    /// | 2 | Xmm, Xmm, Xmm |
1194    /// | 3 | Ymm, Ymm, Mem |
1195    /// | 4 | Ymm, Ymm, Ymm |
1196    /// | 5 | Zmm, Zmm, Mem |
1197    /// | 6 | Zmm, Zmm, Zmm |
1198    /// +---+---------------+
1199    /// ```
1200    #[inline]
1201    pub fn vpdpbusds_maskz<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1202    where
1203        Assembler<'a>: VpdpbusdsMaskzEmitter<A, B, C>,
1204    {
1205        <Self as VpdpbusdsMaskzEmitter<A, B, C>>::vpdpbusds_maskz(self, op0, op1, op2);
1206    }
1207    /// `VPDPBUSD_MASK`.
1208    ///
1209    /// Supported operand variants:
1210    ///
1211    /// ```text
1212    /// +---+---------------+
1213    /// | # | Operands      |
1214    /// +---+---------------+
1215    /// | 1 | Xmm, Xmm, Mem |
1216    /// | 2 | Xmm, Xmm, Xmm |
1217    /// | 3 | Ymm, Ymm, Mem |
1218    /// | 4 | Ymm, Ymm, Ymm |
1219    /// | 5 | Zmm, Zmm, Mem |
1220    /// | 6 | Zmm, Zmm, Zmm |
1221    /// +---+---------------+
1222    /// ```
1223    #[inline]
1224    pub fn vpdpbusd_mask<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1225    where
1226        Assembler<'a>: VpdpbusdMaskEmitter<A, B, C>,
1227    {
1228        <Self as VpdpbusdMaskEmitter<A, B, C>>::vpdpbusd_mask(self, op0, op1, op2);
1229    }
1230    /// `VPDPBUSD_MASKZ`.
1231    ///
1232    /// Supported operand variants:
1233    ///
1234    /// ```text
1235    /// +---+---------------+
1236    /// | # | Operands      |
1237    /// +---+---------------+
1238    /// | 1 | Xmm, Xmm, Mem |
1239    /// | 2 | Xmm, Xmm, Xmm |
1240    /// | 3 | Ymm, Ymm, Mem |
1241    /// | 4 | Ymm, Ymm, Ymm |
1242    /// | 5 | Zmm, Zmm, Mem |
1243    /// | 6 | Zmm, Zmm, Zmm |
1244    /// +---+---------------+
1245    /// ```
1246    #[inline]
1247    pub fn vpdpbusd_maskz<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1248    where
1249        Assembler<'a>: VpdpbusdMaskzEmitter<A, B, C>,
1250    {
1251        <Self as VpdpbusdMaskzEmitter<A, B, C>>::vpdpbusd_maskz(self, op0, op1, op2);
1252    }
1253    /// `VPDPWSSD`.
1254    ///
1255    /// Supported operand variants:
1256    ///
1257    /// ```text
1258    /// +---+---------------+
1259    /// | # | Operands      |
1260    /// +---+---------------+
1261    /// | 1 | Xmm, Xmm, Mem |
1262    /// | 2 | Xmm, Xmm, Xmm |
1263    /// | 3 | Ymm, Ymm, Mem |
1264    /// | 4 | Ymm, Ymm, Ymm |
1265    /// | 5 | Zmm, Zmm, Mem |
1266    /// | 6 | Zmm, Zmm, Zmm |
1267    /// +---+---------------+
1268    /// ```
1269    #[inline]
1270    pub fn vpdpwssd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1271    where
1272        Assembler<'a>: VpdpwssdEmitter<A, B, C>,
1273    {
1274        <Self as VpdpwssdEmitter<A, B, C>>::vpdpwssd(self, op0, op1, op2);
1275    }
1276    /// `VPDPWSSDS`.
1277    ///
1278    /// Supported operand variants:
1279    ///
1280    /// ```text
1281    /// +---+---------------+
1282    /// | # | Operands      |
1283    /// +---+---------------+
1284    /// | 1 | Xmm, Xmm, Mem |
1285    /// | 2 | Xmm, Xmm, Xmm |
1286    /// | 3 | Ymm, Ymm, Mem |
1287    /// | 4 | Ymm, Ymm, Ymm |
1288    /// | 5 | Zmm, Zmm, Mem |
1289    /// | 6 | Zmm, Zmm, Zmm |
1290    /// +---+---------------+
1291    /// ```
1292    #[inline]
1293    pub fn vpdpwssds<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1294    where
1295        Assembler<'a>: VpdpwssdsEmitter<A, B, C>,
1296    {
1297        <Self as VpdpwssdsEmitter<A, B, C>>::vpdpwssds(self, op0, op1, op2);
1298    }
1299    /// `VPDPWSSDS_MASK`.
1300    ///
1301    /// Supported operand variants:
1302    ///
1303    /// ```text
1304    /// +---+---------------+
1305    /// | # | Operands      |
1306    /// +---+---------------+
1307    /// | 1 | Xmm, Xmm, Mem |
1308    /// | 2 | Xmm, Xmm, Xmm |
1309    /// | 3 | Ymm, Ymm, Mem |
1310    /// | 4 | Ymm, Ymm, Ymm |
1311    /// | 5 | Zmm, Zmm, Mem |
1312    /// | 6 | Zmm, Zmm, Zmm |
1313    /// +---+---------------+
1314    /// ```
1315    #[inline]
1316    pub fn vpdpwssds_mask<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1317    where
1318        Assembler<'a>: VpdpwssdsMaskEmitter<A, B, C>,
1319    {
1320        <Self as VpdpwssdsMaskEmitter<A, B, C>>::vpdpwssds_mask(self, op0, op1, op2);
1321    }
1322    /// `VPDPWSSDS_MASKZ`.
1323    ///
1324    /// Supported operand variants:
1325    ///
1326    /// ```text
1327    /// +---+---------------+
1328    /// | # | Operands      |
1329    /// +---+---------------+
1330    /// | 1 | Xmm, Xmm, Mem |
1331    /// | 2 | Xmm, Xmm, Xmm |
1332    /// | 3 | Ymm, Ymm, Mem |
1333    /// | 4 | Ymm, Ymm, Ymm |
1334    /// | 5 | Zmm, Zmm, Mem |
1335    /// | 6 | Zmm, Zmm, Zmm |
1336    /// +---+---------------+
1337    /// ```
1338    #[inline]
1339    pub fn vpdpwssds_maskz<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1340    where
1341        Assembler<'a>: VpdpwssdsMaskzEmitter<A, B, C>,
1342    {
1343        <Self as VpdpwssdsMaskzEmitter<A, B, C>>::vpdpwssds_maskz(self, op0, op1, op2);
1344    }
1345    /// `VPDPWSSD_MASK`.
1346    ///
1347    /// Supported operand variants:
1348    ///
1349    /// ```text
1350    /// +---+---------------+
1351    /// | # | Operands      |
1352    /// +---+---------------+
1353    /// | 1 | Xmm, Xmm, Mem |
1354    /// | 2 | Xmm, Xmm, Xmm |
1355    /// | 3 | Ymm, Ymm, Mem |
1356    /// | 4 | Ymm, Ymm, Ymm |
1357    /// | 5 | Zmm, Zmm, Mem |
1358    /// | 6 | Zmm, Zmm, Zmm |
1359    /// +---+---------------+
1360    /// ```
1361    #[inline]
1362    pub fn vpdpwssd_mask<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1363    where
1364        Assembler<'a>: VpdpwssdMaskEmitter<A, B, C>,
1365    {
1366        <Self as VpdpwssdMaskEmitter<A, B, C>>::vpdpwssd_mask(self, op0, op1, op2);
1367    }
1368    /// `VPDPWSSD_MASKZ`.
1369    ///
1370    /// Supported operand variants:
1371    ///
1372    /// ```text
1373    /// +---+---------------+
1374    /// | # | Operands      |
1375    /// +---+---------------+
1376    /// | 1 | Xmm, Xmm, Mem |
1377    /// | 2 | Xmm, Xmm, Xmm |
1378    /// | 3 | Ymm, Ymm, Mem |
1379    /// | 4 | Ymm, Ymm, Ymm |
1380    /// | 5 | Zmm, Zmm, Mem |
1381    /// | 6 | Zmm, Zmm, Zmm |
1382    /// +---+---------------+
1383    /// ```
1384    #[inline]
1385    pub fn vpdpwssd_maskz<A, B, C>(&mut self, op0: A, op1: B, op2: C)
1386    where
1387        Assembler<'a>: VpdpwssdMaskzEmitter<A, B, C>,
1388    {
1389        <Self as VpdpwssdMaskzEmitter<A, B, C>>::vpdpwssd_maskz(self, op0, op1, op2);
1390    }
1391}
asmkit/x86/features/AVX512_VNNI.rs

asmkit/x86/features/
AVX512_VNNI.rs
