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asmkit/x86/features/
AVX.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `VADDSUBPD`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+---------------+
16/// | # | Operands      |
17/// +---+---------------+
18/// | 1 | Xmm, Xmm, Mem |
19/// | 2 | Xmm, Xmm, Xmm |
20/// | 3 | Ymm, Ymm, Mem |
21/// | 4 | Ymm, Ymm, Ymm |
22/// +---+---------------+
23/// ```
24pub trait VaddsubpdEmitter<A, B, C> {
25    fn vaddsubpd(&mut self, op0: A, op1: B, op2: C);
26}
27
28impl<'a> VaddsubpdEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
29    fn vaddsubpd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
30        self.emit(
31            VADDSUBPD128RRR,
32            op0.as_operand(),
33            op1.as_operand(),
34            op2.as_operand(),
35            &NOREG,
36        );
37    }
38}
39
40impl<'a> VaddsubpdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
41    fn vaddsubpd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
42        self.emit(
43            VADDSUBPD128RRM,
44            op0.as_operand(),
45            op1.as_operand(),
46            op2.as_operand(),
47            &NOREG,
48        );
49    }
50}
51
52impl<'a> VaddsubpdEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
53    fn vaddsubpd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
54        self.emit(
55            VADDSUBPD256RRR,
56            op0.as_operand(),
57            op1.as_operand(),
58            op2.as_operand(),
59            &NOREG,
60        );
61    }
62}
63
64impl<'a> VaddsubpdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
65    fn vaddsubpd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
66        self.emit(
67            VADDSUBPD256RRM,
68            op0.as_operand(),
69            op1.as_operand(),
70            op2.as_operand(),
71            &NOREG,
72        );
73    }
74}
75
76/// `VADDSUBPS`.
77///
78/// Supported operand variants:
79///
80/// ```text
81/// +---+---------------+
82/// | # | Operands      |
83/// +---+---------------+
84/// | 1 | Xmm, Xmm, Mem |
85/// | 2 | Xmm, Xmm, Xmm |
86/// | 3 | Ymm, Ymm, Mem |
87/// | 4 | Ymm, Ymm, Ymm |
88/// +---+---------------+
89/// ```
90pub trait VaddsubpsEmitter<A, B, C> {
91    fn vaddsubps(&mut self, op0: A, op1: B, op2: C);
92}
93
94impl<'a> VaddsubpsEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
95    fn vaddsubps(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
96        self.emit(
97            VADDSUBPS128RRR,
98            op0.as_operand(),
99            op1.as_operand(),
100            op2.as_operand(),
101            &NOREG,
102        );
103    }
104}
105
106impl<'a> VaddsubpsEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
107    fn vaddsubps(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
108        self.emit(
109            VADDSUBPS128RRM,
110            op0.as_operand(),
111            op1.as_operand(),
112            op2.as_operand(),
113            &NOREG,
114        );
115    }
116}
117
118impl<'a> VaddsubpsEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
119    fn vaddsubps(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
120        self.emit(
121            VADDSUBPS256RRR,
122            op0.as_operand(),
123            op1.as_operand(),
124            op2.as_operand(),
125            &NOREG,
126        );
127    }
128}
129
130impl<'a> VaddsubpsEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
131    fn vaddsubps(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
132        self.emit(
133            VADDSUBPS256RRM,
134            op0.as_operand(),
135            op1.as_operand(),
136            op2.as_operand(),
137            &NOREG,
138        );
139    }
140}
141
142/// `VBLENDPD`.
143///
144/// Supported operand variants:
145///
146/// ```text
147/// +---+--------------------+
148/// | # | Operands           |
149/// +---+--------------------+
150/// | 1 | Xmm, Xmm, Mem, Imm |
151/// | 2 | Xmm, Xmm, Xmm, Imm |
152/// | 3 | Ymm, Ymm, Mem, Imm |
153/// | 4 | Ymm, Ymm, Ymm, Imm |
154/// +---+--------------------+
155/// ```
156pub trait VblendpdEmitter<A, B, C, D> {
157    fn vblendpd(&mut self, op0: A, op1: B, op2: C, op3: D);
158}
159
160impl<'a> VblendpdEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
161    fn vblendpd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
162        self.emit(
163            VBLENDPD128RRRI,
164            op0.as_operand(),
165            op1.as_operand(),
166            op2.as_operand(),
167            op3.as_operand(),
168        );
169    }
170}
171
172impl<'a> VblendpdEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
173    fn vblendpd(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
174        self.emit(
175            VBLENDPD128RRMI,
176            op0.as_operand(),
177            op1.as_operand(),
178            op2.as_operand(),
179            op3.as_operand(),
180        );
181    }
182}
183
184impl<'a> VblendpdEmitter<Ymm, Ymm, Ymm, Imm> for Assembler<'a> {
185    fn vblendpd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Imm) {
186        self.emit(
187            VBLENDPD256RRRI,
188            op0.as_operand(),
189            op1.as_operand(),
190            op2.as_operand(),
191            op3.as_operand(),
192        );
193    }
194}
195
196impl<'a> VblendpdEmitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
197    fn vblendpd(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
198        self.emit(
199            VBLENDPD256RRMI,
200            op0.as_operand(),
201            op1.as_operand(),
202            op2.as_operand(),
203            op3.as_operand(),
204        );
205    }
206}
207
208/// `VBLENDPS`.
209///
210/// Supported operand variants:
211///
212/// ```text
213/// +---+--------------------+
214/// | # | Operands           |
215/// +---+--------------------+
216/// | 1 | Xmm, Xmm, Mem, Imm |
217/// | 2 | Xmm, Xmm, Xmm, Imm |
218/// | 3 | Ymm, Ymm, Mem, Imm |
219/// | 4 | Ymm, Ymm, Ymm, Imm |
220/// +---+--------------------+
221/// ```
222pub trait VblendpsEmitter<A, B, C, D> {
223    fn vblendps(&mut self, op0: A, op1: B, op2: C, op3: D);
224}
225
226impl<'a> VblendpsEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
227    fn vblendps(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
228        self.emit(
229            VBLENDPS128RRRI,
230            op0.as_operand(),
231            op1.as_operand(),
232            op2.as_operand(),
233            op3.as_operand(),
234        );
235    }
236}
237
238impl<'a> VblendpsEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
239    fn vblendps(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
240        self.emit(
241            VBLENDPS128RRMI,
242            op0.as_operand(),
243            op1.as_operand(),
244            op2.as_operand(),
245            op3.as_operand(),
246        );
247    }
248}
249
250impl<'a> VblendpsEmitter<Ymm, Ymm, Ymm, Imm> for Assembler<'a> {
251    fn vblendps(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Imm) {
252        self.emit(
253            VBLENDPS256RRRI,
254            op0.as_operand(),
255            op1.as_operand(),
256            op2.as_operand(),
257            op3.as_operand(),
258        );
259    }
260}
261
262impl<'a> VblendpsEmitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
263    fn vblendps(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
264        self.emit(
265            VBLENDPS256RRMI,
266            op0.as_operand(),
267            op1.as_operand(),
268            op2.as_operand(),
269            op3.as_operand(),
270        );
271    }
272}
273
274/// `VBLENDVPD`.
275///
276/// Supported operand variants:
277///
278/// ```text
279/// +---+--------------------+
280/// | # | Operands           |
281/// +---+--------------------+
282/// | 1 | Xmm, Xmm, Mem, Xmm |
283/// | 2 | Xmm, Xmm, Xmm, Xmm |
284/// | 3 | Ymm, Ymm, Mem, Ymm |
285/// | 4 | Ymm, Ymm, Ymm, Ymm |
286/// +---+--------------------+
287/// ```
288pub trait VblendvpdEmitter<A, B, C, D> {
289    fn vblendvpd(&mut self, op0: A, op1: B, op2: C, op3: D);
290}
291
292impl<'a> VblendvpdEmitter<Xmm, Xmm, Xmm, Xmm> for Assembler<'a> {
293    fn vblendvpd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Xmm) {
294        self.emit(
295            VBLENDVPD128RRRR,
296            op0.as_operand(),
297            op1.as_operand(),
298            op2.as_operand(),
299            op3.as_operand(),
300        );
301    }
302}
303
304impl<'a> VblendvpdEmitter<Xmm, Xmm, Mem, Xmm> for Assembler<'a> {
305    fn vblendvpd(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Xmm) {
306        self.emit(
307            VBLENDVPD128RRMR,
308            op0.as_operand(),
309            op1.as_operand(),
310            op2.as_operand(),
311            op3.as_operand(),
312        );
313    }
314}
315
316impl<'a> VblendvpdEmitter<Ymm, Ymm, Ymm, Ymm> for Assembler<'a> {
317    fn vblendvpd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Ymm) {
318        self.emit(
319            VBLENDVPD256RRRR,
320            op0.as_operand(),
321            op1.as_operand(),
322            op2.as_operand(),
323            op3.as_operand(),
324        );
325    }
326}
327
328impl<'a> VblendvpdEmitter<Ymm, Ymm, Mem, Ymm> for Assembler<'a> {
329    fn vblendvpd(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Ymm) {
330        self.emit(
331            VBLENDVPD256RRMR,
332            op0.as_operand(),
333            op1.as_operand(),
334            op2.as_operand(),
335            op3.as_operand(),
336        );
337    }
338}
339
340/// `VBLENDVPS`.
341///
342/// Supported operand variants:
343///
344/// ```text
345/// +---+--------------------+
346/// | # | Operands           |
347/// +---+--------------------+
348/// | 1 | Xmm, Xmm, Mem, Xmm |
349/// | 2 | Xmm, Xmm, Xmm, Xmm |
350/// | 3 | Ymm, Ymm, Mem, Ymm |
351/// | 4 | Ymm, Ymm, Ymm, Ymm |
352/// +---+--------------------+
353/// ```
354pub trait VblendvpsEmitter<A, B, C, D> {
355    fn vblendvps(&mut self, op0: A, op1: B, op2: C, op3: D);
356}
357
358impl<'a> VblendvpsEmitter<Xmm, Xmm, Xmm, Xmm> for Assembler<'a> {
359    fn vblendvps(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Xmm) {
360        self.emit(
361            VBLENDVPS128RRRR,
362            op0.as_operand(),
363            op1.as_operand(),
364            op2.as_operand(),
365            op3.as_operand(),
366        );
367    }
368}
369
370impl<'a> VblendvpsEmitter<Xmm, Xmm, Mem, Xmm> for Assembler<'a> {
371    fn vblendvps(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Xmm) {
372        self.emit(
373            VBLENDVPS128RRMR,
374            op0.as_operand(),
375            op1.as_operand(),
376            op2.as_operand(),
377            op3.as_operand(),
378        );
379    }
380}
381
382impl<'a> VblendvpsEmitter<Ymm, Ymm, Ymm, Ymm> for Assembler<'a> {
383    fn vblendvps(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Ymm) {
384        self.emit(
385            VBLENDVPS256RRRR,
386            op0.as_operand(),
387            op1.as_operand(),
388            op2.as_operand(),
389            op3.as_operand(),
390        );
391    }
392}
393
394impl<'a> VblendvpsEmitter<Ymm, Ymm, Mem, Ymm> for Assembler<'a> {
395    fn vblendvps(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Ymm) {
396        self.emit(
397            VBLENDVPS256RRMR,
398            op0.as_operand(),
399            op1.as_operand(),
400            op2.as_operand(),
401            op3.as_operand(),
402        );
403    }
404}
405
406/// `VBROADCASTF128`.
407///
408/// Supported operand variants:
409///
410/// ```text
411/// +---+----------+
412/// | # | Operands |
413/// +---+----------+
414/// | 1 | Ymm, Mem |
415/// | 2 | Ymm, Xmm |
416/// +---+----------+
417/// ```
418pub trait Vbroadcastf128Emitter<A, B> {
419    fn vbroadcastf128(&mut self, op0: A, op1: B);
420}
421
422impl<'a> Vbroadcastf128Emitter<Ymm, Xmm> for Assembler<'a> {
423    fn vbroadcastf128(&mut self, op0: Ymm, op1: Xmm) {
424        self.emit(
425            VBROADCASTF128_256RR,
426            op0.as_operand(),
427            op1.as_operand(),
428            &NOREG,
429            &NOREG,
430        );
431    }
432}
433
434impl<'a> Vbroadcastf128Emitter<Ymm, Mem> for Assembler<'a> {
435    fn vbroadcastf128(&mut self, op0: Ymm, op1: Mem) {
436        self.emit(
437            VBROADCASTF128_256RM,
438            op0.as_operand(),
439            op1.as_operand(),
440            &NOREG,
441            &NOREG,
442        );
443    }
444}
445
446/// `VCMPPD`.
447///
448/// Supported operand variants:
449///
450/// ```text
451/// +----+---------------------+
452/// | #  | Operands            |
453/// +----+---------------------+
454/// | 1  | KReg, Xmm, Mem, Imm |
455/// | 2  | KReg, Xmm, Xmm, Imm |
456/// | 3  | KReg, Ymm, Mem, Imm |
457/// | 4  | KReg, Ymm, Ymm, Imm |
458/// | 5  | KReg, Zmm, Mem, Imm |
459/// | 6  | KReg, Zmm, Zmm, Imm |
460/// | 7  | Xmm, Xmm, Mem, Imm  |
461/// | 8  | Xmm, Xmm, Xmm, Imm  |
462/// | 9  | Ymm, Ymm, Mem, Imm  |
463/// | 10 | Ymm, Ymm, Ymm, Imm  |
464/// +----+---------------------+
465/// ```
466pub trait VcmppdEmitter<A, B, C, D> {
467    fn vcmppd(&mut self, op0: A, op1: B, op2: C, op3: D);
468}
469
470impl<'a> VcmppdEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
471    fn vcmppd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
472        self.emit(
473            VCMPPD128RRRI,
474            op0.as_operand(),
475            op1.as_operand(),
476            op2.as_operand(),
477            op3.as_operand(),
478        );
479    }
480}
481
482impl<'a> VcmppdEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
483    fn vcmppd(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
484        self.emit(
485            VCMPPD128RRMI,
486            op0.as_operand(),
487            op1.as_operand(),
488            op2.as_operand(),
489            op3.as_operand(),
490        );
491    }
492}
493
494impl<'a> VcmppdEmitter<Ymm, Ymm, Ymm, Imm> for Assembler<'a> {
495    fn vcmppd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Imm) {
496        self.emit(
497            VCMPPD256RRRI,
498            op0.as_operand(),
499            op1.as_operand(),
500            op2.as_operand(),
501            op3.as_operand(),
502        );
503    }
504}
505
506impl<'a> VcmppdEmitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
507    fn vcmppd(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
508        self.emit(
509            VCMPPD256RRMI,
510            op0.as_operand(),
511            op1.as_operand(),
512            op2.as_operand(),
513            op3.as_operand(),
514        );
515    }
516}
517
518impl<'a> VcmppdEmitter<KReg, Xmm, Xmm, Imm> for Assembler<'a> {
519    fn vcmppd(&mut self, op0: KReg, op1: Xmm, op2: Xmm, op3: Imm) {
520        self.emit(
521            VCMPPD128KRRI,
522            op0.as_operand(),
523            op1.as_operand(),
524            op2.as_operand(),
525            op3.as_operand(),
526        );
527    }
528}
529
530impl<'a> VcmppdEmitter<KReg, Xmm, Mem, Imm> for Assembler<'a> {
531    fn vcmppd(&mut self, op0: KReg, op1: Xmm, op2: Mem, op3: Imm) {
532        self.emit(
533            VCMPPD128KRMI,
534            op0.as_operand(),
535            op1.as_operand(),
536            op2.as_operand(),
537            op3.as_operand(),
538        );
539    }
540}
541
542impl<'a> VcmppdEmitter<KReg, Ymm, Ymm, Imm> for Assembler<'a> {
543    fn vcmppd(&mut self, op0: KReg, op1: Ymm, op2: Ymm, op3: Imm) {
544        self.emit(
545            VCMPPD256KRRI,
546            op0.as_operand(),
547            op1.as_operand(),
548            op2.as_operand(),
549            op3.as_operand(),
550        );
551    }
552}
553
554impl<'a> VcmppdEmitter<KReg, Ymm, Mem, Imm> for Assembler<'a> {
555    fn vcmppd(&mut self, op0: KReg, op1: Ymm, op2: Mem, op3: Imm) {
556        self.emit(
557            VCMPPD256KRMI,
558            op0.as_operand(),
559            op1.as_operand(),
560            op2.as_operand(),
561            op3.as_operand(),
562        );
563    }
564}
565
566impl<'a> VcmppdEmitter<KReg, Zmm, Zmm, Imm> for Assembler<'a> {
567    fn vcmppd(&mut self, op0: KReg, op1: Zmm, op2: Zmm, op3: Imm) {
568        self.emit(
569            VCMPPD512KRRI,
570            op0.as_operand(),
571            op1.as_operand(),
572            op2.as_operand(),
573            op3.as_operand(),
574        );
575    }
576}
577
578impl<'a> VcmppdEmitter<KReg, Zmm, Mem, Imm> for Assembler<'a> {
579    fn vcmppd(&mut self, op0: KReg, op1: Zmm, op2: Mem, op3: Imm) {
580        self.emit(
581            VCMPPD512KRMI,
582            op0.as_operand(),
583            op1.as_operand(),
584            op2.as_operand(),
585            op3.as_operand(),
586        );
587    }
588}
589
590/// `VCMPPS`.
591///
592/// Supported operand variants:
593///
594/// ```text
595/// +----+---------------------+
596/// | #  | Operands            |
597/// +----+---------------------+
598/// | 1  | KReg, Xmm, Mem, Imm |
599/// | 2  | KReg, Xmm, Xmm, Imm |
600/// | 3  | KReg, Ymm, Mem, Imm |
601/// | 4  | KReg, Ymm, Ymm, Imm |
602/// | 5  | KReg, Zmm, Mem, Imm |
603/// | 6  | KReg, Zmm, Zmm, Imm |
604/// | 7  | Xmm, Xmm, Mem, Imm  |
605/// | 8  | Xmm, Xmm, Xmm, Imm  |
606/// | 9  | Ymm, Ymm, Mem, Imm  |
607/// | 10 | Ymm, Ymm, Ymm, Imm  |
608/// +----+---------------------+
609/// ```
610pub trait VcmppsEmitter<A, B, C, D> {
611    fn vcmpps(&mut self, op0: A, op1: B, op2: C, op3: D);
612}
613
614impl<'a> VcmppsEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
615    fn vcmpps(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
616        self.emit(
617            VCMPPS128RRRI,
618            op0.as_operand(),
619            op1.as_operand(),
620            op2.as_operand(),
621            op3.as_operand(),
622        );
623    }
624}
625
626impl<'a> VcmppsEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
627    fn vcmpps(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
628        self.emit(
629            VCMPPS128RRMI,
630            op0.as_operand(),
631            op1.as_operand(),
632            op2.as_operand(),
633            op3.as_operand(),
634        );
635    }
636}
637
638impl<'a> VcmppsEmitter<Ymm, Ymm, Ymm, Imm> for Assembler<'a> {
639    fn vcmpps(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Imm) {
640        self.emit(
641            VCMPPS256RRRI,
642            op0.as_operand(),
643            op1.as_operand(),
644            op2.as_operand(),
645            op3.as_operand(),
646        );
647    }
648}
649
650impl<'a> VcmppsEmitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
651    fn vcmpps(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
652        self.emit(
653            VCMPPS256RRMI,
654            op0.as_operand(),
655            op1.as_operand(),
656            op2.as_operand(),
657            op3.as_operand(),
658        );
659    }
660}
661
662impl<'a> VcmppsEmitter<KReg, Xmm, Xmm, Imm> for Assembler<'a> {
663    fn vcmpps(&mut self, op0: KReg, op1: Xmm, op2: Xmm, op3: Imm) {
664        self.emit(
665            VCMPPS128KRRI,
666            op0.as_operand(),
667            op1.as_operand(),
668            op2.as_operand(),
669            op3.as_operand(),
670        );
671    }
672}
673
674impl<'a> VcmppsEmitter<KReg, Xmm, Mem, Imm> for Assembler<'a> {
675    fn vcmpps(&mut self, op0: KReg, op1: Xmm, op2: Mem, op3: Imm) {
676        self.emit(
677            VCMPPS128KRMI,
678            op0.as_operand(),
679            op1.as_operand(),
680            op2.as_operand(),
681            op3.as_operand(),
682        );
683    }
684}
685
686impl<'a> VcmppsEmitter<KReg, Ymm, Ymm, Imm> for Assembler<'a> {
687    fn vcmpps(&mut self, op0: KReg, op1: Ymm, op2: Ymm, op3: Imm) {
688        self.emit(
689            VCMPPS256KRRI,
690            op0.as_operand(),
691            op1.as_operand(),
692            op2.as_operand(),
693            op3.as_operand(),
694        );
695    }
696}
697
698impl<'a> VcmppsEmitter<KReg, Ymm, Mem, Imm> for Assembler<'a> {
699    fn vcmpps(&mut self, op0: KReg, op1: Ymm, op2: Mem, op3: Imm) {
700        self.emit(
701            VCMPPS256KRMI,
702            op0.as_operand(),
703            op1.as_operand(),
704            op2.as_operand(),
705            op3.as_operand(),
706        );
707    }
708}
709
710impl<'a> VcmppsEmitter<KReg, Zmm, Zmm, Imm> for Assembler<'a> {
711    fn vcmpps(&mut self, op0: KReg, op1: Zmm, op2: Zmm, op3: Imm) {
712        self.emit(
713            VCMPPS512KRRI,
714            op0.as_operand(),
715            op1.as_operand(),
716            op2.as_operand(),
717            op3.as_operand(),
718        );
719    }
720}
721
722impl<'a> VcmppsEmitter<KReg, Zmm, Mem, Imm> for Assembler<'a> {
723    fn vcmpps(&mut self, op0: KReg, op1: Zmm, op2: Mem, op3: Imm) {
724        self.emit(
725            VCMPPS512KRMI,
726            op0.as_operand(),
727            op1.as_operand(),
728            op2.as_operand(),
729            op3.as_operand(),
730        );
731    }
732}
733
734/// `VCMPSD`.
735///
736/// Supported operand variants:
737///
738/// ```text
739/// +---+---------------------+
740/// | # | Operands            |
741/// +---+---------------------+
742/// | 1 | KReg, Xmm, Mem, Imm |
743/// | 2 | KReg, Xmm, Xmm, Imm |
744/// | 3 | Xmm, Xmm, Mem, Imm  |
745/// | 4 | Xmm, Xmm, Xmm, Imm  |
746/// +---+---------------------+
747/// ```
748pub trait VcmpsdEmitter<A, B, C, D> {
749    fn vcmpsd(&mut self, op0: A, op1: B, op2: C, op3: D);
750}
751
752impl<'a> VcmpsdEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
753    fn vcmpsd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
754        self.emit(
755            VCMPSDRRRI,
756            op0.as_operand(),
757            op1.as_operand(),
758            op2.as_operand(),
759            op3.as_operand(),
760        );
761    }
762}
763
764impl<'a> VcmpsdEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
765    fn vcmpsd(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
766        self.emit(
767            VCMPSDRRMI,
768            op0.as_operand(),
769            op1.as_operand(),
770            op2.as_operand(),
771            op3.as_operand(),
772        );
773    }
774}
775
776impl<'a> VcmpsdEmitter<KReg, Xmm, Xmm, Imm> for Assembler<'a> {
777    fn vcmpsd(&mut self, op0: KReg, op1: Xmm, op2: Xmm, op3: Imm) {
778        self.emit(
779            VCMPSDKRRI,
780            op0.as_operand(),
781            op1.as_operand(),
782            op2.as_operand(),
783            op3.as_operand(),
784        );
785    }
786}
787
788impl<'a> VcmpsdEmitter<KReg, Xmm, Mem, Imm> for Assembler<'a> {
789    fn vcmpsd(&mut self, op0: KReg, op1: Xmm, op2: Mem, op3: Imm) {
790        self.emit(
791            VCMPSDKRMI,
792            op0.as_operand(),
793            op1.as_operand(),
794            op2.as_operand(),
795            op3.as_operand(),
796        );
797    }
798}
799
800/// `VCMPSS`.
801///
802/// Supported operand variants:
803///
804/// ```text
805/// +---+---------------------+
806/// | # | Operands            |
807/// +---+---------------------+
808/// | 1 | KReg, Xmm, Mem, Imm |
809/// | 2 | KReg, Xmm, Xmm, Imm |
810/// | 3 | Xmm, Xmm, Mem, Imm  |
811/// | 4 | Xmm, Xmm, Xmm, Imm  |
812/// +---+---------------------+
813/// ```
814pub trait VcmpssEmitter<A, B, C, D> {
815    fn vcmpss(&mut self, op0: A, op1: B, op2: C, op3: D);
816}
817
818impl<'a> VcmpssEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
819    fn vcmpss(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
820        self.emit(
821            VCMPSSRRRI,
822            op0.as_operand(),
823            op1.as_operand(),
824            op2.as_operand(),
825            op3.as_operand(),
826        );
827    }
828}
829
830impl<'a> VcmpssEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
831    fn vcmpss(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
832        self.emit(
833            VCMPSSRRMI,
834            op0.as_operand(),
835            op1.as_operand(),
836            op2.as_operand(),
837            op3.as_operand(),
838        );
839    }
840}
841
842impl<'a> VcmpssEmitter<KReg, Xmm, Xmm, Imm> for Assembler<'a> {
843    fn vcmpss(&mut self, op0: KReg, op1: Xmm, op2: Xmm, op3: Imm) {
844        self.emit(
845            VCMPSSKRRI,
846            op0.as_operand(),
847            op1.as_operand(),
848            op2.as_operand(),
849            op3.as_operand(),
850        );
851    }
852}
853
854impl<'a> VcmpssEmitter<KReg, Xmm, Mem, Imm> for Assembler<'a> {
855    fn vcmpss(&mut self, op0: KReg, op1: Xmm, op2: Mem, op3: Imm) {
856        self.emit(
857            VCMPSSKRMI,
858            op0.as_operand(),
859            op1.as_operand(),
860            op2.as_operand(),
861            op3.as_operand(),
862        );
863    }
864}
865
866/// `VDPPD`.
867///
868/// Supported operand variants:
869///
870/// ```text
871/// +---+--------------------+
872/// | # | Operands           |
873/// +---+--------------------+
874/// | 1 | Xmm, Xmm, Mem, Imm |
875/// | 2 | Xmm, Xmm, Xmm, Imm |
876/// +---+--------------------+
877/// ```
878pub trait VdppdEmitter<A, B, C, D> {
879    fn vdppd(&mut self, op0: A, op1: B, op2: C, op3: D);
880}
881
882impl<'a> VdppdEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
883    fn vdppd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
884        self.emit(
885            VDPPD128RRRI,
886            op0.as_operand(),
887            op1.as_operand(),
888            op2.as_operand(),
889            op3.as_operand(),
890        );
891    }
892}
893
894impl<'a> VdppdEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
895    fn vdppd(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
896        self.emit(
897            VDPPD128RRMI,
898            op0.as_operand(),
899            op1.as_operand(),
900            op2.as_operand(),
901            op3.as_operand(),
902        );
903    }
904}
905
906/// `VDPPS`.
907///
908/// Supported operand variants:
909///
910/// ```text
911/// +---+--------------------+
912/// | # | Operands           |
913/// +---+--------------------+
914/// | 1 | Xmm, Xmm, Mem, Imm |
915/// | 2 | Xmm, Xmm, Xmm, Imm |
916/// | 3 | Ymm, Ymm, Mem, Imm |
917/// | 4 | Ymm, Ymm, Ymm, Imm |
918/// +---+--------------------+
919/// ```
920pub trait VdppsEmitter<A, B, C, D> {
921    fn vdpps(&mut self, op0: A, op1: B, op2: C, op3: D);
922}
923
924impl<'a> VdppsEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
925    fn vdpps(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
926        self.emit(
927            VDPPS128RRRI,
928            op0.as_operand(),
929            op1.as_operand(),
930            op2.as_operand(),
931            op3.as_operand(),
932        );
933    }
934}
935
936impl<'a> VdppsEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
937    fn vdpps(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
938        self.emit(
939            VDPPS128RRMI,
940            op0.as_operand(),
941            op1.as_operand(),
942            op2.as_operand(),
943            op3.as_operand(),
944        );
945    }
946}
947
948impl<'a> VdppsEmitter<Ymm, Ymm, Ymm, Imm> for Assembler<'a> {
949    fn vdpps(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Imm) {
950        self.emit(
951            VDPPS256RRRI,
952            op0.as_operand(),
953            op1.as_operand(),
954            op2.as_operand(),
955            op3.as_operand(),
956        );
957    }
958}
959
960impl<'a> VdppsEmitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
961    fn vdpps(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
962        self.emit(
963            VDPPS256RRMI,
964            op0.as_operand(),
965            op1.as_operand(),
966            op2.as_operand(),
967            op3.as_operand(),
968        );
969    }
970}
971
972/// `VEXTRACTF128`.
973///
974/// Supported operand variants:
975///
976/// ```text
977/// +---+---------------+
978/// | # | Operands      |
979/// +---+---------------+
980/// | 1 | Mem, Ymm, Imm |
981/// | 2 | Xmm, Ymm, Imm |
982/// +---+---------------+
983/// ```
984pub trait Vextractf128Emitter<A, B, C> {
985    fn vextractf128(&mut self, op0: A, op1: B, op2: C);
986}
987
988impl<'a> Vextractf128Emitter<Xmm, Ymm, Imm> for Assembler<'a> {
989    fn vextractf128(&mut self, op0: Xmm, op1: Ymm, op2: Imm) {
990        self.emit(
991            VEXTRACTF128RRI,
992            op0.as_operand(),
993            op1.as_operand(),
994            op2.as_operand(),
995            &NOREG,
996        );
997    }
998}
999
1000impl<'a> Vextractf128Emitter<Mem, Ymm, Imm> for Assembler<'a> {
1001    fn vextractf128(&mut self, op0: Mem, op1: Ymm, op2: Imm) {
1002        self.emit(
1003            VEXTRACTF128MRI,
1004            op0.as_operand(),
1005            op1.as_operand(),
1006            op2.as_operand(),
1007            &NOREG,
1008        );
1009    }
1010}
1011
1012/// `VHADDPD`.
1013///
1014/// Supported operand variants:
1015///
1016/// ```text
1017/// +---+---------------+
1018/// | # | Operands      |
1019/// +---+---------------+
1020/// | 1 | Xmm, Xmm, Mem |
1021/// | 2 | Xmm, Xmm, Xmm |
1022/// | 3 | Ymm, Ymm, Mem |
1023/// | 4 | Ymm, Ymm, Ymm |
1024/// +---+---------------+
1025/// ```
1026pub trait VhaddpdEmitter<A, B, C> {
1027    fn vhaddpd(&mut self, op0: A, op1: B, op2: C);
1028}
1029
1030impl<'a> VhaddpdEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
1031    fn vhaddpd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
1032        self.emit(
1033            VHADDPD128RRR,
1034            op0.as_operand(),
1035            op1.as_operand(),
1036            op2.as_operand(),
1037            &NOREG,
1038        );
1039    }
1040}
1041
1042impl<'a> VhaddpdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
1043    fn vhaddpd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
1044        self.emit(
1045            VHADDPD128RRM,
1046            op0.as_operand(),
1047            op1.as_operand(),
1048            op2.as_operand(),
1049            &NOREG,
1050        );
1051    }
1052}
1053
1054impl<'a> VhaddpdEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
1055    fn vhaddpd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
1056        self.emit(
1057            VHADDPD256RRR,
1058            op0.as_operand(),
1059            op1.as_operand(),
1060            op2.as_operand(),
1061            &NOREG,
1062        );
1063    }
1064}
1065
1066impl<'a> VhaddpdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
1067    fn vhaddpd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
1068        self.emit(
1069            VHADDPD256RRM,
1070            op0.as_operand(),
1071            op1.as_operand(),
1072            op2.as_operand(),
1073            &NOREG,
1074        );
1075    }
1076}
1077
1078/// `VHADDPS`.
1079///
1080/// Supported operand variants:
1081///
1082/// ```text
1083/// +---+---------------+
1084/// | # | Operands      |
1085/// +---+---------------+
1086/// | 1 | Xmm, Xmm, Mem |
1087/// | 2 | Xmm, Xmm, Xmm |
1088/// | 3 | Ymm, Ymm, Mem |
1089/// | 4 | Ymm, Ymm, Ymm |
1090/// +---+---------------+
1091/// ```
1092pub trait VhaddpsEmitter<A, B, C> {
1093    fn vhaddps(&mut self, op0: A, op1: B, op2: C);
1094}
1095
1096impl<'a> VhaddpsEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
1097    fn vhaddps(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
1098        self.emit(
1099            VHADDPS128RRR,
1100            op0.as_operand(),
1101            op1.as_operand(),
1102            op2.as_operand(),
1103            &NOREG,
1104        );
1105    }
1106}
1107
1108impl<'a> VhaddpsEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
1109    fn vhaddps(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
1110        self.emit(
1111            VHADDPS128RRM,
1112            op0.as_operand(),
1113            op1.as_operand(),
1114            op2.as_operand(),
1115            &NOREG,
1116        );
1117    }
1118}
1119
1120impl<'a> VhaddpsEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
1121    fn vhaddps(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
1122        self.emit(
1123            VHADDPS256RRR,
1124            op0.as_operand(),
1125            op1.as_operand(),
1126            op2.as_operand(),
1127            &NOREG,
1128        );
1129    }
1130}
1131
1132impl<'a> VhaddpsEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
1133    fn vhaddps(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
1134        self.emit(
1135            VHADDPS256RRM,
1136            op0.as_operand(),
1137            op1.as_operand(),
1138            op2.as_operand(),
1139            &NOREG,
1140        );
1141    }
1142}
1143
1144/// `VHSUBPD`.
1145///
1146/// Supported operand variants:
1147///
1148/// ```text
1149/// +---+---------------+
1150/// | # | Operands      |
1151/// +---+---------------+
1152/// | 1 | Xmm, Xmm, Mem |
1153/// | 2 | Xmm, Xmm, Xmm |
1154/// | 3 | Ymm, Ymm, Mem |
1155/// | 4 | Ymm, Ymm, Ymm |
1156/// +---+---------------+
1157/// ```
1158pub trait VhsubpdEmitter<A, B, C> {
1159    fn vhsubpd(&mut self, op0: A, op1: B, op2: C);
1160}
1161
1162impl<'a> VhsubpdEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
1163    fn vhsubpd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
1164        self.emit(
1165            VHSUBPD128RRR,
1166            op0.as_operand(),
1167            op1.as_operand(),
1168            op2.as_operand(),
1169            &NOREG,
1170        );
1171    }
1172}
1173
1174impl<'a> VhsubpdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
1175    fn vhsubpd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
1176        self.emit(
1177            VHSUBPD128RRM,
1178            op0.as_operand(),
1179            op1.as_operand(),
1180            op2.as_operand(),
1181            &NOREG,
1182        );
1183    }
1184}
1185
1186impl<'a> VhsubpdEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
1187    fn vhsubpd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
1188        self.emit(
1189            VHSUBPD256RRR,
1190            op0.as_operand(),
1191            op1.as_operand(),
1192            op2.as_operand(),
1193            &NOREG,
1194        );
1195    }
1196}
1197
1198impl<'a> VhsubpdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
1199    fn vhsubpd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
1200        self.emit(
1201            VHSUBPD256RRM,
1202            op0.as_operand(),
1203            op1.as_operand(),
1204            op2.as_operand(),
1205            &NOREG,
1206        );
1207    }
1208}
1209
1210/// `VHSUBPS`.
1211///
1212/// Supported operand variants:
1213///
1214/// ```text
1215/// +---+---------------+
1216/// | # | Operands      |
1217/// +---+---------------+
1218/// | 1 | Xmm, Xmm, Mem |
1219/// | 2 | Xmm, Xmm, Xmm |
1220/// | 3 | Ymm, Ymm, Mem |
1221/// | 4 | Ymm, Ymm, Ymm |
1222/// +---+---------------+
1223/// ```
1224pub trait VhsubpsEmitter<A, B, C> {
1225    fn vhsubps(&mut self, op0: A, op1: B, op2: C);
1226}
1227
1228impl<'a> VhsubpsEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
1229    fn vhsubps(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
1230        self.emit(
1231            VHSUBPS128RRR,
1232            op0.as_operand(),
1233            op1.as_operand(),
1234            op2.as_operand(),
1235            &NOREG,
1236        );
1237    }
1238}
1239
1240impl<'a> VhsubpsEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
1241    fn vhsubps(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
1242        self.emit(
1243            VHSUBPS128RRM,
1244            op0.as_operand(),
1245            op1.as_operand(),
1246            op2.as_operand(),
1247            &NOREG,
1248        );
1249    }
1250}
1251
1252impl<'a> VhsubpsEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
1253    fn vhsubps(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
1254        self.emit(
1255            VHSUBPS256RRR,
1256            op0.as_operand(),
1257            op1.as_operand(),
1258            op2.as_operand(),
1259            &NOREG,
1260        );
1261    }
1262}
1263
1264impl<'a> VhsubpsEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
1265    fn vhsubps(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
1266        self.emit(
1267            VHSUBPS256RRM,
1268            op0.as_operand(),
1269            op1.as_operand(),
1270            op2.as_operand(),
1271            &NOREG,
1272        );
1273    }
1274}
1275
1276/// `VINSERTF128`.
1277///
1278/// Supported operand variants:
1279///
1280/// ```text
1281/// +---+--------------------+
1282/// | # | Operands           |
1283/// +---+--------------------+
1284/// | 1 | Ymm, Ymm, Mem, Imm |
1285/// | 2 | Ymm, Ymm, Xmm, Imm |
1286/// +---+--------------------+
1287/// ```
1288pub trait Vinsertf128Emitter<A, B, C, D> {
1289    fn vinsertf128(&mut self, op0: A, op1: B, op2: C, op3: D);
1290}
1291
1292impl<'a> Vinsertf128Emitter<Ymm, Ymm, Xmm, Imm> for Assembler<'a> {
1293    fn vinsertf128(&mut self, op0: Ymm, op1: Ymm, op2: Xmm, op3: Imm) {
1294        self.emit(
1295            VINSERTF128RRRI,
1296            op0.as_operand(),
1297            op1.as_operand(),
1298            op2.as_operand(),
1299            op3.as_operand(),
1300        );
1301    }
1302}
1303
1304impl<'a> Vinsertf128Emitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
1305    fn vinsertf128(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
1306        self.emit(
1307            VINSERTF128RRMI,
1308            op0.as_operand(),
1309            op1.as_operand(),
1310            op2.as_operand(),
1311            op3.as_operand(),
1312        );
1313    }
1314}
1315
1316/// `VLDDQU`.
1317///
1318/// Supported operand variants:
1319///
1320/// ```text
1321/// +---+----------+
1322/// | # | Operands |
1323/// +---+----------+
1324/// | 1 | Xmm, Mem |
1325/// | 2 | Ymm, Mem |
1326/// +---+----------+
1327/// ```
1328pub trait VlddquEmitter<A, B> {
1329    fn vlddqu(&mut self, op0: A, op1: B);
1330}
1331
1332impl<'a> VlddquEmitter<Xmm, Mem> for Assembler<'a> {
1333    fn vlddqu(&mut self, op0: Xmm, op1: Mem) {
1334        self.emit(
1335            VLDDQU128RM,
1336            op0.as_operand(),
1337            op1.as_operand(),
1338            &NOREG,
1339            &NOREG,
1340        );
1341    }
1342}
1343
1344impl<'a> VlddquEmitter<Ymm, Mem> for Assembler<'a> {
1345    fn vlddqu(&mut self, op0: Ymm, op1: Mem) {
1346        self.emit(
1347            VLDDQU256RM,
1348            op0.as_operand(),
1349            op1.as_operand(),
1350            &NOREG,
1351            &NOREG,
1352        );
1353    }
1354}
1355
1356/// `VLDMXCSR`.
1357///
1358/// Supported operand variants:
1359///
1360/// ```text
1361/// +---+----------+
1362/// | # | Operands |
1363/// +---+----------+
1364/// | 1 | Mem      |
1365/// +---+----------+
1366/// ```
1367pub trait VldmxcsrEmitter<A> {
1368    fn vldmxcsr(&mut self, op0: A);
1369}
1370
1371impl<'a> VldmxcsrEmitter<Mem> for Assembler<'a> {
1372    fn vldmxcsr(&mut self, op0: Mem) {
1373        self.emit(VLDMXCSRM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
1374    }
1375}
1376
1377/// `VMASKMOVDQU`.
1378///
1379/// Supported operand variants:
1380///
1381/// ```text
1382/// +---+----------+
1383/// | # | Operands |
1384/// +---+----------+
1385/// | 1 | Xmm, Xmm |
1386/// +---+----------+
1387/// ```
1388pub trait VmaskmovdquEmitter<A, B> {
1389    fn vmaskmovdqu(&mut self, op0: A, op1: B);
1390}
1391
1392impl<'a> VmaskmovdquEmitter<Xmm, Xmm> for Assembler<'a> {
1393    fn vmaskmovdqu(&mut self, op0: Xmm, op1: Xmm) {
1394        self.emit(
1395            VMASKMOVDQU128RR,
1396            op0.as_operand(),
1397            op1.as_operand(),
1398            &NOREG,
1399            &NOREG,
1400        );
1401    }
1402}
1403
1404/// `VMASKMOVPD`.
1405///
1406/// Supported operand variants:
1407///
1408/// ```text
1409/// +---+---------------+
1410/// | # | Operands      |
1411/// +---+---------------+
1412/// | 1 | Mem, Xmm, Xmm |
1413/// | 2 | Mem, Ymm, Ymm |
1414/// | 3 | Xmm, Xmm, Mem |
1415/// | 4 | Ymm, Ymm, Mem |
1416/// +---+---------------+
1417/// ```
1418pub trait VmaskmovpdEmitter<A, B, C> {
1419    fn vmaskmovpd(&mut self, op0: A, op1: B, op2: C);
1420}
1421
1422impl<'a> VmaskmovpdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
1423    fn vmaskmovpd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
1424        self.emit(
1425            VMASKMOVPD128RRM,
1426            op0.as_operand(),
1427            op1.as_operand(),
1428            op2.as_operand(),
1429            &NOREG,
1430        );
1431    }
1432}
1433
1434impl<'a> VmaskmovpdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
1435    fn vmaskmovpd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
1436        self.emit(
1437            VMASKMOVPD256RRM,
1438            op0.as_operand(),
1439            op1.as_operand(),
1440            op2.as_operand(),
1441            &NOREG,
1442        );
1443    }
1444}
1445
1446impl<'a> VmaskmovpdEmitter<Mem, Xmm, Xmm> for Assembler<'a> {
1447    fn vmaskmovpd(&mut self, op0: Mem, op1: Xmm, op2: Xmm) {
1448        self.emit(
1449            VMASKMOVPD128MRR,
1450            op0.as_operand(),
1451            op1.as_operand(),
1452            op2.as_operand(),
1453            &NOREG,
1454        );
1455    }
1456}
1457
1458impl<'a> VmaskmovpdEmitter<Mem, Ymm, Ymm> for Assembler<'a> {
1459    fn vmaskmovpd(&mut self, op0: Mem, op1: Ymm, op2: Ymm) {
1460        self.emit(
1461            VMASKMOVPD256MRR,
1462            op0.as_operand(),
1463            op1.as_operand(),
1464            op2.as_operand(),
1465            &NOREG,
1466        );
1467    }
1468}
1469
1470/// `VMASKMOVPS`.
1471///
1472/// Supported operand variants:
1473///
1474/// ```text
1475/// +---+---------------+
1476/// | # | Operands      |
1477/// +---+---------------+
1478/// | 1 | Mem, Xmm, Xmm |
1479/// | 2 | Mem, Ymm, Ymm |
1480/// | 3 | Xmm, Xmm, Mem |
1481/// | 4 | Ymm, Ymm, Mem |
1482/// +---+---------------+
1483/// ```
1484pub trait VmaskmovpsEmitter<A, B, C> {
1485    fn vmaskmovps(&mut self, op0: A, op1: B, op2: C);
1486}
1487
1488impl<'a> VmaskmovpsEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
1489    fn vmaskmovps(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
1490        self.emit(
1491            VMASKMOVPS128RRM,
1492            op0.as_operand(),
1493            op1.as_operand(),
1494            op2.as_operand(),
1495            &NOREG,
1496        );
1497    }
1498}
1499
1500impl<'a> VmaskmovpsEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
1501    fn vmaskmovps(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
1502        self.emit(
1503            VMASKMOVPS256RRM,
1504            op0.as_operand(),
1505            op1.as_operand(),
1506            op2.as_operand(),
1507            &NOREG,
1508        );
1509    }
1510}
1511
1512impl<'a> VmaskmovpsEmitter<Mem, Xmm, Xmm> for Assembler<'a> {
1513    fn vmaskmovps(&mut self, op0: Mem, op1: Xmm, op2: Xmm) {
1514        self.emit(
1515            VMASKMOVPS128MRR,
1516            op0.as_operand(),
1517            op1.as_operand(),
1518            op2.as_operand(),
1519            &NOREG,
1520        );
1521    }
1522}
1523
1524impl<'a> VmaskmovpsEmitter<Mem, Ymm, Ymm> for Assembler<'a> {
1525    fn vmaskmovps(&mut self, op0: Mem, op1: Ymm, op2: Ymm) {
1526        self.emit(
1527            VMASKMOVPS256MRR,
1528            op0.as_operand(),
1529            op1.as_operand(),
1530            op2.as_operand(),
1531            &NOREG,
1532        );
1533    }
1534}
1535
1536/// `VMOVD`.
1537///
1538/// Supported operand variants:
1539///
1540/// ```text
1541/// +---+----------+
1542/// | # | Operands |
1543/// +---+----------+
1544/// | 1 | Mem, Xmm |
1545/// | 2 | Xmm, Mem |
1546/// +---+----------+
1547/// ```
1548pub trait VmovdEmitter<A, B> {
1549    fn vmovd(&mut self, op0: A, op1: B);
1550}
1551
1552impl<'a> VmovdEmitter<Xmm, Mem> for Assembler<'a> {
1553    fn vmovd(&mut self, op0: Xmm, op1: Mem) {
1554        self.emit(VMOVDRM, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
1555    }
1556}
1557
1558impl<'a> VmovdEmitter<Mem, Xmm> for Assembler<'a> {
1559    fn vmovd(&mut self, op0: Mem, op1: Xmm) {
1560        self.emit(VMOVDMR, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
1561    }
1562}
1563
1564/// `VMOVDQA`.
1565///
1566/// Supported operand variants:
1567///
1568/// ```text
1569/// +---+----------+
1570/// | # | Operands |
1571/// +---+----------+
1572/// | 1 | Mem, Xmm |
1573/// | 2 | Mem, Ymm |
1574/// | 3 | Xmm, Mem |
1575/// | 4 | Xmm, Xmm |
1576/// | 5 | Ymm, Mem |
1577/// | 6 | Ymm, Ymm |
1578/// +---+----------+
1579/// ```
1580pub trait VmovdqaEmitter<A, B> {
1581    fn vmovdqa(&mut self, op0: A, op1: B);
1582}
1583
1584impl<'a> VmovdqaEmitter<Xmm, Xmm> for Assembler<'a> {
1585    fn vmovdqa(&mut self, op0: Xmm, op1: Xmm) {
1586        self.emit(
1587            VMOVDQA128RR,
1588            op0.as_operand(),
1589            op1.as_operand(),
1590            &NOREG,
1591            &NOREG,
1592        );
1593    }
1594}
1595
1596impl<'a> VmovdqaEmitter<Xmm, Mem> for Assembler<'a> {
1597    fn vmovdqa(&mut self, op0: Xmm, op1: Mem) {
1598        self.emit(
1599            VMOVDQA128RM,
1600            op0.as_operand(),
1601            op1.as_operand(),
1602            &NOREG,
1603            &NOREG,
1604        );
1605    }
1606}
1607
1608impl<'a> VmovdqaEmitter<Ymm, Ymm> for Assembler<'a> {
1609    fn vmovdqa(&mut self, op0: Ymm, op1: Ymm) {
1610        self.emit(
1611            VMOVDQA256RR,
1612            op0.as_operand(),
1613            op1.as_operand(),
1614            &NOREG,
1615            &NOREG,
1616        );
1617    }
1618}
1619
1620impl<'a> VmovdqaEmitter<Ymm, Mem> for Assembler<'a> {
1621    fn vmovdqa(&mut self, op0: Ymm, op1: Mem) {
1622        self.emit(
1623            VMOVDQA256RM,
1624            op0.as_operand(),
1625            op1.as_operand(),
1626            &NOREG,
1627            &NOREG,
1628        );
1629    }
1630}
1631
1632impl<'a> VmovdqaEmitter<Mem, Xmm> for Assembler<'a> {
1633    fn vmovdqa(&mut self, op0: Mem, op1: Xmm) {
1634        self.emit(
1635            VMOVDQA128MR,
1636            op0.as_operand(),
1637            op1.as_operand(),
1638            &NOREG,
1639            &NOREG,
1640        );
1641    }
1642}
1643
1644impl<'a> VmovdqaEmitter<Mem, Ymm> for Assembler<'a> {
1645    fn vmovdqa(&mut self, op0: Mem, op1: Ymm) {
1646        self.emit(
1647            VMOVDQA256MR,
1648            op0.as_operand(),
1649            op1.as_operand(),
1650            &NOREG,
1651            &NOREG,
1652        );
1653    }
1654}
1655
1656/// `VMOVDQU`.
1657///
1658/// Supported operand variants:
1659///
1660/// ```text
1661/// +---+----------+
1662/// | # | Operands |
1663/// +---+----------+
1664/// | 1 | Mem, Xmm |
1665/// | 2 | Mem, Ymm |
1666/// | 3 | Xmm, Mem |
1667/// | 4 | Xmm, Xmm |
1668/// | 5 | Ymm, Mem |
1669/// | 6 | Ymm, Ymm |
1670/// +---+----------+
1671/// ```
1672pub trait VmovdquEmitter<A, B> {
1673    fn vmovdqu(&mut self, op0: A, op1: B);
1674}
1675
1676impl<'a> VmovdquEmitter<Xmm, Xmm> for Assembler<'a> {
1677    fn vmovdqu(&mut self, op0: Xmm, op1: Xmm) {
1678        self.emit(
1679            VMOVDQU128RR,
1680            op0.as_operand(),
1681            op1.as_operand(),
1682            &NOREG,
1683            &NOREG,
1684        );
1685    }
1686}
1687
1688impl<'a> VmovdquEmitter<Xmm, Mem> for Assembler<'a> {
1689    fn vmovdqu(&mut self, op0: Xmm, op1: Mem) {
1690        self.emit(
1691            VMOVDQU128RM,
1692            op0.as_operand(),
1693            op1.as_operand(),
1694            &NOREG,
1695            &NOREG,
1696        );
1697    }
1698}
1699
1700impl<'a> VmovdquEmitter<Ymm, Ymm> for Assembler<'a> {
1701    fn vmovdqu(&mut self, op0: Ymm, op1: Ymm) {
1702        self.emit(
1703            VMOVDQU256RR,
1704            op0.as_operand(),
1705            op1.as_operand(),
1706            &NOREG,
1707            &NOREG,
1708        );
1709    }
1710}
1711
1712impl<'a> VmovdquEmitter<Ymm, Mem> for Assembler<'a> {
1713    fn vmovdqu(&mut self, op0: Ymm, op1: Mem) {
1714        self.emit(
1715            VMOVDQU256RM,
1716            op0.as_operand(),
1717            op1.as_operand(),
1718            &NOREG,
1719            &NOREG,
1720        );
1721    }
1722}
1723
1724impl<'a> VmovdquEmitter<Mem, Xmm> for Assembler<'a> {
1725    fn vmovdqu(&mut self, op0: Mem, op1: Xmm) {
1726        self.emit(
1727            VMOVDQU128MR,
1728            op0.as_operand(),
1729            op1.as_operand(),
1730            &NOREG,
1731            &NOREG,
1732        );
1733    }
1734}
1735
1736impl<'a> VmovdquEmitter<Mem, Ymm> for Assembler<'a> {
1737    fn vmovdqu(&mut self, op0: Mem, op1: Ymm) {
1738        self.emit(
1739            VMOVDQU256MR,
1740            op0.as_operand(),
1741            op1.as_operand(),
1742            &NOREG,
1743            &NOREG,
1744        );
1745    }
1746}
1747
1748/// `VMOVD_G2X`.
1749///
1750/// Supported operand variants:
1751///
1752/// ```text
1753/// +---+----------+
1754/// | # | Operands |
1755/// +---+----------+
1756/// | 1 | Xmm, Gpd |
1757/// +---+----------+
1758/// ```
1759pub trait VmovdG2xEmitter<A, B> {
1760    fn vmovd_g2x(&mut self, op0: A, op1: B);
1761}
1762
1763impl<'a> VmovdG2xEmitter<Xmm, Gpd> for Assembler<'a> {
1764    fn vmovd_g2x(&mut self, op0: Xmm, op1: Gpd) {
1765        self.emit(
1766            VMOVD_G2XRR,
1767            op0.as_operand(),
1768            op1.as_operand(),
1769            &NOREG,
1770            &NOREG,
1771        );
1772    }
1773}
1774
1775/// `VMOVD_X2G`.
1776///
1777/// Supported operand variants:
1778///
1779/// ```text
1780/// +---+----------+
1781/// | # | Operands |
1782/// +---+----------+
1783/// | 1 | Gpd, Xmm |
1784/// +---+----------+
1785/// ```
1786pub trait VmovdX2gEmitter<A, B> {
1787    fn vmovd_x2g(&mut self, op0: A, op1: B);
1788}
1789
1790impl<'a> VmovdX2gEmitter<Gpd, Xmm> for Assembler<'a> {
1791    fn vmovd_x2g(&mut self, op0: Gpd, op1: Xmm) {
1792        self.emit(
1793            VMOVD_X2GRR,
1794            op0.as_operand(),
1795            op1.as_operand(),
1796            &NOREG,
1797            &NOREG,
1798        );
1799    }
1800}
1801
1802/// `VMOVMSKPD`.
1803///
1804/// Supported operand variants:
1805///
1806/// ```text
1807/// +---+----------+
1808/// | # | Operands |
1809/// +---+----------+
1810/// | 1 | Gpd, Xmm |
1811/// | 2 | Gpd, Ymm |
1812/// +---+----------+
1813/// ```
1814pub trait VmovmskpdEmitter<A, B> {
1815    fn vmovmskpd(&mut self, op0: A, op1: B);
1816}
1817
1818impl<'a> VmovmskpdEmitter<Gpd, Xmm> for Assembler<'a> {
1819    fn vmovmskpd(&mut self, op0: Gpd, op1: Xmm) {
1820        self.emit(
1821            VMOVMSKPD128RR,
1822            op0.as_operand(),
1823            op1.as_operand(),
1824            &NOREG,
1825            &NOREG,
1826        );
1827    }
1828}
1829
1830impl<'a> VmovmskpdEmitter<Gpd, Ymm> for Assembler<'a> {
1831    fn vmovmskpd(&mut self, op0: Gpd, op1: Ymm) {
1832        self.emit(
1833            VMOVMSKPD256RR,
1834            op0.as_operand(),
1835            op1.as_operand(),
1836            &NOREG,
1837            &NOREG,
1838        );
1839    }
1840}
1841
1842/// `VMOVMSKPS`.
1843///
1844/// Supported operand variants:
1845///
1846/// ```text
1847/// +---+----------+
1848/// | # | Operands |
1849/// +---+----------+
1850/// | 1 | Gpd, Xmm |
1851/// | 2 | Gpd, Ymm |
1852/// +---+----------+
1853/// ```
1854pub trait VmovmskpsEmitter<A, B> {
1855    fn vmovmskps(&mut self, op0: A, op1: B);
1856}
1857
1858impl<'a> VmovmskpsEmitter<Gpd, Xmm> for Assembler<'a> {
1859    fn vmovmskps(&mut self, op0: Gpd, op1: Xmm) {
1860        self.emit(
1861            VMOVMSKPS128RR,
1862            op0.as_operand(),
1863            op1.as_operand(),
1864            &NOREG,
1865            &NOREG,
1866        );
1867    }
1868}
1869
1870impl<'a> VmovmskpsEmitter<Gpd, Ymm> for Assembler<'a> {
1871    fn vmovmskps(&mut self, op0: Gpd, op1: Ymm) {
1872        self.emit(
1873            VMOVMSKPS256RR,
1874            op0.as_operand(),
1875            op1.as_operand(),
1876            &NOREG,
1877            &NOREG,
1878        );
1879    }
1880}
1881
1882/// `VMOVQ_G2X`.
1883///
1884/// Supported operand variants:
1885///
1886/// ```text
1887/// +---+----------+
1888/// | # | Operands |
1889/// +---+----------+
1890/// | 1 | Xmm, Gpd |
1891/// | 2 | Xmm, Gpq |
1892/// | 3 | Xmm, Mem |
1893/// +---+----------+
1894/// ```
1895pub trait VmovqG2xEmitter<A, B> {
1896    fn vmovq_g2x(&mut self, op0: A, op1: B);
1897}
1898
1899impl<'a> VmovqG2xEmitter<Xmm, Gpd> for Assembler<'a> {
1900    fn vmovq_g2x(&mut self, op0: Xmm, op1: Gpd) {
1901        self.emit(
1902            VMOVQ_G2XRR,
1903            op0.as_operand(),
1904            op1.as_operand(),
1905            &NOREG,
1906            &NOREG,
1907        );
1908    }
1909}
1910
1911impl<'a> VmovqG2xEmitter<Xmm, Mem> for Assembler<'a> {
1912    fn vmovq_g2x(&mut self, op0: Xmm, op1: Mem) {
1913        self.emit(
1914            VMOVQ_G2XRM,
1915            op0.as_operand(),
1916            op1.as_operand(),
1917            &NOREG,
1918            &NOREG,
1919        );
1920    }
1921}
1922
1923impl<'a> VmovqG2xEmitter<Xmm, Gpq> for Assembler<'a> {
1924    fn vmovq_g2x(&mut self, op0: Xmm, op1: Gpq) {
1925        self.emit(
1926            VMOVQ_G2XRR,
1927            op0.as_operand(),
1928            op1.as_operand(),
1929            &NOREG,
1930            &NOREG,
1931        );
1932    }
1933}
1934
1935/// `VMOVQ_X2G`.
1936///
1937/// Supported operand variants:
1938///
1939/// ```text
1940/// +---+----------+
1941/// | # | Operands |
1942/// +---+----------+
1943/// | 1 | Gpd, Xmm |
1944/// | 2 | Gpq, Xmm |
1945/// | 3 | Mem, Xmm |
1946/// +---+----------+
1947/// ```
1948pub trait VmovqX2gEmitter<A, B> {
1949    fn vmovq_x2g(&mut self, op0: A, op1: B);
1950}
1951
1952impl<'a> VmovqX2gEmitter<Gpd, Xmm> for Assembler<'a> {
1953    fn vmovq_x2g(&mut self, op0: Gpd, op1: Xmm) {
1954        self.emit(
1955            VMOVQ_X2GRR,
1956            op0.as_operand(),
1957            op1.as_operand(),
1958            &NOREG,
1959            &NOREG,
1960        );
1961    }
1962}
1963
1964impl<'a> VmovqX2gEmitter<Mem, Xmm> for Assembler<'a> {
1965    fn vmovq_x2g(&mut self, op0: Mem, op1: Xmm) {
1966        self.emit(
1967            VMOVQ_X2GMR,
1968            op0.as_operand(),
1969            op1.as_operand(),
1970            &NOREG,
1971            &NOREG,
1972        );
1973    }
1974}
1975
1976impl<'a> VmovqX2gEmitter<Gpq, Xmm> for Assembler<'a> {
1977    fn vmovq_x2g(&mut self, op0: Gpq, op1: Xmm) {
1978        self.emit(
1979            VMOVQ_X2GRR,
1980            op0.as_operand(),
1981            op1.as_operand(),
1982            &NOREG,
1983            &NOREG,
1984        );
1985    }
1986}
1987
1988/// `VMPSADBW`.
1989///
1990/// Supported operand variants:
1991///
1992/// ```text
1993/// +---+--------------------+
1994/// | # | Operands           |
1995/// +---+--------------------+
1996/// | 1 | Xmm, Xmm, Mem, Imm |
1997/// | 2 | Xmm, Xmm, Xmm, Imm |
1998/// | 3 | Ymm, Ymm, Mem, Imm |
1999/// | 4 | Ymm, Ymm, Ymm, Imm |
2000/// +---+--------------------+
2001/// ```
2002pub trait VmpsadbwEmitter<A, B, C, D> {
2003    fn vmpsadbw(&mut self, op0: A, op1: B, op2: C, op3: D);
2004}
2005
2006impl<'a> VmpsadbwEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
2007    fn vmpsadbw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
2008        self.emit(
2009            VMPSADBW128RRRI,
2010            op0.as_operand(),
2011            op1.as_operand(),
2012            op2.as_operand(),
2013            op3.as_operand(),
2014        );
2015    }
2016}
2017
2018impl<'a> VmpsadbwEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
2019    fn vmpsadbw(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
2020        self.emit(
2021            VMPSADBW128RRMI,
2022            op0.as_operand(),
2023            op1.as_operand(),
2024            op2.as_operand(),
2025            op3.as_operand(),
2026        );
2027    }
2028}
2029
2030impl<'a> VmpsadbwEmitter<Ymm, Ymm, Ymm, Imm> for Assembler<'a> {
2031    fn vmpsadbw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Imm) {
2032        self.emit(
2033            VMPSADBW256RRRI,
2034            op0.as_operand(),
2035            op1.as_operand(),
2036            op2.as_operand(),
2037            op3.as_operand(),
2038        );
2039    }
2040}
2041
2042impl<'a> VmpsadbwEmitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
2043    fn vmpsadbw(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
2044        self.emit(
2045            VMPSADBW256RRMI,
2046            op0.as_operand(),
2047            op1.as_operand(),
2048            op2.as_operand(),
2049            op3.as_operand(),
2050        );
2051    }
2052}
2053
2054/// `VPAND`.
2055///
2056/// Supported operand variants:
2057///
2058/// ```text
2059/// +---+---------------+
2060/// | # | Operands      |
2061/// +---+---------------+
2062/// | 1 | Xmm, Xmm, Mem |
2063/// | 2 | Xmm, Xmm, Xmm |
2064/// | 3 | Ymm, Ymm, Mem |
2065/// | 4 | Ymm, Ymm, Ymm |
2066/// +---+---------------+
2067/// ```
2068pub trait VpandEmitter<A, B, C> {
2069    fn vpand(&mut self, op0: A, op1: B, op2: C);
2070}
2071
2072impl<'a> VpandEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
2073    fn vpand(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
2074        self.emit(
2075            VPAND128RRR,
2076            op0.as_operand(),
2077            op1.as_operand(),
2078            op2.as_operand(),
2079            &NOREG,
2080        );
2081    }
2082}
2083
2084impl<'a> VpandEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
2085    fn vpand(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
2086        self.emit(
2087            VPAND128RRM,
2088            op0.as_operand(),
2089            op1.as_operand(),
2090            op2.as_operand(),
2091            &NOREG,
2092        );
2093    }
2094}
2095
2096impl<'a> VpandEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
2097    fn vpand(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
2098        self.emit(
2099            VPAND256RRR,
2100            op0.as_operand(),
2101            op1.as_operand(),
2102            op2.as_operand(),
2103            &NOREG,
2104        );
2105    }
2106}
2107
2108impl<'a> VpandEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
2109    fn vpand(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
2110        self.emit(
2111            VPAND256RRM,
2112            op0.as_operand(),
2113            op1.as_operand(),
2114            op2.as_operand(),
2115            &NOREG,
2116        );
2117    }
2118}
2119
2120/// `VPANDN`.
2121///
2122/// Supported operand variants:
2123///
2124/// ```text
2125/// +---+---------------+
2126/// | # | Operands      |
2127/// +---+---------------+
2128/// | 1 | Xmm, Xmm, Mem |
2129/// | 2 | Xmm, Xmm, Xmm |
2130/// | 3 | Ymm, Ymm, Mem |
2131/// | 4 | Ymm, Ymm, Ymm |
2132/// +---+---------------+
2133/// ```
2134pub trait VpandnEmitter<A, B, C> {
2135    fn vpandn(&mut self, op0: A, op1: B, op2: C);
2136}
2137
2138impl<'a> VpandnEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
2139    fn vpandn(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
2140        self.emit(
2141            VPANDN128RRR,
2142            op0.as_operand(),
2143            op1.as_operand(),
2144            op2.as_operand(),
2145            &NOREG,
2146        );
2147    }
2148}
2149
2150impl<'a> VpandnEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
2151    fn vpandn(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
2152        self.emit(
2153            VPANDN128RRM,
2154            op0.as_operand(),
2155            op1.as_operand(),
2156            op2.as_operand(),
2157            &NOREG,
2158        );
2159    }
2160}
2161
2162impl<'a> VpandnEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
2163    fn vpandn(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
2164        self.emit(
2165            VPANDN256RRR,
2166            op0.as_operand(),
2167            op1.as_operand(),
2168            op2.as_operand(),
2169            &NOREG,
2170        );
2171    }
2172}
2173
2174impl<'a> VpandnEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
2175    fn vpandn(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
2176        self.emit(
2177            VPANDN256RRM,
2178            op0.as_operand(),
2179            op1.as_operand(),
2180            op2.as_operand(),
2181            &NOREG,
2182        );
2183    }
2184}
2185
2186/// `VPBLENDVB`.
2187///
2188/// Supported operand variants:
2189///
2190/// ```text
2191/// +---+--------------------+
2192/// | # | Operands           |
2193/// +---+--------------------+
2194/// | 1 | Xmm, Xmm, Mem, Xmm |
2195/// | 2 | Xmm, Xmm, Xmm, Xmm |
2196/// | 3 | Ymm, Ymm, Mem, Ymm |
2197/// | 4 | Ymm, Ymm, Ymm, Ymm |
2198/// +---+--------------------+
2199/// ```
2200pub trait VpblendvbEmitter<A, B, C, D> {
2201    fn vpblendvb(&mut self, op0: A, op1: B, op2: C, op3: D);
2202}
2203
2204impl<'a> VpblendvbEmitter<Xmm, Xmm, Xmm, Xmm> for Assembler<'a> {
2205    fn vpblendvb(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Xmm) {
2206        self.emit(
2207            VPBLENDVB128RRRR,
2208            op0.as_operand(),
2209            op1.as_operand(),
2210            op2.as_operand(),
2211            op3.as_operand(),
2212        );
2213    }
2214}
2215
2216impl<'a> VpblendvbEmitter<Xmm, Xmm, Mem, Xmm> for Assembler<'a> {
2217    fn vpblendvb(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Xmm) {
2218        self.emit(
2219            VPBLENDVB128RRMR,
2220            op0.as_operand(),
2221            op1.as_operand(),
2222            op2.as_operand(),
2223            op3.as_operand(),
2224        );
2225    }
2226}
2227
2228impl<'a> VpblendvbEmitter<Ymm, Ymm, Ymm, Ymm> for Assembler<'a> {
2229    fn vpblendvb(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Ymm) {
2230        self.emit(
2231            VPBLENDVB256RRRR,
2232            op0.as_operand(),
2233            op1.as_operand(),
2234            op2.as_operand(),
2235            op3.as_operand(),
2236        );
2237    }
2238}
2239
2240impl<'a> VpblendvbEmitter<Ymm, Ymm, Mem, Ymm> for Assembler<'a> {
2241    fn vpblendvb(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Ymm) {
2242        self.emit(
2243            VPBLENDVB256RRMR,
2244            op0.as_operand(),
2245            op1.as_operand(),
2246            op2.as_operand(),
2247            op3.as_operand(),
2248        );
2249    }
2250}
2251
2252/// `VPBLENDW`.
2253///
2254/// Supported operand variants:
2255///
2256/// ```text
2257/// +---+--------------------+
2258/// | # | Operands           |
2259/// +---+--------------------+
2260/// | 1 | Xmm, Xmm, Mem, Imm |
2261/// | 2 | Xmm, Xmm, Xmm, Imm |
2262/// | 3 | Ymm, Ymm, Mem, Imm |
2263/// | 4 | Ymm, Ymm, Ymm, Imm |
2264/// +---+--------------------+
2265/// ```
2266pub trait VpblendwEmitter<A, B, C, D> {
2267    fn vpblendw(&mut self, op0: A, op1: B, op2: C, op3: D);
2268}
2269
2270impl<'a> VpblendwEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
2271    fn vpblendw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
2272        self.emit(
2273            VPBLENDW128RRRI,
2274            op0.as_operand(),
2275            op1.as_operand(),
2276            op2.as_operand(),
2277            op3.as_operand(),
2278        );
2279    }
2280}
2281
2282impl<'a> VpblendwEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
2283    fn vpblendw(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
2284        self.emit(
2285            VPBLENDW128RRMI,
2286            op0.as_operand(),
2287            op1.as_operand(),
2288            op2.as_operand(),
2289            op3.as_operand(),
2290        );
2291    }
2292}
2293
2294impl<'a> VpblendwEmitter<Ymm, Ymm, Ymm, Imm> for Assembler<'a> {
2295    fn vpblendw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Imm) {
2296        self.emit(
2297            VPBLENDW256RRRI,
2298            op0.as_operand(),
2299            op1.as_operand(),
2300            op2.as_operand(),
2301            op3.as_operand(),
2302        );
2303    }
2304}
2305
2306impl<'a> VpblendwEmitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
2307    fn vpblendw(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
2308        self.emit(
2309            VPBLENDW256RRMI,
2310            op0.as_operand(),
2311            op1.as_operand(),
2312            op2.as_operand(),
2313            op3.as_operand(),
2314        );
2315    }
2316}
2317
2318/// `VPCMPEQB`.
2319///
2320/// Supported operand variants:
2321///
2322/// ```text
2323/// +----+----------------+
2324/// | #  | Operands       |
2325/// +----+----------------+
2326/// | 1  | KReg, Xmm, Mem |
2327/// | 2  | KReg, Xmm, Xmm |
2328/// | 3  | KReg, Ymm, Mem |
2329/// | 4  | KReg, Ymm, Ymm |
2330/// | 5  | KReg, Zmm, Mem |
2331/// | 6  | KReg, Zmm, Zmm |
2332/// | 7  | Xmm, Xmm, Mem  |
2333/// | 8  | Xmm, Xmm, Xmm  |
2334/// | 9  | Ymm, Ymm, Mem  |
2335/// | 10 | Ymm, Ymm, Ymm  |
2336/// +----+----------------+
2337/// ```
2338pub trait VpcmpeqbEmitter<A, B, C> {
2339    fn vpcmpeqb(&mut self, op0: A, op1: B, op2: C);
2340}
2341
2342impl<'a> VpcmpeqbEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
2343    fn vpcmpeqb(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
2344        self.emit(
2345            VPCMPEQB128RRR,
2346            op0.as_operand(),
2347            op1.as_operand(),
2348            op2.as_operand(),
2349            &NOREG,
2350        );
2351    }
2352}
2353
2354impl<'a> VpcmpeqbEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
2355    fn vpcmpeqb(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
2356        self.emit(
2357            VPCMPEQB128RRM,
2358            op0.as_operand(),
2359            op1.as_operand(),
2360            op2.as_operand(),
2361            &NOREG,
2362        );
2363    }
2364}
2365
2366impl<'a> VpcmpeqbEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
2367    fn vpcmpeqb(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
2368        self.emit(
2369            VPCMPEQB256RRR,
2370            op0.as_operand(),
2371            op1.as_operand(),
2372            op2.as_operand(),
2373            &NOREG,
2374        );
2375    }
2376}
2377
2378impl<'a> VpcmpeqbEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
2379    fn vpcmpeqb(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
2380        self.emit(
2381            VPCMPEQB256RRM,
2382            op0.as_operand(),
2383            op1.as_operand(),
2384            op2.as_operand(),
2385            &NOREG,
2386        );
2387    }
2388}
2389
2390impl<'a> VpcmpeqbEmitter<KReg, Xmm, Xmm> for Assembler<'a> {
2391    fn vpcmpeqb(&mut self, op0: KReg, op1: Xmm, op2: Xmm) {
2392        self.emit(
2393            VPCMPEQB128KRR,
2394            op0.as_operand(),
2395            op1.as_operand(),
2396            op2.as_operand(),
2397            &NOREG,
2398        );
2399    }
2400}
2401
2402impl<'a> VpcmpeqbEmitter<KReg, Xmm, Mem> for Assembler<'a> {
2403    fn vpcmpeqb(&mut self, op0: KReg, op1: Xmm, op2: Mem) {
2404        self.emit(
2405            VPCMPEQB128KRM,
2406            op0.as_operand(),
2407            op1.as_operand(),
2408            op2.as_operand(),
2409            &NOREG,
2410        );
2411    }
2412}
2413
2414impl<'a> VpcmpeqbEmitter<KReg, Ymm, Ymm> for Assembler<'a> {
2415    fn vpcmpeqb(&mut self, op0: KReg, op1: Ymm, op2: Ymm) {
2416        self.emit(
2417            VPCMPEQB256KRR,
2418            op0.as_operand(),
2419            op1.as_operand(),
2420            op2.as_operand(),
2421            &NOREG,
2422        );
2423    }
2424}
2425
2426impl<'a> VpcmpeqbEmitter<KReg, Ymm, Mem> for Assembler<'a> {
2427    fn vpcmpeqb(&mut self, op0: KReg, op1: Ymm, op2: Mem) {
2428        self.emit(
2429            VPCMPEQB256KRM,
2430            op0.as_operand(),
2431            op1.as_operand(),
2432            op2.as_operand(),
2433            &NOREG,
2434        );
2435    }
2436}
2437
2438impl<'a> VpcmpeqbEmitter<KReg, Zmm, Zmm> for Assembler<'a> {
2439    fn vpcmpeqb(&mut self, op0: KReg, op1: Zmm, op2: Zmm) {
2440        self.emit(
2441            VPCMPEQB512KRR,
2442            op0.as_operand(),
2443            op1.as_operand(),
2444            op2.as_operand(),
2445            &NOREG,
2446        );
2447    }
2448}
2449
2450impl<'a> VpcmpeqbEmitter<KReg, Zmm, Mem> for Assembler<'a> {
2451    fn vpcmpeqb(&mut self, op0: KReg, op1: Zmm, op2: Mem) {
2452        self.emit(
2453            VPCMPEQB512KRM,
2454            op0.as_operand(),
2455            op1.as_operand(),
2456            op2.as_operand(),
2457            &NOREG,
2458        );
2459    }
2460}
2461
2462/// `VPCMPEQD`.
2463///
2464/// Supported operand variants:
2465///
2466/// ```text
2467/// +----+----------------+
2468/// | #  | Operands       |
2469/// +----+----------------+
2470/// | 1  | KReg, Xmm, Mem |
2471/// | 2  | KReg, Xmm, Xmm |
2472/// | 3  | KReg, Ymm, Mem |
2473/// | 4  | KReg, Ymm, Ymm |
2474/// | 5  | KReg, Zmm, Mem |
2475/// | 6  | KReg, Zmm, Zmm |
2476/// | 7  | Xmm, Xmm, Mem  |
2477/// | 8  | Xmm, Xmm, Xmm  |
2478/// | 9  | Ymm, Ymm, Mem  |
2479/// | 10 | Ymm, Ymm, Ymm  |
2480/// +----+----------------+
2481/// ```
2482pub trait VpcmpeqdEmitter<A, B, C> {
2483    fn vpcmpeqd(&mut self, op0: A, op1: B, op2: C);
2484}
2485
2486impl<'a> VpcmpeqdEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
2487    fn vpcmpeqd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
2488        self.emit(
2489            VPCMPEQD128RRR,
2490            op0.as_operand(),
2491            op1.as_operand(),
2492            op2.as_operand(),
2493            &NOREG,
2494        );
2495    }
2496}
2497
2498impl<'a> VpcmpeqdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
2499    fn vpcmpeqd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
2500        self.emit(
2501            VPCMPEQD128RRM,
2502            op0.as_operand(),
2503            op1.as_operand(),
2504            op2.as_operand(),
2505            &NOREG,
2506        );
2507    }
2508}
2509
2510impl<'a> VpcmpeqdEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
2511    fn vpcmpeqd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
2512        self.emit(
2513            VPCMPEQD256RRR,
2514            op0.as_operand(),
2515            op1.as_operand(),
2516            op2.as_operand(),
2517            &NOREG,
2518        );
2519    }
2520}
2521
2522impl<'a> VpcmpeqdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
2523    fn vpcmpeqd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
2524        self.emit(
2525            VPCMPEQD256RRM,
2526            op0.as_operand(),
2527            op1.as_operand(),
2528            op2.as_operand(),
2529            &NOREG,
2530        );
2531    }
2532}
2533
2534impl<'a> VpcmpeqdEmitter<KReg, Xmm, Xmm> for Assembler<'a> {
2535    fn vpcmpeqd(&mut self, op0: KReg, op1: Xmm, op2: Xmm) {
2536        self.emit(
2537            VPCMPEQD128KRR,
2538            op0.as_operand(),
2539            op1.as_operand(),
2540            op2.as_operand(),
2541            &NOREG,
2542        );
2543    }
2544}
2545
2546impl<'a> VpcmpeqdEmitter<KReg, Xmm, Mem> for Assembler<'a> {
2547    fn vpcmpeqd(&mut self, op0: KReg, op1: Xmm, op2: Mem) {
2548        self.emit(
2549            VPCMPEQD128KRM,
2550            op0.as_operand(),
2551            op1.as_operand(),
2552            op2.as_operand(),
2553            &NOREG,
2554        );
2555    }
2556}
2557
2558impl<'a> VpcmpeqdEmitter<KReg, Ymm, Ymm> for Assembler<'a> {
2559    fn vpcmpeqd(&mut self, op0: KReg, op1: Ymm, op2: Ymm) {
2560        self.emit(
2561            VPCMPEQD256KRR,
2562            op0.as_operand(),
2563            op1.as_operand(),
2564            op2.as_operand(),
2565            &NOREG,
2566        );
2567    }
2568}
2569
2570impl<'a> VpcmpeqdEmitter<KReg, Ymm, Mem> for Assembler<'a> {
2571    fn vpcmpeqd(&mut self, op0: KReg, op1: Ymm, op2: Mem) {
2572        self.emit(
2573            VPCMPEQD256KRM,
2574            op0.as_operand(),
2575            op1.as_operand(),
2576            op2.as_operand(),
2577            &NOREG,
2578        );
2579    }
2580}
2581
2582impl<'a> VpcmpeqdEmitter<KReg, Zmm, Zmm> for Assembler<'a> {
2583    fn vpcmpeqd(&mut self, op0: KReg, op1: Zmm, op2: Zmm) {
2584        self.emit(
2585            VPCMPEQD512KRR,
2586            op0.as_operand(),
2587            op1.as_operand(),
2588            op2.as_operand(),
2589            &NOREG,
2590        );
2591    }
2592}
2593
2594impl<'a> VpcmpeqdEmitter<KReg, Zmm, Mem> for Assembler<'a> {
2595    fn vpcmpeqd(&mut self, op0: KReg, op1: Zmm, op2: Mem) {
2596        self.emit(
2597            VPCMPEQD512KRM,
2598            op0.as_operand(),
2599            op1.as_operand(),
2600            op2.as_operand(),
2601            &NOREG,
2602        );
2603    }
2604}
2605
2606/// `VPCMPEQQ`.
2607///
2608/// Supported operand variants:
2609///
2610/// ```text
2611/// +----+----------------+
2612/// | #  | Operands       |
2613/// +----+----------------+
2614/// | 1  | KReg, Xmm, Mem |
2615/// | 2  | KReg, Xmm, Xmm |
2616/// | 3  | KReg, Ymm, Mem |
2617/// | 4  | KReg, Ymm, Ymm |
2618/// | 5  | KReg, Zmm, Mem |
2619/// | 6  | KReg, Zmm, Zmm |
2620/// | 7  | Xmm, Xmm, Mem  |
2621/// | 8  | Xmm, Xmm, Xmm  |
2622/// | 9  | Ymm, Ymm, Mem  |
2623/// | 10 | Ymm, Ymm, Ymm  |
2624/// +----+----------------+
2625/// ```
2626pub trait VpcmpeqqEmitter<A, B, C> {
2627    fn vpcmpeqq(&mut self, op0: A, op1: B, op2: C);
2628}
2629
2630impl<'a> VpcmpeqqEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
2631    fn vpcmpeqq(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
2632        self.emit(
2633            VPCMPEQQ128RRR,
2634            op0.as_operand(),
2635            op1.as_operand(),
2636            op2.as_operand(),
2637            &NOREG,
2638        );
2639    }
2640}
2641
2642impl<'a> VpcmpeqqEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
2643    fn vpcmpeqq(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
2644        self.emit(
2645            VPCMPEQQ128RRM,
2646            op0.as_operand(),
2647            op1.as_operand(),
2648            op2.as_operand(),
2649            &NOREG,
2650        );
2651    }
2652}
2653
2654impl<'a> VpcmpeqqEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
2655    fn vpcmpeqq(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
2656        self.emit(
2657            VPCMPEQQ256RRR,
2658            op0.as_operand(),
2659            op1.as_operand(),
2660            op2.as_operand(),
2661            &NOREG,
2662        );
2663    }
2664}
2665
2666impl<'a> VpcmpeqqEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
2667    fn vpcmpeqq(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
2668        self.emit(
2669            VPCMPEQQ256RRM,
2670            op0.as_operand(),
2671            op1.as_operand(),
2672            op2.as_operand(),
2673            &NOREG,
2674        );
2675    }
2676}
2677
2678impl<'a> VpcmpeqqEmitter<KReg, Xmm, Xmm> for Assembler<'a> {
2679    fn vpcmpeqq(&mut self, op0: KReg, op1: Xmm, op2: Xmm) {
2680        self.emit(
2681            VPCMPEQQ128KRR,
2682            op0.as_operand(),
2683            op1.as_operand(),
2684            op2.as_operand(),
2685            &NOREG,
2686        );
2687    }
2688}
2689
2690impl<'a> VpcmpeqqEmitter<KReg, Xmm, Mem> for Assembler<'a> {
2691    fn vpcmpeqq(&mut self, op0: KReg, op1: Xmm, op2: Mem) {
2692        self.emit(
2693            VPCMPEQQ128KRM,
2694            op0.as_operand(),
2695            op1.as_operand(),
2696            op2.as_operand(),
2697            &NOREG,
2698        );
2699    }
2700}
2701
2702impl<'a> VpcmpeqqEmitter<KReg, Ymm, Ymm> for Assembler<'a> {
2703    fn vpcmpeqq(&mut self, op0: KReg, op1: Ymm, op2: Ymm) {
2704        self.emit(
2705            VPCMPEQQ256KRR,
2706            op0.as_operand(),
2707            op1.as_operand(),
2708            op2.as_operand(),
2709            &NOREG,
2710        );
2711    }
2712}
2713
2714impl<'a> VpcmpeqqEmitter<KReg, Ymm, Mem> for Assembler<'a> {
2715    fn vpcmpeqq(&mut self, op0: KReg, op1: Ymm, op2: Mem) {
2716        self.emit(
2717            VPCMPEQQ256KRM,
2718            op0.as_operand(),
2719            op1.as_operand(),
2720            op2.as_operand(),
2721            &NOREG,
2722        );
2723    }
2724}
2725
2726impl<'a> VpcmpeqqEmitter<KReg, Zmm, Zmm> for Assembler<'a> {
2727    fn vpcmpeqq(&mut self, op0: KReg, op1: Zmm, op2: Zmm) {
2728        self.emit(
2729            VPCMPEQQ512KRR,
2730            op0.as_operand(),
2731            op1.as_operand(),
2732            op2.as_operand(),
2733            &NOREG,
2734        );
2735    }
2736}
2737
2738impl<'a> VpcmpeqqEmitter<KReg, Zmm, Mem> for Assembler<'a> {
2739    fn vpcmpeqq(&mut self, op0: KReg, op1: Zmm, op2: Mem) {
2740        self.emit(
2741            VPCMPEQQ512KRM,
2742            op0.as_operand(),
2743            op1.as_operand(),
2744            op2.as_operand(),
2745            &NOREG,
2746        );
2747    }
2748}
2749
2750/// `VPCMPEQW`.
2751///
2752/// Supported operand variants:
2753///
2754/// ```text
2755/// +----+----------------+
2756/// | #  | Operands       |
2757/// +----+----------------+
2758/// | 1  | KReg, Xmm, Mem |
2759/// | 2  | KReg, Xmm, Xmm |
2760/// | 3  | KReg, Ymm, Mem |
2761/// | 4  | KReg, Ymm, Ymm |
2762/// | 5  | KReg, Zmm, Mem |
2763/// | 6  | KReg, Zmm, Zmm |
2764/// | 7  | Xmm, Xmm, Mem  |
2765/// | 8  | Xmm, Xmm, Xmm  |
2766/// | 9  | Ymm, Ymm, Mem  |
2767/// | 10 | Ymm, Ymm, Ymm  |
2768/// +----+----------------+
2769/// ```
2770pub trait VpcmpeqwEmitter<A, B, C> {
2771    fn vpcmpeqw(&mut self, op0: A, op1: B, op2: C);
2772}
2773
2774impl<'a> VpcmpeqwEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
2775    fn vpcmpeqw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
2776        self.emit(
2777            VPCMPEQW128RRR,
2778            op0.as_operand(),
2779            op1.as_operand(),
2780            op2.as_operand(),
2781            &NOREG,
2782        );
2783    }
2784}
2785
2786impl<'a> VpcmpeqwEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
2787    fn vpcmpeqw(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
2788        self.emit(
2789            VPCMPEQW128RRM,
2790            op0.as_operand(),
2791            op1.as_operand(),
2792            op2.as_operand(),
2793            &NOREG,
2794        );
2795    }
2796}
2797
2798impl<'a> VpcmpeqwEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
2799    fn vpcmpeqw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
2800        self.emit(
2801            VPCMPEQW256RRR,
2802            op0.as_operand(),
2803            op1.as_operand(),
2804            op2.as_operand(),
2805            &NOREG,
2806        );
2807    }
2808}
2809
2810impl<'a> VpcmpeqwEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
2811    fn vpcmpeqw(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
2812        self.emit(
2813            VPCMPEQW256RRM,
2814            op0.as_operand(),
2815            op1.as_operand(),
2816            op2.as_operand(),
2817            &NOREG,
2818        );
2819    }
2820}
2821
2822impl<'a> VpcmpeqwEmitter<KReg, Xmm, Xmm> for Assembler<'a> {
2823    fn vpcmpeqw(&mut self, op0: KReg, op1: Xmm, op2: Xmm) {
2824        self.emit(
2825            VPCMPEQW128KRR,
2826            op0.as_operand(),
2827            op1.as_operand(),
2828            op2.as_operand(),
2829            &NOREG,
2830        );
2831    }
2832}
2833
2834impl<'a> VpcmpeqwEmitter<KReg, Xmm, Mem> for Assembler<'a> {
2835    fn vpcmpeqw(&mut self, op0: KReg, op1: Xmm, op2: Mem) {
2836        self.emit(
2837            VPCMPEQW128KRM,
2838            op0.as_operand(),
2839            op1.as_operand(),
2840            op2.as_operand(),
2841            &NOREG,
2842        );
2843    }
2844}
2845
2846impl<'a> VpcmpeqwEmitter<KReg, Ymm, Ymm> for Assembler<'a> {
2847    fn vpcmpeqw(&mut self, op0: KReg, op1: Ymm, op2: Ymm) {
2848        self.emit(
2849            VPCMPEQW256KRR,
2850            op0.as_operand(),
2851            op1.as_operand(),
2852            op2.as_operand(),
2853            &NOREG,
2854        );
2855    }
2856}
2857
2858impl<'a> VpcmpeqwEmitter<KReg, Ymm, Mem> for Assembler<'a> {
2859    fn vpcmpeqw(&mut self, op0: KReg, op1: Ymm, op2: Mem) {
2860        self.emit(
2861            VPCMPEQW256KRM,
2862            op0.as_operand(),
2863            op1.as_operand(),
2864            op2.as_operand(),
2865            &NOREG,
2866        );
2867    }
2868}
2869
2870impl<'a> VpcmpeqwEmitter<KReg, Zmm, Zmm> for Assembler<'a> {
2871    fn vpcmpeqw(&mut self, op0: KReg, op1: Zmm, op2: Zmm) {
2872        self.emit(
2873            VPCMPEQW512KRR,
2874            op0.as_operand(),
2875            op1.as_operand(),
2876            op2.as_operand(),
2877            &NOREG,
2878        );
2879    }
2880}
2881
2882impl<'a> VpcmpeqwEmitter<KReg, Zmm, Mem> for Assembler<'a> {
2883    fn vpcmpeqw(&mut self, op0: KReg, op1: Zmm, op2: Mem) {
2884        self.emit(
2885            VPCMPEQW512KRM,
2886            op0.as_operand(),
2887            op1.as_operand(),
2888            op2.as_operand(),
2889            &NOREG,
2890        );
2891    }
2892}
2893
2894/// `VPCMPESTRI`.
2895///
2896/// Supported operand variants:
2897///
2898/// ```text
2899/// +---+---------------+
2900/// | # | Operands      |
2901/// +---+---------------+
2902/// | 1 | Xmm, Mem, Imm |
2903/// | 2 | Xmm, Xmm, Imm |
2904/// +---+---------------+
2905/// ```
2906pub trait VpcmpestriEmitter<A, B, C> {
2907    fn vpcmpestri(&mut self, op0: A, op1: B, op2: C);
2908}
2909
2910impl<'a> VpcmpestriEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
2911    fn vpcmpestri(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
2912        self.emit(
2913            VPCMPESTRIRRI,
2914            op0.as_operand(),
2915            op1.as_operand(),
2916            op2.as_operand(),
2917            &NOREG,
2918        );
2919    }
2920}
2921
2922impl<'a> VpcmpestriEmitter<Xmm, Mem, Imm> for Assembler<'a> {
2923    fn vpcmpestri(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
2924        self.emit(
2925            VPCMPESTRIRMI,
2926            op0.as_operand(),
2927            op1.as_operand(),
2928            op2.as_operand(),
2929            &NOREG,
2930        );
2931    }
2932}
2933
2934/// `VPCMPESTRM`.
2935///
2936/// Supported operand variants:
2937///
2938/// ```text
2939/// +---+---------------+
2940/// | # | Operands      |
2941/// +---+---------------+
2942/// | 1 | Xmm, Mem, Imm |
2943/// | 2 | Xmm, Xmm, Imm |
2944/// +---+---------------+
2945/// ```
2946pub trait VpcmpestrmEmitter<A, B, C> {
2947    fn vpcmpestrm(&mut self, op0: A, op1: B, op2: C);
2948}
2949
2950impl<'a> VpcmpestrmEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
2951    fn vpcmpestrm(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
2952        self.emit(
2953            VPCMPESTRMRRI,
2954            op0.as_operand(),
2955            op1.as_operand(),
2956            op2.as_operand(),
2957            &NOREG,
2958        );
2959    }
2960}
2961
2962impl<'a> VpcmpestrmEmitter<Xmm, Mem, Imm> for Assembler<'a> {
2963    fn vpcmpestrm(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
2964        self.emit(
2965            VPCMPESTRMRMI,
2966            op0.as_operand(),
2967            op1.as_operand(),
2968            op2.as_operand(),
2969            &NOREG,
2970        );
2971    }
2972}
2973
2974/// `VPCMPGTB`.
2975///
2976/// Supported operand variants:
2977///
2978/// ```text
2979/// +----+----------------+
2980/// | #  | Operands       |
2981/// +----+----------------+
2982/// | 1  | KReg, Xmm, Mem |
2983/// | 2  | KReg, Xmm, Xmm |
2984/// | 3  | KReg, Ymm, Mem |
2985/// | 4  | KReg, Ymm, Ymm |
2986/// | 5  | KReg, Zmm, Mem |
2987/// | 6  | KReg, Zmm, Zmm |
2988/// | 7  | Xmm, Xmm, Mem  |
2989/// | 8  | Xmm, Xmm, Xmm  |
2990/// | 9  | Ymm, Ymm, Mem  |
2991/// | 10 | Ymm, Ymm, Ymm  |
2992/// +----+----------------+
2993/// ```
2994pub trait VpcmpgtbEmitter<A, B, C> {
2995    fn vpcmpgtb(&mut self, op0: A, op1: B, op2: C);
2996}
2997
2998impl<'a> VpcmpgtbEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
2999    fn vpcmpgtb(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
3000        self.emit(
3001            VPCMPGTB128RRR,
3002            op0.as_operand(),
3003            op1.as_operand(),
3004            op2.as_operand(),
3005            &NOREG,
3006        );
3007    }
3008}
3009
3010impl<'a> VpcmpgtbEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
3011    fn vpcmpgtb(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
3012        self.emit(
3013            VPCMPGTB128RRM,
3014            op0.as_operand(),
3015            op1.as_operand(),
3016            op2.as_operand(),
3017            &NOREG,
3018        );
3019    }
3020}
3021
3022impl<'a> VpcmpgtbEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
3023    fn vpcmpgtb(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
3024        self.emit(
3025            VPCMPGTB256RRR,
3026            op0.as_operand(),
3027            op1.as_operand(),
3028            op2.as_operand(),
3029            &NOREG,
3030        );
3031    }
3032}
3033
3034impl<'a> VpcmpgtbEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
3035    fn vpcmpgtb(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
3036        self.emit(
3037            VPCMPGTB256RRM,
3038            op0.as_operand(),
3039            op1.as_operand(),
3040            op2.as_operand(),
3041            &NOREG,
3042        );
3043    }
3044}
3045
3046impl<'a> VpcmpgtbEmitter<KReg, Xmm, Xmm> for Assembler<'a> {
3047    fn vpcmpgtb(&mut self, op0: KReg, op1: Xmm, op2: Xmm) {
3048        self.emit(
3049            VPCMPGTB128KRR,
3050            op0.as_operand(),
3051            op1.as_operand(),
3052            op2.as_operand(),
3053            &NOREG,
3054        );
3055    }
3056}
3057
3058impl<'a> VpcmpgtbEmitter<KReg, Xmm, Mem> for Assembler<'a> {
3059    fn vpcmpgtb(&mut self, op0: KReg, op1: Xmm, op2: Mem) {
3060        self.emit(
3061            VPCMPGTB128KRM,
3062            op0.as_operand(),
3063            op1.as_operand(),
3064            op2.as_operand(),
3065            &NOREG,
3066        );
3067    }
3068}
3069
3070impl<'a> VpcmpgtbEmitter<KReg, Ymm, Ymm> for Assembler<'a> {
3071    fn vpcmpgtb(&mut self, op0: KReg, op1: Ymm, op2: Ymm) {
3072        self.emit(
3073            VPCMPGTB256KRR,
3074            op0.as_operand(),
3075            op1.as_operand(),
3076            op2.as_operand(),
3077            &NOREG,
3078        );
3079    }
3080}
3081
3082impl<'a> VpcmpgtbEmitter<KReg, Ymm, Mem> for Assembler<'a> {
3083    fn vpcmpgtb(&mut self, op0: KReg, op1: Ymm, op2: Mem) {
3084        self.emit(
3085            VPCMPGTB256KRM,
3086            op0.as_operand(),
3087            op1.as_operand(),
3088            op2.as_operand(),
3089            &NOREG,
3090        );
3091    }
3092}
3093
3094impl<'a> VpcmpgtbEmitter<KReg, Zmm, Zmm> for Assembler<'a> {
3095    fn vpcmpgtb(&mut self, op0: KReg, op1: Zmm, op2: Zmm) {
3096        self.emit(
3097            VPCMPGTB512KRR,
3098            op0.as_operand(),
3099            op1.as_operand(),
3100            op2.as_operand(),
3101            &NOREG,
3102        );
3103    }
3104}
3105
3106impl<'a> VpcmpgtbEmitter<KReg, Zmm, Mem> for Assembler<'a> {
3107    fn vpcmpgtb(&mut self, op0: KReg, op1: Zmm, op2: Mem) {
3108        self.emit(
3109            VPCMPGTB512KRM,
3110            op0.as_operand(),
3111            op1.as_operand(),
3112            op2.as_operand(),
3113            &NOREG,
3114        );
3115    }
3116}
3117
3118/// `VPCMPGTD`.
3119///
3120/// Supported operand variants:
3121///
3122/// ```text
3123/// +----+----------------+
3124/// | #  | Operands       |
3125/// +----+----------------+
3126/// | 1  | KReg, Xmm, Mem |
3127/// | 2  | KReg, Xmm, Xmm |
3128/// | 3  | KReg, Ymm, Mem |
3129/// | 4  | KReg, Ymm, Ymm |
3130/// | 5  | KReg, Zmm, Mem |
3131/// | 6  | KReg, Zmm, Zmm |
3132/// | 7  | Xmm, Xmm, Mem  |
3133/// | 8  | Xmm, Xmm, Xmm  |
3134/// | 9  | Ymm, Ymm, Mem  |
3135/// | 10 | Ymm, Ymm, Ymm  |
3136/// +----+----------------+
3137/// ```
3138pub trait VpcmpgtdEmitter<A, B, C> {
3139    fn vpcmpgtd(&mut self, op0: A, op1: B, op2: C);
3140}
3141
3142impl<'a> VpcmpgtdEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
3143    fn vpcmpgtd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
3144        self.emit(
3145            VPCMPGTD128RRR,
3146            op0.as_operand(),
3147            op1.as_operand(),
3148            op2.as_operand(),
3149            &NOREG,
3150        );
3151    }
3152}
3153
3154impl<'a> VpcmpgtdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
3155    fn vpcmpgtd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
3156        self.emit(
3157            VPCMPGTD128RRM,
3158            op0.as_operand(),
3159            op1.as_operand(),
3160            op2.as_operand(),
3161            &NOREG,
3162        );
3163    }
3164}
3165
3166impl<'a> VpcmpgtdEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
3167    fn vpcmpgtd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
3168        self.emit(
3169            VPCMPGTD256RRR,
3170            op0.as_operand(),
3171            op1.as_operand(),
3172            op2.as_operand(),
3173            &NOREG,
3174        );
3175    }
3176}
3177
3178impl<'a> VpcmpgtdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
3179    fn vpcmpgtd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
3180        self.emit(
3181            VPCMPGTD256RRM,
3182            op0.as_operand(),
3183            op1.as_operand(),
3184            op2.as_operand(),
3185            &NOREG,
3186        );
3187    }
3188}
3189
3190impl<'a> VpcmpgtdEmitter<KReg, Xmm, Xmm> for Assembler<'a> {
3191    fn vpcmpgtd(&mut self, op0: KReg, op1: Xmm, op2: Xmm) {
3192        self.emit(
3193            VPCMPGTD128KRR,
3194            op0.as_operand(),
3195            op1.as_operand(),
3196            op2.as_operand(),
3197            &NOREG,
3198        );
3199    }
3200}
3201
3202impl<'a> VpcmpgtdEmitter<KReg, Xmm, Mem> for Assembler<'a> {
3203    fn vpcmpgtd(&mut self, op0: KReg, op1: Xmm, op2: Mem) {
3204        self.emit(
3205            VPCMPGTD128KRM,
3206            op0.as_operand(),
3207            op1.as_operand(),
3208            op2.as_operand(),
3209            &NOREG,
3210        );
3211    }
3212}
3213
3214impl<'a> VpcmpgtdEmitter<KReg, Ymm, Ymm> for Assembler<'a> {
3215    fn vpcmpgtd(&mut self, op0: KReg, op1: Ymm, op2: Ymm) {
3216        self.emit(
3217            VPCMPGTD256KRR,
3218            op0.as_operand(),
3219            op1.as_operand(),
3220            op2.as_operand(),
3221            &NOREG,
3222        );
3223    }
3224}
3225
3226impl<'a> VpcmpgtdEmitter<KReg, Ymm, Mem> for Assembler<'a> {
3227    fn vpcmpgtd(&mut self, op0: KReg, op1: Ymm, op2: Mem) {
3228        self.emit(
3229            VPCMPGTD256KRM,
3230            op0.as_operand(),
3231            op1.as_operand(),
3232            op2.as_operand(),
3233            &NOREG,
3234        );
3235    }
3236}
3237
3238impl<'a> VpcmpgtdEmitter<KReg, Zmm, Zmm> for Assembler<'a> {
3239    fn vpcmpgtd(&mut self, op0: KReg, op1: Zmm, op2: Zmm) {
3240        self.emit(
3241            VPCMPGTD512KRR,
3242            op0.as_operand(),
3243            op1.as_operand(),
3244            op2.as_operand(),
3245            &NOREG,
3246        );
3247    }
3248}
3249
3250impl<'a> VpcmpgtdEmitter<KReg, Zmm, Mem> for Assembler<'a> {
3251    fn vpcmpgtd(&mut self, op0: KReg, op1: Zmm, op2: Mem) {
3252        self.emit(
3253            VPCMPGTD512KRM,
3254            op0.as_operand(),
3255            op1.as_operand(),
3256            op2.as_operand(),
3257            &NOREG,
3258        );
3259    }
3260}
3261
3262/// `VPCMPGTQ`.
3263///
3264/// Supported operand variants:
3265///
3266/// ```text
3267/// +----+----------------+
3268/// | #  | Operands       |
3269/// +----+----------------+
3270/// | 1  | KReg, Xmm, Mem |
3271/// | 2  | KReg, Xmm, Xmm |
3272/// | 3  | KReg, Ymm, Mem |
3273/// | 4  | KReg, Ymm, Ymm |
3274/// | 5  | KReg, Zmm, Mem |
3275/// | 6  | KReg, Zmm, Zmm |
3276/// | 7  | Xmm, Xmm, Mem  |
3277/// | 8  | Xmm, Xmm, Xmm  |
3278/// | 9  | Ymm, Ymm, Mem  |
3279/// | 10 | Ymm, Ymm, Ymm  |
3280/// +----+----------------+
3281/// ```
3282pub trait VpcmpgtqEmitter<A, B, C> {
3283    fn vpcmpgtq(&mut self, op0: A, op1: B, op2: C);
3284}
3285
3286impl<'a> VpcmpgtqEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
3287    fn vpcmpgtq(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
3288        self.emit(
3289            VPCMPGTQ128RRR,
3290            op0.as_operand(),
3291            op1.as_operand(),
3292            op2.as_operand(),
3293            &NOREG,
3294        );
3295    }
3296}
3297
3298impl<'a> VpcmpgtqEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
3299    fn vpcmpgtq(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
3300        self.emit(
3301            VPCMPGTQ128RRM,
3302            op0.as_operand(),
3303            op1.as_operand(),
3304            op2.as_operand(),
3305            &NOREG,
3306        );
3307    }
3308}
3309
3310impl<'a> VpcmpgtqEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
3311    fn vpcmpgtq(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
3312        self.emit(
3313            VPCMPGTQ256RRR,
3314            op0.as_operand(),
3315            op1.as_operand(),
3316            op2.as_operand(),
3317            &NOREG,
3318        );
3319    }
3320}
3321
3322impl<'a> VpcmpgtqEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
3323    fn vpcmpgtq(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
3324        self.emit(
3325            VPCMPGTQ256RRM,
3326            op0.as_operand(),
3327            op1.as_operand(),
3328            op2.as_operand(),
3329            &NOREG,
3330        );
3331    }
3332}
3333
3334impl<'a> VpcmpgtqEmitter<KReg, Xmm, Xmm> for Assembler<'a> {
3335    fn vpcmpgtq(&mut self, op0: KReg, op1: Xmm, op2: Xmm) {
3336        self.emit(
3337            VPCMPGTQ128KRR,
3338            op0.as_operand(),
3339            op1.as_operand(),
3340            op2.as_operand(),
3341            &NOREG,
3342        );
3343    }
3344}
3345
3346impl<'a> VpcmpgtqEmitter<KReg, Xmm, Mem> for Assembler<'a> {
3347    fn vpcmpgtq(&mut self, op0: KReg, op1: Xmm, op2: Mem) {
3348        self.emit(
3349            VPCMPGTQ128KRM,
3350            op0.as_operand(),
3351            op1.as_operand(),
3352            op2.as_operand(),
3353            &NOREG,
3354        );
3355    }
3356}
3357
3358impl<'a> VpcmpgtqEmitter<KReg, Ymm, Ymm> for Assembler<'a> {
3359    fn vpcmpgtq(&mut self, op0: KReg, op1: Ymm, op2: Ymm) {
3360        self.emit(
3361            VPCMPGTQ256KRR,
3362            op0.as_operand(),
3363            op1.as_operand(),
3364            op2.as_operand(),
3365            &NOREG,
3366        );
3367    }
3368}
3369
3370impl<'a> VpcmpgtqEmitter<KReg, Ymm, Mem> for Assembler<'a> {
3371    fn vpcmpgtq(&mut self, op0: KReg, op1: Ymm, op2: Mem) {
3372        self.emit(
3373            VPCMPGTQ256KRM,
3374            op0.as_operand(),
3375            op1.as_operand(),
3376            op2.as_operand(),
3377            &NOREG,
3378        );
3379    }
3380}
3381
3382impl<'a> VpcmpgtqEmitter<KReg, Zmm, Zmm> for Assembler<'a> {
3383    fn vpcmpgtq(&mut self, op0: KReg, op1: Zmm, op2: Zmm) {
3384        self.emit(
3385            VPCMPGTQ512KRR,
3386            op0.as_operand(),
3387            op1.as_operand(),
3388            op2.as_operand(),
3389            &NOREG,
3390        );
3391    }
3392}
3393
3394impl<'a> VpcmpgtqEmitter<KReg, Zmm, Mem> for Assembler<'a> {
3395    fn vpcmpgtq(&mut self, op0: KReg, op1: Zmm, op2: Mem) {
3396        self.emit(
3397            VPCMPGTQ512KRM,
3398            op0.as_operand(),
3399            op1.as_operand(),
3400            op2.as_operand(),
3401            &NOREG,
3402        );
3403    }
3404}
3405
3406/// `VPCMPGTW`.
3407///
3408/// Supported operand variants:
3409///
3410/// ```text
3411/// +----+----------------+
3412/// | #  | Operands       |
3413/// +----+----------------+
3414/// | 1  | KReg, Xmm, Mem |
3415/// | 2  | KReg, Xmm, Xmm |
3416/// | 3  | KReg, Ymm, Mem |
3417/// | 4  | KReg, Ymm, Ymm |
3418/// | 5  | KReg, Zmm, Mem |
3419/// | 6  | KReg, Zmm, Zmm |
3420/// | 7  | Xmm, Xmm, Mem  |
3421/// | 8  | Xmm, Xmm, Xmm  |
3422/// | 9  | Ymm, Ymm, Mem  |
3423/// | 10 | Ymm, Ymm, Ymm  |
3424/// +----+----------------+
3425/// ```
3426pub trait VpcmpgtwEmitter<A, B, C> {
3427    fn vpcmpgtw(&mut self, op0: A, op1: B, op2: C);
3428}
3429
3430impl<'a> VpcmpgtwEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
3431    fn vpcmpgtw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
3432        self.emit(
3433            VPCMPGTW128RRR,
3434            op0.as_operand(),
3435            op1.as_operand(),
3436            op2.as_operand(),
3437            &NOREG,
3438        );
3439    }
3440}
3441
3442impl<'a> VpcmpgtwEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
3443    fn vpcmpgtw(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
3444        self.emit(
3445            VPCMPGTW128RRM,
3446            op0.as_operand(),
3447            op1.as_operand(),
3448            op2.as_operand(),
3449            &NOREG,
3450        );
3451    }
3452}
3453
3454impl<'a> VpcmpgtwEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
3455    fn vpcmpgtw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
3456        self.emit(
3457            VPCMPGTW256RRR,
3458            op0.as_operand(),
3459            op1.as_operand(),
3460            op2.as_operand(),
3461            &NOREG,
3462        );
3463    }
3464}
3465
3466impl<'a> VpcmpgtwEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
3467    fn vpcmpgtw(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
3468        self.emit(
3469            VPCMPGTW256RRM,
3470            op0.as_operand(),
3471            op1.as_operand(),
3472            op2.as_operand(),
3473            &NOREG,
3474        );
3475    }
3476}
3477
3478impl<'a> VpcmpgtwEmitter<KReg, Xmm, Xmm> for Assembler<'a> {
3479    fn vpcmpgtw(&mut self, op0: KReg, op1: Xmm, op2: Xmm) {
3480        self.emit(
3481            VPCMPGTW128KRR,
3482            op0.as_operand(),
3483            op1.as_operand(),
3484            op2.as_operand(),
3485            &NOREG,
3486        );
3487    }
3488}
3489
3490impl<'a> VpcmpgtwEmitter<KReg, Xmm, Mem> for Assembler<'a> {
3491    fn vpcmpgtw(&mut self, op0: KReg, op1: Xmm, op2: Mem) {
3492        self.emit(
3493            VPCMPGTW128KRM,
3494            op0.as_operand(),
3495            op1.as_operand(),
3496            op2.as_operand(),
3497            &NOREG,
3498        );
3499    }
3500}
3501
3502impl<'a> VpcmpgtwEmitter<KReg, Ymm, Ymm> for Assembler<'a> {
3503    fn vpcmpgtw(&mut self, op0: KReg, op1: Ymm, op2: Ymm) {
3504        self.emit(
3505            VPCMPGTW256KRR,
3506            op0.as_operand(),
3507            op1.as_operand(),
3508            op2.as_operand(),
3509            &NOREG,
3510        );
3511    }
3512}
3513
3514impl<'a> VpcmpgtwEmitter<KReg, Ymm, Mem> for Assembler<'a> {
3515    fn vpcmpgtw(&mut self, op0: KReg, op1: Ymm, op2: Mem) {
3516        self.emit(
3517            VPCMPGTW256KRM,
3518            op0.as_operand(),
3519            op1.as_operand(),
3520            op2.as_operand(),
3521            &NOREG,
3522        );
3523    }
3524}
3525
3526impl<'a> VpcmpgtwEmitter<KReg, Zmm, Zmm> for Assembler<'a> {
3527    fn vpcmpgtw(&mut self, op0: KReg, op1: Zmm, op2: Zmm) {
3528        self.emit(
3529            VPCMPGTW512KRR,
3530            op0.as_operand(),
3531            op1.as_operand(),
3532            op2.as_operand(),
3533            &NOREG,
3534        );
3535    }
3536}
3537
3538impl<'a> VpcmpgtwEmitter<KReg, Zmm, Mem> for Assembler<'a> {
3539    fn vpcmpgtw(&mut self, op0: KReg, op1: Zmm, op2: Mem) {
3540        self.emit(
3541            VPCMPGTW512KRM,
3542            op0.as_operand(),
3543            op1.as_operand(),
3544            op2.as_operand(),
3545            &NOREG,
3546        );
3547    }
3548}
3549
3550/// `VPCMPISTRI`.
3551///
3552/// Supported operand variants:
3553///
3554/// ```text
3555/// +---+---------------+
3556/// | # | Operands      |
3557/// +---+---------------+
3558/// | 1 | Xmm, Mem, Imm |
3559/// | 2 | Xmm, Xmm, Imm |
3560/// +---+---------------+
3561/// ```
3562pub trait VpcmpistriEmitter<A, B, C> {
3563    fn vpcmpistri(&mut self, op0: A, op1: B, op2: C);
3564}
3565
3566impl<'a> VpcmpistriEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
3567    fn vpcmpistri(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
3568        self.emit(
3569            VPCMPISTRIRRI,
3570            op0.as_operand(),
3571            op1.as_operand(),
3572            op2.as_operand(),
3573            &NOREG,
3574        );
3575    }
3576}
3577
3578impl<'a> VpcmpistriEmitter<Xmm, Mem, Imm> for Assembler<'a> {
3579    fn vpcmpistri(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
3580        self.emit(
3581            VPCMPISTRIRMI,
3582            op0.as_operand(),
3583            op1.as_operand(),
3584            op2.as_operand(),
3585            &NOREG,
3586        );
3587    }
3588}
3589
3590/// `VPCMPISTRM`.
3591///
3592/// Supported operand variants:
3593///
3594/// ```text
3595/// +---+---------------+
3596/// | # | Operands      |
3597/// +---+---------------+
3598/// | 1 | Xmm, Mem, Imm |
3599/// | 2 | Xmm, Xmm, Imm |
3600/// +---+---------------+
3601/// ```
3602pub trait VpcmpistrmEmitter<A, B, C> {
3603    fn vpcmpistrm(&mut self, op0: A, op1: B, op2: C);
3604}
3605
3606impl<'a> VpcmpistrmEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
3607    fn vpcmpistrm(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
3608        self.emit(
3609            VPCMPISTRMRRI,
3610            op0.as_operand(),
3611            op1.as_operand(),
3612            op2.as_operand(),
3613            &NOREG,
3614        );
3615    }
3616}
3617
3618impl<'a> VpcmpistrmEmitter<Xmm, Mem, Imm> for Assembler<'a> {
3619    fn vpcmpistrm(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
3620        self.emit(
3621            VPCMPISTRMRMI,
3622            op0.as_operand(),
3623            op1.as_operand(),
3624            op2.as_operand(),
3625            &NOREG,
3626        );
3627    }
3628}
3629
3630/// `VPERM2F128`.
3631///
3632/// Supported operand variants:
3633///
3634/// ```text
3635/// +---+--------------------+
3636/// | # | Operands           |
3637/// +---+--------------------+
3638/// | 1 | Ymm, Ymm, Mem, Imm |
3639/// | 2 | Ymm, Ymm, Ymm, Imm |
3640/// +---+--------------------+
3641/// ```
3642pub trait Vperm2f128Emitter<A, B, C, D> {
3643    fn vperm2f128(&mut self, op0: A, op1: B, op2: C, op3: D);
3644}
3645
3646impl<'a> Vperm2f128Emitter<Ymm, Ymm, Ymm, Imm> for Assembler<'a> {
3647    fn vperm2f128(&mut self, op0: Ymm, op1: Ymm, op2: Ymm, op3: Imm) {
3648        self.emit(
3649            VPERM2F128_256RRRI,
3650            op0.as_operand(),
3651            op1.as_operand(),
3652            op2.as_operand(),
3653            op3.as_operand(),
3654        );
3655    }
3656}
3657
3658impl<'a> Vperm2f128Emitter<Ymm, Ymm, Mem, Imm> for Assembler<'a> {
3659    fn vperm2f128(&mut self, op0: Ymm, op1: Ymm, op2: Mem, op3: Imm) {
3660        self.emit(
3661            VPERM2F128_256RRMI,
3662            op0.as_operand(),
3663            op1.as_operand(),
3664            op2.as_operand(),
3665            op3.as_operand(),
3666        );
3667    }
3668}
3669
3670/// `VPEXTRD`.
3671///
3672/// Supported operand variants:
3673///
3674/// ```text
3675/// +---+---------------+
3676/// | # | Operands      |
3677/// +---+---------------+
3678/// | 1 | Gpd, Xmm, Imm |
3679/// | 2 | Mem, Xmm, Imm |
3680/// +---+---------------+
3681/// ```
3682pub trait VpextrdEmitter<A, B, C> {
3683    fn vpextrd(&mut self, op0: A, op1: B, op2: C);
3684}
3685
3686impl<'a> VpextrdEmitter<Gpd, Xmm, Imm> for Assembler<'a> {
3687    fn vpextrd(&mut self, op0: Gpd, op1: Xmm, op2: Imm) {
3688        self.emit(
3689            VPEXTRDRRI,
3690            op0.as_operand(),
3691            op1.as_operand(),
3692            op2.as_operand(),
3693            &NOREG,
3694        );
3695    }
3696}
3697
3698impl<'a> VpextrdEmitter<Mem, Xmm, Imm> for Assembler<'a> {
3699    fn vpextrd(&mut self, op0: Mem, op1: Xmm, op2: Imm) {
3700        self.emit(
3701            VPEXTRDMRI,
3702            op0.as_operand(),
3703            op1.as_operand(),
3704            op2.as_operand(),
3705            &NOREG,
3706        );
3707    }
3708}
3709
3710/// `VPEXTRQ`.
3711///
3712/// Supported operand variants:
3713///
3714/// ```text
3715/// +---+---------------+
3716/// | # | Operands      |
3717/// +---+---------------+
3718/// | 1 | Gpd, Xmm, Imm |
3719/// | 2 | Gpq, Xmm, Imm |
3720/// | 3 | Mem, Xmm, Imm |
3721/// +---+---------------+
3722/// ```
3723pub trait VpextrqEmitter<A, B, C> {
3724    fn vpextrq(&mut self, op0: A, op1: B, op2: C);
3725}
3726
3727impl<'a> VpextrqEmitter<Gpd, Xmm, Imm> for Assembler<'a> {
3728    fn vpextrq(&mut self, op0: Gpd, op1: Xmm, op2: Imm) {
3729        self.emit(
3730            VPEXTRQRRI,
3731            op0.as_operand(),
3732            op1.as_operand(),
3733            op2.as_operand(),
3734            &NOREG,
3735        );
3736    }
3737}
3738
3739impl<'a> VpextrqEmitter<Mem, Xmm, Imm> for Assembler<'a> {
3740    fn vpextrq(&mut self, op0: Mem, op1: Xmm, op2: Imm) {
3741        self.emit(
3742            VPEXTRQMRI,
3743            op0.as_operand(),
3744            op1.as_operand(),
3745            op2.as_operand(),
3746            &NOREG,
3747        );
3748    }
3749}
3750
3751impl<'a> VpextrqEmitter<Gpq, Xmm, Imm> for Assembler<'a> {
3752    fn vpextrq(&mut self, op0: Gpq, op1: Xmm, op2: Imm) {
3753        self.emit(
3754            VPEXTRQRRI,
3755            op0.as_operand(),
3756            op1.as_operand(),
3757            op2.as_operand(),
3758            &NOREG,
3759        );
3760    }
3761}
3762
3763/// `VPHADDD`.
3764///
3765/// Supported operand variants:
3766///
3767/// ```text
3768/// +---+---------------+
3769/// | # | Operands      |
3770/// +---+---------------+
3771/// | 1 | Xmm, Xmm, Mem |
3772/// | 2 | Xmm, Xmm, Xmm |
3773/// | 3 | Ymm, Ymm, Mem |
3774/// | 4 | Ymm, Ymm, Ymm |
3775/// +---+---------------+
3776/// ```
3777pub trait VphadddEmitter<A, B, C> {
3778    fn vphaddd(&mut self, op0: A, op1: B, op2: C);
3779}
3780
3781impl<'a> VphadddEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
3782    fn vphaddd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
3783        self.emit(
3784            VPHADDD128RRR,
3785            op0.as_operand(),
3786            op1.as_operand(),
3787            op2.as_operand(),
3788            &NOREG,
3789        );
3790    }
3791}
3792
3793impl<'a> VphadddEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
3794    fn vphaddd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
3795        self.emit(
3796            VPHADDD128RRM,
3797            op0.as_operand(),
3798            op1.as_operand(),
3799            op2.as_operand(),
3800            &NOREG,
3801        );
3802    }
3803}
3804
3805impl<'a> VphadddEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
3806    fn vphaddd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
3807        self.emit(
3808            VPHADDD256RRR,
3809            op0.as_operand(),
3810            op1.as_operand(),
3811            op2.as_operand(),
3812            &NOREG,
3813        );
3814    }
3815}
3816
3817impl<'a> VphadddEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
3818    fn vphaddd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
3819        self.emit(
3820            VPHADDD256RRM,
3821            op0.as_operand(),
3822            op1.as_operand(),
3823            op2.as_operand(),
3824            &NOREG,
3825        );
3826    }
3827}
3828
3829/// `VPHADDSW`.
3830///
3831/// Supported operand variants:
3832///
3833/// ```text
3834/// +---+---------------+
3835/// | # | Operands      |
3836/// +---+---------------+
3837/// | 1 | Xmm, Xmm, Mem |
3838/// | 2 | Xmm, Xmm, Xmm |
3839/// | 3 | Ymm, Ymm, Mem |
3840/// | 4 | Ymm, Ymm, Ymm |
3841/// +---+---------------+
3842/// ```
3843pub trait VphaddswEmitter<A, B, C> {
3844    fn vphaddsw(&mut self, op0: A, op1: B, op2: C);
3845}
3846
3847impl<'a> VphaddswEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
3848    fn vphaddsw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
3849        self.emit(
3850            VPHADDSW128RRR,
3851            op0.as_operand(),
3852            op1.as_operand(),
3853            op2.as_operand(),
3854            &NOREG,
3855        );
3856    }
3857}
3858
3859impl<'a> VphaddswEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
3860    fn vphaddsw(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
3861        self.emit(
3862            VPHADDSW128RRM,
3863            op0.as_operand(),
3864            op1.as_operand(),
3865            op2.as_operand(),
3866            &NOREG,
3867        );
3868    }
3869}
3870
3871impl<'a> VphaddswEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
3872    fn vphaddsw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
3873        self.emit(
3874            VPHADDSW256RRR,
3875            op0.as_operand(),
3876            op1.as_operand(),
3877            op2.as_operand(),
3878            &NOREG,
3879        );
3880    }
3881}
3882
3883impl<'a> VphaddswEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
3884    fn vphaddsw(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
3885        self.emit(
3886            VPHADDSW256RRM,
3887            op0.as_operand(),
3888            op1.as_operand(),
3889            op2.as_operand(),
3890            &NOREG,
3891        );
3892    }
3893}
3894
3895/// `VPHADDW`.
3896///
3897/// Supported operand variants:
3898///
3899/// ```text
3900/// +---+---------------+
3901/// | # | Operands      |
3902/// +---+---------------+
3903/// | 1 | Xmm, Xmm, Mem |
3904/// | 2 | Xmm, Xmm, Xmm |
3905/// | 3 | Ymm, Ymm, Mem |
3906/// | 4 | Ymm, Ymm, Ymm |
3907/// +---+---------------+
3908/// ```
3909pub trait VphaddwEmitter<A, B, C> {
3910    fn vphaddw(&mut self, op0: A, op1: B, op2: C);
3911}
3912
3913impl<'a> VphaddwEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
3914    fn vphaddw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
3915        self.emit(
3916            VPHADDW128RRR,
3917            op0.as_operand(),
3918            op1.as_operand(),
3919            op2.as_operand(),
3920            &NOREG,
3921        );
3922    }
3923}
3924
3925impl<'a> VphaddwEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
3926    fn vphaddw(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
3927        self.emit(
3928            VPHADDW128RRM,
3929            op0.as_operand(),
3930            op1.as_operand(),
3931            op2.as_operand(),
3932            &NOREG,
3933        );
3934    }
3935}
3936
3937impl<'a> VphaddwEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
3938    fn vphaddw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
3939        self.emit(
3940            VPHADDW256RRR,
3941            op0.as_operand(),
3942            op1.as_operand(),
3943            op2.as_operand(),
3944            &NOREG,
3945        );
3946    }
3947}
3948
3949impl<'a> VphaddwEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
3950    fn vphaddw(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
3951        self.emit(
3952            VPHADDW256RRM,
3953            op0.as_operand(),
3954            op1.as_operand(),
3955            op2.as_operand(),
3956            &NOREG,
3957        );
3958    }
3959}
3960
3961/// `VPHMINPOSUW`.
3962///
3963/// Supported operand variants:
3964///
3965/// ```text
3966/// +---+----------+
3967/// | # | Operands |
3968/// +---+----------+
3969/// | 1 | Xmm, Mem |
3970/// | 2 | Xmm, Xmm |
3971/// +---+----------+
3972/// ```
3973pub trait VphminposuwEmitter<A, B> {
3974    fn vphminposuw(&mut self, op0: A, op1: B);
3975}
3976
3977impl<'a> VphminposuwEmitter<Xmm, Xmm> for Assembler<'a> {
3978    fn vphminposuw(&mut self, op0: Xmm, op1: Xmm) {
3979        self.emit(
3980            VPHMINPOSUW128RR,
3981            op0.as_operand(),
3982            op1.as_operand(),
3983            &NOREG,
3984            &NOREG,
3985        );
3986    }
3987}
3988
3989impl<'a> VphminposuwEmitter<Xmm, Mem> for Assembler<'a> {
3990    fn vphminposuw(&mut self, op0: Xmm, op1: Mem) {
3991        self.emit(
3992            VPHMINPOSUW128RM,
3993            op0.as_operand(),
3994            op1.as_operand(),
3995            &NOREG,
3996            &NOREG,
3997        );
3998    }
3999}
4000
4001/// `VPHSUBD`.
4002///
4003/// Supported operand variants:
4004///
4005/// ```text
4006/// +---+---------------+
4007/// | # | Operands      |
4008/// +---+---------------+
4009/// | 1 | Xmm, Xmm, Mem |
4010/// | 2 | Xmm, Xmm, Xmm |
4011/// | 3 | Ymm, Ymm, Mem |
4012/// | 4 | Ymm, Ymm, Ymm |
4013/// +---+---------------+
4014/// ```
4015pub trait VphsubdEmitter<A, B, C> {
4016    fn vphsubd(&mut self, op0: A, op1: B, op2: C);
4017}
4018
4019impl<'a> VphsubdEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4020    fn vphsubd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4021        self.emit(
4022            VPHSUBD128RRR,
4023            op0.as_operand(),
4024            op1.as_operand(),
4025            op2.as_operand(),
4026            &NOREG,
4027        );
4028    }
4029}
4030
4031impl<'a> VphsubdEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4032    fn vphsubd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4033        self.emit(
4034            VPHSUBD128RRM,
4035            op0.as_operand(),
4036            op1.as_operand(),
4037            op2.as_operand(),
4038            &NOREG,
4039        );
4040    }
4041}
4042
4043impl<'a> VphsubdEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
4044    fn vphsubd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
4045        self.emit(
4046            VPHSUBD256RRR,
4047            op0.as_operand(),
4048            op1.as_operand(),
4049            op2.as_operand(),
4050            &NOREG,
4051        );
4052    }
4053}
4054
4055impl<'a> VphsubdEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
4056    fn vphsubd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
4057        self.emit(
4058            VPHSUBD256RRM,
4059            op0.as_operand(),
4060            op1.as_operand(),
4061            op2.as_operand(),
4062            &NOREG,
4063        );
4064    }
4065}
4066
4067/// `VPHSUBSW`.
4068///
4069/// Supported operand variants:
4070///
4071/// ```text
4072/// +---+---------------+
4073/// | # | Operands      |
4074/// +---+---------------+
4075/// | 1 | Xmm, Xmm, Mem |
4076/// | 2 | Xmm, Xmm, Xmm |
4077/// | 3 | Ymm, Ymm, Mem |
4078/// | 4 | Ymm, Ymm, Ymm |
4079/// +---+---------------+
4080/// ```
4081pub trait VphsubswEmitter<A, B, C> {
4082    fn vphsubsw(&mut self, op0: A, op1: B, op2: C);
4083}
4084
4085impl<'a> VphsubswEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4086    fn vphsubsw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4087        self.emit(
4088            VPHSUBSW128RRR,
4089            op0.as_operand(),
4090            op1.as_operand(),
4091            op2.as_operand(),
4092            &NOREG,
4093        );
4094    }
4095}
4096
4097impl<'a> VphsubswEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4098    fn vphsubsw(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4099        self.emit(
4100            VPHSUBSW128RRM,
4101            op0.as_operand(),
4102            op1.as_operand(),
4103            op2.as_operand(),
4104            &NOREG,
4105        );
4106    }
4107}
4108
4109impl<'a> VphsubswEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
4110    fn vphsubsw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
4111        self.emit(
4112            VPHSUBSW256RRR,
4113            op0.as_operand(),
4114            op1.as_operand(),
4115            op2.as_operand(),
4116            &NOREG,
4117        );
4118    }
4119}
4120
4121impl<'a> VphsubswEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
4122    fn vphsubsw(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
4123        self.emit(
4124            VPHSUBSW256RRM,
4125            op0.as_operand(),
4126            op1.as_operand(),
4127            op2.as_operand(),
4128            &NOREG,
4129        );
4130    }
4131}
4132
4133/// `VPHSUBW`.
4134///
4135/// Supported operand variants:
4136///
4137/// ```text
4138/// +---+---------------+
4139/// | # | Operands      |
4140/// +---+---------------+
4141/// | 1 | Xmm, Xmm, Mem |
4142/// | 2 | Xmm, Xmm, Xmm |
4143/// | 3 | Ymm, Ymm, Mem |
4144/// | 4 | Ymm, Ymm, Ymm |
4145/// +---+---------------+
4146/// ```
4147pub trait VphsubwEmitter<A, B, C> {
4148    fn vphsubw(&mut self, op0: A, op1: B, op2: C);
4149}
4150
4151impl<'a> VphsubwEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4152    fn vphsubw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4153        self.emit(
4154            VPHSUBW128RRR,
4155            op0.as_operand(),
4156            op1.as_operand(),
4157            op2.as_operand(),
4158            &NOREG,
4159        );
4160    }
4161}
4162
4163impl<'a> VphsubwEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4164    fn vphsubw(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4165        self.emit(
4166            VPHSUBW128RRM,
4167            op0.as_operand(),
4168            op1.as_operand(),
4169            op2.as_operand(),
4170            &NOREG,
4171        );
4172    }
4173}
4174
4175impl<'a> VphsubwEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
4176    fn vphsubw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
4177        self.emit(
4178            VPHSUBW256RRR,
4179            op0.as_operand(),
4180            op1.as_operand(),
4181            op2.as_operand(),
4182            &NOREG,
4183        );
4184    }
4185}
4186
4187impl<'a> VphsubwEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
4188    fn vphsubw(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
4189        self.emit(
4190            VPHSUBW256RRM,
4191            op0.as_operand(),
4192            op1.as_operand(),
4193            op2.as_operand(),
4194            &NOREG,
4195        );
4196    }
4197}
4198
4199/// `VPINSRD`.
4200///
4201/// Supported operand variants:
4202///
4203/// ```text
4204/// +---+--------------------+
4205/// | # | Operands           |
4206/// +---+--------------------+
4207/// | 1 | Xmm, Xmm, Gpd, Imm |
4208/// | 2 | Xmm, Xmm, Mem, Imm |
4209/// +---+--------------------+
4210/// ```
4211pub trait VpinsrdEmitter<A, B, C, D> {
4212    fn vpinsrd(&mut self, op0: A, op1: B, op2: C, op3: D);
4213}
4214
4215impl<'a> VpinsrdEmitter<Xmm, Xmm, Gpd, Imm> for Assembler<'a> {
4216    fn vpinsrd(&mut self, op0: Xmm, op1: Xmm, op2: Gpd, op3: Imm) {
4217        self.emit(
4218            VPINSRDRRRI,
4219            op0.as_operand(),
4220            op1.as_operand(),
4221            op2.as_operand(),
4222            op3.as_operand(),
4223        );
4224    }
4225}
4226
4227impl<'a> VpinsrdEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
4228    fn vpinsrd(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
4229        self.emit(
4230            VPINSRDRRMI,
4231            op0.as_operand(),
4232            op1.as_operand(),
4233            op2.as_operand(),
4234            op3.as_operand(),
4235        );
4236    }
4237}
4238
4239/// `VPINSRQ`.
4240///
4241/// Supported operand variants:
4242///
4243/// ```text
4244/// +---+--------------------+
4245/// | # | Operands           |
4246/// +---+--------------------+
4247/// | 1 | Xmm, Xmm, Gpd, Imm |
4248/// | 2 | Xmm, Xmm, Gpq, Imm |
4249/// | 3 | Xmm, Xmm, Mem, Imm |
4250/// +---+--------------------+
4251/// ```
4252pub trait VpinsrqEmitter<A, B, C, D> {
4253    fn vpinsrq(&mut self, op0: A, op1: B, op2: C, op3: D);
4254}
4255
4256impl<'a> VpinsrqEmitter<Xmm, Xmm, Gpd, Imm> for Assembler<'a> {
4257    fn vpinsrq(&mut self, op0: Xmm, op1: Xmm, op2: Gpd, op3: Imm) {
4258        self.emit(
4259            VPINSRQRRRI,
4260            op0.as_operand(),
4261            op1.as_operand(),
4262            op2.as_operand(),
4263            op3.as_operand(),
4264        );
4265    }
4266}
4267
4268impl<'a> VpinsrqEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
4269    fn vpinsrq(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
4270        self.emit(
4271            VPINSRQRRMI,
4272            op0.as_operand(),
4273            op1.as_operand(),
4274            op2.as_operand(),
4275            op3.as_operand(),
4276        );
4277    }
4278}
4279
4280impl<'a> VpinsrqEmitter<Xmm, Xmm, Gpq, Imm> for Assembler<'a> {
4281    fn vpinsrq(&mut self, op0: Xmm, op1: Xmm, op2: Gpq, op3: Imm) {
4282        self.emit(
4283            VPINSRQRRRI,
4284            op0.as_operand(),
4285            op1.as_operand(),
4286            op2.as_operand(),
4287            op3.as_operand(),
4288        );
4289    }
4290}
4291
4292/// `VPMOVMSKB`.
4293///
4294/// Supported operand variants:
4295///
4296/// ```text
4297/// +---+----------+
4298/// | # | Operands |
4299/// +---+----------+
4300/// | 1 | Gpd, Xmm |
4301/// | 2 | Gpd, Ymm |
4302/// +---+----------+
4303/// ```
4304pub trait VpmovmskbEmitter<A, B> {
4305    fn vpmovmskb(&mut self, op0: A, op1: B);
4306}
4307
4308impl<'a> VpmovmskbEmitter<Gpd, Xmm> for Assembler<'a> {
4309    fn vpmovmskb(&mut self, op0: Gpd, op1: Xmm) {
4310        self.emit(
4311            VPMOVMSKB128RR,
4312            op0.as_operand(),
4313            op1.as_operand(),
4314            &NOREG,
4315            &NOREG,
4316        );
4317    }
4318}
4319
4320impl<'a> VpmovmskbEmitter<Gpd, Ymm> for Assembler<'a> {
4321    fn vpmovmskb(&mut self, op0: Gpd, op1: Ymm) {
4322        self.emit(
4323            VPMOVMSKB256RR,
4324            op0.as_operand(),
4325            op1.as_operand(),
4326            &NOREG,
4327            &NOREG,
4328        );
4329    }
4330}
4331
4332/// `VPOR`.
4333///
4334/// Supported operand variants:
4335///
4336/// ```text
4337/// +---+---------------+
4338/// | # | Operands      |
4339/// +---+---------------+
4340/// | 1 | Xmm, Xmm, Mem |
4341/// | 2 | Xmm, Xmm, Xmm |
4342/// | 3 | Ymm, Ymm, Mem |
4343/// | 4 | Ymm, Ymm, Ymm |
4344/// +---+---------------+
4345/// ```
4346pub trait VporEmitter<A, B, C> {
4347    fn vpor(&mut self, op0: A, op1: B, op2: C);
4348}
4349
4350impl<'a> VporEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4351    fn vpor(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4352        self.emit(
4353            VPOR128RRR,
4354            op0.as_operand(),
4355            op1.as_operand(),
4356            op2.as_operand(),
4357            &NOREG,
4358        );
4359    }
4360}
4361
4362impl<'a> VporEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4363    fn vpor(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4364        self.emit(
4365            VPOR128RRM,
4366            op0.as_operand(),
4367            op1.as_operand(),
4368            op2.as_operand(),
4369            &NOREG,
4370        );
4371    }
4372}
4373
4374impl<'a> VporEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
4375    fn vpor(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
4376        self.emit(
4377            VPOR256RRR,
4378            op0.as_operand(),
4379            op1.as_operand(),
4380            op2.as_operand(),
4381            &NOREG,
4382        );
4383    }
4384}
4385
4386impl<'a> VporEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
4387    fn vpor(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
4388        self.emit(
4389            VPOR256RRM,
4390            op0.as_operand(),
4391            op1.as_operand(),
4392            op2.as_operand(),
4393            &NOREG,
4394        );
4395    }
4396}
4397
4398/// `VPSIGNB`.
4399///
4400/// Supported operand variants:
4401///
4402/// ```text
4403/// +---+---------------+
4404/// | # | Operands      |
4405/// +---+---------------+
4406/// | 1 | Xmm, Xmm, Mem |
4407/// | 2 | Xmm, Xmm, Xmm |
4408/// | 3 | Ymm, Ymm, Mem |
4409/// | 4 | Ymm, Ymm, Ymm |
4410/// +---+---------------+
4411/// ```
4412pub trait VpsignbEmitter<A, B, C> {
4413    fn vpsignb(&mut self, op0: A, op1: B, op2: C);
4414}
4415
4416impl<'a> VpsignbEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4417    fn vpsignb(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4418        self.emit(
4419            VPSIGNB128RRR,
4420            op0.as_operand(),
4421            op1.as_operand(),
4422            op2.as_operand(),
4423            &NOREG,
4424        );
4425    }
4426}
4427
4428impl<'a> VpsignbEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4429    fn vpsignb(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4430        self.emit(
4431            VPSIGNB128RRM,
4432            op0.as_operand(),
4433            op1.as_operand(),
4434            op2.as_operand(),
4435            &NOREG,
4436        );
4437    }
4438}
4439
4440impl<'a> VpsignbEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
4441    fn vpsignb(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
4442        self.emit(
4443            VPSIGNB256RRR,
4444            op0.as_operand(),
4445            op1.as_operand(),
4446            op2.as_operand(),
4447            &NOREG,
4448        );
4449    }
4450}
4451
4452impl<'a> VpsignbEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
4453    fn vpsignb(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
4454        self.emit(
4455            VPSIGNB256RRM,
4456            op0.as_operand(),
4457            op1.as_operand(),
4458            op2.as_operand(),
4459            &NOREG,
4460        );
4461    }
4462}
4463
4464/// `VPSIGND`.
4465///
4466/// Supported operand variants:
4467///
4468/// ```text
4469/// +---+---------------+
4470/// | # | Operands      |
4471/// +---+---------------+
4472/// | 1 | Xmm, Xmm, Mem |
4473/// | 2 | Xmm, Xmm, Xmm |
4474/// | 3 | Ymm, Ymm, Mem |
4475/// | 4 | Ymm, Ymm, Ymm |
4476/// +---+---------------+
4477/// ```
4478pub trait VpsigndEmitter<A, B, C> {
4479    fn vpsignd(&mut self, op0: A, op1: B, op2: C);
4480}
4481
4482impl<'a> VpsigndEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4483    fn vpsignd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4484        self.emit(
4485            VPSIGND128RRR,
4486            op0.as_operand(),
4487            op1.as_operand(),
4488            op2.as_operand(),
4489            &NOREG,
4490        );
4491    }
4492}
4493
4494impl<'a> VpsigndEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4495    fn vpsignd(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4496        self.emit(
4497            VPSIGND128RRM,
4498            op0.as_operand(),
4499            op1.as_operand(),
4500            op2.as_operand(),
4501            &NOREG,
4502        );
4503    }
4504}
4505
4506impl<'a> VpsigndEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
4507    fn vpsignd(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
4508        self.emit(
4509            VPSIGND256RRR,
4510            op0.as_operand(),
4511            op1.as_operand(),
4512            op2.as_operand(),
4513            &NOREG,
4514        );
4515    }
4516}
4517
4518impl<'a> VpsigndEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
4519    fn vpsignd(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
4520        self.emit(
4521            VPSIGND256RRM,
4522            op0.as_operand(),
4523            op1.as_operand(),
4524            op2.as_operand(),
4525            &NOREG,
4526        );
4527    }
4528}
4529
4530/// `VPSIGNW`.
4531///
4532/// Supported operand variants:
4533///
4534/// ```text
4535/// +---+---------------+
4536/// | # | Operands      |
4537/// +---+---------------+
4538/// | 1 | Xmm, Xmm, Mem |
4539/// | 2 | Xmm, Xmm, Xmm |
4540/// | 3 | Ymm, Ymm, Mem |
4541/// | 4 | Ymm, Ymm, Ymm |
4542/// +---+---------------+
4543/// ```
4544pub trait VpsignwEmitter<A, B, C> {
4545    fn vpsignw(&mut self, op0: A, op1: B, op2: C);
4546}
4547
4548impl<'a> VpsignwEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4549    fn vpsignw(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4550        self.emit(
4551            VPSIGNW128RRR,
4552            op0.as_operand(),
4553            op1.as_operand(),
4554            op2.as_operand(),
4555            &NOREG,
4556        );
4557    }
4558}
4559
4560impl<'a> VpsignwEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4561    fn vpsignw(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4562        self.emit(
4563            VPSIGNW128RRM,
4564            op0.as_operand(),
4565            op1.as_operand(),
4566            op2.as_operand(),
4567            &NOREG,
4568        );
4569    }
4570}
4571
4572impl<'a> VpsignwEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
4573    fn vpsignw(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
4574        self.emit(
4575            VPSIGNW256RRR,
4576            op0.as_operand(),
4577            op1.as_operand(),
4578            op2.as_operand(),
4579            &NOREG,
4580        );
4581    }
4582}
4583
4584impl<'a> VpsignwEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
4585    fn vpsignw(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
4586        self.emit(
4587            VPSIGNW256RRM,
4588            op0.as_operand(),
4589            op1.as_operand(),
4590            op2.as_operand(),
4591            &NOREG,
4592        );
4593    }
4594}
4595
4596/// `VPTEST`.
4597///
4598/// Supported operand variants:
4599///
4600/// ```text
4601/// +---+----------+
4602/// | # | Operands |
4603/// +---+----------+
4604/// | 1 | Xmm, Mem |
4605/// | 2 | Xmm, Xmm |
4606/// | 3 | Ymm, Mem |
4607/// | 4 | Ymm, Ymm |
4608/// +---+----------+
4609/// ```
4610pub trait VptestEmitter<A, B> {
4611    fn vptest(&mut self, op0: A, op1: B);
4612}
4613
4614impl<'a> VptestEmitter<Xmm, Xmm> for Assembler<'a> {
4615    fn vptest(&mut self, op0: Xmm, op1: Xmm) {
4616        self.emit(
4617            VPTEST128RR,
4618            op0.as_operand(),
4619            op1.as_operand(),
4620            &NOREG,
4621            &NOREG,
4622        );
4623    }
4624}
4625
4626impl<'a> VptestEmitter<Xmm, Mem> for Assembler<'a> {
4627    fn vptest(&mut self, op0: Xmm, op1: Mem) {
4628        self.emit(
4629            VPTEST128RM,
4630            op0.as_operand(),
4631            op1.as_operand(),
4632            &NOREG,
4633            &NOREG,
4634        );
4635    }
4636}
4637
4638impl<'a> VptestEmitter<Ymm, Ymm> for Assembler<'a> {
4639    fn vptest(&mut self, op0: Ymm, op1: Ymm) {
4640        self.emit(
4641            VPTEST256RR,
4642            op0.as_operand(),
4643            op1.as_operand(),
4644            &NOREG,
4645            &NOREG,
4646        );
4647    }
4648}
4649
4650impl<'a> VptestEmitter<Ymm, Mem> for Assembler<'a> {
4651    fn vptest(&mut self, op0: Ymm, op1: Mem) {
4652        self.emit(
4653            VPTEST256RM,
4654            op0.as_operand(),
4655            op1.as_operand(),
4656            &NOREG,
4657            &NOREG,
4658        );
4659    }
4660}
4661
4662/// `VPXOR`.
4663///
4664/// Supported operand variants:
4665///
4666/// ```text
4667/// +---+---------------+
4668/// | # | Operands      |
4669/// +---+---------------+
4670/// | 1 | Xmm, Xmm, Mem |
4671/// | 2 | Xmm, Xmm, Xmm |
4672/// | 3 | Ymm, Ymm, Mem |
4673/// | 4 | Ymm, Ymm, Ymm |
4674/// +---+---------------+
4675/// ```
4676pub trait VpxorEmitter<A, B, C> {
4677    fn vpxor(&mut self, op0: A, op1: B, op2: C);
4678}
4679
4680impl<'a> VpxorEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4681    fn vpxor(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4682        self.emit(
4683            VPXOR128RRR,
4684            op0.as_operand(),
4685            op1.as_operand(),
4686            op2.as_operand(),
4687            &NOREG,
4688        );
4689    }
4690}
4691
4692impl<'a> VpxorEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4693    fn vpxor(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4694        self.emit(
4695            VPXOR128RRM,
4696            op0.as_operand(),
4697            op1.as_operand(),
4698            op2.as_operand(),
4699            &NOREG,
4700        );
4701    }
4702}
4703
4704impl<'a> VpxorEmitter<Ymm, Ymm, Ymm> for Assembler<'a> {
4705    fn vpxor(&mut self, op0: Ymm, op1: Ymm, op2: Ymm) {
4706        self.emit(
4707            VPXOR256RRR,
4708            op0.as_operand(),
4709            op1.as_operand(),
4710            op2.as_operand(),
4711            &NOREG,
4712        );
4713    }
4714}
4715
4716impl<'a> VpxorEmitter<Ymm, Ymm, Mem> for Assembler<'a> {
4717    fn vpxor(&mut self, op0: Ymm, op1: Ymm, op2: Mem) {
4718        self.emit(
4719            VPXOR256RRM,
4720            op0.as_operand(),
4721            op1.as_operand(),
4722            op2.as_operand(),
4723            &NOREG,
4724        );
4725    }
4726}
4727
4728/// `VRCPPS`.
4729///
4730/// Supported operand variants:
4731///
4732/// ```text
4733/// +---+----------+
4734/// | # | Operands |
4735/// +---+----------+
4736/// | 1 | Xmm, Mem |
4737/// | 2 | Xmm, Xmm |
4738/// | 3 | Ymm, Mem |
4739/// | 4 | Ymm, Ymm |
4740/// +---+----------+
4741/// ```
4742pub trait VrcppsEmitter<A, B> {
4743    fn vrcpps(&mut self, op0: A, op1: B);
4744}
4745
4746impl<'a> VrcppsEmitter<Xmm, Xmm> for Assembler<'a> {
4747    fn vrcpps(&mut self, op0: Xmm, op1: Xmm) {
4748        self.emit(
4749            VRCPPS128RR,
4750            op0.as_operand(),
4751            op1.as_operand(),
4752            &NOREG,
4753            &NOREG,
4754        );
4755    }
4756}
4757
4758impl<'a> VrcppsEmitter<Xmm, Mem> for Assembler<'a> {
4759    fn vrcpps(&mut self, op0: Xmm, op1: Mem) {
4760        self.emit(
4761            VRCPPS128RM,
4762            op0.as_operand(),
4763            op1.as_operand(),
4764            &NOREG,
4765            &NOREG,
4766        );
4767    }
4768}
4769
4770impl<'a> VrcppsEmitter<Ymm, Ymm> for Assembler<'a> {
4771    fn vrcpps(&mut self, op0: Ymm, op1: Ymm) {
4772        self.emit(
4773            VRCPPS256RR,
4774            op0.as_operand(),
4775            op1.as_operand(),
4776            &NOREG,
4777            &NOREG,
4778        );
4779    }
4780}
4781
4782impl<'a> VrcppsEmitter<Ymm, Mem> for Assembler<'a> {
4783    fn vrcpps(&mut self, op0: Ymm, op1: Mem) {
4784        self.emit(
4785            VRCPPS256RM,
4786            op0.as_operand(),
4787            op1.as_operand(),
4788            &NOREG,
4789            &NOREG,
4790        );
4791    }
4792}
4793
4794/// `VRCPSS`.
4795///
4796/// Supported operand variants:
4797///
4798/// ```text
4799/// +---+---------------+
4800/// | # | Operands      |
4801/// +---+---------------+
4802/// | 1 | Xmm, Xmm, Mem |
4803/// | 2 | Xmm, Xmm, Xmm |
4804/// +---+---------------+
4805/// ```
4806pub trait VrcpssEmitter<A, B, C> {
4807    fn vrcpss(&mut self, op0: A, op1: B, op2: C);
4808}
4809
4810impl<'a> VrcpssEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
4811    fn vrcpss(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
4812        self.emit(
4813            VRCPSSRRR,
4814            op0.as_operand(),
4815            op1.as_operand(),
4816            op2.as_operand(),
4817            &NOREG,
4818        );
4819    }
4820}
4821
4822impl<'a> VrcpssEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
4823    fn vrcpss(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
4824        self.emit(
4825            VRCPSSRRM,
4826            op0.as_operand(),
4827            op1.as_operand(),
4828            op2.as_operand(),
4829            &NOREG,
4830        );
4831    }
4832}
4833
4834/// `VROUNDPD`.
4835///
4836/// Supported operand variants:
4837///
4838/// ```text
4839/// +---+---------------+
4840/// | # | Operands      |
4841/// +---+---------------+
4842/// | 1 | Xmm, Mem, Imm |
4843/// | 2 | Xmm, Xmm, Imm |
4844/// | 3 | Ymm, Mem, Imm |
4845/// | 4 | Ymm, Ymm, Imm |
4846/// +---+---------------+
4847/// ```
4848pub trait VroundpdEmitter<A, B, C> {
4849    fn vroundpd(&mut self, op0: A, op1: B, op2: C);
4850}
4851
4852impl<'a> VroundpdEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
4853    fn vroundpd(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
4854        self.emit(
4855            VROUNDPD128RRI,
4856            op0.as_operand(),
4857            op1.as_operand(),
4858            op2.as_operand(),
4859            &NOREG,
4860        );
4861    }
4862}
4863
4864impl<'a> VroundpdEmitter<Xmm, Mem, Imm> for Assembler<'a> {
4865    fn vroundpd(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
4866        self.emit(
4867            VROUNDPD128RMI,
4868            op0.as_operand(),
4869            op1.as_operand(),
4870            op2.as_operand(),
4871            &NOREG,
4872        );
4873    }
4874}
4875
4876impl<'a> VroundpdEmitter<Ymm, Ymm, Imm> for Assembler<'a> {
4877    fn vroundpd(&mut self, op0: Ymm, op1: Ymm, op2: Imm) {
4878        self.emit(
4879            VROUNDPD256RRI,
4880            op0.as_operand(),
4881            op1.as_operand(),
4882            op2.as_operand(),
4883            &NOREG,
4884        );
4885    }
4886}
4887
4888impl<'a> VroundpdEmitter<Ymm, Mem, Imm> for Assembler<'a> {
4889    fn vroundpd(&mut self, op0: Ymm, op1: Mem, op2: Imm) {
4890        self.emit(
4891            VROUNDPD256RMI,
4892            op0.as_operand(),
4893            op1.as_operand(),
4894            op2.as_operand(),
4895            &NOREG,
4896        );
4897    }
4898}
4899
4900/// `VROUNDPS`.
4901///
4902/// Supported operand variants:
4903///
4904/// ```text
4905/// +---+---------------+
4906/// | # | Operands      |
4907/// +---+---------------+
4908/// | 1 | Xmm, Mem, Imm |
4909/// | 2 | Xmm, Xmm, Imm |
4910/// | 3 | Ymm, Mem, Imm |
4911/// | 4 | Ymm, Ymm, Imm |
4912/// +---+---------------+
4913/// ```
4914pub trait VroundpsEmitter<A, B, C> {
4915    fn vroundps(&mut self, op0: A, op1: B, op2: C);
4916}
4917
4918impl<'a> VroundpsEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
4919    fn vroundps(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
4920        self.emit(
4921            VROUNDPS128RRI,
4922            op0.as_operand(),
4923            op1.as_operand(),
4924            op2.as_operand(),
4925            &NOREG,
4926        );
4927    }
4928}
4929
4930impl<'a> VroundpsEmitter<Xmm, Mem, Imm> for Assembler<'a> {
4931    fn vroundps(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
4932        self.emit(
4933            VROUNDPS128RMI,
4934            op0.as_operand(),
4935            op1.as_operand(),
4936            op2.as_operand(),
4937            &NOREG,
4938        );
4939    }
4940}
4941
4942impl<'a> VroundpsEmitter<Ymm, Ymm, Imm> for Assembler<'a> {
4943    fn vroundps(&mut self, op0: Ymm, op1: Ymm, op2: Imm) {
4944        self.emit(
4945            VROUNDPS256RRI,
4946            op0.as_operand(),
4947            op1.as_operand(),
4948            op2.as_operand(),
4949            &NOREG,
4950        );
4951    }
4952}
4953
4954impl<'a> VroundpsEmitter<Ymm, Mem, Imm> for Assembler<'a> {
4955    fn vroundps(&mut self, op0: Ymm, op1: Mem, op2: Imm) {
4956        self.emit(
4957            VROUNDPS256RMI,
4958            op0.as_operand(),
4959            op1.as_operand(),
4960            op2.as_operand(),
4961            &NOREG,
4962        );
4963    }
4964}
4965
4966/// `VROUNDSD`.
4967///
4968/// Supported operand variants:
4969///
4970/// ```text
4971/// +---+--------------------+
4972/// | # | Operands           |
4973/// +---+--------------------+
4974/// | 1 | Xmm, Xmm, Mem, Imm |
4975/// | 2 | Xmm, Xmm, Xmm, Imm |
4976/// +---+--------------------+
4977/// ```
4978pub trait VroundsdEmitter<A, B, C, D> {
4979    fn vroundsd(&mut self, op0: A, op1: B, op2: C, op3: D);
4980}
4981
4982impl<'a> VroundsdEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
4983    fn vroundsd(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
4984        self.emit(
4985            VROUNDSDRRRI,
4986            op0.as_operand(),
4987            op1.as_operand(),
4988            op2.as_operand(),
4989            op3.as_operand(),
4990        );
4991    }
4992}
4993
4994impl<'a> VroundsdEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
4995    fn vroundsd(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
4996        self.emit(
4997            VROUNDSDRRMI,
4998            op0.as_operand(),
4999            op1.as_operand(),
5000            op2.as_operand(),
5001            op3.as_operand(),
5002        );
5003    }
5004}
5005
5006/// `VROUNDSS`.
5007///
5008/// Supported operand variants:
5009///
5010/// ```text
5011/// +---+--------------------+
5012/// | # | Operands           |
5013/// +---+--------------------+
5014/// | 1 | Xmm, Xmm, Mem, Imm |
5015/// | 2 | Xmm, Xmm, Xmm, Imm |
5016/// +---+--------------------+
5017/// ```
5018pub trait VroundssEmitter<A, B, C, D> {
5019    fn vroundss(&mut self, op0: A, op1: B, op2: C, op3: D);
5020}
5021
5022impl<'a> VroundssEmitter<Xmm, Xmm, Xmm, Imm> for Assembler<'a> {
5023    fn vroundss(&mut self, op0: Xmm, op1: Xmm, op2: Xmm, op3: Imm) {
5024        self.emit(
5025            VROUNDSSRRRI,
5026            op0.as_operand(),
5027            op1.as_operand(),
5028            op2.as_operand(),
5029            op3.as_operand(),
5030        );
5031    }
5032}
5033
5034impl<'a> VroundssEmitter<Xmm, Xmm, Mem, Imm> for Assembler<'a> {
5035    fn vroundss(&mut self, op0: Xmm, op1: Xmm, op2: Mem, op3: Imm) {
5036        self.emit(
5037            VROUNDSSRRMI,
5038            op0.as_operand(),
5039            op1.as_operand(),
5040            op2.as_operand(),
5041            op3.as_operand(),
5042        );
5043    }
5044}
5045
5046/// `VRSQRTPS`.
5047///
5048/// Supported operand variants:
5049///
5050/// ```text
5051/// +---+----------+
5052/// | # | Operands |
5053/// +---+----------+
5054/// | 1 | Xmm, Mem |
5055/// | 2 | Xmm, Xmm |
5056/// | 3 | Ymm, Mem |
5057/// | 4 | Ymm, Ymm |
5058/// +---+----------+
5059/// ```
5060pub trait VrsqrtpsEmitter<A, B> {
5061    fn vrsqrtps(&mut self, op0: A, op1: B);
5062}
5063
5064impl<'a> VrsqrtpsEmitter<Xmm, Xmm> for Assembler<'a> {
5065    fn vrsqrtps(&mut self, op0: Xmm, op1: Xmm) {
5066        self.emit(
5067            VRSQRTPS128RR,
5068            op0.as_operand(),
5069            op1.as_operand(),
5070            &NOREG,
5071            &NOREG,
5072        );
5073    }
5074}
5075
5076impl<'a> VrsqrtpsEmitter<Xmm, Mem> for Assembler<'a> {
5077    fn vrsqrtps(&mut self, op0: Xmm, op1: Mem) {
5078        self.emit(
5079            VRSQRTPS128RM,
5080            op0.as_operand(),
5081            op1.as_operand(),
5082            &NOREG,
5083            &NOREG,
5084        );
5085    }
5086}
5087
5088impl<'a> VrsqrtpsEmitter<Ymm, Ymm> for Assembler<'a> {
5089    fn vrsqrtps(&mut self, op0: Ymm, op1: Ymm) {
5090        self.emit(
5091            VRSQRTPS256RR,
5092            op0.as_operand(),
5093            op1.as_operand(),
5094            &NOREG,
5095            &NOREG,
5096        );
5097    }
5098}
5099
5100impl<'a> VrsqrtpsEmitter<Ymm, Mem> for Assembler<'a> {
5101    fn vrsqrtps(&mut self, op0: Ymm, op1: Mem) {
5102        self.emit(
5103            VRSQRTPS256RM,
5104            op0.as_operand(),
5105            op1.as_operand(),
5106            &NOREG,
5107            &NOREG,
5108        );
5109    }
5110}
5111
5112/// `VRSQRTSS`.
5113///
5114/// Supported operand variants:
5115///
5116/// ```text
5117/// +---+---------------+
5118/// | # | Operands      |
5119/// +---+---------------+
5120/// | 1 | Xmm, Xmm, Mem |
5121/// | 2 | Xmm, Xmm, Xmm |
5122/// +---+---------------+
5123/// ```
5124pub trait VrsqrtssEmitter<A, B, C> {
5125    fn vrsqrtss(&mut self, op0: A, op1: B, op2: C);
5126}
5127
5128impl<'a> VrsqrtssEmitter<Xmm, Xmm, Xmm> for Assembler<'a> {
5129    fn vrsqrtss(&mut self, op0: Xmm, op1: Xmm, op2: Xmm) {
5130        self.emit(
5131            VRSQRTSSRRR,
5132            op0.as_operand(),
5133            op1.as_operand(),
5134            op2.as_operand(),
5135            &NOREG,
5136        );
5137    }
5138}
5139
5140impl<'a> VrsqrtssEmitter<Xmm, Xmm, Mem> for Assembler<'a> {
5141    fn vrsqrtss(&mut self, op0: Xmm, op1: Xmm, op2: Mem) {
5142        self.emit(
5143            VRSQRTSSRRM,
5144            op0.as_operand(),
5145            op1.as_operand(),
5146            op2.as_operand(),
5147            &NOREG,
5148        );
5149    }
5150}
5151
5152/// `VSTMXCSR`.
5153///
5154/// Supported operand variants:
5155///
5156/// ```text
5157/// +---+----------+
5158/// | # | Operands |
5159/// +---+----------+
5160/// | 1 | Mem      |
5161/// +---+----------+
5162/// ```
5163pub trait VstmxcsrEmitter<A> {
5164    fn vstmxcsr(&mut self, op0: A);
5165}
5166
5167impl<'a> VstmxcsrEmitter<Mem> for Assembler<'a> {
5168    fn vstmxcsr(&mut self, op0: Mem) {
5169        self.emit(VSTMXCSRM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
5170    }
5171}
5172
5173/// `VTESTPD`.
5174///
5175/// Supported operand variants:
5176///
5177/// ```text
5178/// +---+----------+
5179/// | # | Operands |
5180/// +---+----------+
5181/// | 1 | Xmm, Mem |
5182/// | 2 | Xmm, Xmm |
5183/// | 3 | Ymm, Mem |
5184/// | 4 | Ymm, Ymm |
5185/// +---+----------+
5186/// ```
5187pub trait VtestpdEmitter<A, B> {
5188    fn vtestpd(&mut self, op0: A, op1: B);
5189}
5190
5191impl<'a> VtestpdEmitter<Xmm, Xmm> for Assembler<'a> {
5192    fn vtestpd(&mut self, op0: Xmm, op1: Xmm) {
5193        self.emit(
5194            VTESTPD128RR,
5195            op0.as_operand(),
5196            op1.as_operand(),
5197            &NOREG,
5198            &NOREG,
5199        );
5200    }
5201}
5202
5203impl<'a> VtestpdEmitter<Xmm, Mem> for Assembler<'a> {
5204    fn vtestpd(&mut self, op0: Xmm, op1: Mem) {
5205        self.emit(
5206            VTESTPD128RM,
5207            op0.as_operand(),
5208            op1.as_operand(),
5209            &NOREG,
5210            &NOREG,
5211        );
5212    }
5213}
5214
5215impl<'a> VtestpdEmitter<Ymm, Ymm> for Assembler<'a> {
5216    fn vtestpd(&mut self, op0: Ymm, op1: Ymm) {
5217        self.emit(
5218            VTESTPD256RR,
5219            op0.as_operand(),
5220            op1.as_operand(),
5221            &NOREG,
5222            &NOREG,
5223        );
5224    }
5225}
5226
5227impl<'a> VtestpdEmitter<Ymm, Mem> for Assembler<'a> {
5228    fn vtestpd(&mut self, op0: Ymm, op1: Mem) {
5229        self.emit(
5230            VTESTPD256RM,
5231            op0.as_operand(),
5232            op1.as_operand(),
5233            &NOREG,
5234            &NOREG,
5235        );
5236    }
5237}
5238
5239/// `VTESTPS`.
5240///
5241/// Supported operand variants:
5242///
5243/// ```text
5244/// +---+----------+
5245/// | # | Operands |
5246/// +---+----------+
5247/// | 1 | Xmm, Mem |
5248/// | 2 | Xmm, Xmm |
5249/// | 3 | Ymm, Mem |
5250/// | 4 | Ymm, Ymm |
5251/// +---+----------+
5252/// ```
5253pub trait VtestpsEmitter<A, B> {
5254    fn vtestps(&mut self, op0: A, op1: B);
5255}
5256
5257impl<'a> VtestpsEmitter<Xmm, Xmm> for Assembler<'a> {
5258    fn vtestps(&mut self, op0: Xmm, op1: Xmm) {
5259        self.emit(
5260            VTESTPS128RR,
5261            op0.as_operand(),
5262            op1.as_operand(),
5263            &NOREG,
5264            &NOREG,
5265        );
5266    }
5267}
5268
5269impl<'a> VtestpsEmitter<Xmm, Mem> for Assembler<'a> {
5270    fn vtestps(&mut self, op0: Xmm, op1: Mem) {
5271        self.emit(
5272            VTESTPS128RM,
5273            op0.as_operand(),
5274            op1.as_operand(),
5275            &NOREG,
5276            &NOREG,
5277        );
5278    }
5279}
5280
5281impl<'a> VtestpsEmitter<Ymm, Ymm> for Assembler<'a> {
5282    fn vtestps(&mut self, op0: Ymm, op1: Ymm) {
5283        self.emit(
5284            VTESTPS256RR,
5285            op0.as_operand(),
5286            op1.as_operand(),
5287            &NOREG,
5288            &NOREG,
5289        );
5290    }
5291}
5292
5293impl<'a> VtestpsEmitter<Ymm, Mem> for Assembler<'a> {
5294    fn vtestps(&mut self, op0: Ymm, op1: Mem) {
5295        self.emit(
5296            VTESTPS256RM,
5297            op0.as_operand(),
5298            op1.as_operand(),
5299            &NOREG,
5300            &NOREG,
5301        );
5302    }
5303}
5304
5305/// `VZEROALL`.
5306///
5307/// Supported operand variants:
5308///
5309/// ```text
5310/// +---+----------+
5311/// | # | Operands |
5312/// +---+----------+
5313/// | 1 | (none)   |
5314/// +---+----------+
5315/// ```
5316pub trait VzeroallEmitter {
5317    fn vzeroall(&mut self);
5318}
5319
5320impl<'a> VzeroallEmitter for Assembler<'a> {
5321    fn vzeroall(&mut self) {
5322        self.emit(VZEROALL, &NOREG, &NOREG, &NOREG, &NOREG);
5323    }
5324}
5325
5326/// `VZEROUPPER`.
5327///
5328/// Supported operand variants:
5329///
5330/// ```text
5331/// +---+----------+
5332/// | # | Operands |
5333/// +---+----------+
5334/// | 1 | (none)   |
5335/// +---+----------+
5336/// ```
5337pub trait VzeroupperEmitter {
5338    fn vzeroupper(&mut self);
5339}
5340
5341impl<'a> VzeroupperEmitter for Assembler<'a> {
5342    fn vzeroupper(&mut self) {
5343        self.emit(VZEROUPPER, &NOREG, &NOREG, &NOREG, &NOREG);
5344    }
5345}
5346
5347impl<'a> Assembler<'a> {
5348    /// `VADDSUBPD`.
5349    ///
5350    /// Supported operand variants:
5351    ///
5352    /// ```text
5353    /// +---+---------------+
5354    /// | # | Operands      |
5355    /// +---+---------------+
5356    /// | 1 | Xmm, Xmm, Mem |
5357    /// | 2 | Xmm, Xmm, Xmm |
5358    /// | 3 | Ymm, Ymm, Mem |
5359    /// | 4 | Ymm, Ymm, Ymm |
5360    /// +---+---------------+
5361    /// ```
5362    #[inline]
5363    pub fn vaddsubpd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5364    where
5365        Assembler<'a>: VaddsubpdEmitter<A, B, C>,
5366    {
5367        <Self as VaddsubpdEmitter<A, B, C>>::vaddsubpd(self, op0, op1, op2);
5368    }
5369    /// `VADDSUBPS`.
5370    ///
5371    /// Supported operand variants:
5372    ///
5373    /// ```text
5374    /// +---+---------------+
5375    /// | # | Operands      |
5376    /// +---+---------------+
5377    /// | 1 | Xmm, Xmm, Mem |
5378    /// | 2 | Xmm, Xmm, Xmm |
5379    /// | 3 | Ymm, Ymm, Mem |
5380    /// | 4 | Ymm, Ymm, Ymm |
5381    /// +---+---------------+
5382    /// ```
5383    #[inline]
5384    pub fn vaddsubps<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5385    where
5386        Assembler<'a>: VaddsubpsEmitter<A, B, C>,
5387    {
5388        <Self as VaddsubpsEmitter<A, B, C>>::vaddsubps(self, op0, op1, op2);
5389    }
5390    /// `VBLENDPD`.
5391    ///
5392    /// Supported operand variants:
5393    ///
5394    /// ```text
5395    /// +---+--------------------+
5396    /// | # | Operands           |
5397    /// +---+--------------------+
5398    /// | 1 | Xmm, Xmm, Mem, Imm |
5399    /// | 2 | Xmm, Xmm, Xmm, Imm |
5400    /// | 3 | Ymm, Ymm, Mem, Imm |
5401    /// | 4 | Ymm, Ymm, Ymm, Imm |
5402    /// +---+--------------------+
5403    /// ```
5404    #[inline]
5405    pub fn vblendpd<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5406    where
5407        Assembler<'a>: VblendpdEmitter<A, B, C, D>,
5408    {
5409        <Self as VblendpdEmitter<A, B, C, D>>::vblendpd(self, op0, op1, op2, op3);
5410    }
5411    /// `VBLENDPS`.
5412    ///
5413    /// Supported operand variants:
5414    ///
5415    /// ```text
5416    /// +---+--------------------+
5417    /// | # | Operands           |
5418    /// +---+--------------------+
5419    /// | 1 | Xmm, Xmm, Mem, Imm |
5420    /// | 2 | Xmm, Xmm, Xmm, Imm |
5421    /// | 3 | Ymm, Ymm, Mem, Imm |
5422    /// | 4 | Ymm, Ymm, Ymm, Imm |
5423    /// +---+--------------------+
5424    /// ```
5425    #[inline]
5426    pub fn vblendps<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5427    where
5428        Assembler<'a>: VblendpsEmitter<A, B, C, D>,
5429    {
5430        <Self as VblendpsEmitter<A, B, C, D>>::vblendps(self, op0, op1, op2, op3);
5431    }
5432    /// `VBLENDVPD`.
5433    ///
5434    /// Supported operand variants:
5435    ///
5436    /// ```text
5437    /// +---+--------------------+
5438    /// | # | Operands           |
5439    /// +---+--------------------+
5440    /// | 1 | Xmm, Xmm, Mem, Xmm |
5441    /// | 2 | Xmm, Xmm, Xmm, Xmm |
5442    /// | 3 | Ymm, Ymm, Mem, Ymm |
5443    /// | 4 | Ymm, Ymm, Ymm, Ymm |
5444    /// +---+--------------------+
5445    /// ```
5446    #[inline]
5447    pub fn vblendvpd<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5448    where
5449        Assembler<'a>: VblendvpdEmitter<A, B, C, D>,
5450    {
5451        <Self as VblendvpdEmitter<A, B, C, D>>::vblendvpd(self, op0, op1, op2, op3);
5452    }
5453    /// `VBLENDVPS`.
5454    ///
5455    /// Supported operand variants:
5456    ///
5457    /// ```text
5458    /// +---+--------------------+
5459    /// | # | Operands           |
5460    /// +---+--------------------+
5461    /// | 1 | Xmm, Xmm, Mem, Xmm |
5462    /// | 2 | Xmm, Xmm, Xmm, Xmm |
5463    /// | 3 | Ymm, Ymm, Mem, Ymm |
5464    /// | 4 | Ymm, Ymm, Ymm, Ymm |
5465    /// +---+--------------------+
5466    /// ```
5467    #[inline]
5468    pub fn vblendvps<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5469    where
5470        Assembler<'a>: VblendvpsEmitter<A, B, C, D>,
5471    {
5472        <Self as VblendvpsEmitter<A, B, C, D>>::vblendvps(self, op0, op1, op2, op3);
5473    }
5474    /// `VBROADCASTF128`.
5475    ///
5476    /// Supported operand variants:
5477    ///
5478    /// ```text
5479    /// +---+----------+
5480    /// | # | Operands |
5481    /// +---+----------+
5482    /// | 1 | Ymm, Mem |
5483    /// | 2 | Ymm, Xmm |
5484    /// +---+----------+
5485    /// ```
5486    #[inline]
5487    pub fn vbroadcastf128<A, B>(&mut self, op0: A, op1: B)
5488    where
5489        Assembler<'a>: Vbroadcastf128Emitter<A, B>,
5490    {
5491        <Self as Vbroadcastf128Emitter<A, B>>::vbroadcastf128(self, op0, op1);
5492    }
5493    /// `VCMPPD`.
5494    ///
5495    /// Supported operand variants:
5496    ///
5497    /// ```text
5498    /// +----+---------------------+
5499    /// | #  | Operands            |
5500    /// +----+---------------------+
5501    /// | 1  | KReg, Xmm, Mem, Imm |
5502    /// | 2  | KReg, Xmm, Xmm, Imm |
5503    /// | 3  | KReg, Ymm, Mem, Imm |
5504    /// | 4  | KReg, Ymm, Ymm, Imm |
5505    /// | 5  | KReg, Zmm, Mem, Imm |
5506    /// | 6  | KReg, Zmm, Zmm, Imm |
5507    /// | 7  | Xmm, Xmm, Mem, Imm  |
5508    /// | 8  | Xmm, Xmm, Xmm, Imm  |
5509    /// | 9  | Ymm, Ymm, Mem, Imm  |
5510    /// | 10 | Ymm, Ymm, Ymm, Imm  |
5511    /// +----+---------------------+
5512    /// ```
5513    #[inline]
5514    pub fn vcmppd<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5515    where
5516        Assembler<'a>: VcmppdEmitter<A, B, C, D>,
5517    {
5518        <Self as VcmppdEmitter<A, B, C, D>>::vcmppd(self, op0, op1, op2, op3);
5519    }
5520    /// `VCMPPS`.
5521    ///
5522    /// Supported operand variants:
5523    ///
5524    /// ```text
5525    /// +----+---------------------+
5526    /// | #  | Operands            |
5527    /// +----+---------------------+
5528    /// | 1  | KReg, Xmm, Mem, Imm |
5529    /// | 2  | KReg, Xmm, Xmm, Imm |
5530    /// | 3  | KReg, Ymm, Mem, Imm |
5531    /// | 4  | KReg, Ymm, Ymm, Imm |
5532    /// | 5  | KReg, Zmm, Mem, Imm |
5533    /// | 6  | KReg, Zmm, Zmm, Imm |
5534    /// | 7  | Xmm, Xmm, Mem, Imm  |
5535    /// | 8  | Xmm, Xmm, Xmm, Imm  |
5536    /// | 9  | Ymm, Ymm, Mem, Imm  |
5537    /// | 10 | Ymm, Ymm, Ymm, Imm  |
5538    /// +----+---------------------+
5539    /// ```
5540    #[inline]
5541    pub fn vcmpps<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5542    where
5543        Assembler<'a>: VcmppsEmitter<A, B, C, D>,
5544    {
5545        <Self as VcmppsEmitter<A, B, C, D>>::vcmpps(self, op0, op1, op2, op3);
5546    }
5547    /// `VCMPSD`.
5548    ///
5549    /// Supported operand variants:
5550    ///
5551    /// ```text
5552    /// +---+---------------------+
5553    /// | # | Operands            |
5554    /// +---+---------------------+
5555    /// | 1 | KReg, Xmm, Mem, Imm |
5556    /// | 2 | KReg, Xmm, Xmm, Imm |
5557    /// | 3 | Xmm, Xmm, Mem, Imm  |
5558    /// | 4 | Xmm, Xmm, Xmm, Imm  |
5559    /// +---+---------------------+
5560    /// ```
5561    #[inline]
5562    pub fn vcmpsd<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5563    where
5564        Assembler<'a>: VcmpsdEmitter<A, B, C, D>,
5565    {
5566        <Self as VcmpsdEmitter<A, B, C, D>>::vcmpsd(self, op0, op1, op2, op3);
5567    }
5568    /// `VCMPSS`.
5569    ///
5570    /// Supported operand variants:
5571    ///
5572    /// ```text
5573    /// +---+---------------------+
5574    /// | # | Operands            |
5575    /// +---+---------------------+
5576    /// | 1 | KReg, Xmm, Mem, Imm |
5577    /// | 2 | KReg, Xmm, Xmm, Imm |
5578    /// | 3 | Xmm, Xmm, Mem, Imm  |
5579    /// | 4 | Xmm, Xmm, Xmm, Imm  |
5580    /// +---+---------------------+
5581    /// ```
5582    #[inline]
5583    pub fn vcmpss<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5584    where
5585        Assembler<'a>: VcmpssEmitter<A, B, C, D>,
5586    {
5587        <Self as VcmpssEmitter<A, B, C, D>>::vcmpss(self, op0, op1, op2, op3);
5588    }
5589    /// `VDPPD`.
5590    ///
5591    /// Supported operand variants:
5592    ///
5593    /// ```text
5594    /// +---+--------------------+
5595    /// | # | Operands           |
5596    /// +---+--------------------+
5597    /// | 1 | Xmm, Xmm, Mem, Imm |
5598    /// | 2 | Xmm, Xmm, Xmm, Imm |
5599    /// +---+--------------------+
5600    /// ```
5601    #[inline]
5602    pub fn vdppd<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5603    where
5604        Assembler<'a>: VdppdEmitter<A, B, C, D>,
5605    {
5606        <Self as VdppdEmitter<A, B, C, D>>::vdppd(self, op0, op1, op2, op3);
5607    }
5608    /// `VDPPS`.
5609    ///
5610    /// Supported operand variants:
5611    ///
5612    /// ```text
5613    /// +---+--------------------+
5614    /// | # | Operands           |
5615    /// +---+--------------------+
5616    /// | 1 | Xmm, Xmm, Mem, Imm |
5617    /// | 2 | Xmm, Xmm, Xmm, Imm |
5618    /// | 3 | Ymm, Ymm, Mem, Imm |
5619    /// | 4 | Ymm, Ymm, Ymm, Imm |
5620    /// +---+--------------------+
5621    /// ```
5622    #[inline]
5623    pub fn vdpps<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5624    where
5625        Assembler<'a>: VdppsEmitter<A, B, C, D>,
5626    {
5627        <Self as VdppsEmitter<A, B, C, D>>::vdpps(self, op0, op1, op2, op3);
5628    }
5629    /// `VEXTRACTF128`.
5630    ///
5631    /// Supported operand variants:
5632    ///
5633    /// ```text
5634    /// +---+---------------+
5635    /// | # | Operands      |
5636    /// +---+---------------+
5637    /// | 1 | Mem, Ymm, Imm |
5638    /// | 2 | Xmm, Ymm, Imm |
5639    /// +---+---------------+
5640    /// ```
5641    #[inline]
5642    pub fn vextractf128<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5643    where
5644        Assembler<'a>: Vextractf128Emitter<A, B, C>,
5645    {
5646        <Self as Vextractf128Emitter<A, B, C>>::vextractf128(self, op0, op1, op2);
5647    }
5648    /// `VHADDPD`.
5649    ///
5650    /// Supported operand variants:
5651    ///
5652    /// ```text
5653    /// +---+---------------+
5654    /// | # | Operands      |
5655    /// +---+---------------+
5656    /// | 1 | Xmm, Xmm, Mem |
5657    /// | 2 | Xmm, Xmm, Xmm |
5658    /// | 3 | Ymm, Ymm, Mem |
5659    /// | 4 | Ymm, Ymm, Ymm |
5660    /// +---+---------------+
5661    /// ```
5662    #[inline]
5663    pub fn vhaddpd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5664    where
5665        Assembler<'a>: VhaddpdEmitter<A, B, C>,
5666    {
5667        <Self as VhaddpdEmitter<A, B, C>>::vhaddpd(self, op0, op1, op2);
5668    }
5669    /// `VHADDPS`.
5670    ///
5671    /// Supported operand variants:
5672    ///
5673    /// ```text
5674    /// +---+---------------+
5675    /// | # | Operands      |
5676    /// +---+---------------+
5677    /// | 1 | Xmm, Xmm, Mem |
5678    /// | 2 | Xmm, Xmm, Xmm |
5679    /// | 3 | Ymm, Ymm, Mem |
5680    /// | 4 | Ymm, Ymm, Ymm |
5681    /// +---+---------------+
5682    /// ```
5683    #[inline]
5684    pub fn vhaddps<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5685    where
5686        Assembler<'a>: VhaddpsEmitter<A, B, C>,
5687    {
5688        <Self as VhaddpsEmitter<A, B, C>>::vhaddps(self, op0, op1, op2);
5689    }
5690    /// `VHSUBPD`.
5691    ///
5692    /// Supported operand variants:
5693    ///
5694    /// ```text
5695    /// +---+---------------+
5696    /// | # | Operands      |
5697    /// +---+---------------+
5698    /// | 1 | Xmm, Xmm, Mem |
5699    /// | 2 | Xmm, Xmm, Xmm |
5700    /// | 3 | Ymm, Ymm, Mem |
5701    /// | 4 | Ymm, Ymm, Ymm |
5702    /// +---+---------------+
5703    /// ```
5704    #[inline]
5705    pub fn vhsubpd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5706    where
5707        Assembler<'a>: VhsubpdEmitter<A, B, C>,
5708    {
5709        <Self as VhsubpdEmitter<A, B, C>>::vhsubpd(self, op0, op1, op2);
5710    }
5711    /// `VHSUBPS`.
5712    ///
5713    /// Supported operand variants:
5714    ///
5715    /// ```text
5716    /// +---+---------------+
5717    /// | # | Operands      |
5718    /// +---+---------------+
5719    /// | 1 | Xmm, Xmm, Mem |
5720    /// | 2 | Xmm, Xmm, Xmm |
5721    /// | 3 | Ymm, Ymm, Mem |
5722    /// | 4 | Ymm, Ymm, Ymm |
5723    /// +---+---------------+
5724    /// ```
5725    #[inline]
5726    pub fn vhsubps<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5727    where
5728        Assembler<'a>: VhsubpsEmitter<A, B, C>,
5729    {
5730        <Self as VhsubpsEmitter<A, B, C>>::vhsubps(self, op0, op1, op2);
5731    }
5732    /// `VINSERTF128`.
5733    ///
5734    /// Supported operand variants:
5735    ///
5736    /// ```text
5737    /// +---+--------------------+
5738    /// | # | Operands           |
5739    /// +---+--------------------+
5740    /// | 1 | Ymm, Ymm, Mem, Imm |
5741    /// | 2 | Ymm, Ymm, Xmm, Imm |
5742    /// +---+--------------------+
5743    /// ```
5744    #[inline]
5745    pub fn vinsertf128<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
5746    where
5747        Assembler<'a>: Vinsertf128Emitter<A, B, C, D>,
5748    {
5749        <Self as Vinsertf128Emitter<A, B, C, D>>::vinsertf128(self, op0, op1, op2, op3);
5750    }
5751    /// `VLDDQU`.
5752    ///
5753    /// Supported operand variants:
5754    ///
5755    /// ```text
5756    /// +---+----------+
5757    /// | # | Operands |
5758    /// +---+----------+
5759    /// | 1 | Xmm, Mem |
5760    /// | 2 | Ymm, Mem |
5761    /// +---+----------+
5762    /// ```
5763    #[inline]
5764    pub fn vlddqu<A, B>(&mut self, op0: A, op1: B)
5765    where
5766        Assembler<'a>: VlddquEmitter<A, B>,
5767    {
5768        <Self as VlddquEmitter<A, B>>::vlddqu(self, op0, op1);
5769    }
5770    /// `VLDMXCSR`.
5771    ///
5772    /// Supported operand variants:
5773    ///
5774    /// ```text
5775    /// +---+----------+
5776    /// | # | Operands |
5777    /// +---+----------+
5778    /// | 1 | Mem      |
5779    /// +---+----------+
5780    /// ```
5781    #[inline]
5782    pub fn vldmxcsr<A>(&mut self, op0: A)
5783    where
5784        Assembler<'a>: VldmxcsrEmitter<A>,
5785    {
5786        <Self as VldmxcsrEmitter<A>>::vldmxcsr(self, op0);
5787    }
5788    /// `VMASKMOVDQU`.
5789    ///
5790    /// Supported operand variants:
5791    ///
5792    /// ```text
5793    /// +---+----------+
5794    /// | # | Operands |
5795    /// +---+----------+
5796    /// | 1 | Xmm, Xmm |
5797    /// +---+----------+
5798    /// ```
5799    #[inline]
5800    pub fn vmaskmovdqu<A, B>(&mut self, op0: A, op1: B)
5801    where
5802        Assembler<'a>: VmaskmovdquEmitter<A, B>,
5803    {
5804        <Self as VmaskmovdquEmitter<A, B>>::vmaskmovdqu(self, op0, op1);
5805    }
5806    /// `VMASKMOVPD`.
5807    ///
5808    /// Supported operand variants:
5809    ///
5810    /// ```text
5811    /// +---+---------------+
5812    /// | # | Operands      |
5813    /// +---+---------------+
5814    /// | 1 | Mem, Xmm, Xmm |
5815    /// | 2 | Mem, Ymm, Ymm |
5816    /// | 3 | Xmm, Xmm, Mem |
5817    /// | 4 | Ymm, Ymm, Mem |
5818    /// +---+---------------+
5819    /// ```
5820    #[inline]
5821    pub fn vmaskmovpd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5822    where
5823        Assembler<'a>: VmaskmovpdEmitter<A, B, C>,
5824    {
5825        <Self as VmaskmovpdEmitter<A, B, C>>::vmaskmovpd(self, op0, op1, op2);
5826    }
5827    /// `VMASKMOVPS`.
5828    ///
5829    /// Supported operand variants:
5830    ///
5831    /// ```text
5832    /// +---+---------------+
5833    /// | # | Operands      |
5834    /// +---+---------------+
5835    /// | 1 | Mem, Xmm, Xmm |
5836    /// | 2 | Mem, Ymm, Ymm |
5837    /// | 3 | Xmm, Xmm, Mem |
5838    /// | 4 | Ymm, Ymm, Mem |
5839    /// +---+---------------+
5840    /// ```
5841    #[inline]
5842    pub fn vmaskmovps<A, B, C>(&mut self, op0: A, op1: B, op2: C)
5843    where
5844        Assembler<'a>: VmaskmovpsEmitter<A, B, C>,
5845    {
5846        <Self as VmaskmovpsEmitter<A, B, C>>::vmaskmovps(self, op0, op1, op2);
5847    }
5848    /// `VMOVD`.
5849    ///
5850    /// Supported operand variants:
5851    ///
5852    /// ```text
5853    /// +---+----------+
5854    /// | # | Operands |
5855    /// +---+----------+
5856    /// | 1 | Mem, Xmm |
5857    /// | 2 | Xmm, Mem |
5858    /// +---+----------+
5859    /// ```
5860    #[inline]
5861    pub fn vmovd<A, B>(&mut self, op0: A, op1: B)
5862    where
5863        Assembler<'a>: VmovdEmitter<A, B>,
5864    {
5865        <Self as VmovdEmitter<A, B>>::vmovd(self, op0, op1);
5866    }
5867    /// `VMOVDQA`.
5868    ///
5869    /// Supported operand variants:
5870    ///
5871    /// ```text
5872    /// +---+----------+
5873    /// | # | Operands |
5874    /// +---+----------+
5875    /// | 1 | Mem, Xmm |
5876    /// | 2 | Mem, Ymm |
5877    /// | 3 | Xmm, Mem |
5878    /// | 4 | Xmm, Xmm |
5879    /// | 5 | Ymm, Mem |
5880    /// | 6 | Ymm, Ymm |
5881    /// +---+----------+
5882    /// ```
5883    #[inline]
5884    pub fn vmovdqa<A, B>(&mut self, op0: A, op1: B)
5885    where
5886        Assembler<'a>: VmovdqaEmitter<A, B>,
5887    {
5888        <Self as VmovdqaEmitter<A, B>>::vmovdqa(self, op0, op1);
5889    }
5890    /// `VMOVDQU`.
5891    ///
5892    /// Supported operand variants:
5893    ///
5894    /// ```text
5895    /// +---+----------+
5896    /// | # | Operands |
5897    /// +---+----------+
5898    /// | 1 | Mem, Xmm |
5899    /// | 2 | Mem, Ymm |
5900    /// | 3 | Xmm, Mem |
5901    /// | 4 | Xmm, Xmm |
5902    /// | 5 | Ymm, Mem |
5903    /// | 6 | Ymm, Ymm |
5904    /// +---+----------+
5905    /// ```
5906    #[inline]
5907    pub fn vmovdqu<A, B>(&mut self, op0: A, op1: B)
5908    where
5909        Assembler<'a>: VmovdquEmitter<A, B>,
5910    {
5911        <Self as VmovdquEmitter<A, B>>::vmovdqu(self, op0, op1);
5912    }
5913    /// `VMOVD_G2X`.
5914    ///
5915    /// Supported operand variants:
5916    ///
5917    /// ```text
5918    /// +---+----------+
5919    /// | # | Operands |
5920    /// +---+----------+
5921    /// | 1 | Xmm, Gpd |
5922    /// +---+----------+
5923    /// ```
5924    #[inline]
5925    pub fn vmovd_g2x<A, B>(&mut self, op0: A, op1: B)
5926    where
5927        Assembler<'a>: VmovdG2xEmitter<A, B>,
5928    {
5929        <Self as VmovdG2xEmitter<A, B>>::vmovd_g2x(self, op0, op1);
5930    }
5931    /// `VMOVD_X2G`.
5932    ///
5933    /// Supported operand variants:
5934    ///
5935    /// ```text
5936    /// +---+----------+
5937    /// | # | Operands |
5938    /// +---+----------+
5939    /// | 1 | Gpd, Xmm |
5940    /// +---+----------+
5941    /// ```
5942    #[inline]
5943    pub fn vmovd_x2g<A, B>(&mut self, op0: A, op1: B)
5944    where
5945        Assembler<'a>: VmovdX2gEmitter<A, B>,
5946    {
5947        <Self as VmovdX2gEmitter<A, B>>::vmovd_x2g(self, op0, op1);
5948    }
5949    /// `VMOVMSKPD`.
5950    ///
5951    /// Supported operand variants:
5952    ///
5953    /// ```text
5954    /// +---+----------+
5955    /// | # | Operands |
5956    /// +---+----------+
5957    /// | 1 | Gpd, Xmm |
5958    /// | 2 | Gpd, Ymm |
5959    /// +---+----------+
5960    /// ```
5961    #[inline]
5962    pub fn vmovmskpd<A, B>(&mut self, op0: A, op1: B)
5963    where
5964        Assembler<'a>: VmovmskpdEmitter<A, B>,
5965    {
5966        <Self as VmovmskpdEmitter<A, B>>::vmovmskpd(self, op0, op1);
5967    }
5968    /// `VMOVMSKPS`.
5969    ///
5970    /// Supported operand variants:
5971    ///
5972    /// ```text
5973    /// +---+----------+
5974    /// | # | Operands |
5975    /// +---+----------+
5976    /// | 1 | Gpd, Xmm |
5977    /// | 2 | Gpd, Ymm |
5978    /// +---+----------+
5979    /// ```
5980    #[inline]
5981    pub fn vmovmskps<A, B>(&mut self, op0: A, op1: B)
5982    where
5983        Assembler<'a>: VmovmskpsEmitter<A, B>,
5984    {
5985        <Self as VmovmskpsEmitter<A, B>>::vmovmskps(self, op0, op1);
5986    }
5987    /// `VMOVQ_G2X`.
5988    ///
5989    /// Supported operand variants:
5990    ///
5991    /// ```text
5992    /// +---+----------+
5993    /// | # | Operands |
5994    /// +---+----------+
5995    /// | 1 | Xmm, Gpd |
5996    /// | 2 | Xmm, Gpq |
5997    /// | 3 | Xmm, Mem |
5998    /// +---+----------+
5999    /// ```
6000    #[inline]
6001    pub fn vmovq_g2x<A, B>(&mut self, op0: A, op1: B)
6002    where
6003        Assembler<'a>: VmovqG2xEmitter<A, B>,
6004    {
6005        <Self as VmovqG2xEmitter<A, B>>::vmovq_g2x(self, op0, op1);
6006    }
6007    /// `VMOVQ_X2G`.
6008    ///
6009    /// Supported operand variants:
6010    ///
6011    /// ```text
6012    /// +---+----------+
6013    /// | # | Operands |
6014    /// +---+----------+
6015    /// | 1 | Gpd, Xmm |
6016    /// | 2 | Gpq, Xmm |
6017    /// | 3 | Mem, Xmm |
6018    /// +---+----------+
6019    /// ```
6020    #[inline]
6021    pub fn vmovq_x2g<A, B>(&mut self, op0: A, op1: B)
6022    where
6023        Assembler<'a>: VmovqX2gEmitter<A, B>,
6024    {
6025        <Self as VmovqX2gEmitter<A, B>>::vmovq_x2g(self, op0, op1);
6026    }
6027    /// `VMPSADBW`.
6028    ///
6029    /// Supported operand variants:
6030    ///
6031    /// ```text
6032    /// +---+--------------------+
6033    /// | # | Operands           |
6034    /// +---+--------------------+
6035    /// | 1 | Xmm, Xmm, Mem, Imm |
6036    /// | 2 | Xmm, Xmm, Xmm, Imm |
6037    /// | 3 | Ymm, Ymm, Mem, Imm |
6038    /// | 4 | Ymm, Ymm, Ymm, Imm |
6039    /// +---+--------------------+
6040    /// ```
6041    #[inline]
6042    pub fn vmpsadbw<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
6043    where
6044        Assembler<'a>: VmpsadbwEmitter<A, B, C, D>,
6045    {
6046        <Self as VmpsadbwEmitter<A, B, C, D>>::vmpsadbw(self, op0, op1, op2, op3);
6047    }
6048    /// `VPAND`.
6049    ///
6050    /// Supported operand variants:
6051    ///
6052    /// ```text
6053    /// +---+---------------+
6054    /// | # | Operands      |
6055    /// +---+---------------+
6056    /// | 1 | Xmm, Xmm, Mem |
6057    /// | 2 | Xmm, Xmm, Xmm |
6058    /// | 3 | Ymm, Ymm, Mem |
6059    /// | 4 | Ymm, Ymm, Ymm |
6060    /// +---+---------------+
6061    /// ```
6062    #[inline]
6063    pub fn vpand<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6064    where
6065        Assembler<'a>: VpandEmitter<A, B, C>,
6066    {
6067        <Self as VpandEmitter<A, B, C>>::vpand(self, op0, op1, op2);
6068    }
6069    /// `VPANDN`.
6070    ///
6071    /// Supported operand variants:
6072    ///
6073    /// ```text
6074    /// +---+---------------+
6075    /// | # | Operands      |
6076    /// +---+---------------+
6077    /// | 1 | Xmm, Xmm, Mem |
6078    /// | 2 | Xmm, Xmm, Xmm |
6079    /// | 3 | Ymm, Ymm, Mem |
6080    /// | 4 | Ymm, Ymm, Ymm |
6081    /// +---+---------------+
6082    /// ```
6083    #[inline]
6084    pub fn vpandn<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6085    where
6086        Assembler<'a>: VpandnEmitter<A, B, C>,
6087    {
6088        <Self as VpandnEmitter<A, B, C>>::vpandn(self, op0, op1, op2);
6089    }
6090    /// `VPBLENDVB`.
6091    ///
6092    /// Supported operand variants:
6093    ///
6094    /// ```text
6095    /// +---+--------------------+
6096    /// | # | Operands           |
6097    /// +---+--------------------+
6098    /// | 1 | Xmm, Xmm, Mem, Xmm |
6099    /// | 2 | Xmm, Xmm, Xmm, Xmm |
6100    /// | 3 | Ymm, Ymm, Mem, Ymm |
6101    /// | 4 | Ymm, Ymm, Ymm, Ymm |
6102    /// +---+--------------------+
6103    /// ```
6104    #[inline]
6105    pub fn vpblendvb<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
6106    where
6107        Assembler<'a>: VpblendvbEmitter<A, B, C, D>,
6108    {
6109        <Self as VpblendvbEmitter<A, B, C, D>>::vpblendvb(self, op0, op1, op2, op3);
6110    }
6111    /// `VPBLENDW`.
6112    ///
6113    /// Supported operand variants:
6114    ///
6115    /// ```text
6116    /// +---+--------------------+
6117    /// | # | Operands           |
6118    /// +---+--------------------+
6119    /// | 1 | Xmm, Xmm, Mem, Imm |
6120    /// | 2 | Xmm, Xmm, Xmm, Imm |
6121    /// | 3 | Ymm, Ymm, Mem, Imm |
6122    /// | 4 | Ymm, Ymm, Ymm, Imm |
6123    /// +---+--------------------+
6124    /// ```
6125    #[inline]
6126    pub fn vpblendw<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
6127    where
6128        Assembler<'a>: VpblendwEmitter<A, B, C, D>,
6129    {
6130        <Self as VpblendwEmitter<A, B, C, D>>::vpblendw(self, op0, op1, op2, op3);
6131    }
6132    /// `VPCMPEQB`.
6133    ///
6134    /// Supported operand variants:
6135    ///
6136    /// ```text
6137    /// +----+----------------+
6138    /// | #  | Operands       |
6139    /// +----+----------------+
6140    /// | 1  | KReg, Xmm, Mem |
6141    /// | 2  | KReg, Xmm, Xmm |
6142    /// | 3  | KReg, Ymm, Mem |
6143    /// | 4  | KReg, Ymm, Ymm |
6144    /// | 5  | KReg, Zmm, Mem |
6145    /// | 6  | KReg, Zmm, Zmm |
6146    /// | 7  | Xmm, Xmm, Mem  |
6147    /// | 8  | Xmm, Xmm, Xmm  |
6148    /// | 9  | Ymm, Ymm, Mem  |
6149    /// | 10 | Ymm, Ymm, Ymm  |
6150    /// +----+----------------+
6151    /// ```
6152    #[inline]
6153    pub fn vpcmpeqb<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6154    where
6155        Assembler<'a>: VpcmpeqbEmitter<A, B, C>,
6156    {
6157        <Self as VpcmpeqbEmitter<A, B, C>>::vpcmpeqb(self, op0, op1, op2);
6158    }
6159    /// `VPCMPEQD`.
6160    ///
6161    /// Supported operand variants:
6162    ///
6163    /// ```text
6164    /// +----+----------------+
6165    /// | #  | Operands       |
6166    /// +----+----------------+
6167    /// | 1  | KReg, Xmm, Mem |
6168    /// | 2  | KReg, Xmm, Xmm |
6169    /// | 3  | KReg, Ymm, Mem |
6170    /// | 4  | KReg, Ymm, Ymm |
6171    /// | 5  | KReg, Zmm, Mem |
6172    /// | 6  | KReg, Zmm, Zmm |
6173    /// | 7  | Xmm, Xmm, Mem  |
6174    /// | 8  | Xmm, Xmm, Xmm  |
6175    /// | 9  | Ymm, Ymm, Mem  |
6176    /// | 10 | Ymm, Ymm, Ymm  |
6177    /// +----+----------------+
6178    /// ```
6179    #[inline]
6180    pub fn vpcmpeqd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6181    where
6182        Assembler<'a>: VpcmpeqdEmitter<A, B, C>,
6183    {
6184        <Self as VpcmpeqdEmitter<A, B, C>>::vpcmpeqd(self, op0, op1, op2);
6185    }
6186    /// `VPCMPEQQ`.
6187    ///
6188    /// Supported operand variants:
6189    ///
6190    /// ```text
6191    /// +----+----------------+
6192    /// | #  | Operands       |
6193    /// +----+----------------+
6194    /// | 1  | KReg, Xmm, Mem |
6195    /// | 2  | KReg, Xmm, Xmm |
6196    /// | 3  | KReg, Ymm, Mem |
6197    /// | 4  | KReg, Ymm, Ymm |
6198    /// | 5  | KReg, Zmm, Mem |
6199    /// | 6  | KReg, Zmm, Zmm |
6200    /// | 7  | Xmm, Xmm, Mem  |
6201    /// | 8  | Xmm, Xmm, Xmm  |
6202    /// | 9  | Ymm, Ymm, Mem  |
6203    /// | 10 | Ymm, Ymm, Ymm  |
6204    /// +----+----------------+
6205    /// ```
6206    #[inline]
6207    pub fn vpcmpeqq<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6208    where
6209        Assembler<'a>: VpcmpeqqEmitter<A, B, C>,
6210    {
6211        <Self as VpcmpeqqEmitter<A, B, C>>::vpcmpeqq(self, op0, op1, op2);
6212    }
6213    /// `VPCMPEQW`.
6214    ///
6215    /// Supported operand variants:
6216    ///
6217    /// ```text
6218    /// +----+----------------+
6219    /// | #  | Operands       |
6220    /// +----+----------------+
6221    /// | 1  | KReg, Xmm, Mem |
6222    /// | 2  | KReg, Xmm, Xmm |
6223    /// | 3  | KReg, Ymm, Mem |
6224    /// | 4  | KReg, Ymm, Ymm |
6225    /// | 5  | KReg, Zmm, Mem |
6226    /// | 6  | KReg, Zmm, Zmm |
6227    /// | 7  | Xmm, Xmm, Mem  |
6228    /// | 8  | Xmm, Xmm, Xmm  |
6229    /// | 9  | Ymm, Ymm, Mem  |
6230    /// | 10 | Ymm, Ymm, Ymm  |
6231    /// +----+----------------+
6232    /// ```
6233    #[inline]
6234    pub fn vpcmpeqw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6235    where
6236        Assembler<'a>: VpcmpeqwEmitter<A, B, C>,
6237    {
6238        <Self as VpcmpeqwEmitter<A, B, C>>::vpcmpeqw(self, op0, op1, op2);
6239    }
6240    /// `VPCMPESTRI`.
6241    ///
6242    /// Supported operand variants:
6243    ///
6244    /// ```text
6245    /// +---+---------------+
6246    /// | # | Operands      |
6247    /// +---+---------------+
6248    /// | 1 | Xmm, Mem, Imm |
6249    /// | 2 | Xmm, Xmm, Imm |
6250    /// +---+---------------+
6251    /// ```
6252    #[inline]
6253    pub fn vpcmpestri<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6254    where
6255        Assembler<'a>: VpcmpestriEmitter<A, B, C>,
6256    {
6257        <Self as VpcmpestriEmitter<A, B, C>>::vpcmpestri(self, op0, op1, op2);
6258    }
6259    /// `VPCMPESTRM`.
6260    ///
6261    /// Supported operand variants:
6262    ///
6263    /// ```text
6264    /// +---+---------------+
6265    /// | # | Operands      |
6266    /// +---+---------------+
6267    /// | 1 | Xmm, Mem, Imm |
6268    /// | 2 | Xmm, Xmm, Imm |
6269    /// +---+---------------+
6270    /// ```
6271    #[inline]
6272    pub fn vpcmpestrm<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6273    where
6274        Assembler<'a>: VpcmpestrmEmitter<A, B, C>,
6275    {
6276        <Self as VpcmpestrmEmitter<A, B, C>>::vpcmpestrm(self, op0, op1, op2);
6277    }
6278    /// `VPCMPGTB`.
6279    ///
6280    /// Supported operand variants:
6281    ///
6282    /// ```text
6283    /// +----+----------------+
6284    /// | #  | Operands       |
6285    /// +----+----------------+
6286    /// | 1  | KReg, Xmm, Mem |
6287    /// | 2  | KReg, Xmm, Xmm |
6288    /// | 3  | KReg, Ymm, Mem |
6289    /// | 4  | KReg, Ymm, Ymm |
6290    /// | 5  | KReg, Zmm, Mem |
6291    /// | 6  | KReg, Zmm, Zmm |
6292    /// | 7  | Xmm, Xmm, Mem  |
6293    /// | 8  | Xmm, Xmm, Xmm  |
6294    /// | 9  | Ymm, Ymm, Mem  |
6295    /// | 10 | Ymm, Ymm, Ymm  |
6296    /// +----+----------------+
6297    /// ```
6298    #[inline]
6299    pub fn vpcmpgtb<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6300    where
6301        Assembler<'a>: VpcmpgtbEmitter<A, B, C>,
6302    {
6303        <Self as VpcmpgtbEmitter<A, B, C>>::vpcmpgtb(self, op0, op1, op2);
6304    }
6305    /// `VPCMPGTD`.
6306    ///
6307    /// Supported operand variants:
6308    ///
6309    /// ```text
6310    /// +----+----------------+
6311    /// | #  | Operands       |
6312    /// +----+----------------+
6313    /// | 1  | KReg, Xmm, Mem |
6314    /// | 2  | KReg, Xmm, Xmm |
6315    /// | 3  | KReg, Ymm, Mem |
6316    /// | 4  | KReg, Ymm, Ymm |
6317    /// | 5  | KReg, Zmm, Mem |
6318    /// | 6  | KReg, Zmm, Zmm |
6319    /// | 7  | Xmm, Xmm, Mem  |
6320    /// | 8  | Xmm, Xmm, Xmm  |
6321    /// | 9  | Ymm, Ymm, Mem  |
6322    /// | 10 | Ymm, Ymm, Ymm  |
6323    /// +----+----------------+
6324    /// ```
6325    #[inline]
6326    pub fn vpcmpgtd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6327    where
6328        Assembler<'a>: VpcmpgtdEmitter<A, B, C>,
6329    {
6330        <Self as VpcmpgtdEmitter<A, B, C>>::vpcmpgtd(self, op0, op1, op2);
6331    }
6332    /// `VPCMPGTQ`.
6333    ///
6334    /// Supported operand variants:
6335    ///
6336    /// ```text
6337    /// +----+----------------+
6338    /// | #  | Operands       |
6339    /// +----+----------------+
6340    /// | 1  | KReg, Xmm, Mem |
6341    /// | 2  | KReg, Xmm, Xmm |
6342    /// | 3  | KReg, Ymm, Mem |
6343    /// | 4  | KReg, Ymm, Ymm |
6344    /// | 5  | KReg, Zmm, Mem |
6345    /// | 6  | KReg, Zmm, Zmm |
6346    /// | 7  | Xmm, Xmm, Mem  |
6347    /// | 8  | Xmm, Xmm, Xmm  |
6348    /// | 9  | Ymm, Ymm, Mem  |
6349    /// | 10 | Ymm, Ymm, Ymm  |
6350    /// +----+----------------+
6351    /// ```
6352    #[inline]
6353    pub fn vpcmpgtq<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6354    where
6355        Assembler<'a>: VpcmpgtqEmitter<A, B, C>,
6356    {
6357        <Self as VpcmpgtqEmitter<A, B, C>>::vpcmpgtq(self, op0, op1, op2);
6358    }
6359    /// `VPCMPGTW`.
6360    ///
6361    /// Supported operand variants:
6362    ///
6363    /// ```text
6364    /// +----+----------------+
6365    /// | #  | Operands       |
6366    /// +----+----------------+
6367    /// | 1  | KReg, Xmm, Mem |
6368    /// | 2  | KReg, Xmm, Xmm |
6369    /// | 3  | KReg, Ymm, Mem |
6370    /// | 4  | KReg, Ymm, Ymm |
6371    /// | 5  | KReg, Zmm, Mem |
6372    /// | 6  | KReg, Zmm, Zmm |
6373    /// | 7  | Xmm, Xmm, Mem  |
6374    /// | 8  | Xmm, Xmm, Xmm  |
6375    /// | 9  | Ymm, Ymm, Mem  |
6376    /// | 10 | Ymm, Ymm, Ymm  |
6377    /// +----+----------------+
6378    /// ```
6379    #[inline]
6380    pub fn vpcmpgtw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6381    where
6382        Assembler<'a>: VpcmpgtwEmitter<A, B, C>,
6383    {
6384        <Self as VpcmpgtwEmitter<A, B, C>>::vpcmpgtw(self, op0, op1, op2);
6385    }
6386    /// `VPCMPISTRI`.
6387    ///
6388    /// Supported operand variants:
6389    ///
6390    /// ```text
6391    /// +---+---------------+
6392    /// | # | Operands      |
6393    /// +---+---------------+
6394    /// | 1 | Xmm, Mem, Imm |
6395    /// | 2 | Xmm, Xmm, Imm |
6396    /// +---+---------------+
6397    /// ```
6398    #[inline]
6399    pub fn vpcmpistri<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6400    where
6401        Assembler<'a>: VpcmpistriEmitter<A, B, C>,
6402    {
6403        <Self as VpcmpistriEmitter<A, B, C>>::vpcmpistri(self, op0, op1, op2);
6404    }
6405    /// `VPCMPISTRM`.
6406    ///
6407    /// Supported operand variants:
6408    ///
6409    /// ```text
6410    /// +---+---------------+
6411    /// | # | Operands      |
6412    /// +---+---------------+
6413    /// | 1 | Xmm, Mem, Imm |
6414    /// | 2 | Xmm, Xmm, Imm |
6415    /// +---+---------------+
6416    /// ```
6417    #[inline]
6418    pub fn vpcmpistrm<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6419    where
6420        Assembler<'a>: VpcmpistrmEmitter<A, B, C>,
6421    {
6422        <Self as VpcmpistrmEmitter<A, B, C>>::vpcmpistrm(self, op0, op1, op2);
6423    }
6424    /// `VPERM2F128`.
6425    ///
6426    /// Supported operand variants:
6427    ///
6428    /// ```text
6429    /// +---+--------------------+
6430    /// | # | Operands           |
6431    /// +---+--------------------+
6432    /// | 1 | Ymm, Ymm, Mem, Imm |
6433    /// | 2 | Ymm, Ymm, Ymm, Imm |
6434    /// +---+--------------------+
6435    /// ```
6436    #[inline]
6437    pub fn vperm2f128<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
6438    where
6439        Assembler<'a>: Vperm2f128Emitter<A, B, C, D>,
6440    {
6441        <Self as Vperm2f128Emitter<A, B, C, D>>::vperm2f128(self, op0, op1, op2, op3);
6442    }
6443    /// `VPEXTRD`.
6444    ///
6445    /// Supported operand variants:
6446    ///
6447    /// ```text
6448    /// +---+---------------+
6449    /// | # | Operands      |
6450    /// +---+---------------+
6451    /// | 1 | Gpd, Xmm, Imm |
6452    /// | 2 | Mem, Xmm, Imm |
6453    /// +---+---------------+
6454    /// ```
6455    #[inline]
6456    pub fn vpextrd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6457    where
6458        Assembler<'a>: VpextrdEmitter<A, B, C>,
6459    {
6460        <Self as VpextrdEmitter<A, B, C>>::vpextrd(self, op0, op1, op2);
6461    }
6462    /// `VPEXTRQ`.
6463    ///
6464    /// Supported operand variants:
6465    ///
6466    /// ```text
6467    /// +---+---------------+
6468    /// | # | Operands      |
6469    /// +---+---------------+
6470    /// | 1 | Gpd, Xmm, Imm |
6471    /// | 2 | Gpq, Xmm, Imm |
6472    /// | 3 | Mem, Xmm, Imm |
6473    /// +---+---------------+
6474    /// ```
6475    #[inline]
6476    pub fn vpextrq<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6477    where
6478        Assembler<'a>: VpextrqEmitter<A, B, C>,
6479    {
6480        <Self as VpextrqEmitter<A, B, C>>::vpextrq(self, op0, op1, op2);
6481    }
6482    /// `VPHADDD`.
6483    ///
6484    /// Supported operand variants:
6485    ///
6486    /// ```text
6487    /// +---+---------------+
6488    /// | # | Operands      |
6489    /// +---+---------------+
6490    /// | 1 | Xmm, Xmm, Mem |
6491    /// | 2 | Xmm, Xmm, Xmm |
6492    /// | 3 | Ymm, Ymm, Mem |
6493    /// | 4 | Ymm, Ymm, Ymm |
6494    /// +---+---------------+
6495    /// ```
6496    #[inline]
6497    pub fn vphaddd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6498    where
6499        Assembler<'a>: VphadddEmitter<A, B, C>,
6500    {
6501        <Self as VphadddEmitter<A, B, C>>::vphaddd(self, op0, op1, op2);
6502    }
6503    /// `VPHADDSW`.
6504    ///
6505    /// Supported operand variants:
6506    ///
6507    /// ```text
6508    /// +---+---------------+
6509    /// | # | Operands      |
6510    /// +---+---------------+
6511    /// | 1 | Xmm, Xmm, Mem |
6512    /// | 2 | Xmm, Xmm, Xmm |
6513    /// | 3 | Ymm, Ymm, Mem |
6514    /// | 4 | Ymm, Ymm, Ymm |
6515    /// +---+---------------+
6516    /// ```
6517    #[inline]
6518    pub fn vphaddsw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6519    where
6520        Assembler<'a>: VphaddswEmitter<A, B, C>,
6521    {
6522        <Self as VphaddswEmitter<A, B, C>>::vphaddsw(self, op0, op1, op2);
6523    }
6524    /// `VPHADDW`.
6525    ///
6526    /// Supported operand variants:
6527    ///
6528    /// ```text
6529    /// +---+---------------+
6530    /// | # | Operands      |
6531    /// +---+---------------+
6532    /// | 1 | Xmm, Xmm, Mem |
6533    /// | 2 | Xmm, Xmm, Xmm |
6534    /// | 3 | Ymm, Ymm, Mem |
6535    /// | 4 | Ymm, Ymm, Ymm |
6536    /// +---+---------------+
6537    /// ```
6538    #[inline]
6539    pub fn vphaddw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6540    where
6541        Assembler<'a>: VphaddwEmitter<A, B, C>,
6542    {
6543        <Self as VphaddwEmitter<A, B, C>>::vphaddw(self, op0, op1, op2);
6544    }
6545    /// `VPHMINPOSUW`.
6546    ///
6547    /// Supported operand variants:
6548    ///
6549    /// ```text
6550    /// +---+----------+
6551    /// | # | Operands |
6552    /// +---+----------+
6553    /// | 1 | Xmm, Mem |
6554    /// | 2 | Xmm, Xmm |
6555    /// +---+----------+
6556    /// ```
6557    #[inline]
6558    pub fn vphminposuw<A, B>(&mut self, op0: A, op1: B)
6559    where
6560        Assembler<'a>: VphminposuwEmitter<A, B>,
6561    {
6562        <Self as VphminposuwEmitter<A, B>>::vphminposuw(self, op0, op1);
6563    }
6564    /// `VPHSUBD`.
6565    ///
6566    /// Supported operand variants:
6567    ///
6568    /// ```text
6569    /// +---+---------------+
6570    /// | # | Operands      |
6571    /// +---+---------------+
6572    /// | 1 | Xmm, Xmm, Mem |
6573    /// | 2 | Xmm, Xmm, Xmm |
6574    /// | 3 | Ymm, Ymm, Mem |
6575    /// | 4 | Ymm, Ymm, Ymm |
6576    /// +---+---------------+
6577    /// ```
6578    #[inline]
6579    pub fn vphsubd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6580    where
6581        Assembler<'a>: VphsubdEmitter<A, B, C>,
6582    {
6583        <Self as VphsubdEmitter<A, B, C>>::vphsubd(self, op0, op1, op2);
6584    }
6585    /// `VPHSUBSW`.
6586    ///
6587    /// Supported operand variants:
6588    ///
6589    /// ```text
6590    /// +---+---------------+
6591    /// | # | Operands      |
6592    /// +---+---------------+
6593    /// | 1 | Xmm, Xmm, Mem |
6594    /// | 2 | Xmm, Xmm, Xmm |
6595    /// | 3 | Ymm, Ymm, Mem |
6596    /// | 4 | Ymm, Ymm, Ymm |
6597    /// +---+---------------+
6598    /// ```
6599    #[inline]
6600    pub fn vphsubsw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6601    where
6602        Assembler<'a>: VphsubswEmitter<A, B, C>,
6603    {
6604        <Self as VphsubswEmitter<A, B, C>>::vphsubsw(self, op0, op1, op2);
6605    }
6606    /// `VPHSUBW`.
6607    ///
6608    /// Supported operand variants:
6609    ///
6610    /// ```text
6611    /// +---+---------------+
6612    /// | # | Operands      |
6613    /// +---+---------------+
6614    /// | 1 | Xmm, Xmm, Mem |
6615    /// | 2 | Xmm, Xmm, Xmm |
6616    /// | 3 | Ymm, Ymm, Mem |
6617    /// | 4 | Ymm, Ymm, Ymm |
6618    /// +---+---------------+
6619    /// ```
6620    #[inline]
6621    pub fn vphsubw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6622    where
6623        Assembler<'a>: VphsubwEmitter<A, B, C>,
6624    {
6625        <Self as VphsubwEmitter<A, B, C>>::vphsubw(self, op0, op1, op2);
6626    }
6627    /// `VPINSRD`.
6628    ///
6629    /// Supported operand variants:
6630    ///
6631    /// ```text
6632    /// +---+--------------------+
6633    /// | # | Operands           |
6634    /// +---+--------------------+
6635    /// | 1 | Xmm, Xmm, Gpd, Imm |
6636    /// | 2 | Xmm, Xmm, Mem, Imm |
6637    /// +---+--------------------+
6638    /// ```
6639    #[inline]
6640    pub fn vpinsrd<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
6641    where
6642        Assembler<'a>: VpinsrdEmitter<A, B, C, D>,
6643    {
6644        <Self as VpinsrdEmitter<A, B, C, D>>::vpinsrd(self, op0, op1, op2, op3);
6645    }
6646    /// `VPINSRQ`.
6647    ///
6648    /// Supported operand variants:
6649    ///
6650    /// ```text
6651    /// +---+--------------------+
6652    /// | # | Operands           |
6653    /// +---+--------------------+
6654    /// | 1 | Xmm, Xmm, Gpd, Imm |
6655    /// | 2 | Xmm, Xmm, Gpq, Imm |
6656    /// | 3 | Xmm, Xmm, Mem, Imm |
6657    /// +---+--------------------+
6658    /// ```
6659    #[inline]
6660    pub fn vpinsrq<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
6661    where
6662        Assembler<'a>: VpinsrqEmitter<A, B, C, D>,
6663    {
6664        <Self as VpinsrqEmitter<A, B, C, D>>::vpinsrq(self, op0, op1, op2, op3);
6665    }
6666    /// `VPMOVMSKB`.
6667    ///
6668    /// Supported operand variants:
6669    ///
6670    /// ```text
6671    /// +---+----------+
6672    /// | # | Operands |
6673    /// +---+----------+
6674    /// | 1 | Gpd, Xmm |
6675    /// | 2 | Gpd, Ymm |
6676    /// +---+----------+
6677    /// ```
6678    #[inline]
6679    pub fn vpmovmskb<A, B>(&mut self, op0: A, op1: B)
6680    where
6681        Assembler<'a>: VpmovmskbEmitter<A, B>,
6682    {
6683        <Self as VpmovmskbEmitter<A, B>>::vpmovmskb(self, op0, op1);
6684    }
6685    /// `VPOR`.
6686    ///
6687    /// Supported operand variants:
6688    ///
6689    /// ```text
6690    /// +---+---------------+
6691    /// | # | Operands      |
6692    /// +---+---------------+
6693    /// | 1 | Xmm, Xmm, Mem |
6694    /// | 2 | Xmm, Xmm, Xmm |
6695    /// | 3 | Ymm, Ymm, Mem |
6696    /// | 4 | Ymm, Ymm, Ymm |
6697    /// +---+---------------+
6698    /// ```
6699    #[inline]
6700    pub fn vpor<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6701    where
6702        Assembler<'a>: VporEmitter<A, B, C>,
6703    {
6704        <Self as VporEmitter<A, B, C>>::vpor(self, op0, op1, op2);
6705    }
6706    /// `VPSIGNB`.
6707    ///
6708    /// Supported operand variants:
6709    ///
6710    /// ```text
6711    /// +---+---------------+
6712    /// | # | Operands      |
6713    /// +---+---------------+
6714    /// | 1 | Xmm, Xmm, Mem |
6715    /// | 2 | Xmm, Xmm, Xmm |
6716    /// | 3 | Ymm, Ymm, Mem |
6717    /// | 4 | Ymm, Ymm, Ymm |
6718    /// +---+---------------+
6719    /// ```
6720    #[inline]
6721    pub fn vpsignb<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6722    where
6723        Assembler<'a>: VpsignbEmitter<A, B, C>,
6724    {
6725        <Self as VpsignbEmitter<A, B, C>>::vpsignb(self, op0, op1, op2);
6726    }
6727    /// `VPSIGND`.
6728    ///
6729    /// Supported operand variants:
6730    ///
6731    /// ```text
6732    /// +---+---------------+
6733    /// | # | Operands      |
6734    /// +---+---------------+
6735    /// | 1 | Xmm, Xmm, Mem |
6736    /// | 2 | Xmm, Xmm, Xmm |
6737    /// | 3 | Ymm, Ymm, Mem |
6738    /// | 4 | Ymm, Ymm, Ymm |
6739    /// +---+---------------+
6740    /// ```
6741    #[inline]
6742    pub fn vpsignd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6743    where
6744        Assembler<'a>: VpsigndEmitter<A, B, C>,
6745    {
6746        <Self as VpsigndEmitter<A, B, C>>::vpsignd(self, op0, op1, op2);
6747    }
6748    /// `VPSIGNW`.
6749    ///
6750    /// Supported operand variants:
6751    ///
6752    /// ```text
6753    /// +---+---------------+
6754    /// | # | Operands      |
6755    /// +---+---------------+
6756    /// | 1 | Xmm, Xmm, Mem |
6757    /// | 2 | Xmm, Xmm, Xmm |
6758    /// | 3 | Ymm, Ymm, Mem |
6759    /// | 4 | Ymm, Ymm, Ymm |
6760    /// +---+---------------+
6761    /// ```
6762    #[inline]
6763    pub fn vpsignw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6764    where
6765        Assembler<'a>: VpsignwEmitter<A, B, C>,
6766    {
6767        <Self as VpsignwEmitter<A, B, C>>::vpsignw(self, op0, op1, op2);
6768    }
6769    /// `VPTEST`.
6770    ///
6771    /// Supported operand variants:
6772    ///
6773    /// ```text
6774    /// +---+----------+
6775    /// | # | Operands |
6776    /// +---+----------+
6777    /// | 1 | Xmm, Mem |
6778    /// | 2 | Xmm, Xmm |
6779    /// | 3 | Ymm, Mem |
6780    /// | 4 | Ymm, Ymm |
6781    /// +---+----------+
6782    /// ```
6783    #[inline]
6784    pub fn vptest<A, B>(&mut self, op0: A, op1: B)
6785    where
6786        Assembler<'a>: VptestEmitter<A, B>,
6787    {
6788        <Self as VptestEmitter<A, B>>::vptest(self, op0, op1);
6789    }
6790    /// `VPXOR`.
6791    ///
6792    /// Supported operand variants:
6793    ///
6794    /// ```text
6795    /// +---+---------------+
6796    /// | # | Operands      |
6797    /// +---+---------------+
6798    /// | 1 | Xmm, Xmm, Mem |
6799    /// | 2 | Xmm, Xmm, Xmm |
6800    /// | 3 | Ymm, Ymm, Mem |
6801    /// | 4 | Ymm, Ymm, Ymm |
6802    /// +---+---------------+
6803    /// ```
6804    #[inline]
6805    pub fn vpxor<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6806    where
6807        Assembler<'a>: VpxorEmitter<A, B, C>,
6808    {
6809        <Self as VpxorEmitter<A, B, C>>::vpxor(self, op0, op1, op2);
6810    }
6811    /// `VRCPPS`.
6812    ///
6813    /// Supported operand variants:
6814    ///
6815    /// ```text
6816    /// +---+----------+
6817    /// | # | Operands |
6818    /// +---+----------+
6819    /// | 1 | Xmm, Mem |
6820    /// | 2 | Xmm, Xmm |
6821    /// | 3 | Ymm, Mem |
6822    /// | 4 | Ymm, Ymm |
6823    /// +---+----------+
6824    /// ```
6825    #[inline]
6826    pub fn vrcpps<A, B>(&mut self, op0: A, op1: B)
6827    where
6828        Assembler<'a>: VrcppsEmitter<A, B>,
6829    {
6830        <Self as VrcppsEmitter<A, B>>::vrcpps(self, op0, op1);
6831    }
6832    /// `VRCPSS`.
6833    ///
6834    /// Supported operand variants:
6835    ///
6836    /// ```text
6837    /// +---+---------------+
6838    /// | # | Operands      |
6839    /// +---+---------------+
6840    /// | 1 | Xmm, Xmm, Mem |
6841    /// | 2 | Xmm, Xmm, Xmm |
6842    /// +---+---------------+
6843    /// ```
6844    #[inline]
6845    pub fn vrcpss<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6846    where
6847        Assembler<'a>: VrcpssEmitter<A, B, C>,
6848    {
6849        <Self as VrcpssEmitter<A, B, C>>::vrcpss(self, op0, op1, op2);
6850    }
6851    /// `VROUNDPD`.
6852    ///
6853    /// Supported operand variants:
6854    ///
6855    /// ```text
6856    /// +---+---------------+
6857    /// | # | Operands      |
6858    /// +---+---------------+
6859    /// | 1 | Xmm, Mem, Imm |
6860    /// | 2 | Xmm, Xmm, Imm |
6861    /// | 3 | Ymm, Mem, Imm |
6862    /// | 4 | Ymm, Ymm, Imm |
6863    /// +---+---------------+
6864    /// ```
6865    #[inline]
6866    pub fn vroundpd<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6867    where
6868        Assembler<'a>: VroundpdEmitter<A, B, C>,
6869    {
6870        <Self as VroundpdEmitter<A, B, C>>::vroundpd(self, op0, op1, op2);
6871    }
6872    /// `VROUNDPS`.
6873    ///
6874    /// Supported operand variants:
6875    ///
6876    /// ```text
6877    /// +---+---------------+
6878    /// | # | Operands      |
6879    /// +---+---------------+
6880    /// | 1 | Xmm, Mem, Imm |
6881    /// | 2 | Xmm, Xmm, Imm |
6882    /// | 3 | Ymm, Mem, Imm |
6883    /// | 4 | Ymm, Ymm, Imm |
6884    /// +---+---------------+
6885    /// ```
6886    #[inline]
6887    pub fn vroundps<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6888    where
6889        Assembler<'a>: VroundpsEmitter<A, B, C>,
6890    {
6891        <Self as VroundpsEmitter<A, B, C>>::vroundps(self, op0, op1, op2);
6892    }
6893    /// `VROUNDSD`.
6894    ///
6895    /// Supported operand variants:
6896    ///
6897    /// ```text
6898    /// +---+--------------------+
6899    /// | # | Operands           |
6900    /// +---+--------------------+
6901    /// | 1 | Xmm, Xmm, Mem, Imm |
6902    /// | 2 | Xmm, Xmm, Xmm, Imm |
6903    /// +---+--------------------+
6904    /// ```
6905    #[inline]
6906    pub fn vroundsd<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
6907    where
6908        Assembler<'a>: VroundsdEmitter<A, B, C, D>,
6909    {
6910        <Self as VroundsdEmitter<A, B, C, D>>::vroundsd(self, op0, op1, op2, op3);
6911    }
6912    /// `VROUNDSS`.
6913    ///
6914    /// Supported operand variants:
6915    ///
6916    /// ```text
6917    /// +---+--------------------+
6918    /// | # | Operands           |
6919    /// +---+--------------------+
6920    /// | 1 | Xmm, Xmm, Mem, Imm |
6921    /// | 2 | Xmm, Xmm, Xmm, Imm |
6922    /// +---+--------------------+
6923    /// ```
6924    #[inline]
6925    pub fn vroundss<A, B, C, D>(&mut self, op0: A, op1: B, op2: C, op3: D)
6926    where
6927        Assembler<'a>: VroundssEmitter<A, B, C, D>,
6928    {
6929        <Self as VroundssEmitter<A, B, C, D>>::vroundss(self, op0, op1, op2, op3);
6930    }
6931    /// `VRSQRTPS`.
6932    ///
6933    /// Supported operand variants:
6934    ///
6935    /// ```text
6936    /// +---+----------+
6937    /// | # | Operands |
6938    /// +---+----------+
6939    /// | 1 | Xmm, Mem |
6940    /// | 2 | Xmm, Xmm |
6941    /// | 3 | Ymm, Mem |
6942    /// | 4 | Ymm, Ymm |
6943    /// +---+----------+
6944    /// ```
6945    #[inline]
6946    pub fn vrsqrtps<A, B>(&mut self, op0: A, op1: B)
6947    where
6948        Assembler<'a>: VrsqrtpsEmitter<A, B>,
6949    {
6950        <Self as VrsqrtpsEmitter<A, B>>::vrsqrtps(self, op0, op1);
6951    }
6952    /// `VRSQRTSS`.
6953    ///
6954    /// Supported operand variants:
6955    ///
6956    /// ```text
6957    /// +---+---------------+
6958    /// | # | Operands      |
6959    /// +---+---------------+
6960    /// | 1 | Xmm, Xmm, Mem |
6961    /// | 2 | Xmm, Xmm, Xmm |
6962    /// +---+---------------+
6963    /// ```
6964    #[inline]
6965    pub fn vrsqrtss<A, B, C>(&mut self, op0: A, op1: B, op2: C)
6966    where
6967        Assembler<'a>: VrsqrtssEmitter<A, B, C>,
6968    {
6969        <Self as VrsqrtssEmitter<A, B, C>>::vrsqrtss(self, op0, op1, op2);
6970    }
6971    /// `VSTMXCSR`.
6972    ///
6973    /// Supported operand variants:
6974    ///
6975    /// ```text
6976    /// +---+----------+
6977    /// | # | Operands |
6978    /// +---+----------+
6979    /// | 1 | Mem      |
6980    /// +---+----------+
6981    /// ```
6982    #[inline]
6983    pub fn vstmxcsr<A>(&mut self, op0: A)
6984    where
6985        Assembler<'a>: VstmxcsrEmitter<A>,
6986    {
6987        <Self as VstmxcsrEmitter<A>>::vstmxcsr(self, op0);
6988    }
6989    /// `VTESTPD`.
6990    ///
6991    /// Supported operand variants:
6992    ///
6993    /// ```text
6994    /// +---+----------+
6995    /// | # | Operands |
6996    /// +---+----------+
6997    /// | 1 | Xmm, Mem |
6998    /// | 2 | Xmm, Xmm |
6999    /// | 3 | Ymm, Mem |
7000    /// | 4 | Ymm, Ymm |
7001    /// +---+----------+
7002    /// ```
7003    #[inline]
7004    pub fn vtestpd<A, B>(&mut self, op0: A, op1: B)
7005    where
7006        Assembler<'a>: VtestpdEmitter<A, B>,
7007    {
7008        <Self as VtestpdEmitter<A, B>>::vtestpd(self, op0, op1);
7009    }
7010    /// `VTESTPS`.
7011    ///
7012    /// Supported operand variants:
7013    ///
7014    /// ```text
7015    /// +---+----------+
7016    /// | # | Operands |
7017    /// +---+----------+
7018    /// | 1 | Xmm, Mem |
7019    /// | 2 | Xmm, Xmm |
7020    /// | 3 | Ymm, Mem |
7021    /// | 4 | Ymm, Ymm |
7022    /// +---+----------+
7023    /// ```
7024    #[inline]
7025    pub fn vtestps<A, B>(&mut self, op0: A, op1: B)
7026    where
7027        Assembler<'a>: VtestpsEmitter<A, B>,
7028    {
7029        <Self as VtestpsEmitter<A, B>>::vtestps(self, op0, op1);
7030    }
7031    /// `VZEROALL`.
7032    ///
7033    /// Supported operand variants:
7034    ///
7035    /// ```text
7036    /// +---+----------+
7037    /// | # | Operands |
7038    /// +---+----------+
7039    /// | 1 | (none)   |
7040    /// +---+----------+
7041    /// ```
7042    #[inline]
7043    pub fn vzeroall(&mut self)
7044    where
7045        Assembler<'a>: VzeroallEmitter,
7046    {
7047        <Self as VzeroallEmitter>::vzeroall(self);
7048    }
7049    /// `VZEROUPPER`.
7050    ///
7051    /// Supported operand variants:
7052    ///
7053    /// ```text
7054    /// +---+----------+
7055    /// | # | Operands |
7056    /// +---+----------+
7057    /// | 1 | (none)   |
7058    /// +---+----------+
7059    /// ```
7060    #[inline]
7061    pub fn vzeroupper(&mut self)
7062    where
7063        Assembler<'a>: VzeroupperEmitter,
7064    {
7065        <Self as VzeroupperEmitter>::vzeroupper(self);
7066    }
7067}