asmkit/x86/features/
SSE.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `LDMXCSR`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+----------+
16/// | # | Operands |
17/// +---+----------+
18/// | 1 | Mem      |
19/// +---+----------+
20/// ```
21pub trait LdmxcsrEmitter<A> {
22    fn ldmxcsr(&mut self, op0: A);
23}
24
25impl<'a> LdmxcsrEmitter<Mem> for Assembler<'a> {
26    fn ldmxcsr(&mut self, op0: Mem) {
27        self.emit(LDMXCSRM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
28    }
29}
30
31/// `MMX_MASKMOVQ`.
32///
33/// Supported operand variants:
34///
35/// ```text
36/// +---+----------+
37/// | # | Operands |
38/// +---+----------+
39/// | 1 | Mm, Mm   |
40/// +---+----------+
41/// ```
42pub trait MmxMaskmovqEmitter<A, B> {
43    fn mmx_maskmovq(&mut self, op0: A, op1: B);
44}
45
46impl<'a> MmxMaskmovqEmitter<Mm, Mm> for Assembler<'a> {
47    fn mmx_maskmovq(&mut self, op0: Mm, op1: Mm) {
48        self.emit(
49            MMX_MASKMOVQRR,
50            op0.as_operand(),
51            op1.as_operand(),
52            &NOREG,
53            &NOREG,
54        );
55    }
56}
57
58/// `MMX_MOVDQ2Q`.
59///
60/// Supported operand variants:
61///
62/// ```text
63/// +---+----------+
64/// | # | Operands |
65/// +---+----------+
66/// | 1 | Mm, Xmm  |
67/// +---+----------+
68/// ```
69pub trait MmxMovdq2qEmitter<A, B> {
70    fn mmx_movdq2q(&mut self, op0: A, op1: B);
71}
72
73impl<'a> MmxMovdq2qEmitter<Mm, Xmm> for Assembler<'a> {
74    fn mmx_movdq2q(&mut self, op0: Mm, op1: Xmm) {
75        self.emit(
76            MMX_MOVDQ2QRR,
77            op0.as_operand(),
78            op1.as_operand(),
79            &NOREG,
80            &NOREG,
81        );
82    }
83}
84
85/// `MMX_MOVNTQ`.
86///
87/// Supported operand variants:
88///
89/// ```text
90/// +---+----------+
91/// | # | Operands |
92/// +---+----------+
93/// | 1 | Mem, Mm  |
94/// +---+----------+
95/// ```
96pub trait MmxMovntqEmitter<A, B> {
97    fn mmx_movntq(&mut self, op0: A, op1: B);
98}
99
100impl<'a> MmxMovntqEmitter<Mem, Mm> for Assembler<'a> {
101    fn mmx_movntq(&mut self, op0: Mem, op1: Mm) {
102        self.emit(
103            MMX_MOVNTQMR,
104            op0.as_operand(),
105            op1.as_operand(),
106            &NOREG,
107            &NOREG,
108        );
109    }
110}
111
112/// `MMX_MOVQ2DQ`.
113///
114/// Supported operand variants:
115///
116/// ```text
117/// +---+----------+
118/// | # | Operands |
119/// +---+----------+
120/// | 1 | Xmm, Mm  |
121/// +---+----------+
122/// ```
123pub trait MmxMovq2dqEmitter<A, B> {
124    fn mmx_movq2dq(&mut self, op0: A, op1: B);
125}
126
127impl<'a> MmxMovq2dqEmitter<Xmm, Mm> for Assembler<'a> {
128    fn mmx_movq2dq(&mut self, op0: Xmm, op1: Mm) {
129        self.emit(
130            MMX_MOVQ2DQRR,
131            op0.as_operand(),
132            op1.as_operand(),
133            &NOREG,
134            &NOREG,
135        );
136    }
137}
138
139/// `MMX_PAVGB`.
140///
141/// Supported operand variants:
142///
143/// ```text
144/// +---+----------+
145/// | # | Operands |
146/// +---+----------+
147/// | 1 | Mm, Mem  |
148/// | 2 | Mm, Mm   |
149/// +---+----------+
150/// ```
151pub trait MmxPavgbEmitter<A, B> {
152    fn mmx_pavgb(&mut self, op0: A, op1: B);
153}
154
155impl<'a> MmxPavgbEmitter<Mm, Mm> for Assembler<'a> {
156    fn mmx_pavgb(&mut self, op0: Mm, op1: Mm) {
157        self.emit(
158            MMX_PAVGBRR,
159            op0.as_operand(),
160            op1.as_operand(),
161            &NOREG,
162            &NOREG,
163        );
164    }
165}
166
167impl<'a> MmxPavgbEmitter<Mm, Mem> for Assembler<'a> {
168    fn mmx_pavgb(&mut self, op0: Mm, op1: Mem) {
169        self.emit(
170            MMX_PAVGBRM,
171            op0.as_operand(),
172            op1.as_operand(),
173            &NOREG,
174            &NOREG,
175        );
176    }
177}
178
179/// `MMX_PAVGW`.
180///
181/// Supported operand variants:
182///
183/// ```text
184/// +---+----------+
185/// | # | Operands |
186/// +---+----------+
187/// | 1 | Mm, Mem  |
188/// | 2 | Mm, Mm   |
189/// +---+----------+
190/// ```
191pub trait MmxPavgwEmitter<A, B> {
192    fn mmx_pavgw(&mut self, op0: A, op1: B);
193}
194
195impl<'a> MmxPavgwEmitter<Mm, Mm> for Assembler<'a> {
196    fn mmx_pavgw(&mut self, op0: Mm, op1: Mm) {
197        self.emit(
198            MMX_PAVGWRR,
199            op0.as_operand(),
200            op1.as_operand(),
201            &NOREG,
202            &NOREG,
203        );
204    }
205}
206
207impl<'a> MmxPavgwEmitter<Mm, Mem> for Assembler<'a> {
208    fn mmx_pavgw(&mut self, op0: Mm, op1: Mem) {
209        self.emit(
210            MMX_PAVGWRM,
211            op0.as_operand(),
212            op1.as_operand(),
213            &NOREG,
214            &NOREG,
215        );
216    }
217}
218
219/// `MMX_PEXTRW`.
220///
221/// Supported operand variants:
222///
223/// ```text
224/// +---+--------------+
225/// | # | Operands     |
226/// +---+--------------+
227/// | 1 | Gpq, Mm, Imm |
228/// +---+--------------+
229/// ```
230pub trait MmxPextrwEmitter<A, B, C> {
231    fn mmx_pextrw(&mut self, op0: A, op1: B, op2: C);
232}
233
234impl<'a> MmxPextrwEmitter<Gpq, Mm, Imm> for Assembler<'a> {
235    fn mmx_pextrw(&mut self, op0: Gpq, op1: Mm, op2: Imm) {
236        self.emit(
237            MMX_PEXTRWRRI,
238            op0.as_operand(),
239            op1.as_operand(),
240            op2.as_operand(),
241            &NOREG,
242        );
243    }
244}
245
246/// `MMX_PINSRW`.
247///
248/// Supported operand variants:
249///
250/// ```text
251/// +---+--------------+
252/// | # | Operands     |
253/// +---+--------------+
254/// | 1 | Mm, Gpd, Imm |
255/// | 2 | Mm, Mem, Imm |
256/// +---+--------------+
257/// ```
258pub trait MmxPinsrwEmitter<A, B, C> {
259    fn mmx_pinsrw(&mut self, op0: A, op1: B, op2: C);
260}
261
262impl<'a> MmxPinsrwEmitter<Mm, Gpd, Imm> for Assembler<'a> {
263    fn mmx_pinsrw(&mut self, op0: Mm, op1: Gpd, op2: Imm) {
264        self.emit(
265            MMX_PINSRWRRI,
266            op0.as_operand(),
267            op1.as_operand(),
268            op2.as_operand(),
269            &NOREG,
270        );
271    }
272}
273
274impl<'a> MmxPinsrwEmitter<Mm, Mem, Imm> for Assembler<'a> {
275    fn mmx_pinsrw(&mut self, op0: Mm, op1: Mem, op2: Imm) {
276        self.emit(
277            MMX_PINSRWRMI,
278            op0.as_operand(),
279            op1.as_operand(),
280            op2.as_operand(),
281            &NOREG,
282        );
283    }
284}
285
286/// `MMX_PMAXSW`.
287///
288/// Supported operand variants:
289///
290/// ```text
291/// +---+----------+
292/// | # | Operands |
293/// +---+----------+
294/// | 1 | Mm, Mem  |
295/// | 2 | Mm, Mm   |
296/// +---+----------+
297/// ```
298pub trait MmxPmaxswEmitter<A, B> {
299    fn mmx_pmaxsw(&mut self, op0: A, op1: B);
300}
301
302impl<'a> MmxPmaxswEmitter<Mm, Mm> for Assembler<'a> {
303    fn mmx_pmaxsw(&mut self, op0: Mm, op1: Mm) {
304        self.emit(
305            MMX_PMAXSWRR,
306            op0.as_operand(),
307            op1.as_operand(),
308            &NOREG,
309            &NOREG,
310        );
311    }
312}
313
314impl<'a> MmxPmaxswEmitter<Mm, Mem> for Assembler<'a> {
315    fn mmx_pmaxsw(&mut self, op0: Mm, op1: Mem) {
316        self.emit(
317            MMX_PMAXSWRM,
318            op0.as_operand(),
319            op1.as_operand(),
320            &NOREG,
321            &NOREG,
322        );
323    }
324}
325
326/// `MMX_PMAXUB`.
327///
328/// Supported operand variants:
329///
330/// ```text
331/// +---+----------+
332/// | # | Operands |
333/// +---+----------+
334/// | 1 | Mm, Mem  |
335/// | 2 | Mm, Mm   |
336/// +---+----------+
337/// ```
338pub trait MmxPmaxubEmitter<A, B> {
339    fn mmx_pmaxub(&mut self, op0: A, op1: B);
340}
341
342impl<'a> MmxPmaxubEmitter<Mm, Mm> for Assembler<'a> {
343    fn mmx_pmaxub(&mut self, op0: Mm, op1: Mm) {
344        self.emit(
345            MMX_PMAXUBRR,
346            op0.as_operand(),
347            op1.as_operand(),
348            &NOREG,
349            &NOREG,
350        );
351    }
352}
353
354impl<'a> MmxPmaxubEmitter<Mm, Mem> for Assembler<'a> {
355    fn mmx_pmaxub(&mut self, op0: Mm, op1: Mem) {
356        self.emit(
357            MMX_PMAXUBRM,
358            op0.as_operand(),
359            op1.as_operand(),
360            &NOREG,
361            &NOREG,
362        );
363    }
364}
365
366/// `MMX_PMINSW`.
367///
368/// Supported operand variants:
369///
370/// ```text
371/// +---+----------+
372/// | # | Operands |
373/// +---+----------+
374/// | 1 | Mm, Mem  |
375/// | 2 | Mm, Mm   |
376/// +---+----------+
377/// ```
378pub trait MmxPminswEmitter<A, B> {
379    fn mmx_pminsw(&mut self, op0: A, op1: B);
380}
381
382impl<'a> MmxPminswEmitter<Mm, Mm> for Assembler<'a> {
383    fn mmx_pminsw(&mut self, op0: Mm, op1: Mm) {
384        self.emit(
385            MMX_PMINSWRR,
386            op0.as_operand(),
387            op1.as_operand(),
388            &NOREG,
389            &NOREG,
390        );
391    }
392}
393
394impl<'a> MmxPminswEmitter<Mm, Mem> for Assembler<'a> {
395    fn mmx_pminsw(&mut self, op0: Mm, op1: Mem) {
396        self.emit(
397            MMX_PMINSWRM,
398            op0.as_operand(),
399            op1.as_operand(),
400            &NOREG,
401            &NOREG,
402        );
403    }
404}
405
406/// `MMX_PMINUB`.
407///
408/// Supported operand variants:
409///
410/// ```text
411/// +---+----------+
412/// | # | Operands |
413/// +---+----------+
414/// | 1 | Mm, Mem  |
415/// | 2 | Mm, Mm   |
416/// +---+----------+
417/// ```
418pub trait MmxPminubEmitter<A, B> {
419    fn mmx_pminub(&mut self, op0: A, op1: B);
420}
421
422impl<'a> MmxPminubEmitter<Mm, Mm> for Assembler<'a> {
423    fn mmx_pminub(&mut self, op0: Mm, op1: Mm) {
424        self.emit(
425            MMX_PMINUBRR,
426            op0.as_operand(),
427            op1.as_operand(),
428            &NOREG,
429            &NOREG,
430        );
431    }
432}
433
434impl<'a> MmxPminubEmitter<Mm, Mem> for Assembler<'a> {
435    fn mmx_pminub(&mut self, op0: Mm, op1: Mem) {
436        self.emit(
437            MMX_PMINUBRM,
438            op0.as_operand(),
439            op1.as_operand(),
440            &NOREG,
441            &NOREG,
442        );
443    }
444}
445
446/// `MMX_PMOVMSKB`.
447///
448/// Supported operand variants:
449///
450/// ```text
451/// +---+----------+
452/// | # | Operands |
453/// +---+----------+
454/// | 1 | Gpq, Mm  |
455/// +---+----------+
456/// ```
457pub trait MmxPmovmskbEmitter<A, B> {
458    fn mmx_pmovmskb(&mut self, op0: A, op1: B);
459}
460
461impl<'a> MmxPmovmskbEmitter<Gpq, Mm> for Assembler<'a> {
462    fn mmx_pmovmskb(&mut self, op0: Gpq, op1: Mm) {
463        self.emit(
464            MMX_PMOVMSKBRR,
465            op0.as_operand(),
466            op1.as_operand(),
467            &NOREG,
468            &NOREG,
469        );
470    }
471}
472
473/// `MMX_PMULHUW`.
474///
475/// Supported operand variants:
476///
477/// ```text
478/// +---+----------+
479/// | # | Operands |
480/// +---+----------+
481/// | 1 | Mm, Mem  |
482/// | 2 | Mm, Mm   |
483/// +---+----------+
484/// ```
485pub trait MmxPmulhuwEmitter<A, B> {
486    fn mmx_pmulhuw(&mut self, op0: A, op1: B);
487}
488
489impl<'a> MmxPmulhuwEmitter<Mm, Mm> for Assembler<'a> {
490    fn mmx_pmulhuw(&mut self, op0: Mm, op1: Mm) {
491        self.emit(
492            MMX_PMULHUWRR,
493            op0.as_operand(),
494            op1.as_operand(),
495            &NOREG,
496            &NOREG,
497        );
498    }
499}
500
501impl<'a> MmxPmulhuwEmitter<Mm, Mem> for Assembler<'a> {
502    fn mmx_pmulhuw(&mut self, op0: Mm, op1: Mem) {
503        self.emit(
504            MMX_PMULHUWRM,
505            op0.as_operand(),
506            op1.as_operand(),
507            &NOREG,
508            &NOREG,
509        );
510    }
511}
512
513/// `MMX_PSADBW`.
514///
515/// Supported operand variants:
516///
517/// ```text
518/// +---+----------+
519/// | # | Operands |
520/// +---+----------+
521/// | 1 | Mm, Mem  |
522/// | 2 | Mm, Mm   |
523/// +---+----------+
524/// ```
525pub trait MmxPsadbwEmitter<A, B> {
526    fn mmx_psadbw(&mut self, op0: A, op1: B);
527}
528
529impl<'a> MmxPsadbwEmitter<Mm, Mm> for Assembler<'a> {
530    fn mmx_psadbw(&mut self, op0: Mm, op1: Mm) {
531        self.emit(
532            MMX_PSADBWRR,
533            op0.as_operand(),
534            op1.as_operand(),
535            &NOREG,
536            &NOREG,
537        );
538    }
539}
540
541impl<'a> MmxPsadbwEmitter<Mm, Mem> for Assembler<'a> {
542    fn mmx_psadbw(&mut self, op0: Mm, op1: Mem) {
543        self.emit(
544            MMX_PSADBWRM,
545            op0.as_operand(),
546            op1.as_operand(),
547            &NOREG,
548            &NOREG,
549        );
550    }
551}
552
553/// `MMX_PSHUFW`.
554///
555/// Supported operand variants:
556///
557/// ```text
558/// +---+--------------+
559/// | # | Operands     |
560/// +---+--------------+
561/// | 1 | Mm, Mem, Imm |
562/// | 2 | Mm, Mm, Imm  |
563/// +---+--------------+
564/// ```
565pub trait MmxPshufwEmitter<A, B, C> {
566    fn mmx_pshufw(&mut self, op0: A, op1: B, op2: C);
567}
568
569impl<'a> MmxPshufwEmitter<Mm, Mm, Imm> for Assembler<'a> {
570    fn mmx_pshufw(&mut self, op0: Mm, op1: Mm, op2: Imm) {
571        self.emit(
572            MMX_PSHUFWRRI,
573            op0.as_operand(),
574            op1.as_operand(),
575            op2.as_operand(),
576            &NOREG,
577        );
578    }
579}
580
581impl<'a> MmxPshufwEmitter<Mm, Mem, Imm> for Assembler<'a> {
582    fn mmx_pshufw(&mut self, op0: Mm, op1: Mem, op2: Imm) {
583        self.emit(
584            MMX_PSHUFWRMI,
585            op0.as_operand(),
586            op1.as_operand(),
587            op2.as_operand(),
588            &NOREG,
589        );
590    }
591}
592
593/// `PREFETCHNTA`.
594///
595/// Supported operand variants:
596///
597/// ```text
598/// +---+----------+
599/// | # | Operands |
600/// +---+----------+
601/// | 1 | Mem      |
602/// +---+----------+
603/// ```
604pub trait PrefetchntaEmitter<A> {
605    fn prefetchnta(&mut self, op0: A);
606}
607
608impl<'a> PrefetchntaEmitter<Mem> for Assembler<'a> {
609    fn prefetchnta(&mut self, op0: Mem) {
610        self.emit(PREFETCHNTAM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
611    }
612}
613
614/// `PREFETCHT0`.
615///
616/// Supported operand variants:
617///
618/// ```text
619/// +---+----------+
620/// | # | Operands |
621/// +---+----------+
622/// | 1 | Mem      |
623/// +---+----------+
624/// ```
625pub trait Prefetcht0Emitter<A> {
626    fn prefetcht0(&mut self, op0: A);
627}
628
629impl<'a> Prefetcht0Emitter<Mem> for Assembler<'a> {
630    fn prefetcht0(&mut self, op0: Mem) {
631        self.emit(PREFETCHT0M, op0.as_operand(), &NOREG, &NOREG, &NOREG);
632    }
633}
634
635/// `PREFETCHT1`.
636///
637/// Supported operand variants:
638///
639/// ```text
640/// +---+----------+
641/// | # | Operands |
642/// +---+----------+
643/// | 1 | Mem      |
644/// +---+----------+
645/// ```
646pub trait Prefetcht1Emitter<A> {
647    fn prefetcht1(&mut self, op0: A);
648}
649
650impl<'a> Prefetcht1Emitter<Mem> for Assembler<'a> {
651    fn prefetcht1(&mut self, op0: Mem) {
652        self.emit(PREFETCHT1M, op0.as_operand(), &NOREG, &NOREG, &NOREG);
653    }
654}
655
656/// `PREFETCHT2`.
657///
658/// Supported operand variants:
659///
660/// ```text
661/// +---+----------+
662/// | # | Operands |
663/// +---+----------+
664/// | 1 | Mem      |
665/// +---+----------+
666/// ```
667pub trait Prefetcht2Emitter<A> {
668    fn prefetcht2(&mut self, op0: A);
669}
670
671impl<'a> Prefetcht2Emitter<Mem> for Assembler<'a> {
672    fn prefetcht2(&mut self, op0: Mem) {
673        self.emit(PREFETCHT2M, op0.as_operand(), &NOREG, &NOREG, &NOREG);
674    }
675}
676
677/// `SFENCE`.
678///
679/// Supported operand variants:
680///
681/// ```text
682/// +---+----------+
683/// | # | Operands |
684/// +---+----------+
685/// | 1 | (none)   |
686/// +---+----------+
687/// ```
688pub trait SfenceEmitter {
689    fn sfence(&mut self);
690}
691
692impl<'a> SfenceEmitter for Assembler<'a> {
693    fn sfence(&mut self) {
694        self.emit(SFENCE, &NOREG, &NOREG, &NOREG, &NOREG);
695    }
696}
697
698/// `SSE_ADDPS`.
699///
700/// Supported operand variants:
701///
702/// ```text
703/// +---+----------+
704/// | # | Operands |
705/// +---+----------+
706/// | 1 | Xmm, Mem |
707/// | 2 | Xmm, Xmm |
708/// +---+----------+
709/// ```
710pub trait SseAddpsEmitter<A, B> {
711    fn sse_addps(&mut self, op0: A, op1: B);
712}
713
714impl<'a> SseAddpsEmitter<Xmm, Xmm> for Assembler<'a> {
715    fn sse_addps(&mut self, op0: Xmm, op1: Xmm) {
716        self.emit(
717            SSE_ADDPSRR,
718            op0.as_operand(),
719            op1.as_operand(),
720            &NOREG,
721            &NOREG,
722        );
723    }
724}
725
726impl<'a> SseAddpsEmitter<Xmm, Mem> for Assembler<'a> {
727    fn sse_addps(&mut self, op0: Xmm, op1: Mem) {
728        self.emit(
729            SSE_ADDPSRM,
730            op0.as_operand(),
731            op1.as_operand(),
732            &NOREG,
733            &NOREG,
734        );
735    }
736}
737
738/// `SSE_ADDSS`.
739///
740/// Supported operand variants:
741///
742/// ```text
743/// +---+----------+
744/// | # | Operands |
745/// +---+----------+
746/// | 1 | Xmm, Mem |
747/// | 2 | Xmm, Xmm |
748/// +---+----------+
749/// ```
750pub trait SseAddssEmitter<A, B> {
751    fn sse_addss(&mut self, op0: A, op1: B);
752}
753
754impl<'a> SseAddssEmitter<Xmm, Xmm> for Assembler<'a> {
755    fn sse_addss(&mut self, op0: Xmm, op1: Xmm) {
756        self.emit(
757            SSE_ADDSSRR,
758            op0.as_operand(),
759            op1.as_operand(),
760            &NOREG,
761            &NOREG,
762        );
763    }
764}
765
766impl<'a> SseAddssEmitter<Xmm, Mem> for Assembler<'a> {
767    fn sse_addss(&mut self, op0: Xmm, op1: Mem) {
768        self.emit(
769            SSE_ADDSSRM,
770            op0.as_operand(),
771            op1.as_operand(),
772            &NOREG,
773            &NOREG,
774        );
775    }
776}
777
778/// `SSE_ANDNPS`.
779///
780/// Supported operand variants:
781///
782/// ```text
783/// +---+----------+
784/// | # | Operands |
785/// +---+----------+
786/// | 1 | Xmm, Mem |
787/// | 2 | Xmm, Xmm |
788/// +---+----------+
789/// ```
790pub trait SseAndnpsEmitter<A, B> {
791    fn sse_andnps(&mut self, op0: A, op1: B);
792}
793
794impl<'a> SseAndnpsEmitter<Xmm, Xmm> for Assembler<'a> {
795    fn sse_andnps(&mut self, op0: Xmm, op1: Xmm) {
796        self.emit(
797            SSE_ANDNPSRR,
798            op0.as_operand(),
799            op1.as_operand(),
800            &NOREG,
801            &NOREG,
802        );
803    }
804}
805
806impl<'a> SseAndnpsEmitter<Xmm, Mem> for Assembler<'a> {
807    fn sse_andnps(&mut self, op0: Xmm, op1: Mem) {
808        self.emit(
809            SSE_ANDNPSRM,
810            op0.as_operand(),
811            op1.as_operand(),
812            &NOREG,
813            &NOREG,
814        );
815    }
816}
817
818/// `SSE_ANDPS`.
819///
820/// Supported operand variants:
821///
822/// ```text
823/// +---+----------+
824/// | # | Operands |
825/// +---+----------+
826/// | 1 | Xmm, Mem |
827/// | 2 | Xmm, Xmm |
828/// +---+----------+
829/// ```
830pub trait SseAndpsEmitter<A, B> {
831    fn sse_andps(&mut self, op0: A, op1: B);
832}
833
834impl<'a> SseAndpsEmitter<Xmm, Xmm> for Assembler<'a> {
835    fn sse_andps(&mut self, op0: Xmm, op1: Xmm) {
836        self.emit(
837            SSE_ANDPSRR,
838            op0.as_operand(),
839            op1.as_operand(),
840            &NOREG,
841            &NOREG,
842        );
843    }
844}
845
846impl<'a> SseAndpsEmitter<Xmm, Mem> for Assembler<'a> {
847    fn sse_andps(&mut self, op0: Xmm, op1: Mem) {
848        self.emit(
849            SSE_ANDPSRM,
850            op0.as_operand(),
851            op1.as_operand(),
852            &NOREG,
853            &NOREG,
854        );
855    }
856}
857
858/// `SSE_CMPPS`.
859///
860/// Supported operand variants:
861///
862/// ```text
863/// +---+---------------+
864/// | # | Operands      |
865/// +---+---------------+
866/// | 1 | Xmm, Mem, Imm |
867/// | 2 | Xmm, Xmm, Imm |
868/// +---+---------------+
869/// ```
870pub trait SseCmppsEmitter<A, B, C> {
871    fn sse_cmpps(&mut self, op0: A, op1: B, op2: C);
872}
873
874impl<'a> SseCmppsEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
875    fn sse_cmpps(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
876        self.emit(
877            SSE_CMPPSRRI,
878            op0.as_operand(),
879            op1.as_operand(),
880            op2.as_operand(),
881            &NOREG,
882        );
883    }
884}
885
886impl<'a> SseCmppsEmitter<Xmm, Mem, Imm> for Assembler<'a> {
887    fn sse_cmpps(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
888        self.emit(
889            SSE_CMPPSRMI,
890            op0.as_operand(),
891            op1.as_operand(),
892            op2.as_operand(),
893            &NOREG,
894        );
895    }
896}
897
898/// `SSE_CMPSS`.
899///
900/// Supported operand variants:
901///
902/// ```text
903/// +---+---------------+
904/// | # | Operands      |
905/// +---+---------------+
906/// | 1 | Xmm, Mem, Imm |
907/// | 2 | Xmm, Xmm, Imm |
908/// +---+---------------+
909/// ```
910pub trait SseCmpssEmitter<A, B, C> {
911    fn sse_cmpss(&mut self, op0: A, op1: B, op2: C);
912}
913
914impl<'a> SseCmpssEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
915    fn sse_cmpss(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
916        self.emit(
917            SSE_CMPSSRRI,
918            op0.as_operand(),
919            op1.as_operand(),
920            op2.as_operand(),
921            &NOREG,
922        );
923    }
924}
925
926impl<'a> SseCmpssEmitter<Xmm, Mem, Imm> for Assembler<'a> {
927    fn sse_cmpss(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
928        self.emit(
929            SSE_CMPSSRMI,
930            op0.as_operand(),
931            op1.as_operand(),
932            op2.as_operand(),
933            &NOREG,
934        );
935    }
936}
937
938/// `SSE_COMISS`.
939///
940/// Supported operand variants:
941///
942/// ```text
943/// +---+----------+
944/// | # | Operands |
945/// +---+----------+
946/// | 1 | Xmm, Mem |
947/// | 2 | Xmm, Xmm |
948/// +---+----------+
949/// ```
950pub trait SseComissEmitter<A, B> {
951    fn sse_comiss(&mut self, op0: A, op1: B);
952}
953
954impl<'a> SseComissEmitter<Xmm, Xmm> for Assembler<'a> {
955    fn sse_comiss(&mut self, op0: Xmm, op1: Xmm) {
956        self.emit(
957            SSE_COMISSRR,
958            op0.as_operand(),
959            op1.as_operand(),
960            &NOREG,
961            &NOREG,
962        );
963    }
964}
965
966impl<'a> SseComissEmitter<Xmm, Mem> for Assembler<'a> {
967    fn sse_comiss(&mut self, op0: Xmm, op1: Mem) {
968        self.emit(
969            SSE_COMISSRM,
970            op0.as_operand(),
971            op1.as_operand(),
972            &NOREG,
973            &NOREG,
974        );
975    }
976}
977
978/// `SSE_CVTSI2SS`.
979///
980/// Supported operand variants:
981///
982/// ```text
983/// +---+----------+
984/// | # | Operands |
985/// +---+----------+
986/// | 1 | Xmm, Gpd |
987/// | 2 | Xmm, Gpq |
988/// | 3 | Xmm, Mem |
989/// +---+----------+
990/// ```
991pub trait SseCvtsi2ssEmitter<A, B> {
992    fn sse_cvtsi2ss(&mut self, op0: A, op1: B);
993}
994
995impl<'a> SseCvtsi2ssEmitter<Xmm, Gpd> for Assembler<'a> {
996    fn sse_cvtsi2ss(&mut self, op0: Xmm, op1: Gpd) {
997        self.emit(
998            SSE_CVTSI2SS32RR,
999            op0.as_operand(),
1000            op1.as_operand(),
1001            &NOREG,
1002            &NOREG,
1003        );
1004    }
1005}
1006
1007impl<'a> SseCvtsi2ssEmitter<Xmm, Mem> for Assembler<'a> {
1008    fn sse_cvtsi2ss(&mut self, op0: Xmm, op1: Mem) {
1009        self.emit(
1010            SSE_CVTSI2SS32RM,
1011            op0.as_operand(),
1012            op1.as_operand(),
1013            &NOREG,
1014            &NOREG,
1015        );
1016    }
1017}
1018
1019impl<'a> SseCvtsi2ssEmitter<Xmm, Gpq> for Assembler<'a> {
1020    fn sse_cvtsi2ss(&mut self, op0: Xmm, op1: Gpq) {
1021        self.emit(
1022            SSE_CVTSI2SS64RR,
1023            op0.as_operand(),
1024            op1.as_operand(),
1025            &NOREG,
1026            &NOREG,
1027        );
1028    }
1029}
1030
1031/// `SSE_CVTSS2SI`.
1032///
1033/// Supported operand variants:
1034///
1035/// ```text
1036/// +---+----------+
1037/// | # | Operands |
1038/// +---+----------+
1039/// | 1 | Gpd, Mem |
1040/// | 2 | Gpd, Xmm |
1041/// | 3 | Gpq, Mem |
1042/// | 4 | Gpq, Xmm |
1043/// +---+----------+
1044/// ```
1045pub trait SseCvtss2siEmitter<A, B> {
1046    fn sse_cvtss2si(&mut self, op0: A, op1: B);
1047}
1048
1049impl<'a> SseCvtss2siEmitter<Gpd, Xmm> for Assembler<'a> {
1050    fn sse_cvtss2si(&mut self, op0: Gpd, op1: Xmm) {
1051        self.emit(
1052            SSE_CVTSS2SI32RR,
1053            op0.as_operand(),
1054            op1.as_operand(),
1055            &NOREG,
1056            &NOREG,
1057        );
1058    }
1059}
1060
1061impl<'a> SseCvtss2siEmitter<Gpd, Mem> for Assembler<'a> {
1062    fn sse_cvtss2si(&mut self, op0: Gpd, op1: Mem) {
1063        self.emit(
1064            SSE_CVTSS2SI32RM,
1065            op0.as_operand(),
1066            op1.as_operand(),
1067            &NOREG,
1068            &NOREG,
1069        );
1070    }
1071}
1072
1073impl<'a> SseCvtss2siEmitter<Gpq, Xmm> for Assembler<'a> {
1074    fn sse_cvtss2si(&mut self, op0: Gpq, op1: Xmm) {
1075        self.emit(
1076            SSE_CVTSS2SI64RR,
1077            op0.as_operand(),
1078            op1.as_operand(),
1079            &NOREG,
1080            &NOREG,
1081        );
1082    }
1083}
1084
1085impl<'a> SseCvtss2siEmitter<Gpq, Mem> for Assembler<'a> {
1086    fn sse_cvtss2si(&mut self, op0: Gpq, op1: Mem) {
1087        self.emit(
1088            SSE_CVTSS2SI64RM,
1089            op0.as_operand(),
1090            op1.as_operand(),
1091            &NOREG,
1092            &NOREG,
1093        );
1094    }
1095}
1096
1097/// `SSE_CVTTSS2SI`.
1098///
1099/// Supported operand variants:
1100///
1101/// ```text
1102/// +---+----------+
1103/// | # | Operands |
1104/// +---+----------+
1105/// | 1 | Gpd, Mem |
1106/// | 2 | Gpd, Xmm |
1107/// | 3 | Gpq, Mem |
1108/// | 4 | Gpq, Xmm |
1109/// +---+----------+
1110/// ```
1111pub trait SseCvttss2siEmitter<A, B> {
1112    fn sse_cvttss2si(&mut self, op0: A, op1: B);
1113}
1114
1115impl<'a> SseCvttss2siEmitter<Gpd, Xmm> for Assembler<'a> {
1116    fn sse_cvttss2si(&mut self, op0: Gpd, op1: Xmm) {
1117        self.emit(
1118            SSE_CVTTSS2SI32RR,
1119            op0.as_operand(),
1120            op1.as_operand(),
1121            &NOREG,
1122            &NOREG,
1123        );
1124    }
1125}
1126
1127impl<'a> SseCvttss2siEmitter<Gpd, Mem> for Assembler<'a> {
1128    fn sse_cvttss2si(&mut self, op0: Gpd, op1: Mem) {
1129        self.emit(
1130            SSE_CVTTSS2SI32RM,
1131            op0.as_operand(),
1132            op1.as_operand(),
1133            &NOREG,
1134            &NOREG,
1135        );
1136    }
1137}
1138
1139impl<'a> SseCvttss2siEmitter<Gpq, Xmm> for Assembler<'a> {
1140    fn sse_cvttss2si(&mut self, op0: Gpq, op1: Xmm) {
1141        self.emit(
1142            SSE_CVTTSS2SI64RR,
1143            op0.as_operand(),
1144            op1.as_operand(),
1145            &NOREG,
1146            &NOREG,
1147        );
1148    }
1149}
1150
1151impl<'a> SseCvttss2siEmitter<Gpq, Mem> for Assembler<'a> {
1152    fn sse_cvttss2si(&mut self, op0: Gpq, op1: Mem) {
1153        self.emit(
1154            SSE_CVTTSS2SI64RM,
1155            op0.as_operand(),
1156            op1.as_operand(),
1157            &NOREG,
1158            &NOREG,
1159        );
1160    }
1161}
1162
1163/// `SSE_DIVPS`.
1164///
1165/// Supported operand variants:
1166///
1167/// ```text
1168/// +---+----------+
1169/// | # | Operands |
1170/// +---+----------+
1171/// | 1 | Xmm, Mem |
1172/// | 2 | Xmm, Xmm |
1173/// +---+----------+
1174/// ```
1175pub trait SseDivpsEmitter<A, B> {
1176    fn sse_divps(&mut self, op0: A, op1: B);
1177}
1178
1179impl<'a> SseDivpsEmitter<Xmm, Xmm> for Assembler<'a> {
1180    fn sse_divps(&mut self, op0: Xmm, op1: Xmm) {
1181        self.emit(
1182            SSE_DIVPSRR,
1183            op0.as_operand(),
1184            op1.as_operand(),
1185            &NOREG,
1186            &NOREG,
1187        );
1188    }
1189}
1190
1191impl<'a> SseDivpsEmitter<Xmm, Mem> for Assembler<'a> {
1192    fn sse_divps(&mut self, op0: Xmm, op1: Mem) {
1193        self.emit(
1194            SSE_DIVPSRM,
1195            op0.as_operand(),
1196            op1.as_operand(),
1197            &NOREG,
1198            &NOREG,
1199        );
1200    }
1201}
1202
1203/// `SSE_DIVSS`.
1204///
1205/// Supported operand variants:
1206///
1207/// ```text
1208/// +---+----------+
1209/// | # | Operands |
1210/// +---+----------+
1211/// | 1 | Xmm, Mem |
1212/// | 2 | Xmm, Xmm |
1213/// +---+----------+
1214/// ```
1215pub trait SseDivssEmitter<A, B> {
1216    fn sse_divss(&mut self, op0: A, op1: B);
1217}
1218
1219impl<'a> SseDivssEmitter<Xmm, Xmm> for Assembler<'a> {
1220    fn sse_divss(&mut self, op0: Xmm, op1: Xmm) {
1221        self.emit(
1222            SSE_DIVSSRR,
1223            op0.as_operand(),
1224            op1.as_operand(),
1225            &NOREG,
1226            &NOREG,
1227        );
1228    }
1229}
1230
1231impl<'a> SseDivssEmitter<Xmm, Mem> for Assembler<'a> {
1232    fn sse_divss(&mut self, op0: Xmm, op1: Mem) {
1233        self.emit(
1234            SSE_DIVSSRM,
1235            op0.as_operand(),
1236            op1.as_operand(),
1237            &NOREG,
1238            &NOREG,
1239        );
1240    }
1241}
1242
1243/// `SSE_MAXPS`.
1244///
1245/// Supported operand variants:
1246///
1247/// ```text
1248/// +---+----------+
1249/// | # | Operands |
1250/// +---+----------+
1251/// | 1 | Xmm, Mem |
1252/// | 2 | Xmm, Xmm |
1253/// +---+----------+
1254/// ```
1255pub trait SseMaxpsEmitter<A, B> {
1256    fn sse_maxps(&mut self, op0: A, op1: B);
1257}
1258
1259impl<'a> SseMaxpsEmitter<Xmm, Xmm> for Assembler<'a> {
1260    fn sse_maxps(&mut self, op0: Xmm, op1: Xmm) {
1261        self.emit(
1262            SSE_MAXPSRR,
1263            op0.as_operand(),
1264            op1.as_operand(),
1265            &NOREG,
1266            &NOREG,
1267        );
1268    }
1269}
1270
1271impl<'a> SseMaxpsEmitter<Xmm, Mem> for Assembler<'a> {
1272    fn sse_maxps(&mut self, op0: Xmm, op1: Mem) {
1273        self.emit(
1274            SSE_MAXPSRM,
1275            op0.as_operand(),
1276            op1.as_operand(),
1277            &NOREG,
1278            &NOREG,
1279        );
1280    }
1281}
1282
1283/// `SSE_MAXSS`.
1284///
1285/// Supported operand variants:
1286///
1287/// ```text
1288/// +---+----------+
1289/// | # | Operands |
1290/// +---+----------+
1291/// | 1 | Xmm, Mem |
1292/// | 2 | Xmm, Xmm |
1293/// +---+----------+
1294/// ```
1295pub trait SseMaxssEmitter<A, B> {
1296    fn sse_maxss(&mut self, op0: A, op1: B);
1297}
1298
1299impl<'a> SseMaxssEmitter<Xmm, Xmm> for Assembler<'a> {
1300    fn sse_maxss(&mut self, op0: Xmm, op1: Xmm) {
1301        self.emit(
1302            SSE_MAXSSRR,
1303            op0.as_operand(),
1304            op1.as_operand(),
1305            &NOREG,
1306            &NOREG,
1307        );
1308    }
1309}
1310
1311impl<'a> SseMaxssEmitter<Xmm, Mem> for Assembler<'a> {
1312    fn sse_maxss(&mut self, op0: Xmm, op1: Mem) {
1313        self.emit(
1314            SSE_MAXSSRM,
1315            op0.as_operand(),
1316            op1.as_operand(),
1317            &NOREG,
1318            &NOREG,
1319        );
1320    }
1321}
1322
1323/// `SSE_MINPS`.
1324///
1325/// Supported operand variants:
1326///
1327/// ```text
1328/// +---+----------+
1329/// | # | Operands |
1330/// +---+----------+
1331/// | 1 | Xmm, Mem |
1332/// | 2 | Xmm, Xmm |
1333/// +---+----------+
1334/// ```
1335pub trait SseMinpsEmitter<A, B> {
1336    fn sse_minps(&mut self, op0: A, op1: B);
1337}
1338
1339impl<'a> SseMinpsEmitter<Xmm, Xmm> for Assembler<'a> {
1340    fn sse_minps(&mut self, op0: Xmm, op1: Xmm) {
1341        self.emit(
1342            SSE_MINPSRR,
1343            op0.as_operand(),
1344            op1.as_operand(),
1345            &NOREG,
1346            &NOREG,
1347        );
1348    }
1349}
1350
1351impl<'a> SseMinpsEmitter<Xmm, Mem> for Assembler<'a> {
1352    fn sse_minps(&mut self, op0: Xmm, op1: Mem) {
1353        self.emit(
1354            SSE_MINPSRM,
1355            op0.as_operand(),
1356            op1.as_operand(),
1357            &NOREG,
1358            &NOREG,
1359        );
1360    }
1361}
1362
1363/// `SSE_MINSS`.
1364///
1365/// Supported operand variants:
1366///
1367/// ```text
1368/// +---+----------+
1369/// | # | Operands |
1370/// +---+----------+
1371/// | 1 | Xmm, Mem |
1372/// | 2 | Xmm, Xmm |
1373/// +---+----------+
1374/// ```
1375pub trait SseMinssEmitter<A, B> {
1376    fn sse_minss(&mut self, op0: A, op1: B);
1377}
1378
1379impl<'a> SseMinssEmitter<Xmm, Xmm> for Assembler<'a> {
1380    fn sse_minss(&mut self, op0: Xmm, op1: Xmm) {
1381        self.emit(
1382            SSE_MINSSRR,
1383            op0.as_operand(),
1384            op1.as_operand(),
1385            &NOREG,
1386            &NOREG,
1387        );
1388    }
1389}
1390
1391impl<'a> SseMinssEmitter<Xmm, Mem> for Assembler<'a> {
1392    fn sse_minss(&mut self, op0: Xmm, op1: Mem) {
1393        self.emit(
1394            SSE_MINSSRM,
1395            op0.as_operand(),
1396            op1.as_operand(),
1397            &NOREG,
1398            &NOREG,
1399        );
1400    }
1401}
1402
1403/// `SSE_MOVAPS`.
1404///
1405/// Supported operand variants:
1406///
1407/// ```text
1408/// +---+----------+
1409/// | # | Operands |
1410/// +---+----------+
1411/// | 1 | Mem, Xmm |
1412/// | 2 | Xmm, Mem |
1413/// | 3 | Xmm, Xmm |
1414/// +---+----------+
1415/// ```
1416pub trait SseMovapsEmitter<A, B> {
1417    fn sse_movaps(&mut self, op0: A, op1: B);
1418}
1419
1420impl<'a> SseMovapsEmitter<Xmm, Xmm> for Assembler<'a> {
1421    fn sse_movaps(&mut self, op0: Xmm, op1: Xmm) {
1422        self.emit(
1423            SSE_MOVAPSRR,
1424            op0.as_operand(),
1425            op1.as_operand(),
1426            &NOREG,
1427            &NOREG,
1428        );
1429    }
1430}
1431
1432impl<'a> SseMovapsEmitter<Xmm, Mem> for Assembler<'a> {
1433    fn sse_movaps(&mut self, op0: Xmm, op1: Mem) {
1434        self.emit(
1435            SSE_MOVAPSRM,
1436            op0.as_operand(),
1437            op1.as_operand(),
1438            &NOREG,
1439            &NOREG,
1440        );
1441    }
1442}
1443
1444impl<'a> SseMovapsEmitter<Mem, Xmm> for Assembler<'a> {
1445    fn sse_movaps(&mut self, op0: Mem, op1: Xmm) {
1446        self.emit(
1447            SSE_MOVAPSMR,
1448            op0.as_operand(),
1449            op1.as_operand(),
1450            &NOREG,
1451            &NOREG,
1452        );
1453    }
1454}
1455
1456/// `SSE_MOVHLPS`.
1457///
1458/// Supported operand variants:
1459///
1460/// ```text
1461/// +---+----------+
1462/// | # | Operands |
1463/// +---+----------+
1464/// | 1 | Xmm, Xmm |
1465/// +---+----------+
1466/// ```
1467pub trait SseMovhlpsEmitter<A, B> {
1468    fn sse_movhlps(&mut self, op0: A, op1: B);
1469}
1470
1471impl<'a> SseMovhlpsEmitter<Xmm, Xmm> for Assembler<'a> {
1472    fn sse_movhlps(&mut self, op0: Xmm, op1: Xmm) {
1473        self.emit(
1474            SSE_MOVHLPSRR,
1475            op0.as_operand(),
1476            op1.as_operand(),
1477            &NOREG,
1478            &NOREG,
1479        );
1480    }
1481}
1482
1483/// `SSE_MOVHPS`.
1484///
1485/// Supported operand variants:
1486///
1487/// ```text
1488/// +---+----------+
1489/// | # | Operands |
1490/// +---+----------+
1491/// | 1 | Mem, Xmm |
1492/// | 2 | Xmm, Mem |
1493/// +---+----------+
1494/// ```
1495pub trait SseMovhpsEmitter<A, B> {
1496    fn sse_movhps(&mut self, op0: A, op1: B);
1497}
1498
1499impl<'a> SseMovhpsEmitter<Xmm, Mem> for Assembler<'a> {
1500    fn sse_movhps(&mut self, op0: Xmm, op1: Mem) {
1501        self.emit(
1502            SSE_MOVHPSRM,
1503            op0.as_operand(),
1504            op1.as_operand(),
1505            &NOREG,
1506            &NOREG,
1507        );
1508    }
1509}
1510
1511impl<'a> SseMovhpsEmitter<Mem, Xmm> for Assembler<'a> {
1512    fn sse_movhps(&mut self, op0: Mem, op1: Xmm) {
1513        self.emit(
1514            SSE_MOVHPSMR,
1515            op0.as_operand(),
1516            op1.as_operand(),
1517            &NOREG,
1518            &NOREG,
1519        );
1520    }
1521}
1522
1523/// `SSE_MOVLHPS`.
1524///
1525/// Supported operand variants:
1526///
1527/// ```text
1528/// +---+----------+
1529/// | # | Operands |
1530/// +---+----------+
1531/// | 1 | Xmm, Xmm |
1532/// +---+----------+
1533/// ```
1534pub trait SseMovlhpsEmitter<A, B> {
1535    fn sse_movlhps(&mut self, op0: A, op1: B);
1536}
1537
1538impl<'a> SseMovlhpsEmitter<Xmm, Xmm> for Assembler<'a> {
1539    fn sse_movlhps(&mut self, op0: Xmm, op1: Xmm) {
1540        self.emit(
1541            SSE_MOVLHPSRR,
1542            op0.as_operand(),
1543            op1.as_operand(),
1544            &NOREG,
1545            &NOREG,
1546        );
1547    }
1548}
1549
1550/// `SSE_MOVLPS`.
1551///
1552/// Supported operand variants:
1553///
1554/// ```text
1555/// +---+----------+
1556/// | # | Operands |
1557/// +---+----------+
1558/// | 1 | Mem, Xmm |
1559/// | 2 | Xmm, Mem |
1560/// +---+----------+
1561/// ```
1562pub trait SseMovlpsEmitter<A, B> {
1563    fn sse_movlps(&mut self, op0: A, op1: B);
1564}
1565
1566impl<'a> SseMovlpsEmitter<Xmm, Mem> for Assembler<'a> {
1567    fn sse_movlps(&mut self, op0: Xmm, op1: Mem) {
1568        self.emit(
1569            SSE_MOVLPSRM,
1570            op0.as_operand(),
1571            op1.as_operand(),
1572            &NOREG,
1573            &NOREG,
1574        );
1575    }
1576}
1577
1578impl<'a> SseMovlpsEmitter<Mem, Xmm> for Assembler<'a> {
1579    fn sse_movlps(&mut self, op0: Mem, op1: Xmm) {
1580        self.emit(
1581            SSE_MOVLPSMR,
1582            op0.as_operand(),
1583            op1.as_operand(),
1584            &NOREG,
1585            &NOREG,
1586        );
1587    }
1588}
1589
1590/// `SSE_MOVMSKPS`.
1591///
1592/// Supported operand variants:
1593///
1594/// ```text
1595/// +---+----------+
1596/// | # | Operands |
1597/// +---+----------+
1598/// | 1 | Gpq, Xmm |
1599/// +---+----------+
1600/// ```
1601pub trait SseMovmskpsEmitter<A, B> {
1602    fn sse_movmskps(&mut self, op0: A, op1: B);
1603}
1604
1605impl<'a> SseMovmskpsEmitter<Gpq, Xmm> for Assembler<'a> {
1606    fn sse_movmskps(&mut self, op0: Gpq, op1: Xmm) {
1607        self.emit(
1608            SSE_MOVMSKPSRR,
1609            op0.as_operand(),
1610            op1.as_operand(),
1611            &NOREG,
1612            &NOREG,
1613        );
1614    }
1615}
1616
1617/// `SSE_MOVNTPS`.
1618///
1619/// Supported operand variants:
1620///
1621/// ```text
1622/// +---+----------+
1623/// | # | Operands |
1624/// +---+----------+
1625/// | 1 | Mem, Xmm |
1626/// +---+----------+
1627/// ```
1628pub trait SseMovntpsEmitter<A, B> {
1629    fn sse_movntps(&mut self, op0: A, op1: B);
1630}
1631
1632impl<'a> SseMovntpsEmitter<Mem, Xmm> for Assembler<'a> {
1633    fn sse_movntps(&mut self, op0: Mem, op1: Xmm) {
1634        self.emit(
1635            SSE_MOVNTPSMR,
1636            op0.as_operand(),
1637            op1.as_operand(),
1638            &NOREG,
1639            &NOREG,
1640        );
1641    }
1642}
1643
1644/// `SSE_MOVNTSS`.
1645///
1646/// Supported operand variants:
1647///
1648/// ```text
1649/// +---+----------+
1650/// | # | Operands |
1651/// +---+----------+
1652/// | 1 | Mem, Xmm |
1653/// +---+----------+
1654/// ```
1655pub trait SseMovntssEmitter<A, B> {
1656    fn sse_movntss(&mut self, op0: A, op1: B);
1657}
1658
1659impl<'a> SseMovntssEmitter<Mem, Xmm> for Assembler<'a> {
1660    fn sse_movntss(&mut self, op0: Mem, op1: Xmm) {
1661        self.emit(
1662            SSE_MOVNTSSMR,
1663            op0.as_operand(),
1664            op1.as_operand(),
1665            &NOREG,
1666            &NOREG,
1667        );
1668    }
1669}
1670
1671/// `SSE_MOVSS`.
1672///
1673/// Supported operand variants:
1674///
1675/// ```text
1676/// +---+----------+
1677/// | # | Operands |
1678/// +---+----------+
1679/// | 1 | Mem, Xmm |
1680/// | 2 | Xmm, Mem |
1681/// | 3 | Xmm, Xmm |
1682/// +---+----------+
1683/// ```
1684pub trait SseMovssEmitter<A, B> {
1685    fn sse_movss(&mut self, op0: A, op1: B);
1686}
1687
1688impl<'a> SseMovssEmitter<Xmm, Xmm> for Assembler<'a> {
1689    fn sse_movss(&mut self, op0: Xmm, op1: Xmm) {
1690        self.emit(
1691            SSE_MOVSSRR,
1692            op0.as_operand(),
1693            op1.as_operand(),
1694            &NOREG,
1695            &NOREG,
1696        );
1697    }
1698}
1699
1700impl<'a> SseMovssEmitter<Xmm, Mem> for Assembler<'a> {
1701    fn sse_movss(&mut self, op0: Xmm, op1: Mem) {
1702        self.emit(
1703            SSE_MOVSSRM,
1704            op0.as_operand(),
1705            op1.as_operand(),
1706            &NOREG,
1707            &NOREG,
1708        );
1709    }
1710}
1711
1712impl<'a> SseMovssEmitter<Mem, Xmm> for Assembler<'a> {
1713    fn sse_movss(&mut self, op0: Mem, op1: Xmm) {
1714        self.emit(
1715            SSE_MOVSSMR,
1716            op0.as_operand(),
1717            op1.as_operand(),
1718            &NOREG,
1719            &NOREG,
1720        );
1721    }
1722}
1723
1724/// `SSE_MOVUPS`.
1725///
1726/// Supported operand variants:
1727///
1728/// ```text
1729/// +---+----------+
1730/// | # | Operands |
1731/// +---+----------+
1732/// | 1 | Mem, Xmm |
1733/// | 2 | Xmm, Mem |
1734/// | 3 | Xmm, Xmm |
1735/// +---+----------+
1736/// ```
1737pub trait SseMovupsEmitter<A, B> {
1738    fn sse_movups(&mut self, op0: A, op1: B);
1739}
1740
1741impl<'a> SseMovupsEmitter<Xmm, Xmm> for Assembler<'a> {
1742    fn sse_movups(&mut self, op0: Xmm, op1: Xmm) {
1743        self.emit(
1744            SSE_MOVUPSRR,
1745            op0.as_operand(),
1746            op1.as_operand(),
1747            &NOREG,
1748            &NOREG,
1749        );
1750    }
1751}
1752
1753impl<'a> SseMovupsEmitter<Xmm, Mem> for Assembler<'a> {
1754    fn sse_movups(&mut self, op0: Xmm, op1: Mem) {
1755        self.emit(
1756            SSE_MOVUPSRM,
1757            op0.as_operand(),
1758            op1.as_operand(),
1759            &NOREG,
1760            &NOREG,
1761        );
1762    }
1763}
1764
1765impl<'a> SseMovupsEmitter<Mem, Xmm> for Assembler<'a> {
1766    fn sse_movups(&mut self, op0: Mem, op1: Xmm) {
1767        self.emit(
1768            SSE_MOVUPSMR,
1769            op0.as_operand(),
1770            op1.as_operand(),
1771            &NOREG,
1772            &NOREG,
1773        );
1774    }
1775}
1776
1777/// `SSE_MULPS`.
1778///
1779/// Supported operand variants:
1780///
1781/// ```text
1782/// +---+----------+
1783/// | # | Operands |
1784/// +---+----------+
1785/// | 1 | Xmm, Mem |
1786/// | 2 | Xmm, Xmm |
1787/// +---+----------+
1788/// ```
1789pub trait SseMulpsEmitter<A, B> {
1790    fn sse_mulps(&mut self, op0: A, op1: B);
1791}
1792
1793impl<'a> SseMulpsEmitter<Xmm, Xmm> for Assembler<'a> {
1794    fn sse_mulps(&mut self, op0: Xmm, op1: Xmm) {
1795        self.emit(
1796            SSE_MULPSRR,
1797            op0.as_operand(),
1798            op1.as_operand(),
1799            &NOREG,
1800            &NOREG,
1801        );
1802    }
1803}
1804
1805impl<'a> SseMulpsEmitter<Xmm, Mem> for Assembler<'a> {
1806    fn sse_mulps(&mut self, op0: Xmm, op1: Mem) {
1807        self.emit(
1808            SSE_MULPSRM,
1809            op0.as_operand(),
1810            op1.as_operand(),
1811            &NOREG,
1812            &NOREG,
1813        );
1814    }
1815}
1816
1817/// `SSE_MULSS`.
1818///
1819/// Supported operand variants:
1820///
1821/// ```text
1822/// +---+----------+
1823/// | # | Operands |
1824/// +---+----------+
1825/// | 1 | Xmm, Mem |
1826/// | 2 | Xmm, Xmm |
1827/// +---+----------+
1828/// ```
1829pub trait SseMulssEmitter<A, B> {
1830    fn sse_mulss(&mut self, op0: A, op1: B);
1831}
1832
1833impl<'a> SseMulssEmitter<Xmm, Xmm> for Assembler<'a> {
1834    fn sse_mulss(&mut self, op0: Xmm, op1: Xmm) {
1835        self.emit(
1836            SSE_MULSSRR,
1837            op0.as_operand(),
1838            op1.as_operand(),
1839            &NOREG,
1840            &NOREG,
1841        );
1842    }
1843}
1844
1845impl<'a> SseMulssEmitter<Xmm, Mem> for Assembler<'a> {
1846    fn sse_mulss(&mut self, op0: Xmm, op1: Mem) {
1847        self.emit(
1848            SSE_MULSSRM,
1849            op0.as_operand(),
1850            op1.as_operand(),
1851            &NOREG,
1852            &NOREG,
1853        );
1854    }
1855}
1856
1857/// `SSE_ORPS`.
1858///
1859/// Supported operand variants:
1860///
1861/// ```text
1862/// +---+----------+
1863/// | # | Operands |
1864/// +---+----------+
1865/// | 1 | Xmm, Mem |
1866/// | 2 | Xmm, Xmm |
1867/// +---+----------+
1868/// ```
1869pub trait SseOrpsEmitter<A, B> {
1870    fn sse_orps(&mut self, op0: A, op1: B);
1871}
1872
1873impl<'a> SseOrpsEmitter<Xmm, Xmm> for Assembler<'a> {
1874    fn sse_orps(&mut self, op0: Xmm, op1: Xmm) {
1875        self.emit(
1876            SSE_ORPSRR,
1877            op0.as_operand(),
1878            op1.as_operand(),
1879            &NOREG,
1880            &NOREG,
1881        );
1882    }
1883}
1884
1885impl<'a> SseOrpsEmitter<Xmm, Mem> for Assembler<'a> {
1886    fn sse_orps(&mut self, op0: Xmm, op1: Mem) {
1887        self.emit(
1888            SSE_ORPSRM,
1889            op0.as_operand(),
1890            op1.as_operand(),
1891            &NOREG,
1892            &NOREG,
1893        );
1894    }
1895}
1896
1897/// `SSE_RCPPS`.
1898///
1899/// Supported operand variants:
1900///
1901/// ```text
1902/// +---+----------+
1903/// | # | Operands |
1904/// +---+----------+
1905/// | 1 | Xmm, Mem |
1906/// | 2 | Xmm, Xmm |
1907/// +---+----------+
1908/// ```
1909pub trait SseRcppsEmitter<A, B> {
1910    fn sse_rcpps(&mut self, op0: A, op1: B);
1911}
1912
1913impl<'a> SseRcppsEmitter<Xmm, Xmm> for Assembler<'a> {
1914    fn sse_rcpps(&mut self, op0: Xmm, op1: Xmm) {
1915        self.emit(
1916            SSE_RCPPSRR,
1917            op0.as_operand(),
1918            op1.as_operand(),
1919            &NOREG,
1920            &NOREG,
1921        );
1922    }
1923}
1924
1925impl<'a> SseRcppsEmitter<Xmm, Mem> for Assembler<'a> {
1926    fn sse_rcpps(&mut self, op0: Xmm, op1: Mem) {
1927        self.emit(
1928            SSE_RCPPSRM,
1929            op0.as_operand(),
1930            op1.as_operand(),
1931            &NOREG,
1932            &NOREG,
1933        );
1934    }
1935}
1936
1937/// `SSE_RCPSS`.
1938///
1939/// Supported operand variants:
1940///
1941/// ```text
1942/// +---+----------+
1943/// | # | Operands |
1944/// +---+----------+
1945/// | 1 | Xmm, Mem |
1946/// | 2 | Xmm, Xmm |
1947/// +---+----------+
1948/// ```
1949pub trait SseRcpssEmitter<A, B> {
1950    fn sse_rcpss(&mut self, op0: A, op1: B);
1951}
1952
1953impl<'a> SseRcpssEmitter<Xmm, Xmm> for Assembler<'a> {
1954    fn sse_rcpss(&mut self, op0: Xmm, op1: Xmm) {
1955        self.emit(
1956            SSE_RCPSSRR,
1957            op0.as_operand(),
1958            op1.as_operand(),
1959            &NOREG,
1960            &NOREG,
1961        );
1962    }
1963}
1964
1965impl<'a> SseRcpssEmitter<Xmm, Mem> for Assembler<'a> {
1966    fn sse_rcpss(&mut self, op0: Xmm, op1: Mem) {
1967        self.emit(
1968            SSE_RCPSSRM,
1969            op0.as_operand(),
1970            op1.as_operand(),
1971            &NOREG,
1972            &NOREG,
1973        );
1974    }
1975}
1976
1977/// `SSE_RSQRTPS`.
1978///
1979/// Supported operand variants:
1980///
1981/// ```text
1982/// +---+----------+
1983/// | # | Operands |
1984/// +---+----------+
1985/// | 1 | Xmm, Mem |
1986/// | 2 | Xmm, Xmm |
1987/// +---+----------+
1988/// ```
1989pub trait SseRsqrtpsEmitter<A, B> {
1990    fn sse_rsqrtps(&mut self, op0: A, op1: B);
1991}
1992
1993impl<'a> SseRsqrtpsEmitter<Xmm, Xmm> for Assembler<'a> {
1994    fn sse_rsqrtps(&mut self, op0: Xmm, op1: Xmm) {
1995        self.emit(
1996            SSE_RSQRTPSRR,
1997            op0.as_operand(),
1998            op1.as_operand(),
1999            &NOREG,
2000            &NOREG,
2001        );
2002    }
2003}
2004
2005impl<'a> SseRsqrtpsEmitter<Xmm, Mem> for Assembler<'a> {
2006    fn sse_rsqrtps(&mut self, op0: Xmm, op1: Mem) {
2007        self.emit(
2008            SSE_RSQRTPSRM,
2009            op0.as_operand(),
2010            op1.as_operand(),
2011            &NOREG,
2012            &NOREG,
2013        );
2014    }
2015}
2016
2017/// `SSE_RSQRTSS`.
2018///
2019/// Supported operand variants:
2020///
2021/// ```text
2022/// +---+----------+
2023/// | # | Operands |
2024/// +---+----------+
2025/// | 1 | Xmm, Mem |
2026/// | 2 | Xmm, Xmm |
2027/// +---+----------+
2028/// ```
2029pub trait SseRsqrtssEmitter<A, B> {
2030    fn sse_rsqrtss(&mut self, op0: A, op1: B);
2031}
2032
2033impl<'a> SseRsqrtssEmitter<Xmm, Xmm> for Assembler<'a> {
2034    fn sse_rsqrtss(&mut self, op0: Xmm, op1: Xmm) {
2035        self.emit(
2036            SSE_RSQRTSSRR,
2037            op0.as_operand(),
2038            op1.as_operand(),
2039            &NOREG,
2040            &NOREG,
2041        );
2042    }
2043}
2044
2045impl<'a> SseRsqrtssEmitter<Xmm, Mem> for Assembler<'a> {
2046    fn sse_rsqrtss(&mut self, op0: Xmm, op1: Mem) {
2047        self.emit(
2048            SSE_RSQRTSSRM,
2049            op0.as_operand(),
2050            op1.as_operand(),
2051            &NOREG,
2052            &NOREG,
2053        );
2054    }
2055}
2056
2057/// `SSE_SHUFPS`.
2058///
2059/// Supported operand variants:
2060///
2061/// ```text
2062/// +---+---------------+
2063/// | # | Operands      |
2064/// +---+---------------+
2065/// | 1 | Xmm, Mem, Imm |
2066/// | 2 | Xmm, Xmm, Imm |
2067/// +---+---------------+
2068/// ```
2069pub trait SseShufpsEmitter<A, B, C> {
2070    fn sse_shufps(&mut self, op0: A, op1: B, op2: C);
2071}
2072
2073impl<'a> SseShufpsEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
2074    fn sse_shufps(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
2075        self.emit(
2076            SSE_SHUFPSRRI,
2077            op0.as_operand(),
2078            op1.as_operand(),
2079            op2.as_operand(),
2080            &NOREG,
2081        );
2082    }
2083}
2084
2085impl<'a> SseShufpsEmitter<Xmm, Mem, Imm> for Assembler<'a> {
2086    fn sse_shufps(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
2087        self.emit(
2088            SSE_SHUFPSRMI,
2089            op0.as_operand(),
2090            op1.as_operand(),
2091            op2.as_operand(),
2092            &NOREG,
2093        );
2094    }
2095}
2096
2097/// `SSE_SQRTPS`.
2098///
2099/// Supported operand variants:
2100///
2101/// ```text
2102/// +---+----------+
2103/// | # | Operands |
2104/// +---+----------+
2105/// | 1 | Xmm, Mem |
2106/// | 2 | Xmm, Xmm |
2107/// +---+----------+
2108/// ```
2109pub trait SseSqrtpsEmitter<A, B> {
2110    fn sse_sqrtps(&mut self, op0: A, op1: B);
2111}
2112
2113impl<'a> SseSqrtpsEmitter<Xmm, Xmm> for Assembler<'a> {
2114    fn sse_sqrtps(&mut self, op0: Xmm, op1: Xmm) {
2115        self.emit(
2116            SSE_SQRTPSRR,
2117            op0.as_operand(),
2118            op1.as_operand(),
2119            &NOREG,
2120            &NOREG,
2121        );
2122    }
2123}
2124
2125impl<'a> SseSqrtpsEmitter<Xmm, Mem> for Assembler<'a> {
2126    fn sse_sqrtps(&mut self, op0: Xmm, op1: Mem) {
2127        self.emit(
2128            SSE_SQRTPSRM,
2129            op0.as_operand(),
2130            op1.as_operand(),
2131            &NOREG,
2132            &NOREG,
2133        );
2134    }
2135}
2136
2137/// `SSE_SQRTSS`.
2138///
2139/// Supported operand variants:
2140///
2141/// ```text
2142/// +---+----------+
2143/// | # | Operands |
2144/// +---+----------+
2145/// | 1 | Xmm, Mem |
2146/// | 2 | Xmm, Xmm |
2147/// +---+----------+
2148/// ```
2149pub trait SseSqrtssEmitter<A, B> {
2150    fn sse_sqrtss(&mut self, op0: A, op1: B);
2151}
2152
2153impl<'a> SseSqrtssEmitter<Xmm, Xmm> for Assembler<'a> {
2154    fn sse_sqrtss(&mut self, op0: Xmm, op1: Xmm) {
2155        self.emit(
2156            SSE_SQRTSSRR,
2157            op0.as_operand(),
2158            op1.as_operand(),
2159            &NOREG,
2160            &NOREG,
2161        );
2162    }
2163}
2164
2165impl<'a> SseSqrtssEmitter<Xmm, Mem> for Assembler<'a> {
2166    fn sse_sqrtss(&mut self, op0: Xmm, op1: Mem) {
2167        self.emit(
2168            SSE_SQRTSSRM,
2169            op0.as_operand(),
2170            op1.as_operand(),
2171            &NOREG,
2172            &NOREG,
2173        );
2174    }
2175}
2176
2177/// `SSE_SUBPS`.
2178///
2179/// Supported operand variants:
2180///
2181/// ```text
2182/// +---+----------+
2183/// | # | Operands |
2184/// +---+----------+
2185/// | 1 | Xmm, Mem |
2186/// | 2 | Xmm, Xmm |
2187/// +---+----------+
2188/// ```
2189pub trait SseSubpsEmitter<A, B> {
2190    fn sse_subps(&mut self, op0: A, op1: B);
2191}
2192
2193impl<'a> SseSubpsEmitter<Xmm, Xmm> for Assembler<'a> {
2194    fn sse_subps(&mut self, op0: Xmm, op1: Xmm) {
2195        self.emit(
2196            SSE_SUBPSRR,
2197            op0.as_operand(),
2198            op1.as_operand(),
2199            &NOREG,
2200            &NOREG,
2201        );
2202    }
2203}
2204
2205impl<'a> SseSubpsEmitter<Xmm, Mem> for Assembler<'a> {
2206    fn sse_subps(&mut self, op0: Xmm, op1: Mem) {
2207        self.emit(
2208            SSE_SUBPSRM,
2209            op0.as_operand(),
2210            op1.as_operand(),
2211            &NOREG,
2212            &NOREG,
2213        );
2214    }
2215}
2216
2217/// `SSE_SUBSS`.
2218///
2219/// Supported operand variants:
2220///
2221/// ```text
2222/// +---+----------+
2223/// | # | Operands |
2224/// +---+----------+
2225/// | 1 | Xmm, Mem |
2226/// | 2 | Xmm, Xmm |
2227/// +---+----------+
2228/// ```
2229pub trait SseSubssEmitter<A, B> {
2230    fn sse_subss(&mut self, op0: A, op1: B);
2231}
2232
2233impl<'a> SseSubssEmitter<Xmm, Xmm> for Assembler<'a> {
2234    fn sse_subss(&mut self, op0: Xmm, op1: Xmm) {
2235        self.emit(
2236            SSE_SUBSSRR,
2237            op0.as_operand(),
2238            op1.as_operand(),
2239            &NOREG,
2240            &NOREG,
2241        );
2242    }
2243}
2244
2245impl<'a> SseSubssEmitter<Xmm, Mem> for Assembler<'a> {
2246    fn sse_subss(&mut self, op0: Xmm, op1: Mem) {
2247        self.emit(
2248            SSE_SUBSSRM,
2249            op0.as_operand(),
2250            op1.as_operand(),
2251            &NOREG,
2252            &NOREG,
2253        );
2254    }
2255}
2256
2257/// `SSE_UCOMISS`.
2258///
2259/// Supported operand variants:
2260///
2261/// ```text
2262/// +---+----------+
2263/// | # | Operands |
2264/// +---+----------+
2265/// | 1 | Xmm, Mem |
2266/// | 2 | Xmm, Xmm |
2267/// +---+----------+
2268/// ```
2269pub trait SseUcomissEmitter<A, B> {
2270    fn sse_ucomiss(&mut self, op0: A, op1: B);
2271}
2272
2273impl<'a> SseUcomissEmitter<Xmm, Xmm> for Assembler<'a> {
2274    fn sse_ucomiss(&mut self, op0: Xmm, op1: Xmm) {
2275        self.emit(
2276            SSE_UCOMISSRR,
2277            op0.as_operand(),
2278            op1.as_operand(),
2279            &NOREG,
2280            &NOREG,
2281        );
2282    }
2283}
2284
2285impl<'a> SseUcomissEmitter<Xmm, Mem> for Assembler<'a> {
2286    fn sse_ucomiss(&mut self, op0: Xmm, op1: Mem) {
2287        self.emit(
2288            SSE_UCOMISSRM,
2289            op0.as_operand(),
2290            op1.as_operand(),
2291            &NOREG,
2292            &NOREG,
2293        );
2294    }
2295}
2296
2297/// `SSE_UNPCKHPS`.
2298///
2299/// Supported operand variants:
2300///
2301/// ```text
2302/// +---+----------+
2303/// | # | Operands |
2304/// +---+----------+
2305/// | 1 | Xmm, Mem |
2306/// | 2 | Xmm, Xmm |
2307/// +---+----------+
2308/// ```
2309pub trait SseUnpckhpsEmitter<A, B> {
2310    fn sse_unpckhps(&mut self, op0: A, op1: B);
2311}
2312
2313impl<'a> SseUnpckhpsEmitter<Xmm, Xmm> for Assembler<'a> {
2314    fn sse_unpckhps(&mut self, op0: Xmm, op1: Xmm) {
2315        self.emit(
2316            SSE_UNPCKHPSRR,
2317            op0.as_operand(),
2318            op1.as_operand(),
2319            &NOREG,
2320            &NOREG,
2321        );
2322    }
2323}
2324
2325impl<'a> SseUnpckhpsEmitter<Xmm, Mem> for Assembler<'a> {
2326    fn sse_unpckhps(&mut self, op0: Xmm, op1: Mem) {
2327        self.emit(
2328            SSE_UNPCKHPSRM,
2329            op0.as_operand(),
2330            op1.as_operand(),
2331            &NOREG,
2332            &NOREG,
2333        );
2334    }
2335}
2336
2337/// `SSE_UNPCKLPS`.
2338///
2339/// Supported operand variants:
2340///
2341/// ```text
2342/// +---+----------+
2343/// | # | Operands |
2344/// +---+----------+
2345/// | 1 | Xmm, Mem |
2346/// | 2 | Xmm, Xmm |
2347/// +---+----------+
2348/// ```
2349pub trait SseUnpcklpsEmitter<A, B> {
2350    fn sse_unpcklps(&mut self, op0: A, op1: B);
2351}
2352
2353impl<'a> SseUnpcklpsEmitter<Xmm, Xmm> for Assembler<'a> {
2354    fn sse_unpcklps(&mut self, op0: Xmm, op1: Xmm) {
2355        self.emit(
2356            SSE_UNPCKLPSRR,
2357            op0.as_operand(),
2358            op1.as_operand(),
2359            &NOREG,
2360            &NOREG,
2361        );
2362    }
2363}
2364
2365impl<'a> SseUnpcklpsEmitter<Xmm, Mem> for Assembler<'a> {
2366    fn sse_unpcklps(&mut self, op0: Xmm, op1: Mem) {
2367        self.emit(
2368            SSE_UNPCKLPSRM,
2369            op0.as_operand(),
2370            op1.as_operand(),
2371            &NOREG,
2372            &NOREG,
2373        );
2374    }
2375}
2376
2377/// `SSE_XORPS`.
2378///
2379/// Supported operand variants:
2380///
2381/// ```text
2382/// +---+----------+
2383/// | # | Operands |
2384/// +---+----------+
2385/// | 1 | Xmm, Mem |
2386/// | 2 | Xmm, Xmm |
2387/// +---+----------+
2388/// ```
2389pub trait SseXorpsEmitter<A, B> {
2390    fn sse_xorps(&mut self, op0: A, op1: B);
2391}
2392
2393impl<'a> SseXorpsEmitter<Xmm, Xmm> for Assembler<'a> {
2394    fn sse_xorps(&mut self, op0: Xmm, op1: Xmm) {
2395        self.emit(
2396            SSE_XORPSRR,
2397            op0.as_operand(),
2398            op1.as_operand(),
2399            &NOREG,
2400            &NOREG,
2401        );
2402    }
2403}
2404
2405impl<'a> SseXorpsEmitter<Xmm, Mem> for Assembler<'a> {
2406    fn sse_xorps(&mut self, op0: Xmm, op1: Mem) {
2407        self.emit(
2408            SSE_XORPSRM,
2409            op0.as_operand(),
2410            op1.as_operand(),
2411            &NOREG,
2412            &NOREG,
2413        );
2414    }
2415}
2416
2417/// `STMXCSR`.
2418///
2419/// Supported operand variants:
2420///
2421/// ```text
2422/// +---+----------+
2423/// | # | Operands |
2424/// +---+----------+
2425/// | 1 | Mem      |
2426/// +---+----------+
2427/// ```
2428pub trait StmxcsrEmitter<A> {
2429    fn stmxcsr(&mut self, op0: A);
2430}
2431
2432impl<'a> StmxcsrEmitter<Mem> for Assembler<'a> {
2433    fn stmxcsr(&mut self, op0: Mem) {
2434        self.emit(STMXCSRM, op0.as_operand(), &NOREG, &NOREG, &NOREG);
2435    }
2436}
2437
2438impl<'a> Assembler<'a> {
2439    /// `LDMXCSR`.
2440    ///
2441    /// Supported operand variants:
2442    ///
2443    /// ```text
2444    /// +---+----------+
2445    /// | # | Operands |
2446    /// +---+----------+
2447    /// | 1 | Mem      |
2448    /// +---+----------+
2449    /// ```
2450    #[inline]
2451    pub fn ldmxcsr<A>(&mut self, op0: A)
2452    where
2453        Assembler<'a>: LdmxcsrEmitter<A>,
2454    {
2455        <Self as LdmxcsrEmitter<A>>::ldmxcsr(self, op0);
2456    }
2457    /// `MMX_MASKMOVQ`.
2458    ///
2459    /// Supported operand variants:
2460    ///
2461    /// ```text
2462    /// +---+----------+
2463    /// | # | Operands |
2464    /// +---+----------+
2465    /// | 1 | Mm, Mm   |
2466    /// +---+----------+
2467    /// ```
2468    #[inline]
2469    pub fn mmx_maskmovq<A, B>(&mut self, op0: A, op1: B)
2470    where
2471        Assembler<'a>: MmxMaskmovqEmitter<A, B>,
2472    {
2473        <Self as MmxMaskmovqEmitter<A, B>>::mmx_maskmovq(self, op0, op1);
2474    }
2475    /// `MMX_MOVDQ2Q`.
2476    ///
2477    /// Supported operand variants:
2478    ///
2479    /// ```text
2480    /// +---+----------+
2481    /// | # | Operands |
2482    /// +---+----------+
2483    /// | 1 | Mm, Xmm  |
2484    /// +---+----------+
2485    /// ```
2486    #[inline]
2487    pub fn mmx_movdq2q<A, B>(&mut self, op0: A, op1: B)
2488    where
2489        Assembler<'a>: MmxMovdq2qEmitter<A, B>,
2490    {
2491        <Self as MmxMovdq2qEmitter<A, B>>::mmx_movdq2q(self, op0, op1);
2492    }
2493    /// `MMX_MOVNTQ`.
2494    ///
2495    /// Supported operand variants:
2496    ///
2497    /// ```text
2498    /// +---+----------+
2499    /// | # | Operands |
2500    /// +---+----------+
2501    /// | 1 | Mem, Mm  |
2502    /// +---+----------+
2503    /// ```
2504    #[inline]
2505    pub fn mmx_movntq<A, B>(&mut self, op0: A, op1: B)
2506    where
2507        Assembler<'a>: MmxMovntqEmitter<A, B>,
2508    {
2509        <Self as MmxMovntqEmitter<A, B>>::mmx_movntq(self, op0, op1);
2510    }
2511    /// `MMX_MOVQ2DQ`.
2512    ///
2513    /// Supported operand variants:
2514    ///
2515    /// ```text
2516    /// +---+----------+
2517    /// | # | Operands |
2518    /// +---+----------+
2519    /// | 1 | Xmm, Mm  |
2520    /// +---+----------+
2521    /// ```
2522    #[inline]
2523    pub fn mmx_movq2dq<A, B>(&mut self, op0: A, op1: B)
2524    where
2525        Assembler<'a>: MmxMovq2dqEmitter<A, B>,
2526    {
2527        <Self as MmxMovq2dqEmitter<A, B>>::mmx_movq2dq(self, op0, op1);
2528    }
2529    /// `MMX_PAVGB`.
2530    ///
2531    /// Supported operand variants:
2532    ///
2533    /// ```text
2534    /// +---+----------+
2535    /// | # | Operands |
2536    /// +---+----------+
2537    /// | 1 | Mm, Mem  |
2538    /// | 2 | Mm, Mm   |
2539    /// +---+----------+
2540    /// ```
2541    #[inline]
2542    pub fn mmx_pavgb<A, B>(&mut self, op0: A, op1: B)
2543    where
2544        Assembler<'a>: MmxPavgbEmitter<A, B>,
2545    {
2546        <Self as MmxPavgbEmitter<A, B>>::mmx_pavgb(self, op0, op1);
2547    }
2548    /// `MMX_PAVGW`.
2549    ///
2550    /// Supported operand variants:
2551    ///
2552    /// ```text
2553    /// +---+----------+
2554    /// | # | Operands |
2555    /// +---+----------+
2556    /// | 1 | Mm, Mem  |
2557    /// | 2 | Mm, Mm   |
2558    /// +---+----------+
2559    /// ```
2560    #[inline]
2561    pub fn mmx_pavgw<A, B>(&mut self, op0: A, op1: B)
2562    where
2563        Assembler<'a>: MmxPavgwEmitter<A, B>,
2564    {
2565        <Self as MmxPavgwEmitter<A, B>>::mmx_pavgw(self, op0, op1);
2566    }
2567    /// `MMX_PEXTRW`.
2568    ///
2569    /// Supported operand variants:
2570    ///
2571    /// ```text
2572    /// +---+--------------+
2573    /// | # | Operands     |
2574    /// +---+--------------+
2575    /// | 1 | Gpq, Mm, Imm |
2576    /// +---+--------------+
2577    /// ```
2578    #[inline]
2579    pub fn mmx_pextrw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
2580    where
2581        Assembler<'a>: MmxPextrwEmitter<A, B, C>,
2582    {
2583        <Self as MmxPextrwEmitter<A, B, C>>::mmx_pextrw(self, op0, op1, op2);
2584    }
2585    /// `MMX_PINSRW`.
2586    ///
2587    /// Supported operand variants:
2588    ///
2589    /// ```text
2590    /// +---+--------------+
2591    /// | # | Operands     |
2592    /// +---+--------------+
2593    /// | 1 | Mm, Gpd, Imm |
2594    /// | 2 | Mm, Mem, Imm |
2595    /// +---+--------------+
2596    /// ```
2597    #[inline]
2598    pub fn mmx_pinsrw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
2599    where
2600        Assembler<'a>: MmxPinsrwEmitter<A, B, C>,
2601    {
2602        <Self as MmxPinsrwEmitter<A, B, C>>::mmx_pinsrw(self, op0, op1, op2);
2603    }
2604    /// `MMX_PMAXSW`.
2605    ///
2606    /// Supported operand variants:
2607    ///
2608    /// ```text
2609    /// +---+----------+
2610    /// | # | Operands |
2611    /// +---+----------+
2612    /// | 1 | Mm, Mem  |
2613    /// | 2 | Mm, Mm   |
2614    /// +---+----------+
2615    /// ```
2616    #[inline]
2617    pub fn mmx_pmaxsw<A, B>(&mut self, op0: A, op1: B)
2618    where
2619        Assembler<'a>: MmxPmaxswEmitter<A, B>,
2620    {
2621        <Self as MmxPmaxswEmitter<A, B>>::mmx_pmaxsw(self, op0, op1);
2622    }
2623    /// `MMX_PMAXUB`.
2624    ///
2625    /// Supported operand variants:
2626    ///
2627    /// ```text
2628    /// +---+----------+
2629    /// | # | Operands |
2630    /// +---+----------+
2631    /// | 1 | Mm, Mem  |
2632    /// | 2 | Mm, Mm   |
2633    /// +---+----------+
2634    /// ```
2635    #[inline]
2636    pub fn mmx_pmaxub<A, B>(&mut self, op0: A, op1: B)
2637    where
2638        Assembler<'a>: MmxPmaxubEmitter<A, B>,
2639    {
2640        <Self as MmxPmaxubEmitter<A, B>>::mmx_pmaxub(self, op0, op1);
2641    }
2642    /// `MMX_PMINSW`.
2643    ///
2644    /// Supported operand variants:
2645    ///
2646    /// ```text
2647    /// +---+----------+
2648    /// | # | Operands |
2649    /// +---+----------+
2650    /// | 1 | Mm, Mem  |
2651    /// | 2 | Mm, Mm   |
2652    /// +---+----------+
2653    /// ```
2654    #[inline]
2655    pub fn mmx_pminsw<A, B>(&mut self, op0: A, op1: B)
2656    where
2657        Assembler<'a>: MmxPminswEmitter<A, B>,
2658    {
2659        <Self as MmxPminswEmitter<A, B>>::mmx_pminsw(self, op0, op1);
2660    }
2661    /// `MMX_PMINUB`.
2662    ///
2663    /// Supported operand variants:
2664    ///
2665    /// ```text
2666    /// +---+----------+
2667    /// | # | Operands |
2668    /// +---+----------+
2669    /// | 1 | Mm, Mem  |
2670    /// | 2 | Mm, Mm   |
2671    /// +---+----------+
2672    /// ```
2673    #[inline]
2674    pub fn mmx_pminub<A, B>(&mut self, op0: A, op1: B)
2675    where
2676        Assembler<'a>: MmxPminubEmitter<A, B>,
2677    {
2678        <Self as MmxPminubEmitter<A, B>>::mmx_pminub(self, op0, op1);
2679    }
2680    /// `MMX_PMOVMSKB`.
2681    ///
2682    /// Supported operand variants:
2683    ///
2684    /// ```text
2685    /// +---+----------+
2686    /// | # | Operands |
2687    /// +---+----------+
2688    /// | 1 | Gpq, Mm  |
2689    /// +---+----------+
2690    /// ```
2691    #[inline]
2692    pub fn mmx_pmovmskb<A, B>(&mut self, op0: A, op1: B)
2693    where
2694        Assembler<'a>: MmxPmovmskbEmitter<A, B>,
2695    {
2696        <Self as MmxPmovmskbEmitter<A, B>>::mmx_pmovmskb(self, op0, op1);
2697    }
2698    /// `MMX_PMULHUW`.
2699    ///
2700    /// Supported operand variants:
2701    ///
2702    /// ```text
2703    /// +---+----------+
2704    /// | # | Operands |
2705    /// +---+----------+
2706    /// | 1 | Mm, Mem  |
2707    /// | 2 | Mm, Mm   |
2708    /// +---+----------+
2709    /// ```
2710    #[inline]
2711    pub fn mmx_pmulhuw<A, B>(&mut self, op0: A, op1: B)
2712    where
2713        Assembler<'a>: MmxPmulhuwEmitter<A, B>,
2714    {
2715        <Self as MmxPmulhuwEmitter<A, B>>::mmx_pmulhuw(self, op0, op1);
2716    }
2717    /// `MMX_PSADBW`.
2718    ///
2719    /// Supported operand variants:
2720    ///
2721    /// ```text
2722    /// +---+----------+
2723    /// | # | Operands |
2724    /// +---+----------+
2725    /// | 1 | Mm, Mem  |
2726    /// | 2 | Mm, Mm   |
2727    /// +---+----------+
2728    /// ```
2729    #[inline]
2730    pub fn mmx_psadbw<A, B>(&mut self, op0: A, op1: B)
2731    where
2732        Assembler<'a>: MmxPsadbwEmitter<A, B>,
2733    {
2734        <Self as MmxPsadbwEmitter<A, B>>::mmx_psadbw(self, op0, op1);
2735    }
2736    /// `MMX_PSHUFW`.
2737    ///
2738    /// Supported operand variants:
2739    ///
2740    /// ```text
2741    /// +---+--------------+
2742    /// | # | Operands     |
2743    /// +---+--------------+
2744    /// | 1 | Mm, Mem, Imm |
2745    /// | 2 | Mm, Mm, Imm  |
2746    /// +---+--------------+
2747    /// ```
2748    #[inline]
2749    pub fn mmx_pshufw<A, B, C>(&mut self, op0: A, op1: B, op2: C)
2750    where
2751        Assembler<'a>: MmxPshufwEmitter<A, B, C>,
2752    {
2753        <Self as MmxPshufwEmitter<A, B, C>>::mmx_pshufw(self, op0, op1, op2);
2754    }
2755    /// `PREFETCHNTA`.
2756    ///
2757    /// Supported operand variants:
2758    ///
2759    /// ```text
2760    /// +---+----------+
2761    /// | # | Operands |
2762    /// +---+----------+
2763    /// | 1 | Mem      |
2764    /// +---+----------+
2765    /// ```
2766    #[inline]
2767    pub fn prefetchnta<A>(&mut self, op0: A)
2768    where
2769        Assembler<'a>: PrefetchntaEmitter<A>,
2770    {
2771        <Self as PrefetchntaEmitter<A>>::prefetchnta(self, op0);
2772    }
2773    /// `PREFETCHT0`.
2774    ///
2775    /// Supported operand variants:
2776    ///
2777    /// ```text
2778    /// +---+----------+
2779    /// | # | Operands |
2780    /// +---+----------+
2781    /// | 1 | Mem      |
2782    /// +---+----------+
2783    /// ```
2784    #[inline]
2785    pub fn prefetcht0<A>(&mut self, op0: A)
2786    where
2787        Assembler<'a>: Prefetcht0Emitter<A>,
2788    {
2789        <Self as Prefetcht0Emitter<A>>::prefetcht0(self, op0);
2790    }
2791    /// `PREFETCHT1`.
2792    ///
2793    /// Supported operand variants:
2794    ///
2795    /// ```text
2796    /// +---+----------+
2797    /// | # | Operands |
2798    /// +---+----------+
2799    /// | 1 | Mem      |
2800    /// +---+----------+
2801    /// ```
2802    #[inline]
2803    pub fn prefetcht1<A>(&mut self, op0: A)
2804    where
2805        Assembler<'a>: Prefetcht1Emitter<A>,
2806    {
2807        <Self as Prefetcht1Emitter<A>>::prefetcht1(self, op0);
2808    }
2809    /// `PREFETCHT2`.
2810    ///
2811    /// Supported operand variants:
2812    ///
2813    /// ```text
2814    /// +---+----------+
2815    /// | # | Operands |
2816    /// +---+----------+
2817    /// | 1 | Mem      |
2818    /// +---+----------+
2819    /// ```
2820    #[inline]
2821    pub fn prefetcht2<A>(&mut self, op0: A)
2822    where
2823        Assembler<'a>: Prefetcht2Emitter<A>,
2824    {
2825        <Self as Prefetcht2Emitter<A>>::prefetcht2(self, op0);
2826    }
2827    /// `SFENCE`.
2828    ///
2829    /// Supported operand variants:
2830    ///
2831    /// ```text
2832    /// +---+----------+
2833    /// | # | Operands |
2834    /// +---+----------+
2835    /// | 1 | (none)   |
2836    /// +---+----------+
2837    /// ```
2838    #[inline]
2839    pub fn sfence(&mut self)
2840    where
2841        Assembler<'a>: SfenceEmitter,
2842    {
2843        <Self as SfenceEmitter>::sfence(self);
2844    }
2845    /// `SSE_ADDPS`.
2846    ///
2847    /// Supported operand variants:
2848    ///
2849    /// ```text
2850    /// +---+----------+
2851    /// | # | Operands |
2852    /// +---+----------+
2853    /// | 1 | Xmm, Mem |
2854    /// | 2 | Xmm, Xmm |
2855    /// +---+----------+
2856    /// ```
2857    #[inline]
2858    pub fn sse_addps<A, B>(&mut self, op0: A, op1: B)
2859    where
2860        Assembler<'a>: SseAddpsEmitter<A, B>,
2861    {
2862        <Self as SseAddpsEmitter<A, B>>::sse_addps(self, op0, op1);
2863    }
2864    /// `SSE_ADDSS`.
2865    ///
2866    /// Supported operand variants:
2867    ///
2868    /// ```text
2869    /// +---+----------+
2870    /// | # | Operands |
2871    /// +---+----------+
2872    /// | 1 | Xmm, Mem |
2873    /// | 2 | Xmm, Xmm |
2874    /// +---+----------+
2875    /// ```
2876    #[inline]
2877    pub fn sse_addss<A, B>(&mut self, op0: A, op1: B)
2878    where
2879        Assembler<'a>: SseAddssEmitter<A, B>,
2880    {
2881        <Self as SseAddssEmitter<A, B>>::sse_addss(self, op0, op1);
2882    }
2883    /// `SSE_ANDNPS`.
2884    ///
2885    /// Supported operand variants:
2886    ///
2887    /// ```text
2888    /// +---+----------+
2889    /// | # | Operands |
2890    /// +---+----------+
2891    /// | 1 | Xmm, Mem |
2892    /// | 2 | Xmm, Xmm |
2893    /// +---+----------+
2894    /// ```
2895    #[inline]
2896    pub fn sse_andnps<A, B>(&mut self, op0: A, op1: B)
2897    where
2898        Assembler<'a>: SseAndnpsEmitter<A, B>,
2899    {
2900        <Self as SseAndnpsEmitter<A, B>>::sse_andnps(self, op0, op1);
2901    }
2902    /// `SSE_ANDPS`.
2903    ///
2904    /// Supported operand variants:
2905    ///
2906    /// ```text
2907    /// +---+----------+
2908    /// | # | Operands |
2909    /// +---+----------+
2910    /// | 1 | Xmm, Mem |
2911    /// | 2 | Xmm, Xmm |
2912    /// +---+----------+
2913    /// ```
2914    #[inline]
2915    pub fn sse_andps<A, B>(&mut self, op0: A, op1: B)
2916    where
2917        Assembler<'a>: SseAndpsEmitter<A, B>,
2918    {
2919        <Self as SseAndpsEmitter<A, B>>::sse_andps(self, op0, op1);
2920    }
2921    /// `SSE_CMPPS`.
2922    ///
2923    /// Supported operand variants:
2924    ///
2925    /// ```text
2926    /// +---+---------------+
2927    /// | # | Operands      |
2928    /// +---+---------------+
2929    /// | 1 | Xmm, Mem, Imm |
2930    /// | 2 | Xmm, Xmm, Imm |
2931    /// +---+---------------+
2932    /// ```
2933    #[inline]
2934    pub fn sse_cmpps<A, B, C>(&mut self, op0: A, op1: B, op2: C)
2935    where
2936        Assembler<'a>: SseCmppsEmitter<A, B, C>,
2937    {
2938        <Self as SseCmppsEmitter<A, B, C>>::sse_cmpps(self, op0, op1, op2);
2939    }
2940    /// `SSE_CMPSS`.
2941    ///
2942    /// Supported operand variants:
2943    ///
2944    /// ```text
2945    /// +---+---------------+
2946    /// | # | Operands      |
2947    /// +---+---------------+
2948    /// | 1 | Xmm, Mem, Imm |
2949    /// | 2 | Xmm, Xmm, Imm |
2950    /// +---+---------------+
2951    /// ```
2952    #[inline]
2953    pub fn sse_cmpss<A, B, C>(&mut self, op0: A, op1: B, op2: C)
2954    where
2955        Assembler<'a>: SseCmpssEmitter<A, B, C>,
2956    {
2957        <Self as SseCmpssEmitter<A, B, C>>::sse_cmpss(self, op0, op1, op2);
2958    }
2959    /// `SSE_COMISS`.
2960    ///
2961    /// Supported operand variants:
2962    ///
2963    /// ```text
2964    /// +---+----------+
2965    /// | # | Operands |
2966    /// +---+----------+
2967    /// | 1 | Xmm, Mem |
2968    /// | 2 | Xmm, Xmm |
2969    /// +---+----------+
2970    /// ```
2971    #[inline]
2972    pub fn sse_comiss<A, B>(&mut self, op0: A, op1: B)
2973    where
2974        Assembler<'a>: SseComissEmitter<A, B>,
2975    {
2976        <Self as SseComissEmitter<A, B>>::sse_comiss(self, op0, op1);
2977    }
2978    /// `SSE_CVTSI2SS`.
2979    ///
2980    /// Supported operand variants:
2981    ///
2982    /// ```text
2983    /// +---+----------+
2984    /// | # | Operands |
2985    /// +---+----------+
2986    /// | 1 | Xmm, Gpd |
2987    /// | 2 | Xmm, Gpq |
2988    /// | 3 | Xmm, Mem |
2989    /// +---+----------+
2990    /// ```
2991    #[inline]
2992    pub fn sse_cvtsi2ss<A, B>(&mut self, op0: A, op1: B)
2993    where
2994        Assembler<'a>: SseCvtsi2ssEmitter<A, B>,
2995    {
2996        <Self as SseCvtsi2ssEmitter<A, B>>::sse_cvtsi2ss(self, op0, op1);
2997    }
2998    /// `SSE_CVTSS2SI`.
2999    ///
3000    /// Supported operand variants:
3001    ///
3002    /// ```text
3003    /// +---+----------+
3004    /// | # | Operands |
3005    /// +---+----------+
3006    /// | 1 | Gpd, Mem |
3007    /// | 2 | Gpd, Xmm |
3008    /// | 3 | Gpq, Mem |
3009    /// | 4 | Gpq, Xmm |
3010    /// +---+----------+
3011    /// ```
3012    #[inline]
3013    pub fn sse_cvtss2si<A, B>(&mut self, op0: A, op1: B)
3014    where
3015        Assembler<'a>: SseCvtss2siEmitter<A, B>,
3016    {
3017        <Self as SseCvtss2siEmitter<A, B>>::sse_cvtss2si(self, op0, op1);
3018    }
3019    /// `SSE_CVTTSS2SI`.
3020    ///
3021    /// Supported operand variants:
3022    ///
3023    /// ```text
3024    /// +---+----------+
3025    /// | # | Operands |
3026    /// +---+----------+
3027    /// | 1 | Gpd, Mem |
3028    /// | 2 | Gpd, Xmm |
3029    /// | 3 | Gpq, Mem |
3030    /// | 4 | Gpq, Xmm |
3031    /// +---+----------+
3032    /// ```
3033    #[inline]
3034    pub fn sse_cvttss2si<A, B>(&mut self, op0: A, op1: B)
3035    where
3036        Assembler<'a>: SseCvttss2siEmitter<A, B>,
3037    {
3038        <Self as SseCvttss2siEmitter<A, B>>::sse_cvttss2si(self, op0, op1);
3039    }
3040    /// `SSE_DIVPS`.
3041    ///
3042    /// Supported operand variants:
3043    ///
3044    /// ```text
3045    /// +---+----------+
3046    /// | # | Operands |
3047    /// +---+----------+
3048    /// | 1 | Xmm, Mem |
3049    /// | 2 | Xmm, Xmm |
3050    /// +---+----------+
3051    /// ```
3052    #[inline]
3053    pub fn sse_divps<A, B>(&mut self, op0: A, op1: B)
3054    where
3055        Assembler<'a>: SseDivpsEmitter<A, B>,
3056    {
3057        <Self as SseDivpsEmitter<A, B>>::sse_divps(self, op0, op1);
3058    }
3059    /// `SSE_DIVSS`.
3060    ///
3061    /// Supported operand variants:
3062    ///
3063    /// ```text
3064    /// +---+----------+
3065    /// | # | Operands |
3066    /// +---+----------+
3067    /// | 1 | Xmm, Mem |
3068    /// | 2 | Xmm, Xmm |
3069    /// +---+----------+
3070    /// ```
3071    #[inline]
3072    pub fn sse_divss<A, B>(&mut self, op0: A, op1: B)
3073    where
3074        Assembler<'a>: SseDivssEmitter<A, B>,
3075    {
3076        <Self as SseDivssEmitter<A, B>>::sse_divss(self, op0, op1);
3077    }
3078    /// `SSE_MAXPS`.
3079    ///
3080    /// Supported operand variants:
3081    ///
3082    /// ```text
3083    /// +---+----------+
3084    /// | # | Operands |
3085    /// +---+----------+
3086    /// | 1 | Xmm, Mem |
3087    /// | 2 | Xmm, Xmm |
3088    /// +---+----------+
3089    /// ```
3090    #[inline]
3091    pub fn sse_maxps<A, B>(&mut self, op0: A, op1: B)
3092    where
3093        Assembler<'a>: SseMaxpsEmitter<A, B>,
3094    {
3095        <Self as SseMaxpsEmitter<A, B>>::sse_maxps(self, op0, op1);
3096    }
3097    /// `SSE_MAXSS`.
3098    ///
3099    /// Supported operand variants:
3100    ///
3101    /// ```text
3102    /// +---+----------+
3103    /// | # | Operands |
3104    /// +---+----------+
3105    /// | 1 | Xmm, Mem |
3106    /// | 2 | Xmm, Xmm |
3107    /// +---+----------+
3108    /// ```
3109    #[inline]
3110    pub fn sse_maxss<A, B>(&mut self, op0: A, op1: B)
3111    where
3112        Assembler<'a>: SseMaxssEmitter<A, B>,
3113    {
3114        <Self as SseMaxssEmitter<A, B>>::sse_maxss(self, op0, op1);
3115    }
3116    /// `SSE_MINPS`.
3117    ///
3118    /// Supported operand variants:
3119    ///
3120    /// ```text
3121    /// +---+----------+
3122    /// | # | Operands |
3123    /// +---+----------+
3124    /// | 1 | Xmm, Mem |
3125    /// | 2 | Xmm, Xmm |
3126    /// +---+----------+
3127    /// ```
3128    #[inline]
3129    pub fn sse_minps<A, B>(&mut self, op0: A, op1: B)
3130    where
3131        Assembler<'a>: SseMinpsEmitter<A, B>,
3132    {
3133        <Self as SseMinpsEmitter<A, B>>::sse_minps(self, op0, op1);
3134    }
3135    /// `SSE_MINSS`.
3136    ///
3137    /// Supported operand variants:
3138    ///
3139    /// ```text
3140    /// +---+----------+
3141    /// | # | Operands |
3142    /// +---+----------+
3143    /// | 1 | Xmm, Mem |
3144    /// | 2 | Xmm, Xmm |
3145    /// +---+----------+
3146    /// ```
3147    #[inline]
3148    pub fn sse_minss<A, B>(&mut self, op0: A, op1: B)
3149    where
3150        Assembler<'a>: SseMinssEmitter<A, B>,
3151    {
3152        <Self as SseMinssEmitter<A, B>>::sse_minss(self, op0, op1);
3153    }
3154    /// `SSE_MOVAPS`.
3155    ///
3156    /// Supported operand variants:
3157    ///
3158    /// ```text
3159    /// +---+----------+
3160    /// | # | Operands |
3161    /// +---+----------+
3162    /// | 1 | Mem, Xmm |
3163    /// | 2 | Xmm, Mem |
3164    /// | 3 | Xmm, Xmm |
3165    /// +---+----------+
3166    /// ```
3167    #[inline]
3168    pub fn sse_movaps<A, B>(&mut self, op0: A, op1: B)
3169    where
3170        Assembler<'a>: SseMovapsEmitter<A, B>,
3171    {
3172        <Self as SseMovapsEmitter<A, B>>::sse_movaps(self, op0, op1);
3173    }
3174    /// `SSE_MOVHLPS`.
3175    ///
3176    /// Supported operand variants:
3177    ///
3178    /// ```text
3179    /// +---+----------+
3180    /// | # | Operands |
3181    /// +---+----------+
3182    /// | 1 | Xmm, Xmm |
3183    /// +---+----------+
3184    /// ```
3185    #[inline]
3186    pub fn sse_movhlps<A, B>(&mut self, op0: A, op1: B)
3187    where
3188        Assembler<'a>: SseMovhlpsEmitter<A, B>,
3189    {
3190        <Self as SseMovhlpsEmitter<A, B>>::sse_movhlps(self, op0, op1);
3191    }
3192    /// `SSE_MOVHPS`.
3193    ///
3194    /// Supported operand variants:
3195    ///
3196    /// ```text
3197    /// +---+----------+
3198    /// | # | Operands |
3199    /// +---+----------+
3200    /// | 1 | Mem, Xmm |
3201    /// | 2 | Xmm, Mem |
3202    /// +---+----------+
3203    /// ```
3204    #[inline]
3205    pub fn sse_movhps<A, B>(&mut self, op0: A, op1: B)
3206    where
3207        Assembler<'a>: SseMovhpsEmitter<A, B>,
3208    {
3209        <Self as SseMovhpsEmitter<A, B>>::sse_movhps(self, op0, op1);
3210    }
3211    /// `SSE_MOVLHPS`.
3212    ///
3213    /// Supported operand variants:
3214    ///
3215    /// ```text
3216    /// +---+----------+
3217    /// | # | Operands |
3218    /// +---+----------+
3219    /// | 1 | Xmm, Xmm |
3220    /// +---+----------+
3221    /// ```
3222    #[inline]
3223    pub fn sse_movlhps<A, B>(&mut self, op0: A, op1: B)
3224    where
3225        Assembler<'a>: SseMovlhpsEmitter<A, B>,
3226    {
3227        <Self as SseMovlhpsEmitter<A, B>>::sse_movlhps(self, op0, op1);
3228    }
3229    /// `SSE_MOVLPS`.
3230    ///
3231    /// Supported operand variants:
3232    ///
3233    /// ```text
3234    /// +---+----------+
3235    /// | # | Operands |
3236    /// +---+----------+
3237    /// | 1 | Mem, Xmm |
3238    /// | 2 | Xmm, Mem |
3239    /// +---+----------+
3240    /// ```
3241    #[inline]
3242    pub fn sse_movlps<A, B>(&mut self, op0: A, op1: B)
3243    where
3244        Assembler<'a>: SseMovlpsEmitter<A, B>,
3245    {
3246        <Self as SseMovlpsEmitter<A, B>>::sse_movlps(self, op0, op1);
3247    }
3248    /// `SSE_MOVMSKPS`.
3249    ///
3250    /// Supported operand variants:
3251    ///
3252    /// ```text
3253    /// +---+----------+
3254    /// | # | Operands |
3255    /// +---+----------+
3256    /// | 1 | Gpq, Xmm |
3257    /// +---+----------+
3258    /// ```
3259    #[inline]
3260    pub fn sse_movmskps<A, B>(&mut self, op0: A, op1: B)
3261    where
3262        Assembler<'a>: SseMovmskpsEmitter<A, B>,
3263    {
3264        <Self as SseMovmskpsEmitter<A, B>>::sse_movmskps(self, op0, op1);
3265    }
3266    /// `SSE_MOVNTPS`.
3267    ///
3268    /// Supported operand variants:
3269    ///
3270    /// ```text
3271    /// +---+----------+
3272    /// | # | Operands |
3273    /// +---+----------+
3274    /// | 1 | Mem, Xmm |
3275    /// +---+----------+
3276    /// ```
3277    #[inline]
3278    pub fn sse_movntps<A, B>(&mut self, op0: A, op1: B)
3279    where
3280        Assembler<'a>: SseMovntpsEmitter<A, B>,
3281    {
3282        <Self as SseMovntpsEmitter<A, B>>::sse_movntps(self, op0, op1);
3283    }
3284    /// `SSE_MOVNTSS`.
3285    ///
3286    /// Supported operand variants:
3287    ///
3288    /// ```text
3289    /// +---+----------+
3290    /// | # | Operands |
3291    /// +---+----------+
3292    /// | 1 | Mem, Xmm |
3293    /// +---+----------+
3294    /// ```
3295    #[inline]
3296    pub fn sse_movntss<A, B>(&mut self, op0: A, op1: B)
3297    where
3298        Assembler<'a>: SseMovntssEmitter<A, B>,
3299    {
3300        <Self as SseMovntssEmitter<A, B>>::sse_movntss(self, op0, op1);
3301    }
3302    /// `SSE_MOVSS`.
3303    ///
3304    /// Supported operand variants:
3305    ///
3306    /// ```text
3307    /// +---+----------+
3308    /// | # | Operands |
3309    /// +---+----------+
3310    /// | 1 | Mem, Xmm |
3311    /// | 2 | Xmm, Mem |
3312    /// | 3 | Xmm, Xmm |
3313    /// +---+----------+
3314    /// ```
3315    #[inline]
3316    pub fn sse_movss<A, B>(&mut self, op0: A, op1: B)
3317    where
3318        Assembler<'a>: SseMovssEmitter<A, B>,
3319    {
3320        <Self as SseMovssEmitter<A, B>>::sse_movss(self, op0, op1);
3321    }
3322    /// `SSE_MOVUPS`.
3323    ///
3324    /// Supported operand variants:
3325    ///
3326    /// ```text
3327    /// +---+----------+
3328    /// | # | Operands |
3329    /// +---+----------+
3330    /// | 1 | Mem, Xmm |
3331    /// | 2 | Xmm, Mem |
3332    /// | 3 | Xmm, Xmm |
3333    /// +---+----------+
3334    /// ```
3335    #[inline]
3336    pub fn sse_movups<A, B>(&mut self, op0: A, op1: B)
3337    where
3338        Assembler<'a>: SseMovupsEmitter<A, B>,
3339    {
3340        <Self as SseMovupsEmitter<A, B>>::sse_movups(self, op0, op1);
3341    }
3342    /// `SSE_MULPS`.
3343    ///
3344    /// Supported operand variants:
3345    ///
3346    /// ```text
3347    /// +---+----------+
3348    /// | # | Operands |
3349    /// +---+----------+
3350    /// | 1 | Xmm, Mem |
3351    /// | 2 | Xmm, Xmm |
3352    /// +---+----------+
3353    /// ```
3354    #[inline]
3355    pub fn sse_mulps<A, B>(&mut self, op0: A, op1: B)
3356    where
3357        Assembler<'a>: SseMulpsEmitter<A, B>,
3358    {
3359        <Self as SseMulpsEmitter<A, B>>::sse_mulps(self, op0, op1);
3360    }
3361    /// `SSE_MULSS`.
3362    ///
3363    /// Supported operand variants:
3364    ///
3365    /// ```text
3366    /// +---+----------+
3367    /// | # | Operands |
3368    /// +---+----------+
3369    /// | 1 | Xmm, Mem |
3370    /// | 2 | Xmm, Xmm |
3371    /// +---+----------+
3372    /// ```
3373    #[inline]
3374    pub fn sse_mulss<A, B>(&mut self, op0: A, op1: B)
3375    where
3376        Assembler<'a>: SseMulssEmitter<A, B>,
3377    {
3378        <Self as SseMulssEmitter<A, B>>::sse_mulss(self, op0, op1);
3379    }
3380    /// `SSE_ORPS`.
3381    ///
3382    /// Supported operand variants:
3383    ///
3384    /// ```text
3385    /// +---+----------+
3386    /// | # | Operands |
3387    /// +---+----------+
3388    /// | 1 | Xmm, Mem |
3389    /// | 2 | Xmm, Xmm |
3390    /// +---+----------+
3391    /// ```
3392    #[inline]
3393    pub fn sse_orps<A, B>(&mut self, op0: A, op1: B)
3394    where
3395        Assembler<'a>: SseOrpsEmitter<A, B>,
3396    {
3397        <Self as SseOrpsEmitter<A, B>>::sse_orps(self, op0, op1);
3398    }
3399    /// `SSE_RCPPS`.
3400    ///
3401    /// Supported operand variants:
3402    ///
3403    /// ```text
3404    /// +---+----------+
3405    /// | # | Operands |
3406    /// +---+----------+
3407    /// | 1 | Xmm, Mem |
3408    /// | 2 | Xmm, Xmm |
3409    /// +---+----------+
3410    /// ```
3411    #[inline]
3412    pub fn sse_rcpps<A, B>(&mut self, op0: A, op1: B)
3413    where
3414        Assembler<'a>: SseRcppsEmitter<A, B>,
3415    {
3416        <Self as SseRcppsEmitter<A, B>>::sse_rcpps(self, op0, op1);
3417    }
3418    /// `SSE_RCPSS`.
3419    ///
3420    /// Supported operand variants:
3421    ///
3422    /// ```text
3423    /// +---+----------+
3424    /// | # | Operands |
3425    /// +---+----------+
3426    /// | 1 | Xmm, Mem |
3427    /// | 2 | Xmm, Xmm |
3428    /// +---+----------+
3429    /// ```
3430    #[inline]
3431    pub fn sse_rcpss<A, B>(&mut self, op0: A, op1: B)
3432    where
3433        Assembler<'a>: SseRcpssEmitter<A, B>,
3434    {
3435        <Self as SseRcpssEmitter<A, B>>::sse_rcpss(self, op0, op1);
3436    }
3437    /// `SSE_RSQRTPS`.
3438    ///
3439    /// Supported operand variants:
3440    ///
3441    /// ```text
3442    /// +---+----------+
3443    /// | # | Operands |
3444    /// +---+----------+
3445    /// | 1 | Xmm, Mem |
3446    /// | 2 | Xmm, Xmm |
3447    /// +---+----------+
3448    /// ```
3449    #[inline]
3450    pub fn sse_rsqrtps<A, B>(&mut self, op0: A, op1: B)
3451    where
3452        Assembler<'a>: SseRsqrtpsEmitter<A, B>,
3453    {
3454        <Self as SseRsqrtpsEmitter<A, B>>::sse_rsqrtps(self, op0, op1);
3455    }
3456    /// `SSE_RSQRTSS`.
3457    ///
3458    /// Supported operand variants:
3459    ///
3460    /// ```text
3461    /// +---+----------+
3462    /// | # | Operands |
3463    /// +---+----------+
3464    /// | 1 | Xmm, Mem |
3465    /// | 2 | Xmm, Xmm |
3466    /// +---+----------+
3467    /// ```
3468    #[inline]
3469    pub fn sse_rsqrtss<A, B>(&mut self, op0: A, op1: B)
3470    where
3471        Assembler<'a>: SseRsqrtssEmitter<A, B>,
3472    {
3473        <Self as SseRsqrtssEmitter<A, B>>::sse_rsqrtss(self, op0, op1);
3474    }
3475    /// `SSE_SHUFPS`.
3476    ///
3477    /// Supported operand variants:
3478    ///
3479    /// ```text
3480    /// +---+---------------+
3481    /// | # | Operands      |
3482    /// +---+---------------+
3483    /// | 1 | Xmm, Mem, Imm |
3484    /// | 2 | Xmm, Xmm, Imm |
3485    /// +---+---------------+
3486    /// ```
3487    #[inline]
3488    pub fn sse_shufps<A, B, C>(&mut self, op0: A, op1: B, op2: C)
3489    where
3490        Assembler<'a>: SseShufpsEmitter<A, B, C>,
3491    {
3492        <Self as SseShufpsEmitter<A, B, C>>::sse_shufps(self, op0, op1, op2);
3493    }
3494    /// `SSE_SQRTPS`.
3495    ///
3496    /// Supported operand variants:
3497    ///
3498    /// ```text
3499    /// +---+----------+
3500    /// | # | Operands |
3501    /// +---+----------+
3502    /// | 1 | Xmm, Mem |
3503    /// | 2 | Xmm, Xmm |
3504    /// +---+----------+
3505    /// ```
3506    #[inline]
3507    pub fn sse_sqrtps<A, B>(&mut self, op0: A, op1: B)
3508    where
3509        Assembler<'a>: SseSqrtpsEmitter<A, B>,
3510    {
3511        <Self as SseSqrtpsEmitter<A, B>>::sse_sqrtps(self, op0, op1);
3512    }
3513    /// `SSE_SQRTSS`.
3514    ///
3515    /// Supported operand variants:
3516    ///
3517    /// ```text
3518    /// +---+----------+
3519    /// | # | Operands |
3520    /// +---+----------+
3521    /// | 1 | Xmm, Mem |
3522    /// | 2 | Xmm, Xmm |
3523    /// +---+----------+
3524    /// ```
3525    #[inline]
3526    pub fn sse_sqrtss<A, B>(&mut self, op0: A, op1: B)
3527    where
3528        Assembler<'a>: SseSqrtssEmitter<A, B>,
3529    {
3530        <Self as SseSqrtssEmitter<A, B>>::sse_sqrtss(self, op0, op1);
3531    }
3532    /// `SSE_SUBPS`.
3533    ///
3534    /// Supported operand variants:
3535    ///
3536    /// ```text
3537    /// +---+----------+
3538    /// | # | Operands |
3539    /// +---+----------+
3540    /// | 1 | Xmm, Mem |
3541    /// | 2 | Xmm, Xmm |
3542    /// +---+----------+
3543    /// ```
3544    #[inline]
3545    pub fn sse_subps<A, B>(&mut self, op0: A, op1: B)
3546    where
3547        Assembler<'a>: SseSubpsEmitter<A, B>,
3548    {
3549        <Self as SseSubpsEmitter<A, B>>::sse_subps(self, op0, op1);
3550    }
3551    /// `SSE_SUBSS`.
3552    ///
3553    /// Supported operand variants:
3554    ///
3555    /// ```text
3556    /// +---+----------+
3557    /// | # | Operands |
3558    /// +---+----------+
3559    /// | 1 | Xmm, Mem |
3560    /// | 2 | Xmm, Xmm |
3561    /// +---+----------+
3562    /// ```
3563    #[inline]
3564    pub fn sse_subss<A, B>(&mut self, op0: A, op1: B)
3565    where
3566        Assembler<'a>: SseSubssEmitter<A, B>,
3567    {
3568        <Self as SseSubssEmitter<A, B>>::sse_subss(self, op0, op1);
3569    }
3570    /// `SSE_UCOMISS`.
3571    ///
3572    /// Supported operand variants:
3573    ///
3574    /// ```text
3575    /// +---+----------+
3576    /// | # | Operands |
3577    /// +---+----------+
3578    /// | 1 | Xmm, Mem |
3579    /// | 2 | Xmm, Xmm |
3580    /// +---+----------+
3581    /// ```
3582    #[inline]
3583    pub fn sse_ucomiss<A, B>(&mut self, op0: A, op1: B)
3584    where
3585        Assembler<'a>: SseUcomissEmitter<A, B>,
3586    {
3587        <Self as SseUcomissEmitter<A, B>>::sse_ucomiss(self, op0, op1);
3588    }
3589    /// `SSE_UNPCKHPS`.
3590    ///
3591    /// Supported operand variants:
3592    ///
3593    /// ```text
3594    /// +---+----------+
3595    /// | # | Operands |
3596    /// +---+----------+
3597    /// | 1 | Xmm, Mem |
3598    /// | 2 | Xmm, Xmm |
3599    /// +---+----------+
3600    /// ```
3601    #[inline]
3602    pub fn sse_unpckhps<A, B>(&mut self, op0: A, op1: B)
3603    where
3604        Assembler<'a>: SseUnpckhpsEmitter<A, B>,
3605    {
3606        <Self as SseUnpckhpsEmitter<A, B>>::sse_unpckhps(self, op0, op1);
3607    }
3608    /// `SSE_UNPCKLPS`.
3609    ///
3610    /// Supported operand variants:
3611    ///
3612    /// ```text
3613    /// +---+----------+
3614    /// | # | Operands |
3615    /// +---+----------+
3616    /// | 1 | Xmm, Mem |
3617    /// | 2 | Xmm, Xmm |
3618    /// +---+----------+
3619    /// ```
3620    #[inline]
3621    pub fn sse_unpcklps<A, B>(&mut self, op0: A, op1: B)
3622    where
3623        Assembler<'a>: SseUnpcklpsEmitter<A, B>,
3624    {
3625        <Self as SseUnpcklpsEmitter<A, B>>::sse_unpcklps(self, op0, op1);
3626    }
3627    /// `SSE_XORPS`.
3628    ///
3629    /// Supported operand variants:
3630    ///
3631    /// ```text
3632    /// +---+----------+
3633    /// | # | Operands |
3634    /// +---+----------+
3635    /// | 1 | Xmm, Mem |
3636    /// | 2 | Xmm, Xmm |
3637    /// +---+----------+
3638    /// ```
3639    #[inline]
3640    pub fn sse_xorps<A, B>(&mut self, op0: A, op1: B)
3641    where
3642        Assembler<'a>: SseXorpsEmitter<A, B>,
3643    {
3644        <Self as SseXorpsEmitter<A, B>>::sse_xorps(self, op0, op1);
3645    }
3646    /// `STMXCSR`.
3647    ///
3648    /// Supported operand variants:
3649    ///
3650    /// ```text
3651    /// +---+----------+
3652    /// | # | Operands |
3653    /// +---+----------+
3654    /// | 1 | Mem      |
3655    /// +---+----------+
3656    /// ```
3657    #[inline]
3658    pub fn stmxcsr<A>(&mut self, op0: A)
3659    where
3660        Assembler<'a>: StmxcsrEmitter<A>,
3661    {
3662        <Self as StmxcsrEmitter<A>>::stmxcsr(self, op0);
3663    }
3664}
asmkit/x86/features/SSE.rs

asmkit/x86/features/
SSE.rs
