asmkit/x86/features/
PCLMULQDQ.rs

1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7/// A dummy operand that represents no register. Here just for simplicity.
8const NOREG: Operand = Operand::new();
9
10/// `SSE_PCLMULQDQ`.
11///
12/// Supported operand variants:
13///
14/// ```text
15/// +---+---------------+
16/// | # | Operands      |
17/// +---+---------------+
18/// | 1 | Xmm, Mem, Imm |
19/// | 2 | Xmm, Xmm, Imm |
20/// +---+---------------+
21/// ```
22pub trait SsePclmulqdqEmitter<A, B, C> {
23    fn sse_pclmulqdq(&mut self, op0: A, op1: B, op2: C);
24}
25
26impl<'a> SsePclmulqdqEmitter<Xmm, Xmm, Imm> for Assembler<'a> {
27    fn sse_pclmulqdq(&mut self, op0: Xmm, op1: Xmm, op2: Imm) {
28        self.emit(
29            SSE_PCLMULQDQRRI,
30            op0.as_operand(),
31            op1.as_operand(),
32            op2.as_operand(),
33            &NOREG,
34        );
35    }
36}
37
38impl<'a> SsePclmulqdqEmitter<Xmm, Mem, Imm> for Assembler<'a> {
39    fn sse_pclmulqdq(&mut self, op0: Xmm, op1: Mem, op2: Imm) {
40        self.emit(
41            SSE_PCLMULQDQRMI,
42            op0.as_operand(),
43            op1.as_operand(),
44            op2.as_operand(),
45            &NOREG,
46        );
47    }
48}
49
50impl<'a> Assembler<'a> {
51    /// `SSE_PCLMULQDQ`.
52    ///
53    /// Supported operand variants:
54    ///
55    /// ```text
56    /// +---+---------------+
57    /// | # | Operands      |
58    /// +---+---------------+
59    /// | 1 | Xmm, Mem, Imm |
60    /// | 2 | Xmm, Xmm, Imm |
61    /// +---+---------------+
62    /// ```
63    #[inline]
64    pub fn sse_pclmulqdq<A, B, C>(&mut self, op0: A, op1: B, op2: C)
65    where
66        Assembler<'a>: SsePclmulqdqEmitter<A, B, C>,
67    {
68        <Self as SsePclmulqdqEmitter<A, B, C>>::sse_pclmulqdq(self, op0, op1, op2);
69    }
70}
asmkit/x86/features/PCLMULQDQ.rs

asmkit/x86/features/
PCLMULQDQ.rs
