asmkit/x86/features/
MSR_IMM.rs1use super::super::opcodes::*;
2use crate::core::emitter::*;
3use crate::core::operand::*;
4use crate::x86::assembler::*;
5use crate::x86::operands::*;
6
7const NOREG: Operand = Operand::new();
9
10pub trait RdmsrEmitter_2<A, B> {
22 fn rdmsr_2(&mut self, op0: A, op1: B);
23}
24
25impl<'a> RdmsrEmitter_2<Gpd, Imm> for Assembler<'a> {
26 fn rdmsr_2(&mut self, op0: Gpd, op1: Imm) {
27 self.emit(RDMSRRI, op0.as_operand(), op1.as_operand(), &NOREG, &NOREG);
28 }
29}
30
31pub trait WrmsrnsEmitter_2<A, B> {
43 fn wrmsrns_2(&mut self, op0: A, op1: B);
44}
45
46impl<'a> WrmsrnsEmitter_2<Imm, Gpd> for Assembler<'a> {
47 fn wrmsrns_2(&mut self, op0: Imm, op1: Gpd) {
48 self.emit(
49 WRMSRNSIR,
50 op0.as_operand(),
51 op1.as_operand(),
52 &NOREG,
53 &NOREG,
54 );
55 }
56}
57
58impl<'a> Assembler<'a> {
59 #[inline]
71 pub fn rdmsr_2<A, B>(&mut self, op0: A, op1: B)
72 where
73 Assembler<'a>: RdmsrEmitter_2<A, B>,
74 {
75 <Self as RdmsrEmitter_2<A, B>>::rdmsr_2(self, op0, op1);
76 }
77 #[inline]
89 pub fn wrmsrns_2<A, B>(&mut self, op0: A, op1: B)
90 where
91 Assembler<'a>: WrmsrnsEmitter_2<A, B>,
92 {
93 <Self as WrmsrnsEmitter_2<A, B>>::wrmsrns_2(self, op0, op1);
94 }
95}