arm64utils/
lib.rs

1#![allow(unused, non_snake_case)]
2#![allow(clippy::many_single_char_names)]
3#![allow(clippy::no_effect)]
4#![no_std]
5
6pub mod instruction;
7use crate::instruction::InstructionKind;
8
9pub const fn decode_root(d: u32) -> Option<InstructionKind> {
10    let op0 = (d >> 25) & 0xF;
11    if (d & 0x0e000000) == 0x0a000000 {
12        return decode_dataproc_register(d);
13    }
14    if (d & 0x0e000000) == 0x0e000000 {
15        return decode_dataproc_simd(d);
16    }
17    if (d & 0x1c000000) == 0x10000000 {
18        return decode_dataproc_immediate(d);
19    }
20    if (d & 0x1c000000) == 0x14000000 {
21        return decode_branch_and_sys(d);
22    }
23    if (d & 0x0a000000) == 0x08000000 {
24        return decode_load_and_store(d);
25    }
26    None
27}
28
29pub const fn decode_dataproc_immediate(d: u32) -> Option<InstructionKind> {
30    ["Could not decode."][((d & 0x1c000000) != 0x10000000) as usize];
31    let op0 = (d >> 23) & 7;
32    if (d & 0x1f800000) == 0x12000000 {
33        return decode_log_imm(d);
34    }
35    if (d & 0x1f800000) == 0x12800000 {
36        return decode_movewide(d);
37    }
38    if (d & 0x1f800000) == 0x13000000 {
39        return decode_bitfield(d);
40    }
41    if (d & 0x1f800000) == 0x13800000 {
42        return decode_extract(d);
43    }
44    if (d & 0x1f000000) == 0x10000000 {
45        return decode_pcreladdr(d);
46    }
47    if (d & 0x1f000000) == 0x11000000 {
48        return decode_addsub_imm(d);
49    }
50    None
51}
52
53pub const fn decode_branch_and_sys(d: u32) -> Option<InstructionKind> {
54    ["Could not decode."][((d & 0x1c000000) != 0x14000000) as usize];
55    let op0 = (d >> 29) & 7;
56    let op1 = (d >> 22) & 0xF;
57    if (d & 0xffc00000) == 0xd5000000 {
58        return decode_system(d);
59    }
60    if (d & 0xff000000) == 0xd4000000 {
61        return decode_exception(d);
62    }
63    if (d & 0xfe000000) == 0x54000000 {
64        return decode_condbranch(d);
65    }
66    if (d & 0xfe000000) == 0xd6000000 {
67        return decode_branch_reg(d);
68    }
69    if (d & 0x7e000000) == 0x34000000 {
70        return decode_compbranch(d);
71    }
72    if (d & 0x7e000000) == 0x36000000 {
73        return decode_testbranch(d);
74    }
75    if (d & 0x7c000000) == 0x14000000 {
76        return decode_branch_imm(d);
77    }
78    None
79}
80
81pub const fn decode_load_and_store(d: u32) -> Option<InstructionKind> {
82    ["Could not decode."][((d & 0x0a000000) != 0x08000000) as usize];
83    let op0 = (d >> 31) & 1;
84    let op1 = (d >> 28) & 3;
85    let op2 = (d >> 26) & 1;
86    let op3 = (d >> 23) & 3;
87    let op4 = (d >> 16) & 0x3F;
88    let op5 = (d >> 10) & 3;
89    if (d & 0xbfbf0000) == 0x0c000000 {
90        return decode_asisdlse(d);
91    }
92    if (d & 0xbf9f0000) == 0x0d000000 {
93        return decode_asisdlso(d);
94    }
95    if (d & 0xbfa00000) == 0x0c800000 {
96        return decode_asisdlsep(d);
97    }
98    if (d & 0x3b200c00) == 0x38000000 {
99        return decode_ldst_unscaled(d);
100    }
101    if (d & 0x3b200c00) == 0x38000400 {
102        return decode_ldst_immpost(d);
103    }
104    if (d & 0x3b200c00) == 0x38000800 {
105        return decode_ldst_unpriv(d);
106    }
107    if (d & 0x3b200c00) == 0x38000c00 {
108        return decode_ldst_immpre(d);
109    }
110    if (d & 0x3b200c00) == 0x38200000 {
111        return decode_memop(d);
112    }
113    if (d & 0x3b200c00) == 0x38200800 {
114        return decode_ldst_regoff(d);
115    }
116    if (d & 0xbf800000) == 0x0d800000 {
117        return decode_asisdlsop(d);
118    }
119    if (d & 0x3b200400) == 0x38200400 {
120        return decode_ldst_pac(d);
121    }
122    if (d & 0x3b800000) == 0x28000000 {
123        return decode_ldstnapair_offs(d);
124    }
125    if (d & 0x3b800000) == 0x28800000 {
126        return decode_ldstpair_post(d);
127    }
128    if (d & 0x3b800000) == 0x29000000 {
129        return decode_ldstpair_off(d);
130    }
131    if (d & 0x3b800000) == 0x29800000 {
132        return decode_ldstpair_pre(d);
133    }
134    if (d & 0x3f000000) == 0x08000000 {
135        return decode_ldstexcl(d);
136    }
137    if (d & 0x3b000000) == 0x18000000 {
138        return decode_loadlit(d);
139    }
140    if (d & 0x3b000000) == 0x39000000 {
141        return decode_ldst_pos(d);
142    }
143    None
144}
145
146pub const fn decode_dataproc_register(d: u32) -> Option<InstructionKind> {
147    ["Could not decode."][((d & 0x0e000000) != 0x0a000000) as usize];
148    let op0 = (d >> 30) & 1;
149    let op1 = (d >> 28) & 1;
150    let op2 = (d >> 21) & 0xF;
151    let op3 = (d >> 11) & 1;
152    if (d & 0x1fe00800) == 0x1a400000 {
153        return decode_condcmp_reg(d);
154    }
155    if (d & 0x1fe00800) == 0x1a400800 {
156        return decode_condcmp_imm(d);
157    }
158    if (d & 0x5fe00000) == 0x1ac00000 {
159        return decode_dp_2src(d);
160    }
161    if (d & 0x5fe00000) == 0x5ac00000 {
162        return decode_dp_1src(d);
163    }
164    if (d & 0x1fe00000) == 0x1a000000 {
165        return decode_addsub_carry(d);
166    }
167    if (d & 0x1fe00000) == 0x1a800000 {
168        return decode_condsel(d);
169    }
170    if (d & 0x1f200000) == 0x0b000000 {
171        return decode_addsub_shift(d);
172    }
173    if (d & 0x1f200000) == 0x0b200000 {
174        return decode_addsub_ext(d);
175    }
176    if (d & 0x1f000000) == 0x0a000000 {
177        return decode_log_shift(d);
178    }
179    if (d & 0x1f000000) == 0x1b000000 {
180        return decode_dp_3src(d);
181    }
182    None
183}
184
185pub const fn decode_dataproc_simd(d: u32) -> Option<InstructionKind> {
186    ["Could not decode."][((d & 0x0e000000) != 0x0e000000) as usize];
187    let op0 = (d >> 28) & 0xF;
188    let op1 = (d >> 23) & 3;
189    let op2 = (d >> 19) & 0xF;
190    let op3 = (d >> 10) & 0x1FF;
191    if (d & 0xfffff000) == 0xcec08000 {
192        return decode_cryptosha512_2(d);
193    }
194    if (d & 0xdf7e0c00) == 0x5e780800 {
195        return decode_asisdmiscfp16(d);
196    }
197    if (d & 0xff3e0c00) == 0x4e280800 {
198        return decode_cryptoaes(d);
199    }
200    if (d & 0xff3e0c00) == 0x5e280800 {
201        return decode_cryptosha2(d);
202    }
203    if (d & 0x9f7e0c00) == 0x0e780800 {
204        return decode_asimdmiscfp16(d);
205    }
206    if (d & 0xdf3e0c00) == 0x5e200800 {
207        return decode_asisdmisc(d);
208    }
209    if (d & 0xdf3e0c00) == 0x5e300800 {
210        return decode_asisdpair(d);
211    }
212    if (d & 0xffe0b000) == 0xce608000 {
213        return decode_cryptosha512_3(d);
214    }
215    if (d & 0x5f20fc00) == 0x1e200000 {
216        return decode_float2int(d);
217    }
218    if (d & 0x9f3e0c00) == 0x0e200800 {
219        return decode_asimdmisc(d);
220    }
221    if (d & 0x9f3e0c00) == 0x0e300800 {
222        return decode_asimdall(d);
223    }
224    if (d & 0xffe0c000) == 0xce408000 {
225        return decode_crypto3_imm2(d);
226    }
227    if (d & 0x5f207c00) == 0x1e204000 {
228        return decode_floatdp1(d);
229    }
230    if (d & 0x9ff80400) == 0x0f000400 {
231        return decode_asimdimm(d);
232    }
233    if (d & 0xdf60c400) == 0x5e400400 {
234        return decode_asisdsamefp16(d);
235    }
236    if (d & 0xdfe08400) == 0x5e000400 {
237        return decode_asisdone(d);
238    }
239    if (d & 0xff208c00) == 0x5e000000 {
240        return decode_cryptosha3(d);
241    }
242    if (d & 0x5f203c00) == 0x1e202000 {
243        return decode_floatcmp(d);
244    }
245    if (d & 0x9f60c400) == 0x0e400400 {
246        return decode_asimdsamefp16(d);
247    }
248    if (d & 0x9fe08400) == 0x0e000400 {
249        return decode_asimdins(d);
250    }
251    if (d & 0xbf208c00) == 0x0e000000 {
252        return decode_asimdtbl(d);
253    }
254    if (d & 0xbf208c00) == 0x0e000800 {
255        return decode_asimdperm(d);
256    }
257    if (d & 0xffe00000) == 0xce800000 {
258        return decode_crypto3_imm6(d);
259    }
260    if (d & 0x5f201c00) == 0x1e201000 {
261        return decode_floatimm(d);
262    }
263    if (d & 0xbf208400) == 0x2e000000 {
264        return decode_asimdext(d);
265    }
266    if (d & 0xdf200c00) == 0x5e200000 {
267        return decode_asisddiff(d);
268    }
269    if (d & 0xdf208400) == 0x5e008400 {
270        return decode_asisdsame2(d);
271    }
272    if (d & 0xff808000) == 0xce000000 {
273        return decode_crypto4(d);
274    }
275    if (d & 0x5f200c00) == 0x1e200400 {
276        return decode_floatccmp(d);
277    }
278    if (d & 0x5f200c00) == 0x1e200800 {
279        return decode_floatdp2(d);
280    }
281    if (d & 0x5f200c00) == 0x1e200c00 {
282        return decode_floatsel(d);
283    }
284    if (d & 0x9f200c00) == 0x0e200000 {
285        return decode_asimddiff(d);
286    }
287    if (d & 0x9f208400) == 0x0e008400 {
288        return decode_asimdsame2(d);
289    }
290    if (d & 0xdf200400) == 0x5e200400 {
291        return decode_asisdsame(d);
292    }
293    if (d & 0xdf800400) == 0x5f000400 {
294        return decode_asisdshf(d);
295    }
296    if (d & 0x9f200400) == 0x0e200400 {
297        return decode_asimdsame(d);
298    }
299    if (d & 0xdf000400) == 0x5f000000 {
300        return decode_asisdelem(d);
301    }
302    if (d & 0x5f200000) == 0x1e000000 {
303        return decode_float2fix(d);
304    }
305    if (d & 0x9f000400) == 0x0f000000 {
306        return decode_asimdelem(d);
307    }
308    if (d & 0x5f000000) == 0x1f000000 {
309        return decode_floatdp3(d);
310    }
311    if (d & 0x9f800400) == 0x0f000400 && (d & 0x780000) != 0x000000 {
312        return decode_asimdshf(d);
313    }
314    None
315}
316
317pub const fn decode_compbranch(d: u32) -> Option<InstructionKind> {
318    ["Could not decode."][((d & 0x7e000000) != 0x34000000) as usize];
319    let Rt = d & 0x1F;
320    let imm19 = (d >> 5) & 0x7FFFF;
321    let op = (d >> 24) & 1;
322    let sf = (d >> 31) & 1;
323    if (d & 0xff000000) == 0x34000000 {
324        return Some(InstructionKind::CBZ32Compbranch {
325            Rt: Rt as _,
326            imm19: imm19 as _,
327        });
328    }
329    if (d & 0xff000000) == 0x35000000 {
330        return Some(InstructionKind::CBNZ32Compbranch {
331            Rt: Rt as _,
332            imm19: imm19 as _,
333        });
334    }
335    if (d & 0xff000000) == 0xb4000000 {
336        return Some(InstructionKind::CBZ64Compbranch {
337            Rt: Rt as _,
338            imm19: imm19 as _,
339        });
340    }
341    if (d & 0xff000000) == 0xb5000000 {
342        return Some(InstructionKind::CBNZ64Compbranch {
343            Rt: Rt as _,
344            imm19: imm19 as _,
345        });
346    }
347    None
348}
349
350pub const fn decode_condbranch(d: u32) -> Option<InstructionKind> {
351    ["Could not decode."][((d & 0xfe000000) != 0x54000000) as usize];
352    let cond = d & 0xF;
353    let imm19 = (d >> 5) & 0x7FFFF;
354    let o0 = (d >> 4) & 1;
355    let o1 = (d >> 24) & 1;
356    if (d & 0xff000010) == 0x54000000 {
357        return Some(InstructionKind::BOnlyCondbranch {
358            cond: cond as _,
359            imm19: imm19 as _,
360        });
361    }
362    None
363}
364
365pub const fn decode_exception(d: u32) -> Option<InstructionKind> {
366    ["Could not decode."][((d & 0xff000000) != 0xd4000000) as usize];
367    let LL = d & 3;
368    let imm16 = (d >> 5) & 0xFFFF;
369    let op2 = (d >> 2) & 7;
370    let opc = (d >> 21) & 7;
371    if (d & 0xffe0001f) == 0xd4000001 {
372        return Some(InstructionKind::SVCExException { imm16: imm16 as _ });
373    }
374    if (d & 0xffe0001f) == 0xd4000002 {
375        return Some(InstructionKind::HVCExException { imm16: imm16 as _ });
376    }
377    if (d & 0xffe0001f) == 0xd4000003 {
378        return Some(InstructionKind::SMCExException { imm16: imm16 as _ });
379    }
380    if (d & 0xffe0001f) == 0xd4200000 {
381        return Some(InstructionKind::BRKExException { imm16: imm16 as _ });
382    }
383    if (d & 0xffe0001f) == 0xd4400000 {
384        return Some(InstructionKind::HLTExException { imm16: imm16 as _ });
385    }
386    if (d & 0xffe0001f) == 0xd4a00001 {
387        return Some(InstructionKind::DCPS1DcException { imm16: imm16 as _ });
388    }
389    if (d & 0xffe0001f) == 0xd4a00002 {
390        return Some(InstructionKind::DCPS2DcException { imm16: imm16 as _ });
391    }
392    if (d & 0xffe0001f) == 0xd4a00003 {
393        return Some(InstructionKind::DCPS3DcException { imm16: imm16 as _ });
394    }
395    None
396}
397
398pub const fn decode_system(d: u32) -> Option<InstructionKind> {
399    ["Could not decode."][((d & 0xffc00000) != 0xd5000000) as usize];
400    let CRm = (d >> 8) & 0xF;
401    let CRn = (d >> 12) & 0xF;
402    let L = (d >> 21) & 1;
403    let Rt = d & 0x1F;
404    let op0 = (d >> 19) & 3;
405    let op1 = (d >> 16) & 7;
406    let op2 = (d >> 5) & 7;
407    if d == 0xd503201f {
408        return Some(InstructionKind::NOPHiSystem);
409    }
410    if d == 0xd503203f {
411        return Some(InstructionKind::YIELDHiSystem);
412    }
413    if d == 0xd503205f {
414        return Some(InstructionKind::WFEHiSystem);
415    }
416    if d == 0xd503207f {
417        return Some(InstructionKind::WFIHiSystem);
418    }
419    if d == 0xd503209f {
420        return Some(InstructionKind::SEVHiSystem);
421    }
422    if d == 0xd50320bf {
423        return Some(InstructionKind::SEVLHiSystem);
424    }
425    if d == 0xd50320ff {
426        return Some(InstructionKind::XPACLRIHiSystem);
427    }
428    if d == 0xd503211f {
429        return Some(InstructionKind::PACIA1716HiSystem);
430    }
431    if d == 0xd503215f {
432        return Some(InstructionKind::PACIB1716HiSystem);
433    }
434    if d == 0xd503219f {
435        return Some(InstructionKind::AUTIA1716HiSystem);
436    }
437    if d == 0xd50321df {
438        return Some(InstructionKind::AUTIB1716HiSystem);
439    }
440    if d == 0xd503221f {
441        return Some(InstructionKind::ESBHiSystem);
442    }
443    if d == 0xd503223f {
444        return Some(InstructionKind::PSBHcSystem);
445    }
446    if d == 0xd503231f {
447        return Some(InstructionKind::PACIAZHiSystem);
448    }
449    if d == 0xd503233f {
450        return Some(InstructionKind::PACIASPHiSystem);
451    }
452    if d == 0xd503235f {
453        return Some(InstructionKind::PACIBZHiSystem);
454    }
455    if d == 0xd503237f {
456        return Some(InstructionKind::PACIBSPHiSystem);
457    }
458    if d == 0xd503239f {
459        return Some(InstructionKind::AUTIAZHiSystem);
460    }
461    if d == 0xd50323bf {
462        return Some(InstructionKind::AUTIASPHiSystem);
463    }
464    if d == 0xd50323df {
465        return Some(InstructionKind::AUTIBZHiSystem);
466    }
467    if d == 0xd50323ff {
468        return Some(InstructionKind::AUTIBSPHiSystem);
469    }
470    if (d & 0xffffffdf) == 0xd50320df {
471        return Some(InstructionKind::HINT1 { op2: op2 as _ });
472    }
473    if (d & 0xfffff0ff) == 0xd503305f {
474        return Some(InstructionKind::CLREXBnSystem { CRm: CRm as _ });
475    }
476    if (d & 0xfffff0ff) == 0xd503309f {
477        return Some(InstructionKind::DSBBoSystem { CRm: CRm as _ });
478    }
479    if (d & 0xfffff0ff) == 0xd50330bf {
480        return Some(InstructionKind::DMBBoSystem { CRm: CRm as _ });
481    }
482    if (d & 0xfffff0ff) == 0xd50330df {
483        return Some(InstructionKind::ISBBiSystem { CRm: CRm as _ });
484    }
485    if (d & 0xfff8f01f) == 0xd500401f {
486        return Some(InstructionKind::MSRSiSystem {
487            CRm: CRm as _,
488            op1: op1 as _,
489            op2: op2 as _,
490        });
491    }
492    if (d & 0xfff80000) == 0xd5080000 {
493        return Some(InstructionKind::SYSCrSystem {
494            CRm: CRm as _,
495            CRn: CRn as _,
496            Rt: Rt as _,
497            op1: op1 as _,
498            op2: op2 as _,
499        });
500    }
501    if (d & 0xfff80000) == 0xd5280000 {
502        return Some(InstructionKind::SYSLRcSystem {
503            CRm: CRm as _,
504            CRn: CRn as _,
505            Rt: Rt as _,
506            op1: op1 as _,
507            op2: op2 as _,
508        });
509    }
510    if (d & 0xfff00000) == 0xd5100000 {
511        return Some(InstructionKind::MSRSrSystem {
512            CRm: CRm as _,
513            CRn: CRn as _,
514            Rt: Rt as _,
515            op0: op0 as _,
516            op1: op1 as _,
517            op2: op2 as _,
518        });
519    }
520    if (d & 0xfff00000) == 0xd5300000 {
521        return Some(InstructionKind::MRSRsSystem {
522            CRm: CRm as _,
523            CRn: CRn as _,
524            Rt: Rt as _,
525            op0: op0 as _,
526            op1: op1 as _,
527            op2: op2 as _,
528        });
529    }
530    if (d & 0xffffff1f) == 0xd503221f && (d & 0x0000c0) != 0x000000 {
531        return Some(InstructionKind::HINT3 { op2: op2 as _ });
532    }
533    if (d & 0xfffff01f) == 0xd503201f && (d & 0x000d00) != 0x000000 {
534        return Some(InstructionKind::HINT2 {
535            CRm: CRm as _,
536            op2: op2 as _,
537        });
538    }
539    None
540}
541
542pub const fn decode_testbranch(d: u32) -> Option<InstructionKind> {
543    ["Could not decode."][((d & 0x7e000000) != 0x36000000) as usize];
544    let Rt = d & 0x1F;
545    let b40 = (d >> 19) & 0x1F;
546    let b5 = (d >> 31) & 1;
547    let imm14 = (d >> 5) & 0x3FFF;
548    let op = (d >> 24) & 1;
549    if (d & 0x7f000000) == 0x36000000 {
550        return Some(InstructionKind::TBZOnlyTestbranch {
551            Rt: Rt as _,
552            b40: b40 as _,
553            b5: b5 as _,
554            imm14: imm14 as _,
555        });
556    }
557    if (d & 0x7f000000) == 0x37000000 {
558        return Some(InstructionKind::TBNZOnlyTestbranch {
559            Rt: Rt as _,
560            b40: b40 as _,
561            b5: b5 as _,
562            imm14: imm14 as _,
563        });
564    }
565    None
566}
567
568pub const fn decode_branch_imm(d: u32) -> Option<InstructionKind> {
569    ["Could not decode."][((d & 0x7c000000) != 0x14000000) as usize];
570    let imm26 = d & 0x3FFFFFF;
571    let op = (d >> 31) & 1;
572    if (d & 0xfc000000) == 0x14000000 {
573        return Some(InstructionKind::BOnlyBranchImm { imm26: imm26 as _ });
574    }
575    if (d & 0xfc000000) == 0x94000000 {
576        return Some(InstructionKind::BLOnlyBranchImm { imm26: imm26 as _ });
577    }
578    None
579}
580
581pub const fn decode_branch_reg(d: u32) -> Option<InstructionKind> {
582    ["Could not decode."][((d & 0xfe000000) != 0xd6000000) as usize];
583    let Rn = (d >> 5) & 0x1F;
584    let op2 = (d >> 16) & 0x1F;
585    let op3 = (d >> 10) & 0x3F;
586    let op4 = d & 0x1F;
587    let opc = (d >> 21) & 0xF;
588    if d == 0xd65f0bff {
589        return Some(InstructionKind::RETAA64EBranchReg);
590    }
591    if d == 0xd65f0fff {
592        return Some(InstructionKind::RETAB64EBranchReg);
593    }
594    if d == 0xd69f03e0 {
595        return Some(InstructionKind::ERET64EBranchReg);
596    }
597    if d == 0xd69f0bff {
598        return Some(InstructionKind::ERETAA64EBranchReg);
599    }
600    if d == 0xd69f0fff {
601        return Some(InstructionKind::ERETAB64EBranchReg);
602    }
603    if d == 0xd6bf03e0 {
604        return Some(InstructionKind::DRPS64EBranchReg);
605    }
606    if (d & 0xfffffc1f) == 0xd61f0000 {
607        return Some(InstructionKind::BR64BranchReg { Rn: Rn as _ });
608    }
609    if (d & 0xfffffc1f) == 0xd61f081f {
610        return Some(InstructionKind::BRAAZ64BranchReg { Rn: Rn as _ });
611    }
612    if (d & 0xfffffc1f) == 0xd61f0c1f {
613        return Some(InstructionKind::BRABZ64BranchReg { Rn: Rn as _ });
614    }
615    if (d & 0xfffffc1f) == 0xd63f0000 {
616        return Some(InstructionKind::BLR64BranchReg { Rn: Rn as _ });
617    }
618    if (d & 0xfffffc1f) == 0xd63f081f {
619        return Some(InstructionKind::BLRAAZ64BranchReg { Rn: Rn as _ });
620    }
621    if (d & 0xfffffc1f) == 0xd63f0c1f {
622        return Some(InstructionKind::BLRABZ64BranchReg { Rn: Rn as _ });
623    }
624    if (d & 0xfffffc1f) == 0xd65f0000 {
625        return Some(InstructionKind::RET64RBranchReg { Rn: Rn as _ });
626    }
627    if (d & 0xfffffc00) == 0xd71f0800 {
628        return Some(InstructionKind::BRAA64PBranchReg {
629            Rn: Rn as _,
630            op4: op4 as _,
631        });
632    }
633    if (d & 0xfffffc00) == 0xd71f0c00 {
634        return Some(InstructionKind::BRAB64PBranchReg {
635            Rn: Rn as _,
636            op4: op4 as _,
637        });
638    }
639    if (d & 0xfffffc00) == 0xd73f0800 {
640        return Some(InstructionKind::BLRAA64PBranchReg {
641            Rn: Rn as _,
642            op4: op4 as _,
643        });
644    }
645    if (d & 0xfffffc00) == 0xd73f0c00 {
646        return Some(InstructionKind::BLRAB64PBranchReg {
647            Rn: Rn as _,
648            op4: op4 as _,
649        });
650    }
651    None
652}
653
654pub const fn decode_asisdlse(d: u32) -> Option<InstructionKind> {
655    ["Could not decode."][((d & 0xbfbf0000) != 0x0c000000) as usize];
656    let L = (d >> 22) & 1;
657    let Q = (d >> 30) & 1;
658    let Rn = (d >> 5) & 0x1F;
659    let Rt = d & 0x1F;
660    let opcode = (d >> 12) & 0xF;
661    let size = (d >> 10) & 3;
662    if (d & 0xbffff000) == 0x0c000000 {
663        return Some(InstructionKind::ST4AsisdlseR4 {
664            Q: Q as _,
665            Rn: Rn as _,
666            Rt: Rt as _,
667            size: size as _,
668        });
669    }
670    if (d & 0xbffff000) == 0x0c002000 {
671        return Some(InstructionKind::ST1AsisdlseR44V {
672            Q: Q as _,
673            Rn: Rn as _,
674            Rt: Rt as _,
675            size: size as _,
676        });
677    }
678    if (d & 0xbffff000) == 0x0c004000 {
679        return Some(InstructionKind::ST3AsisdlseR3 {
680            Q: Q as _,
681            Rn: Rn as _,
682            Rt: Rt as _,
683            size: size as _,
684        });
685    }
686    if (d & 0xbffff000) == 0x0c006000 {
687        return Some(InstructionKind::ST1AsisdlseR33V {
688            Q: Q as _,
689            Rn: Rn as _,
690            Rt: Rt as _,
691            size: size as _,
692        });
693    }
694    if (d & 0xbffff000) == 0x0c007000 {
695        return Some(InstructionKind::ST1AsisdlseR11V {
696            Q: Q as _,
697            Rn: Rn as _,
698            Rt: Rt as _,
699            size: size as _,
700        });
701    }
702    if (d & 0xbffff000) == 0x0c008000 {
703        return Some(InstructionKind::ST2AsisdlseR2 {
704            Q: Q as _,
705            Rn: Rn as _,
706            Rt: Rt as _,
707            size: size as _,
708        });
709    }
710    if (d & 0xbffff000) == 0x0c00a000 {
711        return Some(InstructionKind::ST1AsisdlseR22V {
712            Q: Q as _,
713            Rn: Rn as _,
714            Rt: Rt as _,
715            size: size as _,
716        });
717    }
718    if (d & 0xbffff000) == 0x0c400000 {
719        return Some(InstructionKind::LD4AsisdlseR4 {
720            Q: Q as _,
721            Rn: Rn as _,
722            Rt: Rt as _,
723            size: size as _,
724        });
725    }
726    if (d & 0xbffff000) == 0x0c402000 {
727        return Some(InstructionKind::LD1AsisdlseR44V {
728            Q: Q as _,
729            Rn: Rn as _,
730            Rt: Rt as _,
731            size: size as _,
732        });
733    }
734    if (d & 0xbffff000) == 0x0c404000 {
735        return Some(InstructionKind::LD3AsisdlseR3 {
736            Q: Q as _,
737            Rn: Rn as _,
738            Rt: Rt as _,
739            size: size as _,
740        });
741    }
742    if (d & 0xbffff000) == 0x0c406000 {
743        return Some(InstructionKind::LD1AsisdlseR33V {
744            Q: Q as _,
745            Rn: Rn as _,
746            Rt: Rt as _,
747            size: size as _,
748        });
749    }
750    if (d & 0xbffff000) == 0x0c407000 {
751        return Some(InstructionKind::LD1AsisdlseR11V {
752            Q: Q as _,
753            Rn: Rn as _,
754            Rt: Rt as _,
755            size: size as _,
756        });
757    }
758    if (d & 0xbffff000) == 0x0c408000 {
759        return Some(InstructionKind::LD2AsisdlseR2 {
760            Q: Q as _,
761            Rn: Rn as _,
762            Rt: Rt as _,
763            size: size as _,
764        });
765    }
766    if (d & 0xbffff000) == 0x0c40a000 {
767        return Some(InstructionKind::LD1AsisdlseR22V {
768            Q: Q as _,
769            Rn: Rn as _,
770            Rt: Rt as _,
771            size: size as _,
772        });
773    }
774    None
775}
776
777pub const fn decode_asisdlsep(d: u32) -> Option<InstructionKind> {
778    ["Could not decode."][((d & 0xbfa00000) != 0x0c800000) as usize];
779    let L = (d >> 22) & 1;
780    let Q = (d >> 30) & 1;
781    let Rm = (d >> 16) & 0x1F;
782    let Rn = (d >> 5) & 0x1F;
783    let Rt = d & 0x1F;
784    let opcode = (d >> 12) & 0xF;
785    let size = (d >> 10) & 3;
786    if (d & 0xbffff000) == 0x0c9f0000 {
787        return Some(InstructionKind::ST4AsisdlsepI4I {
788            Q: Q as _,
789            Rn: Rn as _,
790            Rt: Rt as _,
791            size: size as _,
792        });
793    }
794    if (d & 0xbffff000) == 0x0c9f2000 {
795        return Some(InstructionKind::ST1AsisdlsepI4I4 {
796            Q: Q as _,
797            Rn: Rn as _,
798            Rt: Rt as _,
799            size: size as _,
800        });
801    }
802    if (d & 0xbffff000) == 0x0c9f4000 {
803        return Some(InstructionKind::ST3AsisdlsepI3I {
804            Q: Q as _,
805            Rn: Rn as _,
806            Rt: Rt as _,
807            size: size as _,
808        });
809    }
810    if (d & 0xbffff000) == 0x0c9f6000 {
811        return Some(InstructionKind::ST1AsisdlsepI3I3 {
812            Q: Q as _,
813            Rn: Rn as _,
814            Rt: Rt as _,
815            size: size as _,
816        });
817    }
818    if (d & 0xbffff000) == 0x0c9f7000 {
819        return Some(InstructionKind::ST1AsisdlsepI1I1 {
820            Q: Q as _,
821            Rn: Rn as _,
822            Rt: Rt as _,
823            size: size as _,
824        });
825    }
826    if (d & 0xbffff000) == 0x0c9f8000 {
827        return Some(InstructionKind::ST2AsisdlsepI2I {
828            Q: Q as _,
829            Rn: Rn as _,
830            Rt: Rt as _,
831            size: size as _,
832        });
833    }
834    if (d & 0xbffff000) == 0x0c9fa000 {
835        return Some(InstructionKind::ST1AsisdlsepI2I2 {
836            Q: Q as _,
837            Rn: Rn as _,
838            Rt: Rt as _,
839            size: size as _,
840        });
841    }
842    if (d & 0xbffff000) == 0x0cdf0000 {
843        return Some(InstructionKind::LD4AsisdlsepI4I {
844            Q: Q as _,
845            Rn: Rn as _,
846            Rt: Rt as _,
847            size: size as _,
848        });
849    }
850    if (d & 0xbffff000) == 0x0cdf2000 {
851        return Some(InstructionKind::LD1AsisdlsepI4I4 {
852            Q: Q as _,
853            Rn: Rn as _,
854            Rt: Rt as _,
855            size: size as _,
856        });
857    }
858    if (d & 0xbffff000) == 0x0cdf4000 {
859        return Some(InstructionKind::LD3AsisdlsepI3I {
860            Q: Q as _,
861            Rn: Rn as _,
862            Rt: Rt as _,
863            size: size as _,
864        });
865    }
866    if (d & 0xbffff000) == 0x0cdf6000 {
867        return Some(InstructionKind::LD1AsisdlsepI3I3 {
868            Q: Q as _,
869            Rn: Rn as _,
870            Rt: Rt as _,
871            size: size as _,
872        });
873    }
874    if (d & 0xbffff000) == 0x0cdf7000 {
875        return Some(InstructionKind::LD1AsisdlsepI1I1 {
876            Q: Q as _,
877            Rn: Rn as _,
878            Rt: Rt as _,
879            size: size as _,
880        });
881    }
882    if (d & 0xbffff000) == 0x0cdf8000 {
883        return Some(InstructionKind::LD2AsisdlsepI2I {
884            Q: Q as _,
885            Rn: Rn as _,
886            Rt: Rt as _,
887            size: size as _,
888        });
889    }
890    if (d & 0xbffff000) == 0x0cdfa000 {
891        return Some(InstructionKind::LD1AsisdlsepI2I2 {
892            Q: Q as _,
893            Rn: Rn as _,
894            Rt: Rt as _,
895            size: size as _,
896        });
897    }
898    if (d & 0xbfe0f000) == 0x0c800000 && (d & 0x1f0000) != 0x1f0000 {
899        return Some(InstructionKind::ST4AsisdlsepR4R {
900            Q: Q as _,
901            Rm: Rm as _,
902            Rn: Rn as _,
903            Rt: Rt as _,
904            size: size as _,
905        });
906    }
907    if (d & 0xbfe0f000) == 0x0c802000 && (d & 0x1f0000) != 0x1f0000 {
908        return Some(InstructionKind::ST1AsisdlsepR4R4 {
909            Q: Q as _,
910            Rm: Rm as _,
911            Rn: Rn as _,
912            Rt: Rt as _,
913            size: size as _,
914        });
915    }
916    if (d & 0xbfe0f000) == 0x0c804000 && (d & 0x1f0000) != 0x1f0000 {
917        return Some(InstructionKind::ST3AsisdlsepR3R {
918            Q: Q as _,
919            Rm: Rm as _,
920            Rn: Rn as _,
921            Rt: Rt as _,
922            size: size as _,
923        });
924    }
925    if (d & 0xbfe0f000) == 0x0c806000 && (d & 0x1f0000) != 0x1f0000 {
926        return Some(InstructionKind::ST1AsisdlsepR3R3 {
927            Q: Q as _,
928            Rm: Rm as _,
929            Rn: Rn as _,
930            Rt: Rt as _,
931            size: size as _,
932        });
933    }
934    if (d & 0xbfe0f000) == 0x0c807000 && (d & 0x1f0000) != 0x1f0000 {
935        return Some(InstructionKind::ST1AsisdlsepR1R1 {
936            Q: Q as _,
937            Rm: Rm as _,
938            Rn: Rn as _,
939            Rt: Rt as _,
940            size: size as _,
941        });
942    }
943    if (d & 0xbfe0f000) == 0x0c808000 && (d & 0x1f0000) != 0x1f0000 {
944        return Some(InstructionKind::ST2AsisdlsepR2R {
945            Q: Q as _,
946            Rm: Rm as _,
947            Rn: Rn as _,
948            Rt: Rt as _,
949            size: size as _,
950        });
951    }
952    if (d & 0xbfe0f000) == 0x0c80a000 && (d & 0x1f0000) != 0x1f0000 {
953        return Some(InstructionKind::ST1AsisdlsepR2R2 {
954            Q: Q as _,
955            Rm: Rm as _,
956            Rn: Rn as _,
957            Rt: Rt as _,
958            size: size as _,
959        });
960    }
961    if (d & 0xbfe0f000) == 0x0cc00000 && (d & 0x1f0000) != 0x1f0000 {
962        return Some(InstructionKind::LD4AsisdlsepR4R {
963            Q: Q as _,
964            Rm: Rm as _,
965            Rn: Rn as _,
966            Rt: Rt as _,
967            size: size as _,
968        });
969    }
970    if (d & 0xbfe0f000) == 0x0cc02000 && (d & 0x1f0000) != 0x1f0000 {
971        return Some(InstructionKind::LD1AsisdlsepR4R4 {
972            Q: Q as _,
973            Rm: Rm as _,
974            Rn: Rn as _,
975            Rt: Rt as _,
976            size: size as _,
977        });
978    }
979    if (d & 0xbfe0f000) == 0x0cc04000 && (d & 0x1f0000) != 0x1f0000 {
980        return Some(InstructionKind::LD3AsisdlsepR3R {
981            Q: Q as _,
982            Rm: Rm as _,
983            Rn: Rn as _,
984            Rt: Rt as _,
985            size: size as _,
986        });
987    }
988    if (d & 0xbfe0f000) == 0x0cc06000 && (d & 0x1f0000) != 0x1f0000 {
989        return Some(InstructionKind::LD1AsisdlsepR3R3 {
990            Q: Q as _,
991            Rm: Rm as _,
992            Rn: Rn as _,
993            Rt: Rt as _,
994            size: size as _,
995        });
996    }
997    if (d & 0xbfe0f000) == 0x0cc07000 && (d & 0x1f0000) != 0x1f0000 {
998        return Some(InstructionKind::LD1AsisdlsepR1R1 {
999            Q: Q as _,
1000            Rm: Rm as _,
1001            Rn: Rn as _,
1002            Rt: Rt as _,
1003            size: size as _,
1004        });
1005    }
1006    if (d & 0xbfe0f000) == 0x0cc08000 && (d & 0x1f0000) != 0x1f0000 {
1007        return Some(InstructionKind::LD2AsisdlsepR2R {
1008            Q: Q as _,
1009            Rm: Rm as _,
1010            Rn: Rn as _,
1011            Rt: Rt as _,
1012            size: size as _,
1013        });
1014    }
1015    if (d & 0xbfe0f000) == 0x0cc0a000 && (d & 0x1f0000) != 0x1f0000 {
1016        return Some(InstructionKind::LD1AsisdlsepR2R2 {
1017            Q: Q as _,
1018            Rm: Rm as _,
1019            Rn: Rn as _,
1020            Rt: Rt as _,
1021            size: size as _,
1022        });
1023    }
1024    None
1025}
1026
1027pub const fn decode_asisdlso(d: u32) -> Option<InstructionKind> {
1028    ["Could not decode."][((d & 0xbf9f0000) != 0x0d000000) as usize];
1029    let L = (d >> 22) & 1;
1030    let Q = (d >> 30) & 1;
1031    let R = (d >> 21) & 1;
1032    let Rn = (d >> 5) & 0x1F;
1033    let Rt = d & 0x1F;
1034    let S = (d >> 12) & 1;
1035    let opcode = (d >> 13) & 7;
1036    let size = (d >> 10) & 3;
1037    if (d & 0xbffffc00) == 0x0d008400 {
1038        return Some(InstructionKind::ST1AsisdlsoD11D {
1039            Q: Q as _,
1040            Rn: Rn as _,
1041            Rt: Rt as _,
1042        });
1043    }
1044    if (d & 0xbffffc00) == 0x0d00a400 {
1045        return Some(InstructionKind::ST3AsisdlsoD33D {
1046            Q: Q as _,
1047            Rn: Rn as _,
1048            Rt: Rt as _,
1049        });
1050    }
1051    if (d & 0xbffffc00) == 0x0d208400 {
1052        return Some(InstructionKind::ST2AsisdlsoD22D {
1053            Q: Q as _,
1054            Rn: Rn as _,
1055            Rt: Rt as _,
1056        });
1057    }
1058    if (d & 0xbffffc00) == 0x0d20a400 {
1059        return Some(InstructionKind::ST4AsisdlsoD44D {
1060            Q: Q as _,
1061            Rn: Rn as _,
1062            Rt: Rt as _,
1063        });
1064    }
1065    if (d & 0xbffffc00) == 0x0d408400 {
1066        return Some(InstructionKind::LD1AsisdlsoD11D {
1067            Q: Q as _,
1068            Rn: Rn as _,
1069            Rt: Rt as _,
1070        });
1071    }
1072    if (d & 0xbffffc00) == 0x0d40a400 {
1073        return Some(InstructionKind::LD3AsisdlsoD33D {
1074            Q: Q as _,
1075            Rn: Rn as _,
1076            Rt: Rt as _,
1077        });
1078    }
1079    if (d & 0xbffffc00) == 0x0d608400 {
1080        return Some(InstructionKind::LD2AsisdlsoD22D {
1081            Q: Q as _,
1082            Rn: Rn as _,
1083            Rt: Rt as _,
1084        });
1085    }
1086    if (d & 0xbffffc00) == 0x0d60a400 {
1087        return Some(InstructionKind::LD4AsisdlsoD44D {
1088            Q: Q as _,
1089            Rn: Rn as _,
1090            Rt: Rt as _,
1091        });
1092    }
1093    if (d & 0xbfffec00) == 0x0d008000 {
1094        return Some(InstructionKind::ST1AsisdlsoS11S {
1095            Q: Q as _,
1096            Rn: Rn as _,
1097            Rt: Rt as _,
1098            S: S as _,
1099        });
1100    }
1101    if (d & 0xbfffec00) == 0x0d00a000 {
1102        return Some(InstructionKind::ST3AsisdlsoS33S {
1103            Q: Q as _,
1104            Rn: Rn as _,
1105            Rt: Rt as _,
1106            S: S as _,
1107        });
1108    }
1109    if (d & 0xbfffec00) == 0x0d208000 {
1110        return Some(InstructionKind::ST2AsisdlsoS22S {
1111            Q: Q as _,
1112            Rn: Rn as _,
1113            Rt: Rt as _,
1114            S: S as _,
1115        });
1116    }
1117    if (d & 0xbfffec00) == 0x0d20a000 {
1118        return Some(InstructionKind::ST4AsisdlsoS44S {
1119            Q: Q as _,
1120            Rn: Rn as _,
1121            Rt: Rt as _,
1122            S: S as _,
1123        });
1124    }
1125    if (d & 0xbfffec00) == 0x0d408000 {
1126        return Some(InstructionKind::LD1AsisdlsoS11S {
1127            Q: Q as _,
1128            Rn: Rn as _,
1129            Rt: Rt as _,
1130            S: S as _,
1131        });
1132    }
1133    if (d & 0xbfffec00) == 0x0d40a000 {
1134        return Some(InstructionKind::LD3AsisdlsoS33S {
1135            Q: Q as _,
1136            Rn: Rn as _,
1137            Rt: Rt as _,
1138            S: S as _,
1139        });
1140    }
1141    if (d & 0xbfffec00) == 0x0d608000 {
1142        return Some(InstructionKind::LD2AsisdlsoS22S {
1143            Q: Q as _,
1144            Rn: Rn as _,
1145            Rt: Rt as _,
1146            S: S as _,
1147        });
1148    }
1149    if (d & 0xbfffec00) == 0x0d60a000 {
1150        return Some(InstructionKind::LD4AsisdlsoS44S {
1151            Q: Q as _,
1152            Rn: Rn as _,
1153            Rt: Rt as _,
1154            S: S as _,
1155        });
1156    }
1157    if (d & 0xbfffe400) == 0x0d004000 {
1158        return Some(InstructionKind::ST1AsisdlsoH11H {
1159            Q: Q as _,
1160            Rn: Rn as _,
1161            Rt: Rt as _,
1162            S: S as _,
1163            size: size as _,
1164        });
1165    }
1166    if (d & 0xbfffe400) == 0x0d006000 {
1167        return Some(InstructionKind::ST3AsisdlsoH33H {
1168            Q: Q as _,
1169            Rn: Rn as _,
1170            Rt: Rt as _,
1171            S: S as _,
1172            size: size as _,
1173        });
1174    }
1175    if (d & 0xbfffe400) == 0x0d204000 {
1176        return Some(InstructionKind::ST2AsisdlsoH22H {
1177            Q: Q as _,
1178            Rn: Rn as _,
1179            Rt: Rt as _,
1180            S: S as _,
1181            size: size as _,
1182        });
1183    }
1184    if (d & 0xbfffe400) == 0x0d206000 {
1185        return Some(InstructionKind::ST4AsisdlsoH44H {
1186            Q: Q as _,
1187            Rn: Rn as _,
1188            Rt: Rt as _,
1189            S: S as _,
1190            size: size as _,
1191        });
1192    }
1193    if (d & 0xbfffe400) == 0x0d404000 {
1194        return Some(InstructionKind::LD1AsisdlsoH11H {
1195            Q: Q as _,
1196            Rn: Rn as _,
1197            Rt: Rt as _,
1198            S: S as _,
1199            size: size as _,
1200        });
1201    }
1202    if (d & 0xbfffe400) == 0x0d406000 {
1203        return Some(InstructionKind::LD3AsisdlsoH33H {
1204            Q: Q as _,
1205            Rn: Rn as _,
1206            Rt: Rt as _,
1207            S: S as _,
1208            size: size as _,
1209        });
1210    }
1211    if (d & 0xbfffe400) == 0x0d604000 {
1212        return Some(InstructionKind::LD2AsisdlsoH22H {
1213            Q: Q as _,
1214            Rn: Rn as _,
1215            Rt: Rt as _,
1216            S: S as _,
1217            size: size as _,
1218        });
1219    }
1220    if (d & 0xbfffe400) == 0x0d606000 {
1221        return Some(InstructionKind::LD4AsisdlsoH44H {
1222            Q: Q as _,
1223            Rn: Rn as _,
1224            Rt: Rt as _,
1225            S: S as _,
1226            size: size as _,
1227        });
1228    }
1229    if (d & 0xbffff000) == 0x0d40c000 {
1230        return Some(InstructionKind::LD1RAsisdlsoR1 {
1231            Q: Q as _,
1232            Rn: Rn as _,
1233            Rt: Rt as _,
1234            size: size as _,
1235        });
1236    }
1237    if (d & 0xbffff000) == 0x0d40e000 {
1238        return Some(InstructionKind::LD3RAsisdlsoR3 {
1239            Q: Q as _,
1240            Rn: Rn as _,
1241            Rt: Rt as _,
1242            size: size as _,
1243        });
1244    }
1245    if (d & 0xbffff000) == 0x0d60c000 {
1246        return Some(InstructionKind::LD2RAsisdlsoR2 {
1247            Q: Q as _,
1248            Rn: Rn as _,
1249            Rt: Rt as _,
1250            size: size as _,
1251        });
1252    }
1253    if (d & 0xbffff000) == 0x0d60e000 {
1254        return Some(InstructionKind::LD4RAsisdlsoR4 {
1255            Q: Q as _,
1256            Rn: Rn as _,
1257            Rt: Rt as _,
1258            size: size as _,
1259        });
1260    }
1261    if (d & 0xbfffe000) == 0x0d000000 {
1262        return Some(InstructionKind::ST1AsisdlsoB11B {
1263            Q: Q as _,
1264            Rn: Rn as _,
1265            Rt: Rt as _,
1266            S: S as _,
1267            size: size as _,
1268        });
1269    }
1270    if (d & 0xbfffe000) == 0x0d002000 {
1271        return Some(InstructionKind::ST3AsisdlsoB33B {
1272            Q: Q as _,
1273            Rn: Rn as _,
1274            Rt: Rt as _,
1275            S: S as _,
1276            size: size as _,
1277        });
1278    }
1279    if (d & 0xbfffe000) == 0x0d200000 {
1280        return Some(InstructionKind::ST2AsisdlsoB22B {
1281            Q: Q as _,
1282            Rn: Rn as _,
1283            Rt: Rt as _,
1284            S: S as _,
1285            size: size as _,
1286        });
1287    }
1288    if (d & 0xbfffe000) == 0x0d202000 {
1289        return Some(InstructionKind::ST4AsisdlsoB44B {
1290            Q: Q as _,
1291            Rn: Rn as _,
1292            Rt: Rt as _,
1293            S: S as _,
1294            size: size as _,
1295        });
1296    }
1297    if (d & 0xbfffe000) == 0x0d400000 {
1298        return Some(InstructionKind::LD1AsisdlsoB11B {
1299            Q: Q as _,
1300            Rn: Rn as _,
1301            Rt: Rt as _,
1302            S: S as _,
1303            size: size as _,
1304        });
1305    }
1306    if (d & 0xbfffe000) == 0x0d402000 {
1307        return Some(InstructionKind::LD3AsisdlsoB33B {
1308            Q: Q as _,
1309            Rn: Rn as _,
1310            Rt: Rt as _,
1311            S: S as _,
1312            size: size as _,
1313        });
1314    }
1315    if (d & 0xbfffe000) == 0x0d600000 {
1316        return Some(InstructionKind::LD2AsisdlsoB22B {
1317            Q: Q as _,
1318            Rn: Rn as _,
1319            Rt: Rt as _,
1320            S: S as _,
1321            size: size as _,
1322        });
1323    }
1324    if (d & 0xbfffe000) == 0x0d602000 {
1325        return Some(InstructionKind::LD4AsisdlsoB44B {
1326            Q: Q as _,
1327            Rn: Rn as _,
1328            Rt: Rt as _,
1329            S: S as _,
1330            size: size as _,
1331        });
1332    }
1333    None
1334}
1335
1336pub const fn decode_asisdlsop(d: u32) -> Option<InstructionKind> {
1337    ["Could not decode."][((d & 0xbf800000) != 0x0d800000) as usize];
1338    let L = (d >> 22) & 1;
1339    let Q = (d >> 30) & 1;
1340    let R = (d >> 21) & 1;
1341    let Rm = (d >> 16) & 0x1F;
1342    let Rn = (d >> 5) & 0x1F;
1343    let Rt = d & 0x1F;
1344    let S = (d >> 12) & 1;
1345    let opcode = (d >> 13) & 7;
1346    let size = (d >> 10) & 3;
1347    if (d & 0xbffffc00) == 0x0d9f8400 {
1348        return Some(InstructionKind::ST1AsisdlsopD1I1D {
1349            Q: Q as _,
1350            Rn: Rn as _,
1351            Rt: Rt as _,
1352        });
1353    }
1354    if (d & 0xbffffc00) == 0x0d9fa400 {
1355        return Some(InstructionKind::ST3AsisdlsopD3I3D {
1356            Q: Q as _,
1357            Rn: Rn as _,
1358            Rt: Rt as _,
1359        });
1360    }
1361    if (d & 0xbffffc00) == 0x0dbf8400 {
1362        return Some(InstructionKind::ST2AsisdlsopD2I2D {
1363            Q: Q as _,
1364            Rn: Rn as _,
1365            Rt: Rt as _,
1366        });
1367    }
1368    if (d & 0xbffffc00) == 0x0dbfa400 {
1369        return Some(InstructionKind::ST4AsisdlsopD4I4D {
1370            Q: Q as _,
1371            Rn: Rn as _,
1372            Rt: Rt as _,
1373        });
1374    }
1375    if (d & 0xbffffc00) == 0x0ddf8400 {
1376        return Some(InstructionKind::LD1AsisdlsopD1I1D {
1377            Q: Q as _,
1378            Rn: Rn as _,
1379            Rt: Rt as _,
1380        });
1381    }
1382    if (d & 0xbffffc00) == 0x0ddfa400 {
1383        return Some(InstructionKind::LD3AsisdlsopD3I3D {
1384            Q: Q as _,
1385            Rn: Rn as _,
1386            Rt: Rt as _,
1387        });
1388    }
1389    if (d & 0xbffffc00) == 0x0dff8400 {
1390        return Some(InstructionKind::LD2AsisdlsopD2I2D {
1391            Q: Q as _,
1392            Rn: Rn as _,
1393            Rt: Rt as _,
1394        });
1395    }
1396    if (d & 0xbffffc00) == 0x0dffa400 {
1397        return Some(InstructionKind::LD4AsisdlsopD4I4D {
1398            Q: Q as _,
1399            Rn: Rn as _,
1400            Rt: Rt as _,
1401        });
1402    }
1403    if (d & 0xbfffec00) == 0x0d9f8000 {
1404        return Some(InstructionKind::ST1AsisdlsopS1I1S {
1405            Q: Q as _,
1406            Rn: Rn as _,
1407            Rt: Rt as _,
1408            S: S as _,
1409        });
1410    }
1411    if (d & 0xbfffec00) == 0x0d9fa000 {
1412        return Some(InstructionKind::ST3AsisdlsopS3I3S {
1413            Q: Q as _,
1414            Rn: Rn as _,
1415            Rt: Rt as _,
1416            S: S as _,
1417        });
1418    }
1419    if (d & 0xbfffec00) == 0x0dbf8000 {
1420        return Some(InstructionKind::ST2AsisdlsopS2I2S {
1421            Q: Q as _,
1422            Rn: Rn as _,
1423            Rt: Rt as _,
1424            S: S as _,
1425        });
1426    }
1427    if (d & 0xbfffec00) == 0x0dbfa000 {
1428        return Some(InstructionKind::ST4AsisdlsopS4I4S {
1429            Q: Q as _,
1430            Rn: Rn as _,
1431            Rt: Rt as _,
1432            S: S as _,
1433        });
1434    }
1435    if (d & 0xbfffec00) == 0x0ddf8000 {
1436        return Some(InstructionKind::LD1AsisdlsopS1I1S {
1437            Q: Q as _,
1438            Rn: Rn as _,
1439            Rt: Rt as _,
1440            S: S as _,
1441        });
1442    }
1443    if (d & 0xbfffec00) == 0x0ddfa000 {
1444        return Some(InstructionKind::LD3AsisdlsopS3I3S {
1445            Q: Q as _,
1446            Rn: Rn as _,
1447            Rt: Rt as _,
1448            S: S as _,
1449        });
1450    }
1451    if (d & 0xbfffec00) == 0x0dff8000 {
1452        return Some(InstructionKind::LD2AsisdlsopS2I2S {
1453            Q: Q as _,
1454            Rn: Rn as _,
1455            Rt: Rt as _,
1456            S: S as _,
1457        });
1458    }
1459    if (d & 0xbfffec00) == 0x0dffa000 {
1460        return Some(InstructionKind::LD4AsisdlsopS4I4S {
1461            Q: Q as _,
1462            Rn: Rn as _,
1463            Rt: Rt as _,
1464            S: S as _,
1465        });
1466    }
1467    if (d & 0xbfffe400) == 0x0d9f4000 {
1468        return Some(InstructionKind::ST1AsisdlsopH1I1H {
1469            Q: Q as _,
1470            Rn: Rn as _,
1471            Rt: Rt as _,
1472            S: S as _,
1473            size: size as _,
1474        });
1475    }
1476    if (d & 0xbfffe400) == 0x0d9f6000 {
1477        return Some(InstructionKind::ST3AsisdlsopH3I3H {
1478            Q: Q as _,
1479            Rn: Rn as _,
1480            Rt: Rt as _,
1481            S: S as _,
1482            size: size as _,
1483        });
1484    }
1485    if (d & 0xbfffe400) == 0x0dbf4000 {
1486        return Some(InstructionKind::ST2AsisdlsopH2I2H {
1487            Q: Q as _,
1488            Rn: Rn as _,
1489            Rt: Rt as _,
1490            S: S as _,
1491            size: size as _,
1492        });
1493    }
1494    if (d & 0xbfffe400) == 0x0dbf6000 {
1495        return Some(InstructionKind::ST4AsisdlsopH4I4H {
1496            Q: Q as _,
1497            Rn: Rn as _,
1498            Rt: Rt as _,
1499            S: S as _,
1500            size: size as _,
1501        });
1502    }
1503    if (d & 0xbfffe400) == 0x0ddf4000 {
1504        return Some(InstructionKind::LD1AsisdlsopH1I1H {
1505            Q: Q as _,
1506            Rn: Rn as _,
1507            Rt: Rt as _,
1508            S: S as _,
1509            size: size as _,
1510        });
1511    }
1512    if (d & 0xbfffe400) == 0x0ddf6000 {
1513        return Some(InstructionKind::LD3AsisdlsopH3I3H {
1514            Q: Q as _,
1515            Rn: Rn as _,
1516            Rt: Rt as _,
1517            S: S as _,
1518            size: size as _,
1519        });
1520    }
1521    if (d & 0xbfffe400) == 0x0dff4000 {
1522        return Some(InstructionKind::LD2AsisdlsopH2I2H {
1523            Q: Q as _,
1524            Rn: Rn as _,
1525            Rt: Rt as _,
1526            S: S as _,
1527            size: size as _,
1528        });
1529    }
1530    if (d & 0xbfffe400) == 0x0dff6000 {
1531        return Some(InstructionKind::LD4AsisdlsopH4I4H {
1532            Q: Q as _,
1533            Rn: Rn as _,
1534            Rt: Rt as _,
1535            S: S as _,
1536            size: size as _,
1537        });
1538    }
1539    if (d & 0xbffff000) == 0x0ddfc000 {
1540        return Some(InstructionKind::LD1RAsisdlsopR1I {
1541            Q: Q as _,
1542            Rn: Rn as _,
1543            Rt: Rt as _,
1544            size: size as _,
1545        });
1546    }
1547    if (d & 0xbffff000) == 0x0ddfe000 {
1548        return Some(InstructionKind::LD3RAsisdlsopR3I {
1549            Q: Q as _,
1550            Rn: Rn as _,
1551            Rt: Rt as _,
1552            size: size as _,
1553        });
1554    }
1555    if (d & 0xbffff000) == 0x0dffc000 {
1556        return Some(InstructionKind::LD2RAsisdlsopR2I {
1557            Q: Q as _,
1558            Rn: Rn as _,
1559            Rt: Rt as _,
1560            size: size as _,
1561        });
1562    }
1563    if (d & 0xbffff000) == 0x0dffe000 {
1564        return Some(InstructionKind::LD4RAsisdlsopR4I {
1565            Q: Q as _,
1566            Rn: Rn as _,
1567            Rt: Rt as _,
1568            size: size as _,
1569        });
1570    }
1571    if (d & 0xbfffe000) == 0x0d9f0000 {
1572        return Some(InstructionKind::ST1AsisdlsopB1I1B {
1573            Q: Q as _,
1574            Rn: Rn as _,
1575            Rt: Rt as _,
1576            S: S as _,
1577            size: size as _,
1578        });
1579    }
1580    if (d & 0xbfffe000) == 0x0d9f2000 {
1581        return Some(InstructionKind::ST3AsisdlsopB3I3B {
1582            Q: Q as _,
1583            Rn: Rn as _,
1584            Rt: Rt as _,
1585            S: S as _,
1586            size: size as _,
1587        });
1588    }
1589    if (d & 0xbfffe000) == 0x0dbf0000 {
1590        return Some(InstructionKind::ST2AsisdlsopB2I2B {
1591            Q: Q as _,
1592            Rn: Rn as _,
1593            Rt: Rt as _,
1594            S: S as _,
1595            size: size as _,
1596        });
1597    }
1598    if (d & 0xbfffe000) == 0x0dbf2000 {
1599        return Some(InstructionKind::ST4AsisdlsopB4I4B {
1600            Q: Q as _,
1601            Rn: Rn as _,
1602            Rt: Rt as _,
1603            S: S as _,
1604            size: size as _,
1605        });
1606    }
1607    if (d & 0xbfffe000) == 0x0ddf0000 {
1608        return Some(InstructionKind::LD1AsisdlsopB1I1B {
1609            Q: Q as _,
1610            Rn: Rn as _,
1611            Rt: Rt as _,
1612            S: S as _,
1613            size: size as _,
1614        });
1615    }
1616    if (d & 0xbfffe000) == 0x0ddf2000 {
1617        return Some(InstructionKind::LD3AsisdlsopB3I3B {
1618            Q: Q as _,
1619            Rn: Rn as _,
1620            Rt: Rt as _,
1621            S: S as _,
1622            size: size as _,
1623        });
1624    }
1625    if (d & 0xbfffe000) == 0x0dff0000 {
1626        return Some(InstructionKind::LD2AsisdlsopB2I2B {
1627            Q: Q as _,
1628            Rn: Rn as _,
1629            Rt: Rt as _,
1630            S: S as _,
1631            size: size as _,
1632        });
1633    }
1634    if (d & 0xbfffe000) == 0x0dff2000 {
1635        return Some(InstructionKind::LD4AsisdlsopB4I4B {
1636            Q: Q as _,
1637            Rn: Rn as _,
1638            Rt: Rt as _,
1639            S: S as _,
1640            size: size as _,
1641        });
1642    }
1643    if (d & 0xbfe0fc00) == 0x0d808400 && (d & 0x1f0000) != 0x1f0000 {
1644        return Some(InstructionKind::ST1AsisdlsopDx1R1D {
1645            Q: Q as _,
1646            Rm: Rm as _,
1647            Rn: Rn as _,
1648            Rt: Rt as _,
1649        });
1650    }
1651    if (d & 0xbfe0fc00) == 0x0d80a400 && (d & 0x1f0000) != 0x1f0000 {
1652        return Some(InstructionKind::ST3AsisdlsopDx3R3D {
1653            Q: Q as _,
1654            Rm: Rm as _,
1655            Rn: Rn as _,
1656            Rt: Rt as _,
1657        });
1658    }
1659    if (d & 0xbfe0fc00) == 0x0da08400 && (d & 0x1f0000) != 0x1f0000 {
1660        return Some(InstructionKind::ST2AsisdlsopDx2R2D {
1661            Q: Q as _,
1662            Rm: Rm as _,
1663            Rn: Rn as _,
1664            Rt: Rt as _,
1665        });
1666    }
1667    if (d & 0xbfe0fc00) == 0x0da0a400 && (d & 0x1f0000) != 0x1f0000 {
1668        return Some(InstructionKind::ST4AsisdlsopDx4R4D {
1669            Q: Q as _,
1670            Rm: Rm as _,
1671            Rn: Rn as _,
1672            Rt: Rt as _,
1673        });
1674    }
1675    if (d & 0xbfe0fc00) == 0x0dc08400 && (d & 0x1f0000) != 0x1f0000 {
1676        return Some(InstructionKind::LD1AsisdlsopDx1R1D {
1677            Q: Q as _,
1678            Rm: Rm as _,
1679            Rn: Rn as _,
1680            Rt: Rt as _,
1681        });
1682    }
1683    if (d & 0xbfe0fc00) == 0x0dc0a400 && (d & 0x1f0000) != 0x1f0000 {
1684        return Some(InstructionKind::LD3AsisdlsopDx3R3D {
1685            Q: Q as _,
1686            Rm: Rm as _,
1687            Rn: Rn as _,
1688            Rt: Rt as _,
1689        });
1690    }
1691    if (d & 0xbfe0fc00) == 0x0de08400 && (d & 0x1f0000) != 0x1f0000 {
1692        return Some(InstructionKind::LD2AsisdlsopDx2R2D {
1693            Q: Q as _,
1694            Rm: Rm as _,
1695            Rn: Rn as _,
1696            Rt: Rt as _,
1697        });
1698    }
1699    if (d & 0xbfe0fc00) == 0x0de0a400 && (d & 0x1f0000) != 0x1f0000 {
1700        return Some(InstructionKind::LD4AsisdlsopDx4R4D {
1701            Q: Q as _,
1702            Rm: Rm as _,
1703            Rn: Rn as _,
1704            Rt: Rt as _,
1705        });
1706    }
1707    if (d & 0xbfe0ec00) == 0x0d808000 && (d & 0x1f0000) != 0x1f0000 {
1708        return Some(InstructionKind::ST1AsisdlsopSx1R1S {
1709            Q: Q as _,
1710            Rm: Rm as _,
1711            Rn: Rn as _,
1712            Rt: Rt as _,
1713            S: S as _,
1714        });
1715    }
1716    if (d & 0xbfe0ec00) == 0x0d80a000 && (d & 0x1f0000) != 0x1f0000 {
1717        return Some(InstructionKind::ST3AsisdlsopSx3R3S {
1718            Q: Q as _,
1719            Rm: Rm as _,
1720            Rn: Rn as _,
1721            Rt: Rt as _,
1722            S: S as _,
1723        });
1724    }
1725    if (d & 0xbfe0ec00) == 0x0da08000 && (d & 0x1f0000) != 0x1f0000 {
1726        return Some(InstructionKind::ST2AsisdlsopSx2R2S {
1727            Q: Q as _,
1728            Rm: Rm as _,
1729            Rn: Rn as _,
1730            Rt: Rt as _,
1731            S: S as _,
1732        });
1733    }
1734    if (d & 0xbfe0ec00) == 0x0da0a000 && (d & 0x1f0000) != 0x1f0000 {
1735        return Some(InstructionKind::ST4AsisdlsopSx4R4S {
1736            Q: Q as _,
1737            Rm: Rm as _,
1738            Rn: Rn as _,
1739            Rt: Rt as _,
1740            S: S as _,
1741        });
1742    }
1743    if (d & 0xbfe0ec00) == 0x0dc08000 && (d & 0x1f0000) != 0x1f0000 {
1744        return Some(InstructionKind::LD1AsisdlsopSx1R1S {
1745            Q: Q as _,
1746            Rm: Rm as _,
1747            Rn: Rn as _,
1748            Rt: Rt as _,
1749            S: S as _,
1750        });
1751    }
1752    if (d & 0xbfe0ec00) == 0x0dc0a000 && (d & 0x1f0000) != 0x1f0000 {
1753        return Some(InstructionKind::LD3AsisdlsopSx3R3S {
1754            Q: Q as _,
1755            Rm: Rm as _,
1756            Rn: Rn as _,
1757            Rt: Rt as _,
1758            S: S as _,
1759        });
1760    }
1761    if (d & 0xbfe0ec00) == 0x0de08000 && (d & 0x1f0000) != 0x1f0000 {
1762        return Some(InstructionKind::LD2AsisdlsopSx2R2S {
1763            Q: Q as _,
1764            Rm: Rm as _,
1765            Rn: Rn as _,
1766            Rt: Rt as _,
1767            S: S as _,
1768        });
1769    }
1770    if (d & 0xbfe0ec00) == 0x0de0a000 && (d & 0x1f0000) != 0x1f0000 {
1771        return Some(InstructionKind::LD4AsisdlsopSx4R4S {
1772            Q: Q as _,
1773            Rm: Rm as _,
1774            Rn: Rn as _,
1775            Rt: Rt as _,
1776            S: S as _,
1777        });
1778    }
1779    if (d & 0xbfe0e400) == 0x0d804000 && (d & 0x1f0000) != 0x1f0000 {
1780        return Some(InstructionKind::ST1AsisdlsopHx1R1H {
1781            Q: Q as _,
1782            Rm: Rm as _,
1783            Rn: Rn as _,
1784            Rt: Rt as _,
1785            S: S as _,
1786            size: size as _,
1787        });
1788    }
1789    if (d & 0xbfe0e400) == 0x0d806000 && (d & 0x1f0000) != 0x1f0000 {
1790        return Some(InstructionKind::ST3AsisdlsopHx3R3H {
1791            Q: Q as _,
1792            Rm: Rm as _,
1793            Rn: Rn as _,
1794            Rt: Rt as _,
1795            S: S as _,
1796            size: size as _,
1797        });
1798    }
1799    if (d & 0xbfe0e400) == 0x0da04000 && (d & 0x1f0000) != 0x1f0000 {
1800        return Some(InstructionKind::ST2AsisdlsopHx2R2H {
1801            Q: Q as _,
1802            Rm: Rm as _,
1803            Rn: Rn as _,
1804            Rt: Rt as _,
1805            S: S as _,
1806            size: size as _,
1807        });
1808    }
1809    if (d & 0xbfe0e400) == 0x0da06000 && (d & 0x1f0000) != 0x1f0000 {
1810        return Some(InstructionKind::ST4AsisdlsopHx4R4H {
1811            Q: Q as _,
1812            Rm: Rm as _,
1813            Rn: Rn as _,
1814            Rt: Rt as _,
1815            S: S as _,
1816            size: size as _,
1817        });
1818    }
1819    if (d & 0xbfe0e400) == 0x0dc04000 && (d & 0x1f0000) != 0x1f0000 {
1820        return Some(InstructionKind::LD1AsisdlsopHx1R1H {
1821            Q: Q as _,
1822            Rm: Rm as _,
1823            Rn: Rn as _,
1824            Rt: Rt as _,
1825            S: S as _,
1826            size: size as _,
1827        });
1828    }
1829    if (d & 0xbfe0e400) == 0x0dc06000 && (d & 0x1f0000) != 0x1f0000 {
1830        return Some(InstructionKind::LD3AsisdlsopHx3R3H {
1831            Q: Q as _,
1832            Rm: Rm as _,
1833            Rn: Rn as _,
1834            Rt: Rt as _,
1835            S: S as _,
1836            size: size as _,
1837        });
1838    }
1839    if (d & 0xbfe0e400) == 0x0de04000 && (d & 0x1f0000) != 0x1f0000 {
1840        return Some(InstructionKind::LD2AsisdlsopHx2R2H {
1841            Q: Q as _,
1842            Rm: Rm as _,
1843            Rn: Rn as _,
1844            Rt: Rt as _,
1845            S: S as _,
1846            size: size as _,
1847        });
1848    }
1849    if (d & 0xbfe0e400) == 0x0de06000 && (d & 0x1f0000) != 0x1f0000 {
1850        return Some(InstructionKind::LD4AsisdlsopHx4R4H {
1851            Q: Q as _,
1852            Rm: Rm as _,
1853            Rn: Rn as _,
1854            Rt: Rt as _,
1855            S: S as _,
1856            size: size as _,
1857        });
1858    }
1859    if (d & 0xbfe0f000) == 0x0dc0c000 && (d & 0x1f0000) != 0x1f0000 {
1860        return Some(InstructionKind::LD1RAsisdlsopRx1R {
1861            Q: Q as _,
1862            Rm: Rm as _,
1863            Rn: Rn as _,
1864            Rt: Rt as _,
1865            size: size as _,
1866        });
1867    }
1868    if (d & 0xbfe0f000) == 0x0dc0e000 && (d & 0x1f0000) != 0x1f0000 {
1869        return Some(InstructionKind::LD3RAsisdlsopRx3R {
1870            Q: Q as _,
1871            Rm: Rm as _,
1872            Rn: Rn as _,
1873            Rt: Rt as _,
1874            size: size as _,
1875        });
1876    }
1877    if (d & 0xbfe0f000) == 0x0de0c000 && (d & 0x1f0000) != 0x1f0000 {
1878        return Some(InstructionKind::LD2RAsisdlsopRx2R {
1879            Q: Q as _,
1880            Rm: Rm as _,
1881            Rn: Rn as _,
1882            Rt: Rt as _,
1883            size: size as _,
1884        });
1885    }
1886    if (d & 0xbfe0f000) == 0x0de0e000 && (d & 0x1f0000) != 0x1f0000 {
1887        return Some(InstructionKind::LD4RAsisdlsopRx4R {
1888            Q: Q as _,
1889            Rm: Rm as _,
1890            Rn: Rn as _,
1891            Rt: Rt as _,
1892            size: size as _,
1893        });
1894    }
1895    if (d & 0xbfe0e000) == 0x0d800000 && (d & 0x1f0000) != 0x1f0000 {
1896        return Some(InstructionKind::ST1AsisdlsopBx1R1B {
1897            Q: Q as _,
1898            Rm: Rm as _,
1899            Rn: Rn as _,
1900            Rt: Rt as _,
1901            S: S as _,
1902            size: size as _,
1903        });
1904    }
1905    if (d & 0xbfe0e000) == 0x0d802000 && (d & 0x1f0000) != 0x1f0000 {
1906        return Some(InstructionKind::ST3AsisdlsopBx3R3B {
1907            Q: Q as _,
1908            Rm: Rm as _,
1909            Rn: Rn as _,
1910            Rt: Rt as _,
1911            S: S as _,
1912            size: size as _,
1913        });
1914    }
1915    if (d & 0xbfe0e000) == 0x0da00000 && (d & 0x1f0000) != 0x1f0000 {
1916        return Some(InstructionKind::ST2AsisdlsopBx2R2B {
1917            Q: Q as _,
1918            Rm: Rm as _,
1919            Rn: Rn as _,
1920            Rt: Rt as _,
1921            S: S as _,
1922            size: size as _,
1923        });
1924    }
1925    if (d & 0xbfe0e000) == 0x0da02000 && (d & 0x1f0000) != 0x1f0000 {
1926        return Some(InstructionKind::ST4AsisdlsopBx4R4B {
1927            Q: Q as _,
1928            Rm: Rm as _,
1929            Rn: Rn as _,
1930            Rt: Rt as _,
1931            S: S as _,
1932            size: size as _,
1933        });
1934    }
1935    if (d & 0xbfe0e000) == 0x0dc00000 && (d & 0x1f0000) != 0x1f0000 {
1936        return Some(InstructionKind::LD1AsisdlsopBx1R1B {
1937            Q: Q as _,
1938            Rm: Rm as _,
1939            Rn: Rn as _,
1940            Rt: Rt as _,
1941            S: S as _,
1942            size: size as _,
1943        });
1944    }
1945    if (d & 0xbfe0e000) == 0x0dc02000 && (d & 0x1f0000) != 0x1f0000 {
1946        return Some(InstructionKind::LD3AsisdlsopBx3R3B {
1947            Q: Q as _,
1948            Rm: Rm as _,
1949            Rn: Rn as _,
1950            Rt: Rt as _,
1951            S: S as _,
1952            size: size as _,
1953        });
1954    }
1955    if (d & 0xbfe0e000) == 0x0de00000 && (d & 0x1f0000) != 0x1f0000 {
1956        return Some(InstructionKind::LD2AsisdlsopBx2R2B {
1957            Q: Q as _,
1958            Rm: Rm as _,
1959            Rn: Rn as _,
1960            Rt: Rt as _,
1961            S: S as _,
1962            size: size as _,
1963        });
1964    }
1965    if (d & 0xbfe0e000) == 0x0de02000 && (d & 0x1f0000) != 0x1f0000 {
1966        return Some(InstructionKind::LD4AsisdlsopBx4R4B {
1967            Q: Q as _,
1968            Rm: Rm as _,
1969            Rn: Rn as _,
1970            Rt: Rt as _,
1971            S: S as _,
1972            size: size as _,
1973        });
1974    }
1975    None
1976}
1977
1978pub const fn decode_memop(d: u32) -> Option<InstructionKind> {
1979    ["Could not decode."][((d & 0x3b200c00) != 0x38200000) as usize];
1980    let A = (d >> 23) & 1;
1981    let R = (d >> 22) & 1;
1982    let Rn = (d >> 5) & 0x1F;
1983    let Rs = (d >> 16) & 0x1F;
1984    let Rt = d & 0x1F;
1985    let V = (d >> 26) & 1;
1986    let o3 = (d >> 15) & 1;
1987    let opc = (d >> 12) & 7;
1988    let size = (d >> 30) & 3;
1989    if (d & 0xffe0fc1f) == 0x3820001f {
1990        return Some(InstructionKind::STADDB32SMemop {
1991            Rn: Rn as _,
1992            Rs: Rs as _,
1993        });
1994    }
1995    if (d & 0xffe0fc1f) == 0x3820101f {
1996        return Some(InstructionKind::STCLRB32SMemop {
1997            Rn: Rn as _,
1998            Rs: Rs as _,
1999        });
2000    }
2001    if (d & 0xffe0fc1f) == 0x3820201f {
2002        return Some(InstructionKind::STEORB32SMemop {
2003            Rn: Rn as _,
2004            Rs: Rs as _,
2005        });
2006    }
2007    if (d & 0xffe0fc1f) == 0x3820301f {
2008        return Some(InstructionKind::STSETB32SMemop {
2009            Rn: Rn as _,
2010            Rs: Rs as _,
2011        });
2012    }
2013    if (d & 0xffe0fc1f) == 0x3820401f {
2014        return Some(InstructionKind::STSMAXB32SMemop {
2015            Rn: Rn as _,
2016            Rs: Rs as _,
2017        });
2018    }
2019    if (d & 0xffe0fc1f) == 0x3820501f {
2020        return Some(InstructionKind::STSMINB32SMemop {
2021            Rn: Rn as _,
2022            Rs: Rs as _,
2023        });
2024    }
2025    if (d & 0xffe0fc1f) == 0x3820601f {
2026        return Some(InstructionKind::STUMAXB32SMemop {
2027            Rn: Rn as _,
2028            Rs: Rs as _,
2029        });
2030    }
2031    if (d & 0xffe0fc1f) == 0x3820701f {
2032        return Some(InstructionKind::STUMINB32SMemop {
2033            Rn: Rn as _,
2034            Rs: Rs as _,
2035        });
2036    }
2037    if (d & 0xffe0fc1f) == 0x3860001f {
2038        return Some(InstructionKind::STADDLB32SMemop {
2039            Rn: Rn as _,
2040            Rs: Rs as _,
2041        });
2042    }
2043    if (d & 0xffe0fc1f) == 0x3860101f {
2044        return Some(InstructionKind::STCLRLB32SMemop {
2045            Rn: Rn as _,
2046            Rs: Rs as _,
2047        });
2048    }
2049    if (d & 0xffe0fc1f) == 0x3860201f {
2050        return Some(InstructionKind::STEORLB32SMemop {
2051            Rn: Rn as _,
2052            Rs: Rs as _,
2053        });
2054    }
2055    if (d & 0xffe0fc1f) == 0x3860301f {
2056        return Some(InstructionKind::STSETLB32SMemop {
2057            Rn: Rn as _,
2058            Rs: Rs as _,
2059        });
2060    }
2061    if (d & 0xffe0fc1f) == 0x3860401f {
2062        return Some(InstructionKind::STSMAXLB32SMemop {
2063            Rn: Rn as _,
2064            Rs: Rs as _,
2065        });
2066    }
2067    if (d & 0xffe0fc1f) == 0x3860501f {
2068        return Some(InstructionKind::STSMINLB32SMemop {
2069            Rn: Rn as _,
2070            Rs: Rs as _,
2071        });
2072    }
2073    if (d & 0xffe0fc1f) == 0x3860601f {
2074        return Some(InstructionKind::STUMAXLB32SMemop {
2075            Rn: Rn as _,
2076            Rs: Rs as _,
2077        });
2078    }
2079    if (d & 0xffe0fc1f) == 0x3860701f {
2080        return Some(InstructionKind::STUMINLB32SMemop {
2081            Rn: Rn as _,
2082            Rs: Rs as _,
2083        });
2084    }
2085    if (d & 0xffe0fc1f) == 0x7820001f {
2086        return Some(InstructionKind::STADDH32SMemop {
2087            Rn: Rn as _,
2088            Rs: Rs as _,
2089        });
2090    }
2091    if (d & 0xffe0fc1f) == 0x7820101f {
2092        return Some(InstructionKind::STCLRH32SMemop {
2093            Rn: Rn as _,
2094            Rs: Rs as _,
2095        });
2096    }
2097    if (d & 0xffe0fc1f) == 0x7820201f {
2098        return Some(InstructionKind::STEORH32SMemop {
2099            Rn: Rn as _,
2100            Rs: Rs as _,
2101        });
2102    }
2103    if (d & 0xffe0fc1f) == 0x7820301f {
2104        return Some(InstructionKind::STSETH32SMemop {
2105            Rn: Rn as _,
2106            Rs: Rs as _,
2107        });
2108    }
2109    if (d & 0xffe0fc1f) == 0x7820401f {
2110        return Some(InstructionKind::STSMAXH32SMemop {
2111            Rn: Rn as _,
2112            Rs: Rs as _,
2113        });
2114    }
2115    if (d & 0xffe0fc1f) == 0x7820501f {
2116        return Some(InstructionKind::STSMINH32SMemop {
2117            Rn: Rn as _,
2118            Rs: Rs as _,
2119        });
2120    }
2121    if (d & 0xffe0fc1f) == 0x7820601f {
2122        return Some(InstructionKind::STUMAXH32SMemop {
2123            Rn: Rn as _,
2124            Rs: Rs as _,
2125        });
2126    }
2127    if (d & 0xffe0fc1f) == 0x7820701f {
2128        return Some(InstructionKind::STUMINH32SMemop {
2129            Rn: Rn as _,
2130            Rs: Rs as _,
2131        });
2132    }
2133    if (d & 0xffe0fc1f) == 0x7860001f {
2134        return Some(InstructionKind::STADDLH32SMemop {
2135            Rn: Rn as _,
2136            Rs: Rs as _,
2137        });
2138    }
2139    if (d & 0xffe0fc1f) == 0x7860101f {
2140        return Some(InstructionKind::STCLRLH32SMemop {
2141            Rn: Rn as _,
2142            Rs: Rs as _,
2143        });
2144    }
2145    if (d & 0xffe0fc1f) == 0x7860201f {
2146        return Some(InstructionKind::STEORLH32SMemop {
2147            Rn: Rn as _,
2148            Rs: Rs as _,
2149        });
2150    }
2151    if (d & 0xffe0fc1f) == 0x7860301f {
2152        return Some(InstructionKind::STSETLH32SMemop {
2153            Rn: Rn as _,
2154            Rs: Rs as _,
2155        });
2156    }
2157    if (d & 0xffe0fc1f) == 0x7860401f {
2158        return Some(InstructionKind::STSMAXLH32SMemop {
2159            Rn: Rn as _,
2160            Rs: Rs as _,
2161        });
2162    }
2163    if (d & 0xffe0fc1f) == 0x7860501f {
2164        return Some(InstructionKind::STSMINLH32SMemop {
2165            Rn: Rn as _,
2166            Rs: Rs as _,
2167        });
2168    }
2169    if (d & 0xffe0fc1f) == 0x7860601f {
2170        return Some(InstructionKind::STUMAXLH32SMemop {
2171            Rn: Rn as _,
2172            Rs: Rs as _,
2173        });
2174    }
2175    if (d & 0xffe0fc1f) == 0x7860701f {
2176        return Some(InstructionKind::STUMINLH32SMemop {
2177            Rn: Rn as _,
2178            Rs: Rs as _,
2179        });
2180    }
2181    if (d & 0xffe0fc1f) == 0xb820001f {
2182        return Some(InstructionKind::STADD32SMemop {
2183            Rn: Rn as _,
2184            Rs: Rs as _,
2185        });
2186    }
2187    if (d & 0xffe0fc1f) == 0xb820101f {
2188        return Some(InstructionKind::STCLR32SMemop {
2189            Rn: Rn as _,
2190            Rs: Rs as _,
2191        });
2192    }
2193    if (d & 0xffe0fc1f) == 0xb820201f {
2194        return Some(InstructionKind::STEOR32SMemop {
2195            Rn: Rn as _,
2196            Rs: Rs as _,
2197        });
2198    }
2199    if (d & 0xffe0fc1f) == 0xb820301f {
2200        return Some(InstructionKind::STSET32SMemop {
2201            Rn: Rn as _,
2202            Rs: Rs as _,
2203        });
2204    }
2205    if (d & 0xffe0fc1f) == 0xb820401f {
2206        return Some(InstructionKind::STSMAX32SMemop {
2207            Rn: Rn as _,
2208            Rs: Rs as _,
2209        });
2210    }
2211    if (d & 0xffe0fc1f) == 0xb820501f {
2212        return Some(InstructionKind::STSMIN32SMemop {
2213            Rn: Rn as _,
2214            Rs: Rs as _,
2215        });
2216    }
2217    if (d & 0xffe0fc1f) == 0xb820601f {
2218        return Some(InstructionKind::STUMAX32SMemop {
2219            Rn: Rn as _,
2220            Rs: Rs as _,
2221        });
2222    }
2223    if (d & 0xffe0fc1f) == 0xb820701f {
2224        return Some(InstructionKind::STUMIN32SMemop {
2225            Rn: Rn as _,
2226            Rs: Rs as _,
2227        });
2228    }
2229    if (d & 0xffe0fc1f) == 0xb860001f {
2230        return Some(InstructionKind::STADDL32SMemop {
2231            Rn: Rn as _,
2232            Rs: Rs as _,
2233        });
2234    }
2235    if (d & 0xffe0fc1f) == 0xb860101f {
2236        return Some(InstructionKind::STCLRL32SMemop {
2237            Rn: Rn as _,
2238            Rs: Rs as _,
2239        });
2240    }
2241    if (d & 0xffe0fc1f) == 0xb860201f {
2242        return Some(InstructionKind::STEORL32SMemop {
2243            Rn: Rn as _,
2244            Rs: Rs as _,
2245        });
2246    }
2247    if (d & 0xffe0fc1f) == 0xb860301f {
2248        return Some(InstructionKind::STSETL32SMemop {
2249            Rn: Rn as _,
2250            Rs: Rs as _,
2251        });
2252    }
2253    if (d & 0xffe0fc1f) == 0xb860401f {
2254        return Some(InstructionKind::STSMAXL32SMemop {
2255            Rn: Rn as _,
2256            Rs: Rs as _,
2257        });
2258    }
2259    if (d & 0xffe0fc1f) == 0xb860501f {
2260        return Some(InstructionKind::STSMINL32SMemop {
2261            Rn: Rn as _,
2262            Rs: Rs as _,
2263        });
2264    }
2265    if (d & 0xffe0fc1f) == 0xb860601f {
2266        return Some(InstructionKind::STUMAXL32SMemop {
2267            Rn: Rn as _,
2268            Rs: Rs as _,
2269        });
2270    }
2271    if (d & 0xffe0fc1f) == 0xb860701f {
2272        return Some(InstructionKind::STUMINL32SMemop {
2273            Rn: Rn as _,
2274            Rs: Rs as _,
2275        });
2276    }
2277    if (d & 0xffe0fc1f) == 0xf820001f {
2278        return Some(InstructionKind::STADD64SMemop {
2279            Rn: Rn as _,
2280            Rs: Rs as _,
2281        });
2282    }
2283    if (d & 0xffe0fc1f) == 0xf820101f {
2284        return Some(InstructionKind::STCLR64SMemop {
2285            Rn: Rn as _,
2286            Rs: Rs as _,
2287        });
2288    }
2289    if (d & 0xffe0fc1f) == 0xf820201f {
2290        return Some(InstructionKind::STEOR64SMemop {
2291            Rn: Rn as _,
2292            Rs: Rs as _,
2293        });
2294    }
2295    if (d & 0xffe0fc1f) == 0xf820301f {
2296        return Some(InstructionKind::STSET64SMemop {
2297            Rn: Rn as _,
2298            Rs: Rs as _,
2299        });
2300    }
2301    if (d & 0xffe0fc1f) == 0xf820401f {
2302        return Some(InstructionKind::STSMAX64SMemop {
2303            Rn: Rn as _,
2304            Rs: Rs as _,
2305        });
2306    }
2307    if (d & 0xffe0fc1f) == 0xf820501f {
2308        return Some(InstructionKind::STSMIN64SMemop {
2309            Rn: Rn as _,
2310            Rs: Rs as _,
2311        });
2312    }
2313    if (d & 0xffe0fc1f) == 0xf820601f {
2314        return Some(InstructionKind::STUMAX64SMemop {
2315            Rn: Rn as _,
2316            Rs: Rs as _,
2317        });
2318    }
2319    if (d & 0xffe0fc1f) == 0xf820701f {
2320        return Some(InstructionKind::STUMIN64SMemop {
2321            Rn: Rn as _,
2322            Rs: Rs as _,
2323        });
2324    }
2325    if (d & 0xffe0fc1f) == 0xf860001f {
2326        return Some(InstructionKind::STADDL64SMemop {
2327            Rn: Rn as _,
2328            Rs: Rs as _,
2329        });
2330    }
2331    if (d & 0xffe0fc1f) == 0xf860101f {
2332        return Some(InstructionKind::STCLRL64SMemop {
2333            Rn: Rn as _,
2334            Rs: Rs as _,
2335        });
2336    }
2337    if (d & 0xffe0fc1f) == 0xf860201f {
2338        return Some(InstructionKind::STEORL64SMemop {
2339            Rn: Rn as _,
2340            Rs: Rs as _,
2341        });
2342    }
2343    if (d & 0xffe0fc1f) == 0xf860301f {
2344        return Some(InstructionKind::STSETL64SMemop {
2345            Rn: Rn as _,
2346            Rs: Rs as _,
2347        });
2348    }
2349    if (d & 0xffe0fc1f) == 0xf860401f {
2350        return Some(InstructionKind::STSMAXL64SMemop {
2351            Rn: Rn as _,
2352            Rs: Rs as _,
2353        });
2354    }
2355    if (d & 0xffe0fc1f) == 0xf860501f {
2356        return Some(InstructionKind::STSMINL64SMemop {
2357            Rn: Rn as _,
2358            Rs: Rs as _,
2359        });
2360    }
2361    if (d & 0xffe0fc1f) == 0xf860601f {
2362        return Some(InstructionKind::STUMAXL64SMemop {
2363            Rn: Rn as _,
2364            Rs: Rs as _,
2365        });
2366    }
2367    if (d & 0xffe0fc1f) == 0xf860701f {
2368        return Some(InstructionKind::STUMINL64SMemop {
2369            Rn: Rn as _,
2370            Rs: Rs as _,
2371        });
2372    }
2373    if (d & 0xffe0fc00) == 0x38208000 {
2374        return Some(InstructionKind::SWPB32Memop {
2375            Rn: Rn as _,
2376            Rs: Rs as _,
2377            Rt: Rt as _,
2378        });
2379    }
2380    if (d & 0xffe0fc00) == 0x38608000 {
2381        return Some(InstructionKind::SWPLB32Memop {
2382            Rn: Rn as _,
2383            Rs: Rs as _,
2384            Rt: Rt as _,
2385        });
2386    }
2387    if (d & 0xffe0fc00) == 0x38a00000 {
2388        return Some(InstructionKind::LDADDAB32Memop {
2389            Rn: Rn as _,
2390            Rs: Rs as _,
2391            Rt: Rt as _,
2392        });
2393    }
2394    if (d & 0xffe0fc00) == 0x38a01000 {
2395        return Some(InstructionKind::LDCLRAB32Memop {
2396            Rn: Rn as _,
2397            Rs: Rs as _,
2398            Rt: Rt as _,
2399        });
2400    }
2401    if (d & 0xffe0fc00) == 0x38a02000 {
2402        return Some(InstructionKind::LDEORAB32Memop {
2403            Rn: Rn as _,
2404            Rs: Rs as _,
2405            Rt: Rt as _,
2406        });
2407    }
2408    if (d & 0xffe0fc00) == 0x38a03000 {
2409        return Some(InstructionKind::LDSETAB32Memop {
2410            Rn: Rn as _,
2411            Rs: Rs as _,
2412            Rt: Rt as _,
2413        });
2414    }
2415    if (d & 0xffe0fc00) == 0x38a04000 {
2416        return Some(InstructionKind::LDSMAXAB32Memop {
2417            Rn: Rn as _,
2418            Rs: Rs as _,
2419            Rt: Rt as _,
2420        });
2421    }
2422    if (d & 0xffe0fc00) == 0x38a05000 {
2423        return Some(InstructionKind::LDSMINAB32Memop {
2424            Rn: Rn as _,
2425            Rs: Rs as _,
2426            Rt: Rt as _,
2427        });
2428    }
2429    if (d & 0xffe0fc00) == 0x38a06000 {
2430        return Some(InstructionKind::LDUMAXAB32Memop {
2431            Rn: Rn as _,
2432            Rs: Rs as _,
2433            Rt: Rt as _,
2434        });
2435    }
2436    if (d & 0xffe0fc00) == 0x38a07000 {
2437        return Some(InstructionKind::LDUMINAB32Memop {
2438            Rn: Rn as _,
2439            Rs: Rs as _,
2440            Rt: Rt as _,
2441        });
2442    }
2443    if (d & 0xffe0fc00) == 0x38a08000 {
2444        return Some(InstructionKind::SWPAB32Memop {
2445            Rn: Rn as _,
2446            Rs: Rs as _,
2447            Rt: Rt as _,
2448        });
2449    }
2450    if (d & 0xffe0fc00) == 0x38a0c000 {
2451        return Some(InstructionKind::LDAPRB32LMemop {
2452            Rn: Rn as _,
2453            Rs: Rs as _,
2454            Rt: Rt as _,
2455        });
2456    }
2457    if (d & 0xffe0fc00) == 0x38e00000 {
2458        return Some(InstructionKind::LDADDALB32Memop {
2459            Rn: Rn as _,
2460            Rs: Rs as _,
2461            Rt: Rt as _,
2462        });
2463    }
2464    if (d & 0xffe0fc00) == 0x38e01000 {
2465        return Some(InstructionKind::LDCLRALB32Memop {
2466            Rn: Rn as _,
2467            Rs: Rs as _,
2468            Rt: Rt as _,
2469        });
2470    }
2471    if (d & 0xffe0fc00) == 0x38e02000 {
2472        return Some(InstructionKind::LDEORALB32Memop {
2473            Rn: Rn as _,
2474            Rs: Rs as _,
2475            Rt: Rt as _,
2476        });
2477    }
2478    if (d & 0xffe0fc00) == 0x38e03000 {
2479        return Some(InstructionKind::LDSETALB32Memop {
2480            Rn: Rn as _,
2481            Rs: Rs as _,
2482            Rt: Rt as _,
2483        });
2484    }
2485    if (d & 0xffe0fc00) == 0x38e04000 {
2486        return Some(InstructionKind::LDSMAXALB32Memop {
2487            Rn: Rn as _,
2488            Rs: Rs as _,
2489            Rt: Rt as _,
2490        });
2491    }
2492    if (d & 0xffe0fc00) == 0x38e05000 {
2493        return Some(InstructionKind::LDSMINALB32Memop {
2494            Rn: Rn as _,
2495            Rs: Rs as _,
2496            Rt: Rt as _,
2497        });
2498    }
2499    if (d & 0xffe0fc00) == 0x38e06000 {
2500        return Some(InstructionKind::LDUMAXALB32Memop {
2501            Rn: Rn as _,
2502            Rs: Rs as _,
2503            Rt: Rt as _,
2504        });
2505    }
2506    if (d & 0xffe0fc00) == 0x38e07000 {
2507        return Some(InstructionKind::LDUMINALB32Memop {
2508            Rn: Rn as _,
2509            Rs: Rs as _,
2510            Rt: Rt as _,
2511        });
2512    }
2513    if (d & 0xffe0fc00) == 0x38e08000 {
2514        return Some(InstructionKind::SWPALB32Memop {
2515            Rn: Rn as _,
2516            Rs: Rs as _,
2517            Rt: Rt as _,
2518        });
2519    }
2520    if (d & 0xffe0fc00) == 0x78208000 {
2521        return Some(InstructionKind::SWPH32Memop {
2522            Rn: Rn as _,
2523            Rs: Rs as _,
2524            Rt: Rt as _,
2525        });
2526    }
2527    if (d & 0xffe0fc00) == 0x78608000 {
2528        return Some(InstructionKind::SWPLH32Memop {
2529            Rn: Rn as _,
2530            Rs: Rs as _,
2531            Rt: Rt as _,
2532        });
2533    }
2534    if (d & 0xffe0fc00) == 0x78a00000 {
2535        return Some(InstructionKind::LDADDAH32Memop {
2536            Rn: Rn as _,
2537            Rs: Rs as _,
2538            Rt: Rt as _,
2539        });
2540    }
2541    if (d & 0xffe0fc00) == 0x78a01000 {
2542        return Some(InstructionKind::LDCLRAH32Memop {
2543            Rn: Rn as _,
2544            Rs: Rs as _,
2545            Rt: Rt as _,
2546        });
2547    }
2548    if (d & 0xffe0fc00) == 0x78a02000 {
2549        return Some(InstructionKind::LDEORAH32Memop {
2550            Rn: Rn as _,
2551            Rs: Rs as _,
2552            Rt: Rt as _,
2553        });
2554    }
2555    if (d & 0xffe0fc00) == 0x78a03000 {
2556        return Some(InstructionKind::LDSETAH32Memop {
2557            Rn: Rn as _,
2558            Rs: Rs as _,
2559            Rt: Rt as _,
2560        });
2561    }
2562    if (d & 0xffe0fc00) == 0x78a04000 {
2563        return Some(InstructionKind::LDSMAXAH32Memop {
2564            Rn: Rn as _,
2565            Rs: Rs as _,
2566            Rt: Rt as _,
2567        });
2568    }
2569    if (d & 0xffe0fc00) == 0x78a05000 {
2570        return Some(InstructionKind::LDSMINAH32Memop {
2571            Rn: Rn as _,
2572            Rs: Rs as _,
2573            Rt: Rt as _,
2574        });
2575    }
2576    if (d & 0xffe0fc00) == 0x78a06000 {
2577        return Some(InstructionKind::LDUMAXAH32Memop {
2578            Rn: Rn as _,
2579            Rs: Rs as _,
2580            Rt: Rt as _,
2581        });
2582    }
2583    if (d & 0xffe0fc00) == 0x78a07000 {
2584        return Some(InstructionKind::LDUMINAH32Memop {
2585            Rn: Rn as _,
2586            Rs: Rs as _,
2587            Rt: Rt as _,
2588        });
2589    }
2590    if (d & 0xffe0fc00) == 0x78a08000 {
2591        return Some(InstructionKind::SWPAH32Memop {
2592            Rn: Rn as _,
2593            Rs: Rs as _,
2594            Rt: Rt as _,
2595        });
2596    }
2597    if (d & 0xffe0fc00) == 0x78a0c000 {
2598        return Some(InstructionKind::LDAPRH32LMemop {
2599            Rn: Rn as _,
2600            Rs: Rs as _,
2601            Rt: Rt as _,
2602        });
2603    }
2604    if (d & 0xffe0fc00) == 0x78e00000 {
2605        return Some(InstructionKind::LDADDALH32Memop {
2606            Rn: Rn as _,
2607            Rs: Rs as _,
2608            Rt: Rt as _,
2609        });
2610    }
2611    if (d & 0xffe0fc00) == 0x78e01000 {
2612        return Some(InstructionKind::LDCLRALH32Memop {
2613            Rn: Rn as _,
2614            Rs: Rs as _,
2615            Rt: Rt as _,
2616        });
2617    }
2618    if (d & 0xffe0fc00) == 0x78e02000 {
2619        return Some(InstructionKind::LDEORALH32Memop {
2620            Rn: Rn as _,
2621            Rs: Rs as _,
2622            Rt: Rt as _,
2623        });
2624    }
2625    if (d & 0xffe0fc00) == 0x78e03000 {
2626        return Some(InstructionKind::LDSETALH32Memop {
2627            Rn: Rn as _,
2628            Rs: Rs as _,
2629            Rt: Rt as _,
2630        });
2631    }
2632    if (d & 0xffe0fc00) == 0x78e04000 {
2633        return Some(InstructionKind::LDSMAXALH32Memop {
2634            Rn: Rn as _,
2635            Rs: Rs as _,
2636            Rt: Rt as _,
2637        });
2638    }
2639    if (d & 0xffe0fc00) == 0x78e05000 {
2640        return Some(InstructionKind::LDSMINALH32Memop {
2641            Rn: Rn as _,
2642            Rs: Rs as _,
2643            Rt: Rt as _,
2644        });
2645    }
2646    if (d & 0xffe0fc00) == 0x78e06000 {
2647        return Some(InstructionKind::LDUMAXALH32Memop {
2648            Rn: Rn as _,
2649            Rs: Rs as _,
2650            Rt: Rt as _,
2651        });
2652    }
2653    if (d & 0xffe0fc00) == 0x78e07000 {
2654        return Some(InstructionKind::LDUMINALH32Memop {
2655            Rn: Rn as _,
2656            Rs: Rs as _,
2657            Rt: Rt as _,
2658        });
2659    }
2660    if (d & 0xffe0fc00) == 0x78e08000 {
2661        return Some(InstructionKind::SWPALH32Memop {
2662            Rn: Rn as _,
2663            Rs: Rs as _,
2664            Rt: Rt as _,
2665        });
2666    }
2667    if (d & 0xffe0fc00) == 0xb8208000 {
2668        return Some(InstructionKind::SWP32Memop {
2669            Rn: Rn as _,
2670            Rs: Rs as _,
2671            Rt: Rt as _,
2672        });
2673    }
2674    if (d & 0xffe0fc00) == 0xb8608000 {
2675        return Some(InstructionKind::SWPL32Memop {
2676            Rn: Rn as _,
2677            Rs: Rs as _,
2678            Rt: Rt as _,
2679        });
2680    }
2681    if (d & 0xffe0fc00) == 0xb8a00000 {
2682        return Some(InstructionKind::LDADDA32Memop {
2683            Rn: Rn as _,
2684            Rs: Rs as _,
2685            Rt: Rt as _,
2686        });
2687    }
2688    if (d & 0xffe0fc00) == 0xb8a01000 {
2689        return Some(InstructionKind::LDCLRA32Memop {
2690            Rn: Rn as _,
2691            Rs: Rs as _,
2692            Rt: Rt as _,
2693        });
2694    }
2695    if (d & 0xffe0fc00) == 0xb8a02000 {
2696        return Some(InstructionKind::LDEORA32Memop {
2697            Rn: Rn as _,
2698            Rs: Rs as _,
2699            Rt: Rt as _,
2700        });
2701    }
2702    if (d & 0xffe0fc00) == 0xb8a03000 {
2703        return Some(InstructionKind::LDSETA32Memop {
2704            Rn: Rn as _,
2705            Rs: Rs as _,
2706            Rt: Rt as _,
2707        });
2708    }
2709    if (d & 0xffe0fc00) == 0xb8a04000 {
2710        return Some(InstructionKind::LDSMAXA32Memop {
2711            Rn: Rn as _,
2712            Rs: Rs as _,
2713            Rt: Rt as _,
2714        });
2715    }
2716    if (d & 0xffe0fc00) == 0xb8a05000 {
2717        return Some(InstructionKind::LDSMINA32Memop {
2718            Rn: Rn as _,
2719            Rs: Rs as _,
2720            Rt: Rt as _,
2721        });
2722    }
2723    if (d & 0xffe0fc00) == 0xb8a06000 {
2724        return Some(InstructionKind::LDUMAXA32Memop {
2725            Rn: Rn as _,
2726            Rs: Rs as _,
2727            Rt: Rt as _,
2728        });
2729    }
2730    if (d & 0xffe0fc00) == 0xb8a07000 {
2731        return Some(InstructionKind::LDUMINA32Memop {
2732            Rn: Rn as _,
2733            Rs: Rs as _,
2734            Rt: Rt as _,
2735        });
2736    }
2737    if (d & 0xffe0fc00) == 0xb8a08000 {
2738        return Some(InstructionKind::SWPA32Memop {
2739            Rn: Rn as _,
2740            Rs: Rs as _,
2741            Rt: Rt as _,
2742        });
2743    }
2744    if (d & 0xffe0fc00) == 0xb8a0c000 {
2745        return Some(InstructionKind::LDAPR32LMemop {
2746            Rn: Rn as _,
2747            Rs: Rs as _,
2748            Rt: Rt as _,
2749        });
2750    }
2751    if (d & 0xffe0fc00) == 0xb8e00000 {
2752        return Some(InstructionKind::LDADDAL32Memop {
2753            Rn: Rn as _,
2754            Rs: Rs as _,
2755            Rt: Rt as _,
2756        });
2757    }
2758    if (d & 0xffe0fc00) == 0xb8e01000 {
2759        return Some(InstructionKind::LDCLRAL32Memop {
2760            Rn: Rn as _,
2761            Rs: Rs as _,
2762            Rt: Rt as _,
2763        });
2764    }
2765    if (d & 0xffe0fc00) == 0xb8e02000 {
2766        return Some(InstructionKind::LDEORAL32Memop {
2767            Rn: Rn as _,
2768            Rs: Rs as _,
2769            Rt: Rt as _,
2770        });
2771    }
2772    if (d & 0xffe0fc00) == 0xb8e03000 {
2773        return Some(InstructionKind::LDSETAL32Memop {
2774            Rn: Rn as _,
2775            Rs: Rs as _,
2776            Rt: Rt as _,
2777        });
2778    }
2779    if (d & 0xffe0fc00) == 0xb8e04000 {
2780        return Some(InstructionKind::LDSMAXAL32Memop {
2781            Rn: Rn as _,
2782            Rs: Rs as _,
2783            Rt: Rt as _,
2784        });
2785    }
2786    if (d & 0xffe0fc00) == 0xb8e05000 {
2787        return Some(InstructionKind::LDSMINAL32Memop {
2788            Rn: Rn as _,
2789            Rs: Rs as _,
2790            Rt: Rt as _,
2791        });
2792    }
2793    if (d & 0xffe0fc00) == 0xb8e06000 {
2794        return Some(InstructionKind::LDUMAXAL32Memop {
2795            Rn: Rn as _,
2796            Rs: Rs as _,
2797            Rt: Rt as _,
2798        });
2799    }
2800    if (d & 0xffe0fc00) == 0xb8e07000 {
2801        return Some(InstructionKind::LDUMINAL32Memop {
2802            Rn: Rn as _,
2803            Rs: Rs as _,
2804            Rt: Rt as _,
2805        });
2806    }
2807    if (d & 0xffe0fc00) == 0xb8e08000 {
2808        return Some(InstructionKind::SWPAL32Memop {
2809            Rn: Rn as _,
2810            Rs: Rs as _,
2811            Rt: Rt as _,
2812        });
2813    }
2814    if (d & 0xffe0fc00) == 0xf8208000 {
2815        return Some(InstructionKind::SWP64Memop {
2816            Rn: Rn as _,
2817            Rs: Rs as _,
2818            Rt: Rt as _,
2819        });
2820    }
2821    if (d & 0xffe0fc00) == 0xf8608000 {
2822        return Some(InstructionKind::SWPL64Memop {
2823            Rn: Rn as _,
2824            Rs: Rs as _,
2825            Rt: Rt as _,
2826        });
2827    }
2828    if (d & 0xffe0fc00) == 0xf8a00000 {
2829        return Some(InstructionKind::LDADDA64Memop {
2830            Rn: Rn as _,
2831            Rs: Rs as _,
2832            Rt: Rt as _,
2833        });
2834    }
2835    if (d & 0xffe0fc00) == 0xf8a01000 {
2836        return Some(InstructionKind::LDCLRA64Memop {
2837            Rn: Rn as _,
2838            Rs: Rs as _,
2839            Rt: Rt as _,
2840        });
2841    }
2842    if (d & 0xffe0fc00) == 0xf8a02000 {
2843        return Some(InstructionKind::LDEORA64Memop {
2844            Rn: Rn as _,
2845            Rs: Rs as _,
2846            Rt: Rt as _,
2847        });
2848    }
2849    if (d & 0xffe0fc00) == 0xf8a03000 {
2850        return Some(InstructionKind::LDSETA64Memop {
2851            Rn: Rn as _,
2852            Rs: Rs as _,
2853            Rt: Rt as _,
2854        });
2855    }
2856    if (d & 0xffe0fc00) == 0xf8a04000 {
2857        return Some(InstructionKind::LDSMAXA64Memop {
2858            Rn: Rn as _,
2859            Rs: Rs as _,
2860            Rt: Rt as _,
2861        });
2862    }
2863    if (d & 0xffe0fc00) == 0xf8a05000 {
2864        return Some(InstructionKind::LDSMINA64Memop {
2865            Rn: Rn as _,
2866            Rs: Rs as _,
2867            Rt: Rt as _,
2868        });
2869    }
2870    if (d & 0xffe0fc00) == 0xf8a06000 {
2871        return Some(InstructionKind::LDUMAXA64Memop {
2872            Rn: Rn as _,
2873            Rs: Rs as _,
2874            Rt: Rt as _,
2875        });
2876    }
2877    if (d & 0xffe0fc00) == 0xf8a07000 {
2878        return Some(InstructionKind::LDUMINA64Memop {
2879            Rn: Rn as _,
2880            Rs: Rs as _,
2881            Rt: Rt as _,
2882        });
2883    }
2884    if (d & 0xffe0fc00) == 0xf8a08000 {
2885        return Some(InstructionKind::SWPA64Memop {
2886            Rn: Rn as _,
2887            Rs: Rs as _,
2888            Rt: Rt as _,
2889        });
2890    }
2891    if (d & 0xffe0fc00) == 0xf8a0c000 {
2892        return Some(InstructionKind::LDAPR64LMemop {
2893            Rn: Rn as _,
2894            Rs: Rs as _,
2895            Rt: Rt as _,
2896        });
2897    }
2898    if (d & 0xffe0fc00) == 0xf8e00000 {
2899        return Some(InstructionKind::LDADDAL64Memop {
2900            Rn: Rn as _,
2901            Rs: Rs as _,
2902            Rt: Rt as _,
2903        });
2904    }
2905    if (d & 0xffe0fc00) == 0xf8e01000 {
2906        return Some(InstructionKind::LDCLRAL64Memop {
2907            Rn: Rn as _,
2908            Rs: Rs as _,
2909            Rt: Rt as _,
2910        });
2911    }
2912    if (d & 0xffe0fc00) == 0xf8e02000 {
2913        return Some(InstructionKind::LDEORAL64Memop {
2914            Rn: Rn as _,
2915            Rs: Rs as _,
2916            Rt: Rt as _,
2917        });
2918    }
2919    if (d & 0xffe0fc00) == 0xf8e03000 {
2920        return Some(InstructionKind::LDSETAL64Memop {
2921            Rn: Rn as _,
2922            Rs: Rs as _,
2923            Rt: Rt as _,
2924        });
2925    }
2926    if (d & 0xffe0fc00) == 0xf8e04000 {
2927        return Some(InstructionKind::LDSMAXAL64Memop {
2928            Rn: Rn as _,
2929            Rs: Rs as _,
2930            Rt: Rt as _,
2931        });
2932    }
2933    if (d & 0xffe0fc00) == 0xf8e05000 {
2934        return Some(InstructionKind::LDSMINAL64Memop {
2935            Rn: Rn as _,
2936            Rs: Rs as _,
2937            Rt: Rt as _,
2938        });
2939    }
2940    if (d & 0xffe0fc00) == 0xf8e06000 {
2941        return Some(InstructionKind::LDUMAXAL64Memop {
2942            Rn: Rn as _,
2943            Rs: Rs as _,
2944            Rt: Rt as _,
2945        });
2946    }
2947    if (d & 0xffe0fc00) == 0xf8e07000 {
2948        return Some(InstructionKind::LDUMINAL64Memop {
2949            Rn: Rn as _,
2950            Rs: Rs as _,
2951            Rt: Rt as _,
2952        });
2953    }
2954    if (d & 0xffe0fc00) == 0xf8e08000 {
2955        return Some(InstructionKind::SWPAL64Memop {
2956            Rn: Rn as _,
2957            Rs: Rs as _,
2958            Rt: Rt as _,
2959        });
2960    }
2961    if (d & 0xffe0fc00) == 0x38200000 && (d & 0x00001f) != 0x00001f {
2962        return Some(InstructionKind::LDADDB32Memop {
2963            Rn: Rn as _,
2964            Rs: Rs as _,
2965            Rt: Rt as _,
2966        });
2967    }
2968    if (d & 0xffe0fc00) == 0x38201000 && (d & 0x00001f) != 0x00001f {
2969        return Some(InstructionKind::LDCLRB32Memop {
2970            Rn: Rn as _,
2971            Rs: Rs as _,
2972            Rt: Rt as _,
2973        });
2974    }
2975    if (d & 0xffe0fc00) == 0x38202000 && (d & 0x00001f) != 0x00001f {
2976        return Some(InstructionKind::LDEORB32Memop {
2977            Rn: Rn as _,
2978            Rs: Rs as _,
2979            Rt: Rt as _,
2980        });
2981    }
2982    if (d & 0xffe0fc00) == 0x38203000 && (d & 0x00001f) != 0x00001f {
2983        return Some(InstructionKind::LDSETB32Memop {
2984            Rn: Rn as _,
2985            Rs: Rs as _,
2986            Rt: Rt as _,
2987        });
2988    }
2989    if (d & 0xffe0fc00) == 0x38204000 && (d & 0x00001f) != 0x00001f {
2990        return Some(InstructionKind::LDSMAXB32Memop {
2991            Rn: Rn as _,
2992            Rs: Rs as _,
2993            Rt: Rt as _,
2994        });
2995    }
2996    if (d & 0xffe0fc00) == 0x38205000 && (d & 0x00001f) != 0x00001f {
2997        return Some(InstructionKind::LDSMINB32Memop {
2998            Rn: Rn as _,
2999            Rs: Rs as _,
3000            Rt: Rt as _,
3001        });
3002    }
3003    if (d & 0xffe0fc00) == 0x38206000 && (d & 0x00001f) != 0x00001f {
3004        return Some(InstructionKind::LDUMAXB32Memop {
3005            Rn: Rn as _,
3006            Rs: Rs as _,
3007            Rt: Rt as _,
3008        });
3009    }
3010    if (d & 0xffe0fc00) == 0x38207000 && (d & 0x00001f) != 0x00001f {
3011        return Some(InstructionKind::LDUMINB32Memop {
3012            Rn: Rn as _,
3013            Rs: Rs as _,
3014            Rt: Rt as _,
3015        });
3016    }
3017    if (d & 0xffe0fc00) == 0x38600000 && (d & 0x00001f) != 0x00001f {
3018        return Some(InstructionKind::LDADDLB32Memop {
3019            Rn: Rn as _,
3020            Rs: Rs as _,
3021            Rt: Rt as _,
3022        });
3023    }
3024    if (d & 0xffe0fc00) == 0x38601000 && (d & 0x00001f) != 0x00001f {
3025        return Some(InstructionKind::LDCLRLB32Memop {
3026            Rn: Rn as _,
3027            Rs: Rs as _,
3028            Rt: Rt as _,
3029        });
3030    }
3031    if (d & 0xffe0fc00) == 0x38602000 && (d & 0x00001f) != 0x00001f {
3032        return Some(InstructionKind::LDEORLB32Memop {
3033            Rn: Rn as _,
3034            Rs: Rs as _,
3035            Rt: Rt as _,
3036        });
3037    }
3038    if (d & 0xffe0fc00) == 0x38603000 && (d & 0x00001f) != 0x00001f {
3039        return Some(InstructionKind::LDSETLB32Memop {
3040            Rn: Rn as _,
3041            Rs: Rs as _,
3042            Rt: Rt as _,
3043        });
3044    }
3045    if (d & 0xffe0fc00) == 0x38604000 && (d & 0x00001f) != 0x00001f {
3046        return Some(InstructionKind::LDSMAXLB32Memop {
3047            Rn: Rn as _,
3048            Rs: Rs as _,
3049            Rt: Rt as _,
3050        });
3051    }
3052    if (d & 0xffe0fc00) == 0x38605000 && (d & 0x00001f) != 0x00001f {
3053        return Some(InstructionKind::LDSMINLB32Memop {
3054            Rn: Rn as _,
3055            Rs: Rs as _,
3056            Rt: Rt as _,
3057        });
3058    }
3059    if (d & 0xffe0fc00) == 0x38606000 && (d & 0x00001f) != 0x00001f {
3060        return Some(InstructionKind::LDUMAXLB32Memop {
3061            Rn: Rn as _,
3062            Rs: Rs as _,
3063            Rt: Rt as _,
3064        });
3065    }
3066    if (d & 0xffe0fc00) == 0x38607000 && (d & 0x00001f) != 0x00001f {
3067        return Some(InstructionKind::LDUMINLB32Memop {
3068            Rn: Rn as _,
3069            Rs: Rs as _,
3070            Rt: Rt as _,
3071        });
3072    }
3073    if (d & 0xffe0fc00) == 0x78200000 && (d & 0x00001f) != 0x00001f {
3074        return Some(InstructionKind::LDADDH32Memop {
3075            Rn: Rn as _,
3076            Rs: Rs as _,
3077            Rt: Rt as _,
3078        });
3079    }
3080    if (d & 0xffe0fc00) == 0x78201000 && (d & 0x00001f) != 0x00001f {
3081        return Some(InstructionKind::LDCLRH32Memop {
3082            Rn: Rn as _,
3083            Rs: Rs as _,
3084            Rt: Rt as _,
3085        });
3086    }
3087    if (d & 0xffe0fc00) == 0x78202000 && (d & 0x00001f) != 0x00001f {
3088        return Some(InstructionKind::LDEORH32Memop {
3089            Rn: Rn as _,
3090            Rs: Rs as _,
3091            Rt: Rt as _,
3092        });
3093    }
3094    if (d & 0xffe0fc00) == 0x78203000 && (d & 0x00001f) != 0x00001f {
3095        return Some(InstructionKind::LDSETH32Memop {
3096            Rn: Rn as _,
3097            Rs: Rs as _,
3098            Rt: Rt as _,
3099        });
3100    }
3101    if (d & 0xffe0fc00) == 0x78204000 && (d & 0x00001f) != 0x00001f {
3102        return Some(InstructionKind::LDSMAXH32Memop {
3103            Rn: Rn as _,
3104            Rs: Rs as _,
3105            Rt: Rt as _,
3106        });
3107    }
3108    if (d & 0xffe0fc00) == 0x78205000 && (d & 0x00001f) != 0x00001f {
3109        return Some(InstructionKind::LDSMINH32Memop {
3110            Rn: Rn as _,
3111            Rs: Rs as _,
3112            Rt: Rt as _,
3113        });
3114    }
3115    if (d & 0xffe0fc00) == 0x78206000 && (d & 0x00001f) != 0x00001f {
3116        return Some(InstructionKind::LDUMAXH32Memop {
3117            Rn: Rn as _,
3118            Rs: Rs as _,
3119            Rt: Rt as _,
3120        });
3121    }
3122    if (d & 0xffe0fc00) == 0x78207000 && (d & 0x00001f) != 0x00001f {
3123        return Some(InstructionKind::LDUMINH32Memop {
3124            Rn: Rn as _,
3125            Rs: Rs as _,
3126            Rt: Rt as _,
3127        });
3128    }
3129    if (d & 0xffe0fc00) == 0x78600000 && (d & 0x00001f) != 0x00001f {
3130        return Some(InstructionKind::LDADDLH32Memop {
3131            Rn: Rn as _,
3132            Rs: Rs as _,
3133            Rt: Rt as _,
3134        });
3135    }
3136    if (d & 0xffe0fc00) == 0x78601000 && (d & 0x00001f) != 0x00001f {
3137        return Some(InstructionKind::LDCLRLH32Memop {
3138            Rn: Rn as _,
3139            Rs: Rs as _,
3140            Rt: Rt as _,
3141        });
3142    }
3143    if (d & 0xffe0fc00) == 0x78602000 && (d & 0x00001f) != 0x00001f {
3144        return Some(InstructionKind::LDEORLH32Memop {
3145            Rn: Rn as _,
3146            Rs: Rs as _,
3147            Rt: Rt as _,
3148        });
3149    }
3150    if (d & 0xffe0fc00) == 0x78603000 && (d & 0x00001f) != 0x00001f {
3151        return Some(InstructionKind::LDSETLH32Memop {
3152            Rn: Rn as _,
3153            Rs: Rs as _,
3154            Rt: Rt as _,
3155        });
3156    }
3157    if (d & 0xffe0fc00) == 0x78604000 && (d & 0x00001f) != 0x00001f {
3158        return Some(InstructionKind::LDSMAXLH32Memop {
3159            Rn: Rn as _,
3160            Rs: Rs as _,
3161            Rt: Rt as _,
3162        });
3163    }
3164    if (d & 0xffe0fc00) == 0x78605000 && (d & 0x00001f) != 0x00001f {
3165        return Some(InstructionKind::LDSMINLH32Memop {
3166            Rn: Rn as _,
3167            Rs: Rs as _,
3168            Rt: Rt as _,
3169        });
3170    }
3171    if (d & 0xffe0fc00) == 0x78606000 && (d & 0x00001f) != 0x00001f {
3172        return Some(InstructionKind::LDUMAXLH32Memop {
3173            Rn: Rn as _,
3174            Rs: Rs as _,
3175            Rt: Rt as _,
3176        });
3177    }
3178    if (d & 0xffe0fc00) == 0x78607000 && (d & 0x00001f) != 0x00001f {
3179        return Some(InstructionKind::LDUMINLH32Memop {
3180            Rn: Rn as _,
3181            Rs: Rs as _,
3182            Rt: Rt as _,
3183        });
3184    }
3185    if (d & 0xffe0fc00) == 0xb8200000 && (d & 0x00001f) != 0x00001f {
3186        return Some(InstructionKind::LDADD32Memop {
3187            Rn: Rn as _,
3188            Rs: Rs as _,
3189            Rt: Rt as _,
3190        });
3191    }
3192    if (d & 0xffe0fc00) == 0xb8201000 && (d & 0x00001f) != 0x00001f {
3193        return Some(InstructionKind::LDCLR32Memop {
3194            Rn: Rn as _,
3195            Rs: Rs as _,
3196            Rt: Rt as _,
3197        });
3198    }
3199    if (d & 0xffe0fc00) == 0xb8202000 && (d & 0x00001f) != 0x00001f {
3200        return Some(InstructionKind::LDEOR32Memop {
3201            Rn: Rn as _,
3202            Rs: Rs as _,
3203            Rt: Rt as _,
3204        });
3205    }
3206    if (d & 0xffe0fc00) == 0xb8203000 && (d & 0x00001f) != 0x00001f {
3207        return Some(InstructionKind::LDSET32Memop {
3208            Rn: Rn as _,
3209            Rs: Rs as _,
3210            Rt: Rt as _,
3211        });
3212    }
3213    if (d & 0xffe0fc00) == 0xb8204000 && (d & 0x00001f) != 0x00001f {
3214        return Some(InstructionKind::LDSMAX32Memop {
3215            Rn: Rn as _,
3216            Rs: Rs as _,
3217            Rt: Rt as _,
3218        });
3219    }
3220    if (d & 0xffe0fc00) == 0xb8205000 && (d & 0x00001f) != 0x00001f {
3221        return Some(InstructionKind::LDSMIN32Memop {
3222            Rn: Rn as _,
3223            Rs: Rs as _,
3224            Rt: Rt as _,
3225        });
3226    }
3227    if (d & 0xffe0fc00) == 0xb8206000 && (d & 0x00001f) != 0x00001f {
3228        return Some(InstructionKind::LDUMAX32Memop {
3229            Rn: Rn as _,
3230            Rs: Rs as _,
3231            Rt: Rt as _,
3232        });
3233    }
3234    if (d & 0xffe0fc00) == 0xb8207000 && (d & 0x00001f) != 0x00001f {
3235        return Some(InstructionKind::LDUMIN32Memop {
3236            Rn: Rn as _,
3237            Rs: Rs as _,
3238            Rt: Rt as _,
3239        });
3240    }
3241    if (d & 0xffe0fc00) == 0xb8600000 && (d & 0x00001f) != 0x00001f {
3242        return Some(InstructionKind::LDADDL32Memop {
3243            Rn: Rn as _,
3244            Rs: Rs as _,
3245            Rt: Rt as _,
3246        });
3247    }
3248    if (d & 0xffe0fc00) == 0xb8601000 && (d & 0x00001f) != 0x00001f {
3249        return Some(InstructionKind::LDCLRL32Memop {
3250            Rn: Rn as _,
3251            Rs: Rs as _,
3252            Rt: Rt as _,
3253        });
3254    }
3255    if (d & 0xffe0fc00) == 0xb8602000 && (d & 0x00001f) != 0x00001f {
3256        return Some(InstructionKind::LDEORL32Memop {
3257            Rn: Rn as _,
3258            Rs: Rs as _,
3259            Rt: Rt as _,
3260        });
3261    }
3262    if (d & 0xffe0fc00) == 0xb8603000 && (d & 0x00001f) != 0x00001f {
3263        return Some(InstructionKind::LDSETL32Memop {
3264            Rn: Rn as _,
3265            Rs: Rs as _,
3266            Rt: Rt as _,
3267        });
3268    }
3269    if (d & 0xffe0fc00) == 0xb8604000 && (d & 0x00001f) != 0x00001f {
3270        return Some(InstructionKind::LDSMAXL32Memop {
3271            Rn: Rn as _,
3272            Rs: Rs as _,
3273            Rt: Rt as _,
3274        });
3275    }
3276    if (d & 0xffe0fc00) == 0xb8605000 && (d & 0x00001f) != 0x00001f {
3277        return Some(InstructionKind::LDSMINL32Memop {
3278            Rn: Rn as _,
3279            Rs: Rs as _,
3280            Rt: Rt as _,
3281        });
3282    }
3283    if (d & 0xffe0fc00) == 0xb8606000 && (d & 0x00001f) != 0x00001f {
3284        return Some(InstructionKind::LDUMAXL32Memop {
3285            Rn: Rn as _,
3286            Rs: Rs as _,
3287            Rt: Rt as _,
3288        });
3289    }
3290    if (d & 0xffe0fc00) == 0xb8607000 && (d & 0x00001f) != 0x00001f {
3291        return Some(InstructionKind::LDUMINL32Memop {
3292            Rn: Rn as _,
3293            Rs: Rs as _,
3294            Rt: Rt as _,
3295        });
3296    }
3297    if (d & 0xffe0fc00) == 0xf8200000 && (d & 0x00001f) != 0x00001f {
3298        return Some(InstructionKind::LDADD64Memop {
3299            Rn: Rn as _,
3300            Rs: Rs as _,
3301            Rt: Rt as _,
3302        });
3303    }
3304    if (d & 0xffe0fc00) == 0xf8201000 && (d & 0x00001f) != 0x00001f {
3305        return Some(InstructionKind::LDCLR64Memop {
3306            Rn: Rn as _,
3307            Rs: Rs as _,
3308            Rt: Rt as _,
3309        });
3310    }
3311    if (d & 0xffe0fc00) == 0xf8202000 && (d & 0x00001f) != 0x00001f {
3312        return Some(InstructionKind::LDEOR64Memop {
3313            Rn: Rn as _,
3314            Rs: Rs as _,
3315            Rt: Rt as _,
3316        });
3317    }
3318    if (d & 0xffe0fc00) == 0xf8203000 && (d & 0x00001f) != 0x00001f {
3319        return Some(InstructionKind::LDSET64Memop {
3320            Rn: Rn as _,
3321            Rs: Rs as _,
3322            Rt: Rt as _,
3323        });
3324    }
3325    if (d & 0xffe0fc00) == 0xf8204000 && (d & 0x00001f) != 0x00001f {
3326        return Some(InstructionKind::LDSMAX64Memop {
3327            Rn: Rn as _,
3328            Rs: Rs as _,
3329            Rt: Rt as _,
3330        });
3331    }
3332    if (d & 0xffe0fc00) == 0xf8205000 && (d & 0x00001f) != 0x00001f {
3333        return Some(InstructionKind::LDSMIN64Memop {
3334            Rn: Rn as _,
3335            Rs: Rs as _,
3336            Rt: Rt as _,
3337        });
3338    }
3339    if (d & 0xffe0fc00) == 0xf8206000 && (d & 0x00001f) != 0x00001f {
3340        return Some(InstructionKind::LDUMAX64Memop {
3341            Rn: Rn as _,
3342            Rs: Rs as _,
3343            Rt: Rt as _,
3344        });
3345    }
3346    if (d & 0xffe0fc00) == 0xf8207000 && (d & 0x00001f) != 0x00001f {
3347        return Some(InstructionKind::LDUMIN64Memop {
3348            Rn: Rn as _,
3349            Rs: Rs as _,
3350            Rt: Rt as _,
3351        });
3352    }
3353    if (d & 0xffe0fc00) == 0xf8600000 && (d & 0x00001f) != 0x00001f {
3354        return Some(InstructionKind::LDADDL64Memop {
3355            Rn: Rn as _,
3356            Rs: Rs as _,
3357            Rt: Rt as _,
3358        });
3359    }
3360    if (d & 0xffe0fc00) == 0xf8601000 && (d & 0x00001f) != 0x00001f {
3361        return Some(InstructionKind::LDCLRL64Memop {
3362            Rn: Rn as _,
3363            Rs: Rs as _,
3364            Rt: Rt as _,
3365        });
3366    }
3367    if (d & 0xffe0fc00) == 0xf8602000 && (d & 0x00001f) != 0x00001f {
3368        return Some(InstructionKind::LDEORL64Memop {
3369            Rn: Rn as _,
3370            Rs: Rs as _,
3371            Rt: Rt as _,
3372        });
3373    }
3374    if (d & 0xffe0fc00) == 0xf8603000 && (d & 0x00001f) != 0x00001f {
3375        return Some(InstructionKind::LDSETL64Memop {
3376            Rn: Rn as _,
3377            Rs: Rs as _,
3378            Rt: Rt as _,
3379        });
3380    }
3381    if (d & 0xffe0fc00) == 0xf8604000 && (d & 0x00001f) != 0x00001f {
3382        return Some(InstructionKind::LDSMAXL64Memop {
3383            Rn: Rn as _,
3384            Rs: Rs as _,
3385            Rt: Rt as _,
3386        });
3387    }
3388    if (d & 0xffe0fc00) == 0xf8605000 && (d & 0x00001f) != 0x00001f {
3389        return Some(InstructionKind::LDSMINL64Memop {
3390            Rn: Rn as _,
3391            Rs: Rs as _,
3392            Rt: Rt as _,
3393        });
3394    }
3395    if (d & 0xffe0fc00) == 0xf8606000 && (d & 0x00001f) != 0x00001f {
3396        return Some(InstructionKind::LDUMAXL64Memop {
3397            Rn: Rn as _,
3398            Rs: Rs as _,
3399            Rt: Rt as _,
3400        });
3401    }
3402    if (d & 0xffe0fc00) == 0xf8607000 && (d & 0x00001f) != 0x00001f {
3403        return Some(InstructionKind::LDUMINL64Memop {
3404            Rn: Rn as _,
3405            Rs: Rs as _,
3406            Rt: Rt as _,
3407        });
3408    }
3409    None
3410}
3411
3412pub const fn decode_loadlit(d: u32) -> Option<InstructionKind> {
3413    ["Could not decode."][((d & 0x3b000000) != 0x18000000) as usize];
3414    let Rt = d & 0x1F;
3415    let V = (d >> 26) & 1;
3416    let imm19 = (d >> 5) & 0x7FFFF;
3417    let opc = (d >> 30) & 3;
3418    if (d & 0xff000000) == 0x18000000 {
3419        return Some(InstructionKind::LDR32Loadlit {
3420            Rt: Rt as _,
3421            imm19: imm19 as _,
3422        });
3423    }
3424    if (d & 0xff000000) == 0x1c000000 {
3425        return Some(InstructionKind::LDRSLoadlit {
3426            Rt: Rt as _,
3427            imm19: imm19 as _,
3428        });
3429    }
3430    if (d & 0xff000000) == 0x58000000 {
3431        return Some(InstructionKind::LDR64Loadlit {
3432            Rt: Rt as _,
3433            imm19: imm19 as _,
3434        });
3435    }
3436    if (d & 0xff000000) == 0x5c000000 {
3437        return Some(InstructionKind::LDRDLoadlit {
3438            Rt: Rt as _,
3439            imm19: imm19 as _,
3440        });
3441    }
3442    if (d & 0xff000000) == 0x98000000 {
3443        return Some(InstructionKind::LDRSW64Loadlit {
3444            Rt: Rt as _,
3445            imm19: imm19 as _,
3446        });
3447    }
3448    if (d & 0xff000000) == 0x9c000000 {
3449        return Some(InstructionKind::LDRQLoadlit {
3450            Rt: Rt as _,
3451            imm19: imm19 as _,
3452        });
3453    }
3454    if (d & 0xff000000) == 0xd8000000 {
3455        return Some(InstructionKind::PRFMPLoadlit {
3456            Rt: Rt as _,
3457            imm19: imm19 as _,
3458        });
3459    }
3460    None
3461}
3462
3463pub const fn decode_ldstexcl(d: u32) -> Option<InstructionKind> {
3464    ["Could not decode."][((d & 0x3f000000) != 0x08000000) as usize];
3465    let L = (d >> 22) & 1;
3466    let Rn = (d >> 5) & 0x1F;
3467    let Rs = (d >> 16) & 0x1F;
3468    let Rt = d & 0x1F;
3469    let Rt2 = (d >> 10) & 0x1F;
3470    let o0 = (d >> 15) & 1;
3471    let o1 = (d >> 21) & 1;
3472    let o2 = (d >> 23) & 1;
3473    let size = (d >> 30) & 3;
3474    if (d & 0xffe0fc00) == 0x08207c00 {
3475        return Some(InstructionKind::CASPCp32Ldstexcl {
3476            Rn: Rn as _,
3477            Rs: Rs as _,
3478            Rt: Rt as _,
3479        });
3480    }
3481    if (d & 0xffe0fc00) == 0x0820fc00 {
3482        return Some(InstructionKind::CASPLCp32Ldstexcl {
3483            Rn: Rn as _,
3484            Rs: Rs as _,
3485            Rt: Rt as _,
3486        });
3487    }
3488    if (d & 0xffe0fc00) == 0x08607c00 {
3489        return Some(InstructionKind::CASPACp32Ldstexcl {
3490            Rn: Rn as _,
3491            Rs: Rs as _,
3492            Rt: Rt as _,
3493        });
3494    }
3495    if (d & 0xffe0fc00) == 0x0860fc00 {
3496        return Some(InstructionKind::CASPALCp32Ldstexcl {
3497            Rn: Rn as _,
3498            Rs: Rs as _,
3499            Rt: Rt as _,
3500        });
3501    }
3502    if (d & 0xffe0fc00) == 0x08a07c00 {
3503        return Some(InstructionKind::CASBC32Ldstexcl {
3504            Rn: Rn as _,
3505            Rs: Rs as _,
3506            Rt: Rt as _,
3507        });
3508    }
3509    if (d & 0xffe0fc00) == 0x08a0fc00 {
3510        return Some(InstructionKind::CASLBC32Ldstexcl {
3511            Rn: Rn as _,
3512            Rs: Rs as _,
3513            Rt: Rt as _,
3514        });
3515    }
3516    if (d & 0xffe0fc00) == 0x08e07c00 {
3517        return Some(InstructionKind::CASABC32Ldstexcl {
3518            Rn: Rn as _,
3519            Rs: Rs as _,
3520            Rt: Rt as _,
3521        });
3522    }
3523    if (d & 0xffe0fc00) == 0x08e0fc00 {
3524        return Some(InstructionKind::CASALBC32Ldstexcl {
3525            Rn: Rn as _,
3526            Rs: Rs as _,
3527            Rt: Rt as _,
3528        });
3529    }
3530    if (d & 0xffe0fc00) == 0x48207c00 {
3531        return Some(InstructionKind::CASPCp64Ldstexcl {
3532            Rn: Rn as _,
3533            Rs: Rs as _,
3534            Rt: Rt as _,
3535        });
3536    }
3537    if (d & 0xffe0fc00) == 0x4820fc00 {
3538        return Some(InstructionKind::CASPLCp64Ldstexcl {
3539            Rn: Rn as _,
3540            Rs: Rs as _,
3541            Rt: Rt as _,
3542        });
3543    }
3544    if (d & 0xffe0fc00) == 0x48607c00 {
3545        return Some(InstructionKind::CASPACp64Ldstexcl {
3546            Rn: Rn as _,
3547            Rs: Rs as _,
3548            Rt: Rt as _,
3549        });
3550    }
3551    if (d & 0xffe0fc00) == 0x4860fc00 {
3552        return Some(InstructionKind::CASPALCp64Ldstexcl {
3553            Rn: Rn as _,
3554            Rs: Rs as _,
3555            Rt: Rt as _,
3556        });
3557    }
3558    if (d & 0xffe0fc00) == 0x48a07c00 {
3559        return Some(InstructionKind::CASHC32Ldstexcl {
3560            Rn: Rn as _,
3561            Rs: Rs as _,
3562            Rt: Rt as _,
3563        });
3564    }
3565    if (d & 0xffe0fc00) == 0x48a0fc00 {
3566        return Some(InstructionKind::CASLHC32Ldstexcl {
3567            Rn: Rn as _,
3568            Rs: Rs as _,
3569            Rt: Rt as _,
3570        });
3571    }
3572    if (d & 0xffe0fc00) == 0x48e07c00 {
3573        return Some(InstructionKind::CASAHC32Ldstexcl {
3574            Rn: Rn as _,
3575            Rs: Rs as _,
3576            Rt: Rt as _,
3577        });
3578    }
3579    if (d & 0xffe0fc00) == 0x48e0fc00 {
3580        return Some(InstructionKind::CASALHC32Ldstexcl {
3581            Rn: Rn as _,
3582            Rs: Rs as _,
3583            Rt: Rt as _,
3584        });
3585    }
3586    if (d & 0xffe0fc00) == 0x88a07c00 {
3587        return Some(InstructionKind::CASC32Ldstexcl {
3588            Rn: Rn as _,
3589            Rs: Rs as _,
3590            Rt: Rt as _,
3591        });
3592    }
3593    if (d & 0xffe0fc00) == 0x88a0fc00 {
3594        return Some(InstructionKind::CASLC32Ldstexcl {
3595            Rn: Rn as _,
3596            Rs: Rs as _,
3597            Rt: Rt as _,
3598        });
3599    }
3600    if (d & 0xffe0fc00) == 0x88e07c00 {
3601        return Some(InstructionKind::CASAC32Ldstexcl {
3602            Rn: Rn as _,
3603            Rs: Rs as _,
3604            Rt: Rt as _,
3605        });
3606    }
3607    if (d & 0xffe0fc00) == 0x88e0fc00 {
3608        return Some(InstructionKind::CASALC32Ldstexcl {
3609            Rn: Rn as _,
3610            Rs: Rs as _,
3611            Rt: Rt as _,
3612        });
3613    }
3614    if (d & 0xffe0fc00) == 0xc8a07c00 {
3615        return Some(InstructionKind::CASC64Ldstexcl {
3616            Rn: Rn as _,
3617            Rs: Rs as _,
3618            Rt: Rt as _,
3619        });
3620    }
3621    if (d & 0xffe0fc00) == 0xc8a0fc00 {
3622        return Some(InstructionKind::CASLC64Ldstexcl {
3623            Rn: Rn as _,
3624            Rs: Rs as _,
3625            Rt: Rt as _,
3626        });
3627    }
3628    if (d & 0xffe0fc00) == 0xc8e07c00 {
3629        return Some(InstructionKind::CASAC64Ldstexcl {
3630            Rn: Rn as _,
3631            Rs: Rs as _,
3632            Rt: Rt as _,
3633        });
3634    }
3635    if (d & 0xffe0fc00) == 0xc8e0fc00 {
3636        return Some(InstructionKind::CASALC64Ldstexcl {
3637            Rn: Rn as _,
3638            Rs: Rs as _,
3639            Rt: Rt as _,
3640        });
3641    }
3642    if (d & 0xffe08000) == 0x08000000 {
3643        return Some(InstructionKind::STXRBSr32Ldstexcl {
3644            Rn: Rn as _,
3645            Rs: Rs as _,
3646            Rt: Rt as _,
3647            Rt2: Rt2 as _,
3648        });
3649    }
3650    if (d & 0xffe08000) == 0x08008000 {
3651        return Some(InstructionKind::STLXRBSr32Ldstexcl {
3652            Rn: Rn as _,
3653            Rs: Rs as _,
3654            Rt: Rt as _,
3655            Rt2: Rt2 as _,
3656        });
3657    }
3658    if (d & 0xffe08000) == 0x08400000 {
3659        return Some(InstructionKind::LDXRBLr32Ldstexcl {
3660            Rn: Rn as _,
3661            Rs: Rs as _,
3662            Rt: Rt as _,
3663            Rt2: Rt2 as _,
3664        });
3665    }
3666    if (d & 0xffe08000) == 0x08408000 {
3667        return Some(InstructionKind::LDAXRBLr32Ldstexcl {
3668            Rn: Rn as _,
3669            Rs: Rs as _,
3670            Rt: Rt as _,
3671            Rt2: Rt2 as _,
3672        });
3673    }
3674    if (d & 0xffe08000) == 0x08800000 {
3675        return Some(InstructionKind::STLLRBSl32Ldstexcl {
3676            Rn: Rn as _,
3677            Rs: Rs as _,
3678            Rt: Rt as _,
3679            Rt2: Rt2 as _,
3680        });
3681    }
3682    if (d & 0xffe08000) == 0x08808000 {
3683        return Some(InstructionKind::STLRBSl32Ldstexcl {
3684            Rn: Rn as _,
3685            Rs: Rs as _,
3686            Rt: Rt as _,
3687            Rt2: Rt2 as _,
3688        });
3689    }
3690    if (d & 0xffe08000) == 0x08c00000 {
3691        return Some(InstructionKind::LDLARBLr32Ldstexcl {
3692            Rn: Rn as _,
3693            Rs: Rs as _,
3694            Rt: Rt as _,
3695            Rt2: Rt2 as _,
3696        });
3697    }
3698    if (d & 0xffe08000) == 0x08c08000 {
3699        return Some(InstructionKind::LDARBLr32Ldstexcl {
3700            Rn: Rn as _,
3701            Rs: Rs as _,
3702            Rt: Rt as _,
3703            Rt2: Rt2 as _,
3704        });
3705    }
3706    if (d & 0xffe08000) == 0x48000000 {
3707        return Some(InstructionKind::STXRHSr32Ldstexcl {
3708            Rn: Rn as _,
3709            Rs: Rs as _,
3710            Rt: Rt as _,
3711            Rt2: Rt2 as _,
3712        });
3713    }
3714    if (d & 0xffe08000) == 0x48008000 {
3715        return Some(InstructionKind::STLXRHSr32Ldstexcl {
3716            Rn: Rn as _,
3717            Rs: Rs as _,
3718            Rt: Rt as _,
3719            Rt2: Rt2 as _,
3720        });
3721    }
3722    if (d & 0xffe08000) == 0x48400000 {
3723        return Some(InstructionKind::LDXRHLr32Ldstexcl {
3724            Rn: Rn as _,
3725            Rs: Rs as _,
3726            Rt: Rt as _,
3727            Rt2: Rt2 as _,
3728        });
3729    }
3730    if (d & 0xffe08000) == 0x48408000 {
3731        return Some(InstructionKind::LDAXRHLr32Ldstexcl {
3732            Rn: Rn as _,
3733            Rs: Rs as _,
3734            Rt: Rt as _,
3735            Rt2: Rt2 as _,
3736        });
3737    }
3738    if (d & 0xffe08000) == 0x48800000 {
3739        return Some(InstructionKind::STLLRHSl32Ldstexcl {
3740            Rn: Rn as _,
3741            Rs: Rs as _,
3742            Rt: Rt as _,
3743            Rt2: Rt2 as _,
3744        });
3745    }
3746    if (d & 0xffe08000) == 0x48808000 {
3747        return Some(InstructionKind::STLRHSl32Ldstexcl {
3748            Rn: Rn as _,
3749            Rs: Rs as _,
3750            Rt: Rt as _,
3751            Rt2: Rt2 as _,
3752        });
3753    }
3754    if (d & 0xffe08000) == 0x48c00000 {
3755        return Some(InstructionKind::LDLARHLr32Ldstexcl {
3756            Rn: Rn as _,
3757            Rs: Rs as _,
3758            Rt: Rt as _,
3759            Rt2: Rt2 as _,
3760        });
3761    }
3762    if (d & 0xffe08000) == 0x48c08000 {
3763        return Some(InstructionKind::LDARHLr32Ldstexcl {
3764            Rn: Rn as _,
3765            Rs: Rs as _,
3766            Rt: Rt as _,
3767            Rt2: Rt2 as _,
3768        });
3769    }
3770    if (d & 0xffe08000) == 0x88000000 {
3771        return Some(InstructionKind::STXRSr32Ldstexcl {
3772            Rn: Rn as _,
3773            Rs: Rs as _,
3774            Rt: Rt as _,
3775            Rt2: Rt2 as _,
3776        });
3777    }
3778    if (d & 0xffe08000) == 0x88008000 {
3779        return Some(InstructionKind::STLXRSr32Ldstexcl {
3780            Rn: Rn as _,
3781            Rs: Rs as _,
3782            Rt: Rt as _,
3783            Rt2: Rt2 as _,
3784        });
3785    }
3786    if (d & 0xffe08000) == 0x88200000 {
3787        return Some(InstructionKind::STXPSp32Ldstexcl {
3788            Rn: Rn as _,
3789            Rs: Rs as _,
3790            Rt: Rt as _,
3791            Rt2: Rt2 as _,
3792        });
3793    }
3794    if (d & 0xffe08000) == 0x88208000 {
3795        return Some(InstructionKind::STLXPSp32Ldstexcl {
3796            Rn: Rn as _,
3797            Rs: Rs as _,
3798            Rt: Rt as _,
3799            Rt2: Rt2 as _,
3800        });
3801    }
3802    if (d & 0xffe08000) == 0x88400000 {
3803        return Some(InstructionKind::LDXRLr32Ldstexcl {
3804            Rn: Rn as _,
3805            Rs: Rs as _,
3806            Rt: Rt as _,
3807            Rt2: Rt2 as _,
3808        });
3809    }
3810    if (d & 0xffe08000) == 0x88408000 {
3811        return Some(InstructionKind::LDAXRLr32Ldstexcl {
3812            Rn: Rn as _,
3813            Rs: Rs as _,
3814            Rt: Rt as _,
3815            Rt2: Rt2 as _,
3816        });
3817    }
3818    if (d & 0xffe08000) == 0x88600000 {
3819        return Some(InstructionKind::LDXPLp32Ldstexcl {
3820            Rn: Rn as _,
3821            Rs: Rs as _,
3822            Rt: Rt as _,
3823            Rt2: Rt2 as _,
3824        });
3825    }
3826    if (d & 0xffe08000) == 0x88608000 {
3827        return Some(InstructionKind::LDAXPLp32Ldstexcl {
3828            Rn: Rn as _,
3829            Rs: Rs as _,
3830            Rt: Rt as _,
3831            Rt2: Rt2 as _,
3832        });
3833    }
3834    if (d & 0xffe08000) == 0x88800000 {
3835        return Some(InstructionKind::STLLRSl32Ldstexcl {
3836            Rn: Rn as _,
3837            Rs: Rs as _,
3838            Rt: Rt as _,
3839            Rt2: Rt2 as _,
3840        });
3841    }
3842    if (d & 0xffe08000) == 0x88808000 {
3843        return Some(InstructionKind::STLRSl32Ldstexcl {
3844            Rn: Rn as _,
3845            Rs: Rs as _,
3846            Rt: Rt as _,
3847            Rt2: Rt2 as _,
3848        });
3849    }
3850    if (d & 0xffe08000) == 0x88c00000 {
3851        return Some(InstructionKind::LDLARLr32Ldstexcl {
3852            Rn: Rn as _,
3853            Rs: Rs as _,
3854            Rt: Rt as _,
3855            Rt2: Rt2 as _,
3856        });
3857    }
3858    if (d & 0xffe08000) == 0x88c08000 {
3859        return Some(InstructionKind::LDARLr32Ldstexcl {
3860            Rn: Rn as _,
3861            Rs: Rs as _,
3862            Rt: Rt as _,
3863            Rt2: Rt2 as _,
3864        });
3865    }
3866    if (d & 0xffe08000) == 0xc8000000 {
3867        return Some(InstructionKind::STXRSr64Ldstexcl {
3868            Rn: Rn as _,
3869            Rs: Rs as _,
3870            Rt: Rt as _,
3871            Rt2: Rt2 as _,
3872        });
3873    }
3874    if (d & 0xffe08000) == 0xc8008000 {
3875        return Some(InstructionKind::STLXRSr64Ldstexcl {
3876            Rn: Rn as _,
3877            Rs: Rs as _,
3878            Rt: Rt as _,
3879            Rt2: Rt2 as _,
3880        });
3881    }
3882    if (d & 0xffe08000) == 0xc8200000 {
3883        return Some(InstructionKind::STXPSp64Ldstexcl {
3884            Rn: Rn as _,
3885            Rs: Rs as _,
3886            Rt: Rt as _,
3887            Rt2: Rt2 as _,
3888        });
3889    }
3890    if (d & 0xffe08000) == 0xc8208000 {
3891        return Some(InstructionKind::STLXPSp64Ldstexcl {
3892            Rn: Rn as _,
3893            Rs: Rs as _,
3894            Rt: Rt as _,
3895            Rt2: Rt2 as _,
3896        });
3897    }
3898    if (d & 0xffe08000) == 0xc8400000 {
3899        return Some(InstructionKind::LDXRLr64Ldstexcl {
3900            Rn: Rn as _,
3901            Rs: Rs as _,
3902            Rt: Rt as _,
3903            Rt2: Rt2 as _,
3904        });
3905    }
3906    if (d & 0xffe08000) == 0xc8408000 {
3907        return Some(InstructionKind::LDAXRLr64Ldstexcl {
3908            Rn: Rn as _,
3909            Rs: Rs as _,
3910            Rt: Rt as _,
3911            Rt2: Rt2 as _,
3912        });
3913    }
3914    if (d & 0xffe08000) == 0xc8600000 {
3915        return Some(InstructionKind::LDXPLp64Ldstexcl {
3916            Rn: Rn as _,
3917            Rs: Rs as _,
3918            Rt: Rt as _,
3919            Rt2: Rt2 as _,
3920        });
3921    }
3922    if (d & 0xffe08000) == 0xc8608000 {
3923        return Some(InstructionKind::LDAXPLp64Ldstexcl {
3924            Rn: Rn as _,
3925            Rs: Rs as _,
3926            Rt: Rt as _,
3927            Rt2: Rt2 as _,
3928        });
3929    }
3930    if (d & 0xffe08000) == 0xc8800000 {
3931        return Some(InstructionKind::STLLRSl64Ldstexcl {
3932            Rn: Rn as _,
3933            Rs: Rs as _,
3934            Rt: Rt as _,
3935            Rt2: Rt2 as _,
3936        });
3937    }
3938    if (d & 0xffe08000) == 0xc8808000 {
3939        return Some(InstructionKind::STLRSl64Ldstexcl {
3940            Rn: Rn as _,
3941            Rs: Rs as _,
3942            Rt: Rt as _,
3943            Rt2: Rt2 as _,
3944        });
3945    }
3946    if (d & 0xffe08000) == 0xc8c00000 {
3947        return Some(InstructionKind::LDLARLr64Ldstexcl {
3948            Rn: Rn as _,
3949            Rs: Rs as _,
3950            Rt: Rt as _,
3951            Rt2: Rt2 as _,
3952        });
3953    }
3954    if (d & 0xffe08000) == 0xc8c08000 {
3955        return Some(InstructionKind::LDARLr64Ldstexcl {
3956            Rn: Rn as _,
3957            Rs: Rs as _,
3958            Rt: Rt as _,
3959            Rt2: Rt2 as _,
3960        });
3961    }
3962    None
3963}
3964
3965pub const fn decode_ldstnapair_offs(d: u32) -> Option<InstructionKind> {
3966    ["Could not decode."][((d & 0x3b800000) != 0x28000000) as usize];
3967    let L = (d >> 22) & 1;
3968    let Rn = (d >> 5) & 0x1F;
3969    let Rt = d & 0x1F;
3970    let Rt2 = (d >> 10) & 0x1F;
3971    let V = (d >> 26) & 1;
3972    let imm7 = (d >> 15) & 0x7F;
3973    let opc = (d >> 30) & 3;
3974    if (d & 0xffc00000) == 0x28000000 {
3975        return Some(InstructionKind::STNP32LdstnapairOffs {
3976            Rn: Rn as _,
3977            Rt: Rt as _,
3978            Rt2: Rt2 as _,
3979            imm7: imm7 as _,
3980        });
3981    }
3982    if (d & 0xffc00000) == 0x28400000 {
3983        return Some(InstructionKind::LDNP32LdstnapairOffs {
3984            Rn: Rn as _,
3985            Rt: Rt as _,
3986            Rt2: Rt2 as _,
3987            imm7: imm7 as _,
3988        });
3989    }
3990    if (d & 0xffc00000) == 0x2c000000 {
3991        return Some(InstructionKind::STNPSLdstnapairOffs {
3992            Rn: Rn as _,
3993            Rt: Rt as _,
3994            Rt2: Rt2 as _,
3995            imm7: imm7 as _,
3996        });
3997    }
3998    if (d & 0xffc00000) == 0x2c400000 {
3999        return Some(InstructionKind::LDNPSLdstnapairOffs {
4000            Rn: Rn as _,
4001            Rt: Rt as _,
4002            Rt2: Rt2 as _,
4003            imm7: imm7 as _,
4004        });
4005    }
4006    if (d & 0xffc00000) == 0x6c000000 {
4007        return Some(InstructionKind::STNPDLdstnapairOffs {
4008            Rn: Rn as _,
4009            Rt: Rt as _,
4010            Rt2: Rt2 as _,
4011            imm7: imm7 as _,
4012        });
4013    }
4014    if (d & 0xffc00000) == 0x6c400000 {
4015        return Some(InstructionKind::LDNPDLdstnapairOffs {
4016            Rn: Rn as _,
4017            Rt: Rt as _,
4018            Rt2: Rt2 as _,
4019            imm7: imm7 as _,
4020        });
4021    }
4022    if (d & 0xffc00000) == 0xa8000000 {
4023        return Some(InstructionKind::STNP64LdstnapairOffs {
4024            Rn: Rn as _,
4025            Rt: Rt as _,
4026            Rt2: Rt2 as _,
4027            imm7: imm7 as _,
4028        });
4029    }
4030    if (d & 0xffc00000) == 0xa8400000 {
4031        return Some(InstructionKind::LDNP64LdstnapairOffs {
4032            Rn: Rn as _,
4033            Rt: Rt as _,
4034            Rt2: Rt2 as _,
4035            imm7: imm7 as _,
4036        });
4037    }
4038    if (d & 0xffc00000) == 0xac000000 {
4039        return Some(InstructionKind::STNPQLdstnapairOffs {
4040            Rn: Rn as _,
4041            Rt: Rt as _,
4042            Rt2: Rt2 as _,
4043            imm7: imm7 as _,
4044        });
4045    }
4046    if (d & 0xffc00000) == 0xac400000 {
4047        return Some(InstructionKind::LDNPQLdstnapairOffs {
4048            Rn: Rn as _,
4049            Rt: Rt as _,
4050            Rt2: Rt2 as _,
4051            imm7: imm7 as _,
4052        });
4053    }
4054    None
4055}
4056
4057pub const fn decode_ldst_immpost(d: u32) -> Option<InstructionKind> {
4058    ["Could not decode."][((d & 0x3b200c00) != 0x38000400) as usize];
4059    let Rn = (d >> 5) & 0x1F;
4060    let Rt = d & 0x1F;
4061    let V = (d >> 26) & 1;
4062    let imm9 = (d >> 12) & 0x1FF;
4063    let opc = (d >> 22) & 3;
4064    let size = (d >> 30) & 3;
4065    if (d & 0xffe00c00) == 0x38000400 {
4066        return Some(InstructionKind::STRB32LdstImmpost {
4067            Rn: Rn as _,
4068            Rt: Rt as _,
4069            imm9: imm9 as _,
4070        });
4071    }
4072    if (d & 0xffe00c00) == 0x38400400 {
4073        return Some(InstructionKind::LDRB32LdstImmpost {
4074            Rn: Rn as _,
4075            Rt: Rt as _,
4076            imm9: imm9 as _,
4077        });
4078    }
4079    if (d & 0xffe00c00) == 0x38800400 {
4080        return Some(InstructionKind::LDRSB64LdstImmpost {
4081            Rn: Rn as _,
4082            Rt: Rt as _,
4083            imm9: imm9 as _,
4084        });
4085    }
4086    if (d & 0xffe00c00) == 0x38c00400 {
4087        return Some(InstructionKind::LDRSB32LdstImmpost {
4088            Rn: Rn as _,
4089            Rt: Rt as _,
4090            imm9: imm9 as _,
4091        });
4092    }
4093    if (d & 0xffe00c00) == 0x3c000400 {
4094        return Some(InstructionKind::STRBLdstImmpost {
4095            Rn: Rn as _,
4096            Rt: Rt as _,
4097            imm9: imm9 as _,
4098        });
4099    }
4100    if (d & 0xffe00c00) == 0x3c400400 {
4101        return Some(InstructionKind::LDRBLdstImmpost {
4102            Rn: Rn as _,
4103            Rt: Rt as _,
4104            imm9: imm9 as _,
4105        });
4106    }
4107    if (d & 0xffe00c00) == 0x3c800400 {
4108        return Some(InstructionKind::STRQLdstImmpost {
4109            Rn: Rn as _,
4110            Rt: Rt as _,
4111            imm9: imm9 as _,
4112        });
4113    }
4114    if (d & 0xffe00c00) == 0x3cc00400 {
4115        return Some(InstructionKind::LDRQLdstImmpost {
4116            Rn: Rn as _,
4117            Rt: Rt as _,
4118            imm9: imm9 as _,
4119        });
4120    }
4121    if (d & 0xffe00c00) == 0x78000400 {
4122        return Some(InstructionKind::STRH32LdstImmpost {
4123            Rn: Rn as _,
4124            Rt: Rt as _,
4125            imm9: imm9 as _,
4126        });
4127    }
4128    if (d & 0xffe00c00) == 0x78400400 {
4129        return Some(InstructionKind::LDRH32LdstImmpost {
4130            Rn: Rn as _,
4131            Rt: Rt as _,
4132            imm9: imm9 as _,
4133        });
4134    }
4135    if (d & 0xffe00c00) == 0x78800400 {
4136        return Some(InstructionKind::LDRSH64LdstImmpost {
4137            Rn: Rn as _,
4138            Rt: Rt as _,
4139            imm9: imm9 as _,
4140        });
4141    }
4142    if (d & 0xffe00c00) == 0x78c00400 {
4143        return Some(InstructionKind::LDRSH32LdstImmpost {
4144            Rn: Rn as _,
4145            Rt: Rt as _,
4146            imm9: imm9 as _,
4147        });
4148    }
4149    if (d & 0xffe00c00) == 0x7c000400 {
4150        return Some(InstructionKind::STRHLdstImmpost {
4151            Rn: Rn as _,
4152            Rt: Rt as _,
4153            imm9: imm9 as _,
4154        });
4155    }
4156    if (d & 0xffe00c00) == 0x7c400400 {
4157        return Some(InstructionKind::LDRHLdstImmpost {
4158            Rn: Rn as _,
4159            Rt: Rt as _,
4160            imm9: imm9 as _,
4161        });
4162    }
4163    if (d & 0xffe00c00) == 0xb8000400 {
4164        return Some(InstructionKind::STR32LdstImmpost {
4165            Rn: Rn as _,
4166            Rt: Rt as _,
4167            imm9: imm9 as _,
4168        });
4169    }
4170    if (d & 0xffe00c00) == 0xb8400400 {
4171        return Some(InstructionKind::LDR32LdstImmpost {
4172            Rn: Rn as _,
4173            Rt: Rt as _,
4174            imm9: imm9 as _,
4175        });
4176    }
4177    if (d & 0xffe00c00) == 0xb8800400 {
4178        return Some(InstructionKind::LDRSW64LdstImmpost {
4179            Rn: Rn as _,
4180            Rt: Rt as _,
4181            imm9: imm9 as _,
4182        });
4183    }
4184    if (d & 0xffe00c00) == 0xbc000400 {
4185        return Some(InstructionKind::STRSLdstImmpost {
4186            Rn: Rn as _,
4187            Rt: Rt as _,
4188            imm9: imm9 as _,
4189        });
4190    }
4191    if (d & 0xffe00c00) == 0xbc400400 {
4192        return Some(InstructionKind::LDRSLdstImmpost {
4193            Rn: Rn as _,
4194            Rt: Rt as _,
4195            imm9: imm9 as _,
4196        });
4197    }
4198    if (d & 0xffe00c00) == 0xf8000400 {
4199        return Some(InstructionKind::STR64LdstImmpost {
4200            Rn: Rn as _,
4201            Rt: Rt as _,
4202            imm9: imm9 as _,
4203        });
4204    }
4205    if (d & 0xffe00c00) == 0xf8400400 {
4206        return Some(InstructionKind::LDR64LdstImmpost {
4207            Rn: Rn as _,
4208            Rt: Rt as _,
4209            imm9: imm9 as _,
4210        });
4211    }
4212    if (d & 0xffe00c00) == 0xfc000400 {
4213        return Some(InstructionKind::STRDLdstImmpost {
4214            Rn: Rn as _,
4215            Rt: Rt as _,
4216            imm9: imm9 as _,
4217        });
4218    }
4219    if (d & 0xffe00c00) == 0xfc400400 {
4220        return Some(InstructionKind::LDRDLdstImmpost {
4221            Rn: Rn as _,
4222            Rt: Rt as _,
4223            imm9: imm9 as _,
4224        });
4225    }
4226    None
4227}
4228
4229pub const fn decode_ldst_immpre(d: u32) -> Option<InstructionKind> {
4230    ["Could not decode."][((d & 0x3b200c00) != 0x38000c00) as usize];
4231    let Rn = (d >> 5) & 0x1F;
4232    let Rt = d & 0x1F;
4233    let V = (d >> 26) & 1;
4234    let imm9 = (d >> 12) & 0x1FF;
4235    let opc = (d >> 22) & 3;
4236    let size = (d >> 30) & 3;
4237    if (d & 0xffe00c00) == 0x38000c00 {
4238        return Some(InstructionKind::STRB32LdstImmpre {
4239            Rn: Rn as _,
4240            Rt: Rt as _,
4241            imm9: imm9 as _,
4242        });
4243    }
4244    if (d & 0xffe00c00) == 0x38400c00 {
4245        return Some(InstructionKind::LDRB32LdstImmpre {
4246            Rn: Rn as _,
4247            Rt: Rt as _,
4248            imm9: imm9 as _,
4249        });
4250    }
4251    if (d & 0xffe00c00) == 0x38800c00 {
4252        return Some(InstructionKind::LDRSB64LdstImmpre {
4253            Rn: Rn as _,
4254            Rt: Rt as _,
4255            imm9: imm9 as _,
4256        });
4257    }
4258    if (d & 0xffe00c00) == 0x38c00c00 {
4259        return Some(InstructionKind::LDRSB32LdstImmpre {
4260            Rn: Rn as _,
4261            Rt: Rt as _,
4262            imm9: imm9 as _,
4263        });
4264    }
4265    if (d & 0xffe00c00) == 0x3c000c00 {
4266        return Some(InstructionKind::STRBLdstImmpre {
4267            Rn: Rn as _,
4268            Rt: Rt as _,
4269            imm9: imm9 as _,
4270        });
4271    }
4272    if (d & 0xffe00c00) == 0x3c400c00 {
4273        return Some(InstructionKind::LDRBLdstImmpre {
4274            Rn: Rn as _,
4275            Rt: Rt as _,
4276            imm9: imm9 as _,
4277        });
4278    }
4279    if (d & 0xffe00c00) == 0x3c800c00 {
4280        return Some(InstructionKind::STRQLdstImmpre {
4281            Rn: Rn as _,
4282            Rt: Rt as _,
4283            imm9: imm9 as _,
4284        });
4285    }
4286    if (d & 0xffe00c00) == 0x3cc00c00 {
4287        return Some(InstructionKind::LDRQLdstImmpre {
4288            Rn: Rn as _,
4289            Rt: Rt as _,
4290            imm9: imm9 as _,
4291        });
4292    }
4293    if (d & 0xffe00c00) == 0x78000c00 {
4294        return Some(InstructionKind::STRH32LdstImmpre {
4295            Rn: Rn as _,
4296            Rt: Rt as _,
4297            imm9: imm9 as _,
4298        });
4299    }
4300    if (d & 0xffe00c00) == 0x78400c00 {
4301        return Some(InstructionKind::LDRH32LdstImmpre {
4302            Rn: Rn as _,
4303            Rt: Rt as _,
4304            imm9: imm9 as _,
4305        });
4306    }
4307    if (d & 0xffe00c00) == 0x78800c00 {
4308        return Some(InstructionKind::LDRSH64LdstImmpre {
4309            Rn: Rn as _,
4310            Rt: Rt as _,
4311            imm9: imm9 as _,
4312        });
4313    }
4314    if (d & 0xffe00c00) == 0x78c00c00 {
4315        return Some(InstructionKind::LDRSH32LdstImmpre {
4316            Rn: Rn as _,
4317            Rt: Rt as _,
4318            imm9: imm9 as _,
4319        });
4320    }
4321    if (d & 0xffe00c00) == 0x7c000c00 {
4322        return Some(InstructionKind::STRHLdstImmpre {
4323            Rn: Rn as _,
4324            Rt: Rt as _,
4325            imm9: imm9 as _,
4326        });
4327    }
4328    if (d & 0xffe00c00) == 0x7c400c00 {
4329        return Some(InstructionKind::LDRHLdstImmpre {
4330            Rn: Rn as _,
4331            Rt: Rt as _,
4332            imm9: imm9 as _,
4333        });
4334    }
4335    if (d & 0xffe00c00) == 0xb8000c00 {
4336        return Some(InstructionKind::STR32LdstImmpre {
4337            Rn: Rn as _,
4338            Rt: Rt as _,
4339            imm9: imm9 as _,
4340        });
4341    }
4342    if (d & 0xffe00c00) == 0xb8400c00 {
4343        return Some(InstructionKind::LDR32LdstImmpre {
4344            Rn: Rn as _,
4345            Rt: Rt as _,
4346            imm9: imm9 as _,
4347        });
4348    }
4349    if (d & 0xffe00c00) == 0xb8800c00 {
4350        return Some(InstructionKind::LDRSW64LdstImmpre {
4351            Rn: Rn as _,
4352            Rt: Rt as _,
4353            imm9: imm9 as _,
4354        });
4355    }
4356    if (d & 0xffe00c00) == 0xbc000c00 {
4357        return Some(InstructionKind::STRSLdstImmpre {
4358            Rn: Rn as _,
4359            Rt: Rt as _,
4360            imm9: imm9 as _,
4361        });
4362    }
4363    if (d & 0xffe00c00) == 0xbc400c00 {
4364        return Some(InstructionKind::LDRSLdstImmpre {
4365            Rn: Rn as _,
4366            Rt: Rt as _,
4367            imm9: imm9 as _,
4368        });
4369    }
4370    if (d & 0xffe00c00) == 0xf8000c00 {
4371        return Some(InstructionKind::STR64LdstImmpre {
4372            Rn: Rn as _,
4373            Rt: Rt as _,
4374            imm9: imm9 as _,
4375        });
4376    }
4377    if (d & 0xffe00c00) == 0xf8400c00 {
4378        return Some(InstructionKind::LDR64LdstImmpre {
4379            Rn: Rn as _,
4380            Rt: Rt as _,
4381            imm9: imm9 as _,
4382        });
4383    }
4384    if (d & 0xffe00c00) == 0xfc000c00 {
4385        return Some(InstructionKind::STRDLdstImmpre {
4386            Rn: Rn as _,
4387            Rt: Rt as _,
4388            imm9: imm9 as _,
4389        });
4390    }
4391    if (d & 0xffe00c00) == 0xfc400c00 {
4392        return Some(InstructionKind::LDRDLdstImmpre {
4393            Rn: Rn as _,
4394            Rt: Rt as _,
4395            imm9: imm9 as _,
4396        });
4397    }
4398    None
4399}
4400
4401pub const fn decode_ldst_pac(d: u32) -> Option<InstructionKind> {
4402    ["Could not decode."][((d & 0x3b200400) != 0x38200400) as usize];
4403    let M = (d >> 23) & 1;
4404    let Rn = (d >> 5) & 0x1F;
4405    let Rt = d & 0x1F;
4406    let S = (d >> 22) & 1;
4407    let V = (d >> 26) & 1;
4408    let W = (d >> 11) & 1;
4409    let imm9 = (d >> 12) & 0x1FF;
4410    let size = (d >> 30) & 3;
4411    if (d & 0xfba00c00) == 0xf8200400 {
4412        return Some(InstructionKind::LDRAA64LdstPac {
4413            Rn: Rn as _,
4414            Rt: Rt as _,
4415            S: S as _,
4416            V: V as _,
4417            imm9: imm9 as _,
4418        });
4419    }
4420    if (d & 0xfba00c00) == 0xf8200c00 {
4421        return Some(InstructionKind::LDRAA64WLdstPac {
4422            Rn: Rn as _,
4423            Rt: Rt as _,
4424            S: S as _,
4425            V: V as _,
4426            imm9: imm9 as _,
4427        });
4428    }
4429    if (d & 0xfba00c00) == 0xf8a00400 {
4430        return Some(InstructionKind::LDRAB64LdstPac {
4431            Rn: Rn as _,
4432            Rt: Rt as _,
4433            S: S as _,
4434            V: V as _,
4435            imm9: imm9 as _,
4436        });
4437    }
4438    if (d & 0xfba00c00) == 0xf8a00c00 {
4439        return Some(InstructionKind::LDRAB64WLdstPac {
4440            Rn: Rn as _,
4441            Rt: Rt as _,
4442            S: S as _,
4443            V: V as _,
4444            imm9: imm9 as _,
4445        });
4446    }
4447    None
4448}
4449
4450pub const fn decode_ldst_regoff(d: u32) -> Option<InstructionKind> {
4451    ["Could not decode."][((d & 0x3b200c00) != 0x38200800) as usize];
4452    let Rm = (d >> 16) & 0x1F;
4453    let Rn = (d >> 5) & 0x1F;
4454    let Rt = d & 0x1F;
4455    let S = (d >> 12) & 1;
4456    let V = (d >> 26) & 1;
4457    let opc = (d >> 22) & 3;
4458    let option = (d >> 13) & 7;
4459    let size = (d >> 30) & 3;
4460    if (d & 0xffe0ec00) == 0x38206800 {
4461        return Some(InstructionKind::STRB32BlLdstRegoff {
4462            Rm: Rm as _,
4463            Rn: Rn as _,
4464            Rt: Rt as _,
4465            S: S as _,
4466        });
4467    }
4468    if (d & 0xffe0ec00) == 0x38606800 {
4469        return Some(InstructionKind::LDRB32BlLdstRegoff {
4470            Rm: Rm as _,
4471            Rn: Rn as _,
4472            Rt: Rt as _,
4473            S: S as _,
4474        });
4475    }
4476    if (d & 0xffe0ec00) == 0x38a06800 {
4477        return Some(InstructionKind::LDRSB64BlLdstRegoff {
4478            Rm: Rm as _,
4479            Rn: Rn as _,
4480            Rt: Rt as _,
4481            S: S as _,
4482        });
4483    }
4484    if (d & 0xffe0ec00) == 0x38e06800 {
4485        return Some(InstructionKind::LDRSB32BlLdstRegoff {
4486            Rm: Rm as _,
4487            Rn: Rn as _,
4488            Rt: Rt as _,
4489            S: S as _,
4490        });
4491    }
4492    if (d & 0xffe0ec00) == 0x3c206800 {
4493        return Some(InstructionKind::STRBlLdstRegoff {
4494            Rm: Rm as _,
4495            Rn: Rn as _,
4496            Rt: Rt as _,
4497            S: S as _,
4498        });
4499    }
4500    if (d & 0xffe0ec00) == 0x3c606800 {
4501        return Some(InstructionKind::LDRBlLdstRegoff {
4502            Rm: Rm as _,
4503            Rn: Rn as _,
4504            Rt: Rt as _,
4505            S: S as _,
4506        });
4507    }
4508    if (d & 0xffe00c00) == 0x3ca00800 {
4509        return Some(InstructionKind::STRQLdstRegoff {
4510            Rm: Rm as _,
4511            Rn: Rn as _,
4512            Rt: Rt as _,
4513            S: S as _,
4514            option: option as _,
4515        });
4516    }
4517    if (d & 0xffe00c00) == 0x3ce00800 {
4518        return Some(InstructionKind::LDRQLdstRegoff {
4519            Rm: Rm as _,
4520            Rn: Rn as _,
4521            Rt: Rt as _,
4522            S: S as _,
4523            option: option as _,
4524        });
4525    }
4526    if (d & 0xffe00c00) == 0x78200800 {
4527        return Some(InstructionKind::STRH32LdstRegoff {
4528            Rm: Rm as _,
4529            Rn: Rn as _,
4530            Rt: Rt as _,
4531            S: S as _,
4532            option: option as _,
4533        });
4534    }
4535    if (d & 0xffe00c00) == 0x78600800 {
4536        return Some(InstructionKind::LDRH32LdstRegoff {
4537            Rm: Rm as _,
4538            Rn: Rn as _,
4539            Rt: Rt as _,
4540            S: S as _,
4541            option: option as _,
4542        });
4543    }
4544    if (d & 0xffe00c00) == 0x78a00800 {
4545        return Some(InstructionKind::LDRSH64LdstRegoff {
4546            Rm: Rm as _,
4547            Rn: Rn as _,
4548            Rt: Rt as _,
4549            S: S as _,
4550            option: option as _,
4551        });
4552    }
4553    if (d & 0xffe00c00) == 0x78e00800 {
4554        return Some(InstructionKind::LDRSH32LdstRegoff {
4555            Rm: Rm as _,
4556            Rn: Rn as _,
4557            Rt: Rt as _,
4558            S: S as _,
4559            option: option as _,
4560        });
4561    }
4562    if (d & 0xffe00c00) == 0x7c200800 {
4563        return Some(InstructionKind::STRHLdstRegoff {
4564            Rm: Rm as _,
4565            Rn: Rn as _,
4566            Rt: Rt as _,
4567            S: S as _,
4568            option: option as _,
4569        });
4570    }
4571    if (d & 0xffe00c00) == 0x7c600800 {
4572        return Some(InstructionKind::LDRHLdstRegoff {
4573            Rm: Rm as _,
4574            Rn: Rn as _,
4575            Rt: Rt as _,
4576            S: S as _,
4577            option: option as _,
4578        });
4579    }
4580    if (d & 0xffe00c00) == 0xb8200800 {
4581        return Some(InstructionKind::STR32LdstRegoff {
4582            Rm: Rm as _,
4583            Rn: Rn as _,
4584            Rt: Rt as _,
4585            S: S as _,
4586            option: option as _,
4587        });
4588    }
4589    if (d & 0xffe00c00) == 0xb8600800 {
4590        return Some(InstructionKind::LDR32LdstRegoff {
4591            Rm: Rm as _,
4592            Rn: Rn as _,
4593            Rt: Rt as _,
4594            S: S as _,
4595            option: option as _,
4596        });
4597    }
4598    if (d & 0xffe00c00) == 0xb8a00800 {
4599        return Some(InstructionKind::LDRSW64LdstRegoff {
4600            Rm: Rm as _,
4601            Rn: Rn as _,
4602            Rt: Rt as _,
4603            S: S as _,
4604            option: option as _,
4605        });
4606    }
4607    if (d & 0xffe00c00) == 0xbc200800 {
4608        return Some(InstructionKind::STRSLdstRegoff {
4609            Rm: Rm as _,
4610            Rn: Rn as _,
4611            Rt: Rt as _,
4612            S: S as _,
4613            option: option as _,
4614        });
4615    }
4616    if (d & 0xffe00c00) == 0xbc600800 {
4617        return Some(InstructionKind::LDRSLdstRegoff {
4618            Rm: Rm as _,
4619            Rn: Rn as _,
4620            Rt: Rt as _,
4621            S: S as _,
4622            option: option as _,
4623        });
4624    }
4625    if (d & 0xffe00c00) == 0xf8200800 {
4626        return Some(InstructionKind::STR64LdstRegoff {
4627            Rm: Rm as _,
4628            Rn: Rn as _,
4629            Rt: Rt as _,
4630            S: S as _,
4631            option: option as _,
4632        });
4633    }
4634    if (d & 0xffe00c00) == 0xf8600800 {
4635        return Some(InstructionKind::LDR64LdstRegoff {
4636            Rm: Rm as _,
4637            Rn: Rn as _,
4638            Rt: Rt as _,
4639            S: S as _,
4640            option: option as _,
4641        });
4642    }
4643    if (d & 0xffe00c00) == 0xf8a00800 {
4644        return Some(InstructionKind::PRFMPLdstRegoff {
4645            Rm: Rm as _,
4646            Rn: Rn as _,
4647            Rt: Rt as _,
4648            S: S as _,
4649            option: option as _,
4650        });
4651    }
4652    if (d & 0xffe00c00) == 0xfc200800 {
4653        return Some(InstructionKind::STRDLdstRegoff {
4654            Rm: Rm as _,
4655            Rn: Rn as _,
4656            Rt: Rt as _,
4657            S: S as _,
4658            option: option as _,
4659        });
4660    }
4661    if (d & 0xffe00c00) == 0xfc600800 {
4662        return Some(InstructionKind::LDRDLdstRegoff {
4663            Rm: Rm as _,
4664            Rn: Rn as _,
4665            Rt: Rt as _,
4666            S: S as _,
4667            option: option as _,
4668        });
4669    }
4670    if (d & 0xffe00c00) == 0x38200800 && (d & 0x00e000) != 0x006000 {
4671        return Some(InstructionKind::STRB32BLdstRegoff {
4672            Rm: Rm as _,
4673            Rn: Rn as _,
4674            Rt: Rt as _,
4675            S: S as _,
4676            option: option as _,
4677        });
4678    }
4679    if (d & 0xffe00c00) == 0x38600800 && (d & 0x00e000) != 0x006000 {
4680        return Some(InstructionKind::LDRB32BLdstRegoff {
4681            Rm: Rm as _,
4682            Rn: Rn as _,
4683            Rt: Rt as _,
4684            S: S as _,
4685            option: option as _,
4686        });
4687    }
4688    if (d & 0xffe00c00) == 0x38a00800 && (d & 0x00e000) != 0x006000 {
4689        return Some(InstructionKind::LDRSB64BLdstRegoff {
4690            Rm: Rm as _,
4691            Rn: Rn as _,
4692            Rt: Rt as _,
4693            S: S as _,
4694            option: option as _,
4695        });
4696    }
4697    if (d & 0xffe00c00) == 0x38e00800 && (d & 0x00e000) != 0x006000 {
4698        return Some(InstructionKind::LDRSB32BLdstRegoff {
4699            Rm: Rm as _,
4700            Rn: Rn as _,
4701            Rt: Rt as _,
4702            S: S as _,
4703            option: option as _,
4704        });
4705    }
4706    if (d & 0xffe00c00) == 0x3c200800 && (d & 0x00e000) != 0x006000 {
4707        return Some(InstructionKind::STRBLdstRegoff {
4708            Rm: Rm as _,
4709            Rn: Rn as _,
4710            Rt: Rt as _,
4711            S: S as _,
4712            option: option as _,
4713        });
4714    }
4715    if (d & 0xffe00c00) == 0x3c600800 && (d & 0x00e000) != 0x006000 {
4716        return Some(InstructionKind::LDRBLdstRegoff {
4717            Rm: Rm as _,
4718            Rn: Rn as _,
4719            Rt: Rt as _,
4720            S: S as _,
4721            option: option as _,
4722        });
4723    }
4724    None
4725}
4726
4727pub const fn decode_ldst_unpriv(d: u32) -> Option<InstructionKind> {
4728    ["Could not decode."][((d & 0x3b200c00) != 0x38000800) as usize];
4729    let Rn = (d >> 5) & 0x1F;
4730    let Rt = d & 0x1F;
4731    let V = (d >> 26) & 1;
4732    let imm9 = (d >> 12) & 0x1FF;
4733    let opc = (d >> 22) & 3;
4734    let size = (d >> 30) & 3;
4735    if (d & 0xffe00c00) == 0x38000800 {
4736        return Some(InstructionKind::STTRB32LdstUnpriv {
4737            Rn: Rn as _,
4738            Rt: Rt as _,
4739            imm9: imm9 as _,
4740        });
4741    }
4742    if (d & 0xffe00c00) == 0x38400800 {
4743        return Some(InstructionKind::LDTRB32LdstUnpriv {
4744            Rn: Rn as _,
4745            Rt: Rt as _,
4746            imm9: imm9 as _,
4747        });
4748    }
4749    if (d & 0xffe00c00) == 0x38800800 {
4750        return Some(InstructionKind::LDTRSB64LdstUnpriv {
4751            Rn: Rn as _,
4752            Rt: Rt as _,
4753            imm9: imm9 as _,
4754        });
4755    }
4756    if (d & 0xffe00c00) == 0x38c00800 {
4757        return Some(InstructionKind::LDTRSB32LdstUnpriv {
4758            Rn: Rn as _,
4759            Rt: Rt as _,
4760            imm9: imm9 as _,
4761        });
4762    }
4763    if (d & 0xffe00c00) == 0x78000800 {
4764        return Some(InstructionKind::STTRH32LdstUnpriv {
4765            Rn: Rn as _,
4766            Rt: Rt as _,
4767            imm9: imm9 as _,
4768        });
4769    }
4770    if (d & 0xffe00c00) == 0x78400800 {
4771        return Some(InstructionKind::LDTRH32LdstUnpriv {
4772            Rn: Rn as _,
4773            Rt: Rt as _,
4774            imm9: imm9 as _,
4775        });
4776    }
4777    if (d & 0xffe00c00) == 0x78800800 {
4778        return Some(InstructionKind::LDTRSH64LdstUnpriv {
4779            Rn: Rn as _,
4780            Rt: Rt as _,
4781            imm9: imm9 as _,
4782        });
4783    }
4784    if (d & 0xffe00c00) == 0x78c00800 {
4785        return Some(InstructionKind::LDTRSH32LdstUnpriv {
4786            Rn: Rn as _,
4787            Rt: Rt as _,
4788            imm9: imm9 as _,
4789        });
4790    }
4791    if (d & 0xffe00c00) == 0xb8000800 {
4792        return Some(InstructionKind::STTR32LdstUnpriv {
4793            Rn: Rn as _,
4794            Rt: Rt as _,
4795            imm9: imm9 as _,
4796        });
4797    }
4798    if (d & 0xffe00c00) == 0xb8400800 {
4799        return Some(InstructionKind::LDTR32LdstUnpriv {
4800            Rn: Rn as _,
4801            Rt: Rt as _,
4802            imm9: imm9 as _,
4803        });
4804    }
4805    if (d & 0xffe00c00) == 0xb8800800 {
4806        return Some(InstructionKind::LDTRSW64LdstUnpriv {
4807            Rn: Rn as _,
4808            Rt: Rt as _,
4809            imm9: imm9 as _,
4810        });
4811    }
4812    if (d & 0xffe00c00) == 0xf8000800 {
4813        return Some(InstructionKind::STTR64LdstUnpriv {
4814            Rn: Rn as _,
4815            Rt: Rt as _,
4816            imm9: imm9 as _,
4817        });
4818    }
4819    if (d & 0xffe00c00) == 0xf8400800 {
4820        return Some(InstructionKind::LDTR64LdstUnpriv {
4821            Rn: Rn as _,
4822            Rt: Rt as _,
4823            imm9: imm9 as _,
4824        });
4825    }
4826    None
4827}
4828
4829pub const fn decode_ldst_unscaled(d: u32) -> Option<InstructionKind> {
4830    ["Could not decode."][((d & 0x3b200c00) != 0x38000000) as usize];
4831    let Rn = (d >> 5) & 0x1F;
4832    let Rt = d & 0x1F;
4833    let V = (d >> 26) & 1;
4834    let imm9 = (d >> 12) & 0x1FF;
4835    let opc = (d >> 22) & 3;
4836    let size = (d >> 30) & 3;
4837    if (d & 0xffe00c00) == 0x38000000 {
4838        return Some(InstructionKind::STURB32LdstUnscaled {
4839            Rn: Rn as _,
4840            Rt: Rt as _,
4841            imm9: imm9 as _,
4842        });
4843    }
4844    if (d & 0xffe00c00) == 0x38400000 {
4845        return Some(InstructionKind::LDURB32LdstUnscaled {
4846            Rn: Rn as _,
4847            Rt: Rt as _,
4848            imm9: imm9 as _,
4849        });
4850    }
4851    if (d & 0xffe00c00) == 0x38800000 {
4852        return Some(InstructionKind::LDURSB64LdstUnscaled {
4853            Rn: Rn as _,
4854            Rt: Rt as _,
4855            imm9: imm9 as _,
4856        });
4857    }
4858    if (d & 0xffe00c00) == 0x38c00000 {
4859        return Some(InstructionKind::LDURSB32LdstUnscaled {
4860            Rn: Rn as _,
4861            Rt: Rt as _,
4862            imm9: imm9 as _,
4863        });
4864    }
4865    if (d & 0xffe00c00) == 0x3c000000 {
4866        return Some(InstructionKind::STURBLdstUnscaled {
4867            Rn: Rn as _,
4868            Rt: Rt as _,
4869            imm9: imm9 as _,
4870        });
4871    }
4872    if (d & 0xffe00c00) == 0x3c400000 {
4873        return Some(InstructionKind::LDURBLdstUnscaled {
4874            Rn: Rn as _,
4875            Rt: Rt as _,
4876            imm9: imm9 as _,
4877        });
4878    }
4879    if (d & 0xffe00c00) == 0x3c800000 {
4880        return Some(InstructionKind::STURQLdstUnscaled {
4881            Rn: Rn as _,
4882            Rt: Rt as _,
4883            imm9: imm9 as _,
4884        });
4885    }
4886    if (d & 0xffe00c00) == 0x3cc00000 {
4887        return Some(InstructionKind::LDURQLdstUnscaled {
4888            Rn: Rn as _,
4889            Rt: Rt as _,
4890            imm9: imm9 as _,
4891        });
4892    }
4893    if (d & 0xffe00c00) == 0x78000000 {
4894        return Some(InstructionKind::STURH32LdstUnscaled {
4895            Rn: Rn as _,
4896            Rt: Rt as _,
4897            imm9: imm9 as _,
4898        });
4899    }
4900    if (d & 0xffe00c00) == 0x78400000 {
4901        return Some(InstructionKind::LDURH32LdstUnscaled {
4902            Rn: Rn as _,
4903            Rt: Rt as _,
4904            imm9: imm9 as _,
4905        });
4906    }
4907    if (d & 0xffe00c00) == 0x78800000 {
4908        return Some(InstructionKind::LDURSH64LdstUnscaled {
4909            Rn: Rn as _,
4910            Rt: Rt as _,
4911            imm9: imm9 as _,
4912        });
4913    }
4914    if (d & 0xffe00c00) == 0x78c00000 {
4915        return Some(InstructionKind::LDURSH32LdstUnscaled {
4916            Rn: Rn as _,
4917            Rt: Rt as _,
4918            imm9: imm9 as _,
4919        });
4920    }
4921    if (d & 0xffe00c00) == 0x7c000000 {
4922        return Some(InstructionKind::STURHLdstUnscaled {
4923            Rn: Rn as _,
4924            Rt: Rt as _,
4925            imm9: imm9 as _,
4926        });
4927    }
4928    if (d & 0xffe00c00) == 0x7c400000 {
4929        return Some(InstructionKind::LDURHLdstUnscaled {
4930            Rn: Rn as _,
4931            Rt: Rt as _,
4932            imm9: imm9 as _,
4933        });
4934    }
4935    if (d & 0xffe00c00) == 0xb8000000 {
4936        return Some(InstructionKind::STUR32LdstUnscaled {
4937            Rn: Rn as _,
4938            Rt: Rt as _,
4939            imm9: imm9 as _,
4940        });
4941    }
4942    if (d & 0xffe00c00) == 0xb8400000 {
4943        return Some(InstructionKind::LDUR32LdstUnscaled {
4944            Rn: Rn as _,
4945            Rt: Rt as _,
4946            imm9: imm9 as _,
4947        });
4948    }
4949    if (d & 0xffe00c00) == 0xb8800000 {
4950        return Some(InstructionKind::LDURSW64LdstUnscaled {
4951            Rn: Rn as _,
4952            Rt: Rt as _,
4953            imm9: imm9 as _,
4954        });
4955    }
4956    if (d & 0xffe00c00) == 0xbc000000 {
4957        return Some(InstructionKind::STURSLdstUnscaled {
4958            Rn: Rn as _,
4959            Rt: Rt as _,
4960            imm9: imm9 as _,
4961        });
4962    }
4963    if (d & 0xffe00c00) == 0xbc400000 {
4964        return Some(InstructionKind::LDURSLdstUnscaled {
4965            Rn: Rn as _,
4966            Rt: Rt as _,
4967            imm9: imm9 as _,
4968        });
4969    }
4970    if (d & 0xffe00c00) == 0xf8000000 {
4971        return Some(InstructionKind::STUR64LdstUnscaled {
4972            Rn: Rn as _,
4973            Rt: Rt as _,
4974            imm9: imm9 as _,
4975        });
4976    }
4977    if (d & 0xffe00c00) == 0xf8400000 {
4978        return Some(InstructionKind::LDUR64LdstUnscaled {
4979            Rn: Rn as _,
4980            Rt: Rt as _,
4981            imm9: imm9 as _,
4982        });
4983    }
4984    if (d & 0xffe00c00) == 0xf8800000 {
4985        return Some(InstructionKind::PRFUMPLdstUnscaled {
4986            Rn: Rn as _,
4987            Rt: Rt as _,
4988            imm9: imm9 as _,
4989        });
4990    }
4991    if (d & 0xffe00c00) == 0xfc000000 {
4992        return Some(InstructionKind::STURDLdstUnscaled {
4993            Rn: Rn as _,
4994            Rt: Rt as _,
4995            imm9: imm9 as _,
4996        });
4997    }
4998    if (d & 0xffe00c00) == 0xfc400000 {
4999        return Some(InstructionKind::LDURDLdstUnscaled {
5000            Rn: Rn as _,
5001            Rt: Rt as _,
5002            imm9: imm9 as _,
5003        });
5004    }
5005    None
5006}
5007
5008pub const fn decode_ldst_pos(d: u32) -> Option<InstructionKind> {
5009    ["Could not decode."][((d & 0x3b000000) != 0x39000000) as usize];
5010    let Rn = (d >> 5) & 0x1F;
5011    let Rt = d & 0x1F;
5012    let V = (d >> 26) & 1;
5013    let imm12 = (d >> 10) & 0xFFF;
5014    let opc = (d >> 22) & 3;
5015    let size = (d >> 30) & 3;
5016    if (d & 0xffc00000) == 0x39000000 {
5017        return Some(InstructionKind::STRB32LdstPos {
5018            Rn: Rn as _,
5019            Rt: Rt as _,
5020            imm12: imm12 as _,
5021        });
5022    }
5023    if (d & 0xffc00000) == 0x39400000 {
5024        return Some(InstructionKind::LDRB32LdstPos {
5025            Rn: Rn as _,
5026            Rt: Rt as _,
5027            imm12: imm12 as _,
5028        });
5029    }
5030    if (d & 0xffc00000) == 0x39800000 {
5031        return Some(InstructionKind::LDRSB64LdstPos {
5032            Rn: Rn as _,
5033            Rt: Rt as _,
5034            imm12: imm12 as _,
5035        });
5036    }
5037    if (d & 0xffc00000) == 0x39c00000 {
5038        return Some(InstructionKind::LDRSB32LdstPos {
5039            Rn: Rn as _,
5040            Rt: Rt as _,
5041            imm12: imm12 as _,
5042        });
5043    }
5044    if (d & 0xffc00000) == 0x3d000000 {
5045        return Some(InstructionKind::STRBLdstPos {
5046            Rn: Rn as _,
5047            Rt: Rt as _,
5048            imm12: imm12 as _,
5049        });
5050    }
5051    if (d & 0xffc00000) == 0x3d400000 {
5052        return Some(InstructionKind::LDRBLdstPos {
5053            Rn: Rn as _,
5054            Rt: Rt as _,
5055            imm12: imm12 as _,
5056        });
5057    }
5058    if (d & 0xffc00000) == 0x3d800000 {
5059        return Some(InstructionKind::STRQLdstPos {
5060            Rn: Rn as _,
5061            Rt: Rt as _,
5062            imm12: imm12 as _,
5063        });
5064    }
5065    if (d & 0xffc00000) == 0x3dc00000 {
5066        return Some(InstructionKind::LDRQLdstPos {
5067            Rn: Rn as _,
5068            Rt: Rt as _,
5069            imm12: imm12 as _,
5070        });
5071    }
5072    if (d & 0xffc00000) == 0x79000000 {
5073        return Some(InstructionKind::STRH32LdstPos {
5074            Rn: Rn as _,
5075            Rt: Rt as _,
5076            imm12: imm12 as _,
5077        });
5078    }
5079    if (d & 0xffc00000) == 0x79400000 {
5080        return Some(InstructionKind::LDRH32LdstPos {
5081            Rn: Rn as _,
5082            Rt: Rt as _,
5083            imm12: imm12 as _,
5084        });
5085    }
5086    if (d & 0xffc00000) == 0x79800000 {
5087        return Some(InstructionKind::LDRSH64LdstPos {
5088            Rn: Rn as _,
5089            Rt: Rt as _,
5090            imm12: imm12 as _,
5091        });
5092    }
5093    if (d & 0xffc00000) == 0x79c00000 {
5094        return Some(InstructionKind::LDRSH32LdstPos {
5095            Rn: Rn as _,
5096            Rt: Rt as _,
5097            imm12: imm12 as _,
5098        });
5099    }
5100    if (d & 0xffc00000) == 0x7d000000 {
5101        return Some(InstructionKind::STRHLdstPos {
5102            Rn: Rn as _,
5103            Rt: Rt as _,
5104            imm12: imm12 as _,
5105        });
5106    }
5107    if (d & 0xffc00000) == 0x7d400000 {
5108        return Some(InstructionKind::LDRHLdstPos {
5109            Rn: Rn as _,
5110            Rt: Rt as _,
5111            imm12: imm12 as _,
5112        });
5113    }
5114    if (d & 0xffc00000) == 0xb9000000 {
5115        return Some(InstructionKind::STR32LdstPos {
5116            Rn: Rn as _,
5117            Rt: Rt as _,
5118            imm12: imm12 as _,
5119        });
5120    }
5121    if (d & 0xffc00000) == 0xb9400000 {
5122        return Some(InstructionKind::LDR32LdstPos {
5123            Rn: Rn as _,
5124            Rt: Rt as _,
5125            imm12: imm12 as _,
5126        });
5127    }
5128    if (d & 0xffc00000) == 0xb9800000 {
5129        return Some(InstructionKind::LDRSW64LdstPos {
5130            Rn: Rn as _,
5131            Rt: Rt as _,
5132            imm12: imm12 as _,
5133        });
5134    }
5135    if (d & 0xffc00000) == 0xbd000000 {
5136        return Some(InstructionKind::STRSLdstPos {
5137            Rn: Rn as _,
5138            Rt: Rt as _,
5139            imm12: imm12 as _,
5140        });
5141    }
5142    if (d & 0xffc00000) == 0xbd400000 {
5143        return Some(InstructionKind::LDRSLdstPos {
5144            Rn: Rn as _,
5145            Rt: Rt as _,
5146            imm12: imm12 as _,
5147        });
5148    }
5149    if (d & 0xffc00000) == 0xf9000000 {
5150        return Some(InstructionKind::STR64LdstPos {
5151            Rn: Rn as _,
5152            Rt: Rt as _,
5153            imm12: imm12 as _,
5154        });
5155    }
5156    if (d & 0xffc00000) == 0xf9400000 {
5157        return Some(InstructionKind::LDR64LdstPos {
5158            Rn: Rn as _,
5159            Rt: Rt as _,
5160            imm12: imm12 as _,
5161        });
5162    }
5163    if (d & 0xffc00000) == 0xf9800000 {
5164        return Some(InstructionKind::PRFMPLdstPos {
5165            Rn: Rn as _,
5166            Rt: Rt as _,
5167            imm12: imm12 as _,
5168        });
5169    }
5170    if (d & 0xffc00000) == 0xfd000000 {
5171        return Some(InstructionKind::STRDLdstPos {
5172            Rn: Rn as _,
5173            Rt: Rt as _,
5174            imm12: imm12 as _,
5175        });
5176    }
5177    if (d & 0xffc00000) == 0xfd400000 {
5178        return Some(InstructionKind::LDRDLdstPos {
5179            Rn: Rn as _,
5180            Rt: Rt as _,
5181            imm12: imm12 as _,
5182        });
5183    }
5184    None
5185}
5186
5187pub const fn decode_ldstpair_off(d: u32) -> Option<InstructionKind> {
5188    ["Could not decode."][((d & 0x3b800000) != 0x29000000) as usize];
5189    let L = (d >> 22) & 1;
5190    let Rn = (d >> 5) & 0x1F;
5191    let Rt = d & 0x1F;
5192    let Rt2 = (d >> 10) & 0x1F;
5193    let V = (d >> 26) & 1;
5194    let imm7 = (d >> 15) & 0x7F;
5195    let opc = (d >> 30) & 3;
5196    if (d & 0xffc00000) == 0x29000000 {
5197        return Some(InstructionKind::STP32LdstpairOff {
5198            Rn: Rn as _,
5199            Rt: Rt as _,
5200            Rt2: Rt2 as _,
5201            imm7: imm7 as _,
5202        });
5203    }
5204    if (d & 0xffc00000) == 0x29400000 {
5205        return Some(InstructionKind::LDP32LdstpairOff {
5206            Rn: Rn as _,
5207            Rt: Rt as _,
5208            Rt2: Rt2 as _,
5209            imm7: imm7 as _,
5210        });
5211    }
5212    if (d & 0xffc00000) == 0x2d000000 {
5213        return Some(InstructionKind::STPSLdstpairOff {
5214            Rn: Rn as _,
5215            Rt: Rt as _,
5216            Rt2: Rt2 as _,
5217            imm7: imm7 as _,
5218        });
5219    }
5220    if (d & 0xffc00000) == 0x2d400000 {
5221        return Some(InstructionKind::LDPSLdstpairOff {
5222            Rn: Rn as _,
5223            Rt: Rt as _,
5224            Rt2: Rt2 as _,
5225            imm7: imm7 as _,
5226        });
5227    }
5228    if (d & 0xffc00000) == 0x69400000 {
5229        return Some(InstructionKind::LDPSW64LdstpairOff {
5230            Rn: Rn as _,
5231            Rt: Rt as _,
5232            Rt2: Rt2 as _,
5233            imm7: imm7 as _,
5234        });
5235    }
5236    if (d & 0xffc00000) == 0x6d000000 {
5237        return Some(InstructionKind::STPDLdstpairOff {
5238            Rn: Rn as _,
5239            Rt: Rt as _,
5240            Rt2: Rt2 as _,
5241            imm7: imm7 as _,
5242        });
5243    }
5244    if (d & 0xffc00000) == 0x6d400000 {
5245        return Some(InstructionKind::LDPDLdstpairOff {
5246            Rn: Rn as _,
5247            Rt: Rt as _,
5248            Rt2: Rt2 as _,
5249            imm7: imm7 as _,
5250        });
5251    }
5252    if (d & 0xffc00000) == 0xa9000000 {
5253        return Some(InstructionKind::STP64LdstpairOff {
5254            Rn: Rn as _,
5255            Rt: Rt as _,
5256            Rt2: Rt2 as _,
5257            imm7: imm7 as _,
5258        });
5259    }
5260    if (d & 0xffc00000) == 0xa9400000 {
5261        return Some(InstructionKind::LDP64LdstpairOff {
5262            Rn: Rn as _,
5263            Rt: Rt as _,
5264            Rt2: Rt2 as _,
5265            imm7: imm7 as _,
5266        });
5267    }
5268    if (d & 0xffc00000) == 0xad000000 {
5269        return Some(InstructionKind::STPQLdstpairOff {
5270            Rn: Rn as _,
5271            Rt: Rt as _,
5272            Rt2: Rt2 as _,
5273            imm7: imm7 as _,
5274        });
5275    }
5276    if (d & 0xffc00000) == 0xad400000 {
5277        return Some(InstructionKind::LDPQLdstpairOff {
5278            Rn: Rn as _,
5279            Rt: Rt as _,
5280            Rt2: Rt2 as _,
5281            imm7: imm7 as _,
5282        });
5283    }
5284    None
5285}
5286
5287pub const fn decode_ldstpair_post(d: u32) -> Option<InstructionKind> {
5288    ["Could not decode."][((d & 0x3b800000) != 0x28800000) as usize];
5289    let L = (d >> 22) & 1;
5290    let Rn = (d >> 5) & 0x1F;
5291    let Rt = d & 0x1F;
5292    let Rt2 = (d >> 10) & 0x1F;
5293    let V = (d >> 26) & 1;
5294    let imm7 = (d >> 15) & 0x7F;
5295    let opc = (d >> 30) & 3;
5296    if (d & 0xffc00000) == 0x28800000 {
5297        return Some(InstructionKind::STP32LdstpairPost {
5298            Rn: Rn as _,
5299            Rt: Rt as _,
5300            Rt2: Rt2 as _,
5301            imm7: imm7 as _,
5302        });
5303    }
5304    if (d & 0xffc00000) == 0x28c00000 {
5305        return Some(InstructionKind::LDP32LdstpairPost {
5306            Rn: Rn as _,
5307            Rt: Rt as _,
5308            Rt2: Rt2 as _,
5309            imm7: imm7 as _,
5310        });
5311    }
5312    if (d & 0xffc00000) == 0x2c800000 {
5313        return Some(InstructionKind::STPSLdstpairPost {
5314            Rn: Rn as _,
5315            Rt: Rt as _,
5316            Rt2: Rt2 as _,
5317            imm7: imm7 as _,
5318        });
5319    }
5320    if (d & 0xffc00000) == 0x2cc00000 {
5321        return Some(InstructionKind::LDPSLdstpairPost {
5322            Rn: Rn as _,
5323            Rt: Rt as _,
5324            Rt2: Rt2 as _,
5325            imm7: imm7 as _,
5326        });
5327    }
5328    if (d & 0xffc00000) == 0x68c00000 {
5329        return Some(InstructionKind::LDPSW64LdstpairPost {
5330            Rn: Rn as _,
5331            Rt: Rt as _,
5332            Rt2: Rt2 as _,
5333            imm7: imm7 as _,
5334        });
5335    }
5336    if (d & 0xffc00000) == 0x6c800000 {
5337        return Some(InstructionKind::STPDLdstpairPost {
5338            Rn: Rn as _,
5339            Rt: Rt as _,
5340            Rt2: Rt2 as _,
5341            imm7: imm7 as _,
5342        });
5343    }
5344    if (d & 0xffc00000) == 0x6cc00000 {
5345        return Some(InstructionKind::LDPDLdstpairPost {
5346            Rn: Rn as _,
5347            Rt: Rt as _,
5348            Rt2: Rt2 as _,
5349            imm7: imm7 as _,
5350        });
5351    }
5352    if (d & 0xffc00000) == 0xa8800000 {
5353        return Some(InstructionKind::STP64LdstpairPost {
5354            Rn: Rn as _,
5355            Rt: Rt as _,
5356            Rt2: Rt2 as _,
5357            imm7: imm7 as _,
5358        });
5359    }
5360    if (d & 0xffc00000) == 0xa8c00000 {
5361        return Some(InstructionKind::LDP64LdstpairPost {
5362            Rn: Rn as _,
5363            Rt: Rt as _,
5364            Rt2: Rt2 as _,
5365            imm7: imm7 as _,
5366        });
5367    }
5368    if (d & 0xffc00000) == 0xac800000 {
5369        return Some(InstructionKind::STPQLdstpairPost {
5370            Rn: Rn as _,
5371            Rt: Rt as _,
5372            Rt2: Rt2 as _,
5373            imm7: imm7 as _,
5374        });
5375    }
5376    if (d & 0xffc00000) == 0xacc00000 {
5377        return Some(InstructionKind::LDPQLdstpairPost {
5378            Rn: Rn as _,
5379            Rt: Rt as _,
5380            Rt2: Rt2 as _,
5381            imm7: imm7 as _,
5382        });
5383    }
5384    None
5385}
5386
5387pub const fn decode_ldstpair_pre(d: u32) -> Option<InstructionKind> {
5388    ["Could not decode."][((d & 0x3b800000) != 0x29800000) as usize];
5389    let L = (d >> 22) & 1;
5390    let Rn = (d >> 5) & 0x1F;
5391    let Rt = d & 0x1F;
5392    let Rt2 = (d >> 10) & 0x1F;
5393    let V = (d >> 26) & 1;
5394    let imm7 = (d >> 15) & 0x7F;
5395    let opc = (d >> 30) & 3;
5396    if (d & 0xffc00000) == 0x29800000 {
5397        return Some(InstructionKind::STP32LdstpairPre {
5398            Rn: Rn as _,
5399            Rt: Rt as _,
5400            Rt2: Rt2 as _,
5401            imm7: imm7 as _,
5402        });
5403    }
5404    if (d & 0xffc00000) == 0x29c00000 {
5405        return Some(InstructionKind::LDP32LdstpairPre {
5406            Rn: Rn as _,
5407            Rt: Rt as _,
5408            Rt2: Rt2 as _,
5409            imm7: imm7 as _,
5410        });
5411    }
5412    if (d & 0xffc00000) == 0x2d800000 {
5413        return Some(InstructionKind::STPSLdstpairPre {
5414            Rn: Rn as _,
5415            Rt: Rt as _,
5416            Rt2: Rt2 as _,
5417            imm7: imm7 as _,
5418        });
5419    }
5420    if (d & 0xffc00000) == 0x2dc00000 {
5421        return Some(InstructionKind::LDPSLdstpairPre {
5422            Rn: Rn as _,
5423            Rt: Rt as _,
5424            Rt2: Rt2 as _,
5425            imm7: imm7 as _,
5426        });
5427    }
5428    if (d & 0xffc00000) == 0x69c00000 {
5429        return Some(InstructionKind::LDPSW64LdstpairPre {
5430            Rn: Rn as _,
5431            Rt: Rt as _,
5432            Rt2: Rt2 as _,
5433            imm7: imm7 as _,
5434        });
5435    }
5436    if (d & 0xffc00000) == 0x6d800000 {
5437        return Some(InstructionKind::STPDLdstpairPre {
5438            Rn: Rn as _,
5439            Rt: Rt as _,
5440            Rt2: Rt2 as _,
5441            imm7: imm7 as _,
5442        });
5443    }
5444    if (d & 0xffc00000) == 0x6dc00000 {
5445        return Some(InstructionKind::LDPDLdstpairPre {
5446            Rn: Rn as _,
5447            Rt: Rt as _,
5448            Rt2: Rt2 as _,
5449            imm7: imm7 as _,
5450        });
5451    }
5452    if (d & 0xffc00000) == 0xa9800000 {
5453        return Some(InstructionKind::STP64LdstpairPre {
5454            Rn: Rn as _,
5455            Rt: Rt as _,
5456            Rt2: Rt2 as _,
5457            imm7: imm7 as _,
5458        });
5459    }
5460    if (d & 0xffc00000) == 0xa9c00000 {
5461        return Some(InstructionKind::LDP64LdstpairPre {
5462            Rn: Rn as _,
5463            Rt: Rt as _,
5464            Rt2: Rt2 as _,
5465            imm7: imm7 as _,
5466        });
5467    }
5468    if (d & 0xffc00000) == 0xad800000 {
5469        return Some(InstructionKind::STPQLdstpairPre {
5470            Rn: Rn as _,
5471            Rt: Rt as _,
5472            Rt2: Rt2 as _,
5473            imm7: imm7 as _,
5474        });
5475    }
5476    if (d & 0xffc00000) == 0xadc00000 {
5477        return Some(InstructionKind::LDPQLdstpairPre {
5478            Rn: Rn as _,
5479            Rt: Rt as _,
5480            Rt2: Rt2 as _,
5481            imm7: imm7 as _,
5482        });
5483    }
5484    None
5485}
5486
5487pub const fn decode_addsub_imm(d: u32) -> Option<InstructionKind> {
5488    ["Could not decode."][((d & 0x1f000000) != 0x11000000) as usize];
5489    let Rd = d & 0x1F;
5490    let Rn = (d >> 5) & 0x1F;
5491    let S = (d >> 29) & 1;
5492    let imm12 = (d >> 10) & 0xFFF;
5493    let op = (d >> 30) & 1;
5494    let sf = (d >> 31) & 1;
5495    let shift = (d >> 22) & 3;
5496    if (d & 0xff000000) == 0x11000000 {
5497        return Some(InstructionKind::ADD32AddsubImm {
5498            Rd: Rd as _,
5499            Rn: Rn as _,
5500            imm12: imm12 as _,
5501            shift: shift as _,
5502        });
5503    }
5504    if (d & 0xff000000) == 0x31000000 {
5505        return Some(InstructionKind::ADDS32SAddsubImm {
5506            Rd: Rd as _,
5507            Rn: Rn as _,
5508            imm12: imm12 as _,
5509            shift: shift as _,
5510        });
5511    }
5512    if (d & 0xff000000) == 0x51000000 {
5513        return Some(InstructionKind::SUB32AddsubImm {
5514            Rd: Rd as _,
5515            Rn: Rn as _,
5516            imm12: imm12 as _,
5517            shift: shift as _,
5518        });
5519    }
5520    if (d & 0xff000000) == 0x71000000 {
5521        return Some(InstructionKind::SUBS32SAddsubImm {
5522            Rd: Rd as _,
5523            Rn: Rn as _,
5524            imm12: imm12 as _,
5525            shift: shift as _,
5526        });
5527    }
5528    if (d & 0xff000000) == 0x91000000 {
5529        return Some(InstructionKind::ADD64AddsubImm {
5530            Rd: Rd as _,
5531            Rn: Rn as _,
5532            imm12: imm12 as _,
5533            shift: shift as _,
5534        });
5535    }
5536    if (d & 0xff000000) == 0xb1000000 {
5537        return Some(InstructionKind::ADDS64SAddsubImm {
5538            Rd: Rd as _,
5539            Rn: Rn as _,
5540            imm12: imm12 as _,
5541            shift: shift as _,
5542        });
5543    }
5544    if (d & 0xff000000) == 0xd1000000 {
5545        return Some(InstructionKind::SUB64AddsubImm {
5546            Rd: Rd as _,
5547            Rn: Rn as _,
5548            imm12: imm12 as _,
5549            shift: shift as _,
5550        });
5551    }
5552    if (d & 0xff000000) == 0xf1000000 {
5553        return Some(InstructionKind::SUBS64SAddsubImm {
5554            Rd: Rd as _,
5555            Rn: Rn as _,
5556            imm12: imm12 as _,
5557            shift: shift as _,
5558        });
5559    }
5560    None
5561}
5562
5563pub const fn decode_bitfield(d: u32) -> Option<InstructionKind> {
5564    ["Could not decode."][((d & 0x1f800000) != 0x13000000) as usize];
5565    let N = (d >> 22) & 1;
5566    let Rd = d & 0x1F;
5567    let Rn = (d >> 5) & 0x1F;
5568    let immr = (d >> 16) & 0x3F;
5569    let imms = (d >> 10) & 0x3F;
5570    let opc = (d >> 29) & 3;
5571    let sf = (d >> 31) & 1;
5572    if (d & 0xffc00000) == 0x13000000 {
5573        return Some(InstructionKind::SBFM32MBitfield {
5574            Rd: Rd as _,
5575            Rn: Rn as _,
5576            immr: immr as _,
5577            imms: imms as _,
5578        });
5579    }
5580    if (d & 0xffc00000) == 0x33000000 {
5581        return Some(InstructionKind::BFM32MBitfield {
5582            Rd: Rd as _,
5583            Rn: Rn as _,
5584            immr: immr as _,
5585            imms: imms as _,
5586        });
5587    }
5588    if (d & 0xffc00000) == 0x53000000 {
5589        return Some(InstructionKind::UBFM32MBitfield {
5590            Rd: Rd as _,
5591            Rn: Rn as _,
5592            immr: immr as _,
5593            imms: imms as _,
5594        });
5595    }
5596    if (d & 0xffc00000) == 0x93400000 {
5597        return Some(InstructionKind::SBFM64MBitfield {
5598            Rd: Rd as _,
5599            Rn: Rn as _,
5600            immr: immr as _,
5601            imms: imms as _,
5602        });
5603    }
5604    if (d & 0xffc00000) == 0xb3400000 {
5605        return Some(InstructionKind::BFM64MBitfield {
5606            Rd: Rd as _,
5607            Rn: Rn as _,
5608            immr: immr as _,
5609            imms: imms as _,
5610        });
5611    }
5612    if (d & 0xffc00000) == 0xd3400000 {
5613        return Some(InstructionKind::UBFM64MBitfield {
5614            Rd: Rd as _,
5615            Rn: Rn as _,
5616            immr: immr as _,
5617            imms: imms as _,
5618        });
5619    }
5620    None
5621}
5622
5623pub const fn decode_extract(d: u32) -> Option<InstructionKind> {
5624    ["Could not decode."][((d & 0x1f800000) != 0x13800000) as usize];
5625    let N = (d >> 22) & 1;
5626    let Rd = d & 0x1F;
5627    let Rm = (d >> 16) & 0x1F;
5628    let Rn = (d >> 5) & 0x1F;
5629    let imms = (d >> 10) & 0x3F;
5630    let o0 = (d >> 21) & 1;
5631    let op21 = (d >> 29) & 3;
5632    let sf = (d >> 31) & 1;
5633    if (d & 0xffe08000) == 0x13800000 {
5634        return Some(InstructionKind::EXTR32Extract {
5635            Rd: Rd as _,
5636            Rm: Rm as _,
5637            Rn: Rn as _,
5638            imms: imms as _,
5639        });
5640    }
5641    if (d & 0xffe00000) == 0x93c00000 {
5642        return Some(InstructionKind::EXTR64Extract {
5643            Rd: Rd as _,
5644            Rm: Rm as _,
5645            Rn: Rn as _,
5646            imms: imms as _,
5647        });
5648    }
5649    None
5650}
5651
5652pub const fn decode_log_imm(d: u32) -> Option<InstructionKind> {
5653    ["Could not decode."][((d & 0x1f800000) != 0x12000000) as usize];
5654    let N = (d >> 22) & 1;
5655    let Rd = d & 0x1F;
5656    let Rn = (d >> 5) & 0x1F;
5657    let immr = (d >> 16) & 0x3F;
5658    let imms = (d >> 10) & 0x3F;
5659    let opc = (d >> 29) & 3;
5660    let sf = (d >> 31) & 1;
5661    if (d & 0xffc00000) == 0x12000000 {
5662        return Some(InstructionKind::AND32LogImm {
5663            Rd: Rd as _,
5664            Rn: Rn as _,
5665            immr: immr as _,
5666            imms: imms as _,
5667        });
5668    }
5669    if (d & 0xffc00000) == 0x32000000 {
5670        return Some(InstructionKind::ORR32LogImm {
5671            Rd: Rd as _,
5672            Rn: Rn as _,
5673            immr: immr as _,
5674            imms: imms as _,
5675        });
5676    }
5677    if (d & 0xffc00000) == 0x52000000 {
5678        return Some(InstructionKind::EOR32LogImm {
5679            Rd: Rd as _,
5680            Rn: Rn as _,
5681            immr: immr as _,
5682            imms: imms as _,
5683        });
5684    }
5685    if (d & 0xffc00000) == 0x72000000 {
5686        return Some(InstructionKind::ANDS32SLogImm {
5687            Rd: Rd as _,
5688            Rn: Rn as _,
5689            immr: immr as _,
5690            imms: imms as _,
5691        });
5692    }
5693    if (d & 0xff800000) == 0x92000000 {
5694        return Some(InstructionKind::AND64LogImm {
5695            N: N as _,
5696            Rd: Rd as _,
5697            Rn: Rn as _,
5698            immr: immr as _,
5699            imms: imms as _,
5700        });
5701    }
5702    if (d & 0xff800000) == 0xb2000000 {
5703        return Some(InstructionKind::ORR64LogImm {
5704            N: N as _,
5705            Rd: Rd as _,
5706            Rn: Rn as _,
5707            immr: immr as _,
5708            imms: imms as _,
5709        });
5710    }
5711    if (d & 0xff800000) == 0xd2000000 {
5712        return Some(InstructionKind::EOR64LogImm {
5713            N: N as _,
5714            Rd: Rd as _,
5715            Rn: Rn as _,
5716            immr: immr as _,
5717            imms: imms as _,
5718        });
5719    }
5720    if (d & 0xff800000) == 0xf2000000 {
5721        return Some(InstructionKind::ANDS64SLogImm {
5722            N: N as _,
5723            Rd: Rd as _,
5724            Rn: Rn as _,
5725            immr: immr as _,
5726            imms: imms as _,
5727        });
5728    }
5729    None
5730}
5731
5732pub const fn decode_movewide(d: u32) -> Option<InstructionKind> {
5733    ["Could not decode."][((d & 0x1f800000) != 0x12800000) as usize];
5734    let Rd = d & 0x1F;
5735    let hw = (d >> 21) & 3;
5736    let imm16 = (d >> 5) & 0xFFFF;
5737    let opc = (d >> 29) & 3;
5738    let sf = (d >> 31) & 1;
5739    if (d & 0xff800000) == 0x12800000 {
5740        return Some(InstructionKind::MOVN32Movewide {
5741            Rd: Rd as _,
5742            hw: hw as _,
5743            imm16: imm16 as _,
5744        });
5745    }
5746    if (d & 0xff800000) == 0x52800000 {
5747        return Some(InstructionKind::MOVZ32Movewide {
5748            Rd: Rd as _,
5749            hw: hw as _,
5750            imm16: imm16 as _,
5751        });
5752    }
5753    if (d & 0xff800000) == 0x72800000 {
5754        return Some(InstructionKind::MOVK32Movewide {
5755            Rd: Rd as _,
5756            hw: hw as _,
5757            imm16: imm16 as _,
5758        });
5759    }
5760    if (d & 0xff800000) == 0x92800000 {
5761        return Some(InstructionKind::MOVN64Movewide {
5762            Rd: Rd as _,
5763            hw: hw as _,
5764            imm16: imm16 as _,
5765        });
5766    }
5767    if (d & 0xff800000) == 0xd2800000 {
5768        return Some(InstructionKind::MOVZ64Movewide {
5769            Rd: Rd as _,
5770            hw: hw as _,
5771            imm16: imm16 as _,
5772        });
5773    }
5774    if (d & 0xff800000) == 0xf2800000 {
5775        return Some(InstructionKind::MOVK64Movewide {
5776            Rd: Rd as _,
5777            hw: hw as _,
5778            imm16: imm16 as _,
5779        });
5780    }
5781    None
5782}
5783
5784pub const fn decode_pcreladdr(d: u32) -> Option<InstructionKind> {
5785    ["Could not decode."][((d & 0x1f000000) != 0x10000000) as usize];
5786    let Rd = d & 0x1F;
5787    let immhi = (d >> 5) & 0x7FFFF;
5788    let immlo = (d >> 29) & 3;
5789    let op = (d >> 31) & 1;
5790    if (d & 0x9f000000) == 0x10000000 {
5791        return Some(InstructionKind::ADROnlyPcreladdr {
5792            Rd: Rd as _,
5793            immhi: immhi as _,
5794            immlo: immlo as _,
5795        });
5796    }
5797    if (d & 0x9f000000) == 0x90000000 {
5798        return Some(InstructionKind::ADRPOnlyPcreladdr {
5799            Rd: Rd as _,
5800            immhi: immhi as _,
5801            immlo: immlo as _,
5802        });
5803    }
5804    None
5805}
5806
5807pub const fn decode_addsub_ext(d: u32) -> Option<InstructionKind> {
5808    ["Could not decode."][((d & 0x1f200000) != 0x0b200000) as usize];
5809    let Rd = d & 0x1F;
5810    let Rm = (d >> 16) & 0x1F;
5811    let Rn = (d >> 5) & 0x1F;
5812    let S = (d >> 29) & 1;
5813    let imm3 = (d >> 10) & 7;
5814    let op = (d >> 30) & 1;
5815    let opt = (d >> 22) & 3;
5816    let option = (d >> 13) & 7;
5817    let sf = (d >> 31) & 1;
5818    if (d & 0xffe00000) == 0x0b200000 {
5819        return Some(InstructionKind::ADD32AddsubExt {
5820            Rd: Rd as _,
5821            Rm: Rm as _,
5822            Rn: Rn as _,
5823            imm3: imm3 as _,
5824            option: option as _,
5825        });
5826    }
5827    if (d & 0xffe00000) == 0x2b200000 {
5828        return Some(InstructionKind::ADDS32SAddsubExt {
5829            Rd: Rd as _,
5830            Rm: Rm as _,
5831            Rn: Rn as _,
5832            imm3: imm3 as _,
5833            option: option as _,
5834        });
5835    }
5836    if (d & 0xffe00000) == 0x4b200000 {
5837        return Some(InstructionKind::SUB32AddsubExt {
5838            Rd: Rd as _,
5839            Rm: Rm as _,
5840            Rn: Rn as _,
5841            imm3: imm3 as _,
5842            option: option as _,
5843        });
5844    }
5845    if (d & 0xffe00000) == 0x6b200000 {
5846        return Some(InstructionKind::SUBS32SAddsubExt {
5847            Rd: Rd as _,
5848            Rm: Rm as _,
5849            Rn: Rn as _,
5850            imm3: imm3 as _,
5851            option: option as _,
5852        });
5853    }
5854    if (d & 0xffe00000) == 0x8b200000 {
5855        return Some(InstructionKind::ADD64AddsubExt {
5856            Rd: Rd as _,
5857            Rm: Rm as _,
5858            Rn: Rn as _,
5859            imm3: imm3 as _,
5860            option: option as _,
5861        });
5862    }
5863    if (d & 0xffe00000) == 0xab200000 {
5864        return Some(InstructionKind::ADDS64SAddsubExt {
5865            Rd: Rd as _,
5866            Rm: Rm as _,
5867            Rn: Rn as _,
5868            imm3: imm3 as _,
5869            option: option as _,
5870        });
5871    }
5872    if (d & 0xffe00000) == 0xcb200000 {
5873        return Some(InstructionKind::SUB64AddsubExt {
5874            Rd: Rd as _,
5875            Rm: Rm as _,
5876            Rn: Rn as _,
5877            imm3: imm3 as _,
5878            option: option as _,
5879        });
5880    }
5881    if (d & 0xffe00000) == 0xeb200000 {
5882        return Some(InstructionKind::SUBS64SAddsubExt {
5883            Rd: Rd as _,
5884            Rm: Rm as _,
5885            Rn: Rn as _,
5886            imm3: imm3 as _,
5887            option: option as _,
5888        });
5889    }
5890    None
5891}
5892
5893pub const fn decode_addsub_shift(d: u32) -> Option<InstructionKind> {
5894    ["Could not decode."][((d & 0x1f200000) != 0x0b000000) as usize];
5895    let Rd = d & 0x1F;
5896    let Rm = (d >> 16) & 0x1F;
5897    let Rn = (d >> 5) & 0x1F;
5898    let S = (d >> 29) & 1;
5899    let imm6 = (d >> 10) & 0x3F;
5900    let op = (d >> 30) & 1;
5901    let sf = (d >> 31) & 1;
5902    let shift = (d >> 22) & 3;
5903    if (d & 0xff200000) == 0x0b000000 {
5904        return Some(InstructionKind::ADD32AddsubShift {
5905            Rd: Rd as _,
5906            Rm: Rm as _,
5907            Rn: Rn as _,
5908            imm6: imm6 as _,
5909            shift: shift as _,
5910        });
5911    }
5912    if (d & 0xff200000) == 0x2b000000 {
5913        return Some(InstructionKind::ADDS32AddsubShift {
5914            Rd: Rd as _,
5915            Rm: Rm as _,
5916            Rn: Rn as _,
5917            imm6: imm6 as _,
5918            shift: shift as _,
5919        });
5920    }
5921    if (d & 0xff200000) == 0x4b000000 {
5922        return Some(InstructionKind::SUB32AddsubShift {
5923            Rd: Rd as _,
5924            Rm: Rm as _,
5925            Rn: Rn as _,
5926            imm6: imm6 as _,
5927            shift: shift as _,
5928        });
5929    }
5930    if (d & 0xff200000) == 0x6b000000 {
5931        return Some(InstructionKind::SUBS32AddsubShift {
5932            Rd: Rd as _,
5933            Rm: Rm as _,
5934            Rn: Rn as _,
5935            imm6: imm6 as _,
5936            shift: shift as _,
5937        });
5938    }
5939    if (d & 0xff200000) == 0x8b000000 {
5940        return Some(InstructionKind::ADD64AddsubShift {
5941            Rd: Rd as _,
5942            Rm: Rm as _,
5943            Rn: Rn as _,
5944            imm6: imm6 as _,
5945            shift: shift as _,
5946        });
5947    }
5948    if (d & 0xff200000) == 0xab000000 {
5949        return Some(InstructionKind::ADDS64AddsubShift {
5950            Rd: Rd as _,
5951            Rm: Rm as _,
5952            Rn: Rn as _,
5953            imm6: imm6 as _,
5954            shift: shift as _,
5955        });
5956    }
5957    if (d & 0xff200000) == 0xcb000000 {
5958        return Some(InstructionKind::SUB64AddsubShift {
5959            Rd: Rd as _,
5960            Rm: Rm as _,
5961            Rn: Rn as _,
5962            imm6: imm6 as _,
5963            shift: shift as _,
5964        });
5965    }
5966    if (d & 0xff200000) == 0xeb000000 {
5967        return Some(InstructionKind::SUBS64AddsubShift {
5968            Rd: Rd as _,
5969            Rm: Rm as _,
5970            Rn: Rn as _,
5971            imm6: imm6 as _,
5972            shift: shift as _,
5973        });
5974    }
5975    None
5976}
5977
5978pub const fn decode_addsub_carry(d: u32) -> Option<InstructionKind> {
5979    ["Could not decode."][((d & 0x1fe00000) != 0x1a000000) as usize];
5980    let Rd = d & 0x1F;
5981    let Rm = (d >> 16) & 0x1F;
5982    let Rn = (d >> 5) & 0x1F;
5983    let S = (d >> 29) & 1;
5984    let op = (d >> 30) & 1;
5985    let opcode2 = (d >> 10) & 0x3F;
5986    let sf = (d >> 31) & 1;
5987    if (d & 0xffe0fc00) == 0x1a000000 {
5988        return Some(InstructionKind::ADC32AddsubCarry {
5989            Rd: Rd as _,
5990            Rm: Rm as _,
5991            Rn: Rn as _,
5992        });
5993    }
5994    if (d & 0xffe0fc00) == 0x3a000000 {
5995        return Some(InstructionKind::ADCS32AddsubCarry {
5996            Rd: Rd as _,
5997            Rm: Rm as _,
5998            Rn: Rn as _,
5999        });
6000    }
6001    if (d & 0xffe0fc00) == 0x5a000000 {
6002        return Some(InstructionKind::SBC32AddsubCarry {
6003            Rd: Rd as _,
6004            Rm: Rm as _,
6005            Rn: Rn as _,
6006        });
6007    }
6008    if (d & 0xffe0fc00) == 0x7a000000 {
6009        return Some(InstructionKind::SBCS32AddsubCarry {
6010            Rd: Rd as _,
6011            Rm: Rm as _,
6012            Rn: Rn as _,
6013        });
6014    }
6015    if (d & 0xffe0fc00) == 0x9a000000 {
6016        return Some(InstructionKind::ADC64AddsubCarry {
6017            Rd: Rd as _,
6018            Rm: Rm as _,
6019            Rn: Rn as _,
6020        });
6021    }
6022    if (d & 0xffe0fc00) == 0xba000000 {
6023        return Some(InstructionKind::ADCS64AddsubCarry {
6024            Rd: Rd as _,
6025            Rm: Rm as _,
6026            Rn: Rn as _,
6027        });
6028    }
6029    if (d & 0xffe0fc00) == 0xda000000 {
6030        return Some(InstructionKind::SBC64AddsubCarry {
6031            Rd: Rd as _,
6032            Rm: Rm as _,
6033            Rn: Rn as _,
6034        });
6035    }
6036    if (d & 0xffe0fc00) == 0xfa000000 {
6037        return Some(InstructionKind::SBCS64AddsubCarry {
6038            Rd: Rd as _,
6039            Rm: Rm as _,
6040            Rn: Rn as _,
6041        });
6042    }
6043    None
6044}
6045
6046pub const fn decode_condcmp_imm(d: u32) -> Option<InstructionKind> {
6047    ["Could not decode."][((d & 0x1fe00800) != 0x1a400800) as usize];
6048    let Rn = (d >> 5) & 0x1F;
6049    let S = (d >> 29) & 1;
6050    let cond = (d >> 12) & 0xF;
6051    let imm5 = (d >> 16) & 0x1F;
6052    let nzcv = d & 0xF;
6053    let o2 = (d >> 10) & 1;
6054    let o3 = (d >> 4) & 1;
6055    let op = (d >> 30) & 1;
6056    let sf = (d >> 31) & 1;
6057    if (d & 0xffe00c10) == 0x3a400800 {
6058        return Some(InstructionKind::CCMN32CondcmpImm {
6059            Rn: Rn as _,
6060            cond: cond as _,
6061            imm5: imm5 as _,
6062            nzcv: nzcv as _,
6063        });
6064    }
6065    if (d & 0xffe00c10) == 0x7a400800 {
6066        return Some(InstructionKind::CCMP32CondcmpImm {
6067            Rn: Rn as _,
6068            cond: cond as _,
6069            imm5: imm5 as _,
6070            nzcv: nzcv as _,
6071        });
6072    }
6073    if (d & 0xffe00c10) == 0xba400800 {
6074        return Some(InstructionKind::CCMN64CondcmpImm {
6075            Rn: Rn as _,
6076            cond: cond as _,
6077            imm5: imm5 as _,
6078            nzcv: nzcv as _,
6079        });
6080    }
6081    if (d & 0xffe00c10) == 0xfa400800 {
6082        return Some(InstructionKind::CCMP64CondcmpImm {
6083            Rn: Rn as _,
6084            cond: cond as _,
6085            imm5: imm5 as _,
6086            nzcv: nzcv as _,
6087        });
6088    }
6089    None
6090}
6091
6092pub const fn decode_condcmp_reg(d: u32) -> Option<InstructionKind> {
6093    ["Could not decode."][((d & 0x1fe00800) != 0x1a400000) as usize];
6094    let Rm = (d >> 16) & 0x1F;
6095    let Rn = (d >> 5) & 0x1F;
6096    let S = (d >> 29) & 1;
6097    let cond = (d >> 12) & 0xF;
6098    let nzcv = d & 0xF;
6099    let o2 = (d >> 10) & 1;
6100    let o3 = (d >> 4) & 1;
6101    let op = (d >> 30) & 1;
6102    let sf = (d >> 31) & 1;
6103    if (d & 0xffe00c10) == 0x3a400000 {
6104        return Some(InstructionKind::CCMN32CondcmpReg {
6105            Rm: Rm as _,
6106            Rn: Rn as _,
6107            cond: cond as _,
6108            nzcv: nzcv as _,
6109        });
6110    }
6111    if (d & 0xffe00c10) == 0x7a400000 {
6112        return Some(InstructionKind::CCMP32CondcmpReg {
6113            Rm: Rm as _,
6114            Rn: Rn as _,
6115            cond: cond as _,
6116            nzcv: nzcv as _,
6117        });
6118    }
6119    if (d & 0xffe00c10) == 0xba400000 {
6120        return Some(InstructionKind::CCMN64CondcmpReg {
6121            Rm: Rm as _,
6122            Rn: Rn as _,
6123            cond: cond as _,
6124            nzcv: nzcv as _,
6125        });
6126    }
6127    if (d & 0xffe00c10) == 0xfa400000 {
6128        return Some(InstructionKind::CCMP64CondcmpReg {
6129            Rm: Rm as _,
6130            Rn: Rn as _,
6131            cond: cond as _,
6132            nzcv: nzcv as _,
6133        });
6134    }
6135    None
6136}
6137
6138pub const fn decode_condsel(d: u32) -> Option<InstructionKind> {
6139    ["Could not decode."][((d & 0x1fe00000) != 0x1a800000) as usize];
6140    let Rd = d & 0x1F;
6141    let Rm = (d >> 16) & 0x1F;
6142    let Rn = (d >> 5) & 0x1F;
6143    let S = (d >> 29) & 1;
6144    let cond = (d >> 12) & 0xF;
6145    let op = (d >> 30) & 1;
6146    let op2 = (d >> 10) & 3;
6147    let sf = (d >> 31) & 1;
6148    if (d & 0xffe00c00) == 0x1a800000 {
6149        return Some(InstructionKind::CSEL32Condsel {
6150            Rd: Rd as _,
6151            Rm: Rm as _,
6152            Rn: Rn as _,
6153            cond: cond as _,
6154        });
6155    }
6156    if (d & 0xffe00c00) == 0x1a800400 {
6157        return Some(InstructionKind::CSINC32Condsel {
6158            Rd: Rd as _,
6159            Rm: Rm as _,
6160            Rn: Rn as _,
6161            cond: cond as _,
6162        });
6163    }
6164    if (d & 0xffe00c00) == 0x5a800000 {
6165        return Some(InstructionKind::CSINV32Condsel {
6166            Rd: Rd as _,
6167            Rm: Rm as _,
6168            Rn: Rn as _,
6169            cond: cond as _,
6170        });
6171    }
6172    if (d & 0xffe00c00) == 0x5a800400 {
6173        return Some(InstructionKind::CSNEG32Condsel {
6174            Rd: Rd as _,
6175            Rm: Rm as _,
6176            Rn: Rn as _,
6177            cond: cond as _,
6178        });
6179    }
6180    if (d & 0xffe00c00) == 0x9a800000 {
6181        return Some(InstructionKind::CSEL64Condsel {
6182            Rd: Rd as _,
6183            Rm: Rm as _,
6184            Rn: Rn as _,
6185            cond: cond as _,
6186        });
6187    }
6188    if (d & 0xffe00c00) == 0x9a800400 {
6189        return Some(InstructionKind::CSINC64Condsel {
6190            Rd: Rd as _,
6191            Rm: Rm as _,
6192            Rn: Rn as _,
6193            cond: cond as _,
6194        });
6195    }
6196    if (d & 0xffe00c00) == 0xda800000 {
6197        return Some(InstructionKind::CSINV64Condsel {
6198            Rd: Rd as _,
6199            Rm: Rm as _,
6200            Rn: Rn as _,
6201            cond: cond as _,
6202        });
6203    }
6204    if (d & 0xffe00c00) == 0xda800400 {
6205        return Some(InstructionKind::CSNEG64Condsel {
6206            Rd: Rd as _,
6207            Rm: Rm as _,
6208            Rn: Rn as _,
6209            cond: cond as _,
6210        });
6211    }
6212    None
6213}
6214
6215pub const fn decode_dp_1src(d: u32) -> Option<InstructionKind> {
6216    ["Could not decode."][((d & 0x5fe00000) != 0x5ac00000) as usize];
6217    let Rd = d & 0x1F;
6218    let Rn = (d >> 5) & 0x1F;
6219    let S = (d >> 29) & 1;
6220    let opcode = (d >> 10) & 0x3F;
6221    let opcode2 = (d >> 16) & 0x1F;
6222    let sf = (d >> 31) & 1;
6223    if (d & 0xffffffe0) == 0xdac123e0 {
6224        return Some(InstructionKind::PACIZA64ZDp1Src { Rd: Rd as _ });
6225    }
6226    if (d & 0xffffffe0) == 0xdac127e0 {
6227        return Some(InstructionKind::PACIZB64ZDp1Src { Rd: Rd as _ });
6228    }
6229    if (d & 0xffffffe0) == 0xdac12be0 {
6230        return Some(InstructionKind::PACDZA64ZDp1Src { Rd: Rd as _ });
6231    }
6232    if (d & 0xffffffe0) == 0xdac12fe0 {
6233        return Some(InstructionKind::PACDZB64ZDp1Src { Rd: Rd as _ });
6234    }
6235    if (d & 0xffffffe0) == 0xdac133e0 {
6236        return Some(InstructionKind::AUTIZA64ZDp1Src { Rd: Rd as _ });
6237    }
6238    if (d & 0xffffffe0) == 0xdac137e0 {
6239        return Some(InstructionKind::AUTIZB64ZDp1Src { Rd: Rd as _ });
6240    }
6241    if (d & 0xffffffe0) == 0xdac13be0 {
6242        return Some(InstructionKind::AUTDZA64ZDp1Src { Rd: Rd as _ });
6243    }
6244    if (d & 0xffffffe0) == 0xdac13fe0 {
6245        return Some(InstructionKind::AUTDZB64ZDp1Src { Rd: Rd as _ });
6246    }
6247    if (d & 0xffffffe0) == 0xdac143e0 {
6248        return Some(InstructionKind::XPACI64ZDp1Src { Rd: Rd as _ });
6249    }
6250    if (d & 0xffffffe0) == 0xdac147e0 {
6251        return Some(InstructionKind::XPACD64ZDp1Src { Rd: Rd as _ });
6252    }
6253    if (d & 0xfffffc00) == 0x5ac00000 {
6254        return Some(InstructionKind::RBIT32Dp1Src {
6255            Rd: Rd as _,
6256            Rn: Rn as _,
6257        });
6258    }
6259    if (d & 0xfffffc00) == 0x5ac00400 {
6260        return Some(InstructionKind::REV1632Dp1Src {
6261            Rd: Rd as _,
6262            Rn: Rn as _,
6263        });
6264    }
6265    if (d & 0xfffffc00) == 0x5ac00800 {
6266        return Some(InstructionKind::REV32Dp1Src {
6267            Rd: Rd as _,
6268            Rn: Rn as _,
6269        });
6270    }
6271    if (d & 0xfffffc00) == 0x5ac01000 {
6272        return Some(InstructionKind::CLZ32Dp1Src {
6273            Rd: Rd as _,
6274            Rn: Rn as _,
6275        });
6276    }
6277    if (d & 0xfffffc00) == 0x5ac01400 {
6278        return Some(InstructionKind::CLS32Dp1Src {
6279            Rd: Rd as _,
6280            Rn: Rn as _,
6281        });
6282    }
6283    if (d & 0xfffffc00) == 0xdac00000 {
6284        return Some(InstructionKind::RBIT64Dp1Src {
6285            Rd: Rd as _,
6286            Rn: Rn as _,
6287        });
6288    }
6289    if (d & 0xfffffc00) == 0xdac00400 {
6290        return Some(InstructionKind::REV1664Dp1Src {
6291            Rd: Rd as _,
6292            Rn: Rn as _,
6293        });
6294    }
6295    if (d & 0xfffffc00) == 0xdac00800 {
6296        return Some(InstructionKind::REV3264Dp1Src {
6297            Rd: Rd as _,
6298            Rn: Rn as _,
6299        });
6300    }
6301    if (d & 0xfffffc00) == 0xdac00c00 {
6302        return Some(InstructionKind::REV64Dp1Src {
6303            Rd: Rd as _,
6304            Rn: Rn as _,
6305        });
6306    }
6307    if (d & 0xfffffc00) == 0xdac01000 {
6308        return Some(InstructionKind::CLZ64Dp1Src {
6309            Rd: Rd as _,
6310            Rn: Rn as _,
6311        });
6312    }
6313    if (d & 0xfffffc00) == 0xdac01400 {
6314        return Some(InstructionKind::CLS64Dp1Src {
6315            Rd: Rd as _,
6316            Rn: Rn as _,
6317        });
6318    }
6319    if (d & 0xfffffc00) == 0xdac10000 {
6320        return Some(InstructionKind::PACIA64PDp1Src {
6321            Rd: Rd as _,
6322            Rn: Rn as _,
6323        });
6324    }
6325    if (d & 0xfffffc00) == 0xdac10400 {
6326        return Some(InstructionKind::PACIB64PDp1Src {
6327            Rd: Rd as _,
6328            Rn: Rn as _,
6329        });
6330    }
6331    if (d & 0xfffffc00) == 0xdac10800 {
6332        return Some(InstructionKind::PACDA64PDp1Src {
6333            Rd: Rd as _,
6334            Rn: Rn as _,
6335        });
6336    }
6337    if (d & 0xfffffc00) == 0xdac10c00 {
6338        return Some(InstructionKind::PACDB64PDp1Src {
6339            Rd: Rd as _,
6340            Rn: Rn as _,
6341        });
6342    }
6343    if (d & 0xfffffc00) == 0xdac11000 {
6344        return Some(InstructionKind::AUTIA64PDp1Src {
6345            Rd: Rd as _,
6346            Rn: Rn as _,
6347        });
6348    }
6349    if (d & 0xfffffc00) == 0xdac11400 {
6350        return Some(InstructionKind::AUTIB64PDp1Src {
6351            Rd: Rd as _,
6352            Rn: Rn as _,
6353        });
6354    }
6355    if (d & 0xfffffc00) == 0xdac11800 {
6356        return Some(InstructionKind::AUTDA64PDp1Src {
6357            Rd: Rd as _,
6358            Rn: Rn as _,
6359        });
6360    }
6361    if (d & 0xfffffc00) == 0xdac11c00 {
6362        return Some(InstructionKind::AUTDB64PDp1Src {
6363            Rd: Rd as _,
6364            Rn: Rn as _,
6365        });
6366    }
6367    None
6368}
6369
6370pub const fn decode_dp_2src(d: u32) -> Option<InstructionKind> {
6371    ["Could not decode."][((d & 0x5fe00000) != 0x1ac00000) as usize];
6372    let Rd = d & 0x1F;
6373    let Rm = (d >> 16) & 0x1F;
6374    let Rn = (d >> 5) & 0x1F;
6375    let S = (d >> 29) & 1;
6376    let opcode = (d >> 10) & 0x3F;
6377    let sf = (d >> 31) & 1;
6378    if (d & 0xffe0fc00) == 0x1ac00800 {
6379        return Some(InstructionKind::UDIV32Dp2Src {
6380            Rd: Rd as _,
6381            Rm: Rm as _,
6382            Rn: Rn as _,
6383        });
6384    }
6385    if (d & 0xffe0fc00) == 0x1ac00c00 {
6386        return Some(InstructionKind::SDIV32Dp2Src {
6387            Rd: Rd as _,
6388            Rm: Rm as _,
6389            Rn: Rn as _,
6390        });
6391    }
6392    if (d & 0xffe0fc00) == 0x1ac02000 {
6393        return Some(InstructionKind::LSLV32Dp2Src {
6394            Rd: Rd as _,
6395            Rm: Rm as _,
6396            Rn: Rn as _,
6397        });
6398    }
6399    if (d & 0xffe0fc00) == 0x1ac02400 {
6400        return Some(InstructionKind::LSRV32Dp2Src {
6401            Rd: Rd as _,
6402            Rm: Rm as _,
6403            Rn: Rn as _,
6404        });
6405    }
6406    if (d & 0xffe0fc00) == 0x1ac02800 {
6407        return Some(InstructionKind::ASRV32Dp2Src {
6408            Rd: Rd as _,
6409            Rm: Rm as _,
6410            Rn: Rn as _,
6411        });
6412    }
6413    if (d & 0xffe0fc00) == 0x1ac02c00 {
6414        return Some(InstructionKind::RORV32Dp2Src {
6415            Rd: Rd as _,
6416            Rm: Rm as _,
6417            Rn: Rn as _,
6418        });
6419    }
6420    if (d & 0xffe0fc00) == 0x1ac04000 {
6421        return Some(InstructionKind::CRC32B32CDp2Src {
6422            Rd: Rd as _,
6423            Rm: Rm as _,
6424            Rn: Rn as _,
6425        });
6426    }
6427    if (d & 0xffe0fc00) == 0x1ac04400 {
6428        return Some(InstructionKind::CRC32H32CDp2Src {
6429            Rd: Rd as _,
6430            Rm: Rm as _,
6431            Rn: Rn as _,
6432        });
6433    }
6434    if (d & 0xffe0fc00) == 0x1ac04800 {
6435        return Some(InstructionKind::CRC32W32CDp2Src {
6436            Rd: Rd as _,
6437            Rm: Rm as _,
6438            Rn: Rn as _,
6439        });
6440    }
6441    if (d & 0xffe0fc00) == 0x1ac05000 {
6442        return Some(InstructionKind::CRC32CB32CDp2Src {
6443            Rd: Rd as _,
6444            Rm: Rm as _,
6445            Rn: Rn as _,
6446        });
6447    }
6448    if (d & 0xffe0fc00) == 0x1ac05400 {
6449        return Some(InstructionKind::CRC32CH32CDp2Src {
6450            Rd: Rd as _,
6451            Rm: Rm as _,
6452            Rn: Rn as _,
6453        });
6454    }
6455    if (d & 0xffe0fc00) == 0x1ac05800 {
6456        return Some(InstructionKind::CRC32CW32CDp2Src {
6457            Rd: Rd as _,
6458            Rm: Rm as _,
6459            Rn: Rn as _,
6460        });
6461    }
6462    if (d & 0xffe0fc00) == 0x9ac00800 {
6463        return Some(InstructionKind::UDIV64Dp2Src {
6464            Rd: Rd as _,
6465            Rm: Rm as _,
6466            Rn: Rn as _,
6467        });
6468    }
6469    if (d & 0xffe0fc00) == 0x9ac00c00 {
6470        return Some(InstructionKind::SDIV64Dp2Src {
6471            Rd: Rd as _,
6472            Rm: Rm as _,
6473            Rn: Rn as _,
6474        });
6475    }
6476    if (d & 0xffe0fc00) == 0x9ac02000 {
6477        return Some(InstructionKind::LSLV64Dp2Src {
6478            Rd: Rd as _,
6479            Rm: Rm as _,
6480            Rn: Rn as _,
6481        });
6482    }
6483    if (d & 0xffe0fc00) == 0x9ac02400 {
6484        return Some(InstructionKind::LSRV64Dp2Src {
6485            Rd: Rd as _,
6486            Rm: Rm as _,
6487            Rn: Rn as _,
6488        });
6489    }
6490    if (d & 0xffe0fc00) == 0x9ac02800 {
6491        return Some(InstructionKind::ASRV64Dp2Src {
6492            Rd: Rd as _,
6493            Rm: Rm as _,
6494            Rn: Rn as _,
6495        });
6496    }
6497    if (d & 0xffe0fc00) == 0x9ac02c00 {
6498        return Some(InstructionKind::RORV64Dp2Src {
6499            Rd: Rd as _,
6500            Rm: Rm as _,
6501            Rn: Rn as _,
6502        });
6503    }
6504    if (d & 0xffe0fc00) == 0x9ac03000 {
6505        return Some(InstructionKind::PACGA64PDp2Src {
6506            Rd: Rd as _,
6507            Rm: Rm as _,
6508            Rn: Rn as _,
6509        });
6510    }
6511    if (d & 0xffe0fc00) == 0x9ac04c00 {
6512        return Some(InstructionKind::CRC32X64CDp2Src {
6513            Rd: Rd as _,
6514            Rm: Rm as _,
6515            Rn: Rn as _,
6516        });
6517    }
6518    if (d & 0xffe0fc00) == 0x9ac05c00 {
6519        return Some(InstructionKind::CRC32CX64CDp2Src {
6520            Rd: Rd as _,
6521            Rm: Rm as _,
6522            Rn: Rn as _,
6523        });
6524    }
6525    None
6526}
6527
6528pub const fn decode_dp_3src(d: u32) -> Option<InstructionKind> {
6529    ["Could not decode."][((d & 0x1f000000) != 0x1b000000) as usize];
6530    let Ra = (d >> 10) & 0x1F;
6531    let Rd = d & 0x1F;
6532    let Rm = (d >> 16) & 0x1F;
6533    let Rn = (d >> 5) & 0x1F;
6534    let o0 = (d >> 15) & 1;
6535    let op31 = (d >> 21) & 7;
6536    let op54 = (d >> 29) & 3;
6537    let sf = (d >> 31) & 1;
6538    if (d & 0xffe08000) == 0x1b000000 {
6539        return Some(InstructionKind::MADD32ADp3Src {
6540            Ra: Ra as _,
6541            Rd: Rd as _,
6542            Rm: Rm as _,
6543            Rn: Rn as _,
6544        });
6545    }
6546    if (d & 0xffe08000) == 0x1b008000 {
6547        return Some(InstructionKind::MSUB32ADp3Src {
6548            Ra: Ra as _,
6549            Rd: Rd as _,
6550            Rm: Rm as _,
6551            Rn: Rn as _,
6552        });
6553    }
6554    if (d & 0xffe08000) == 0x9b000000 {
6555        return Some(InstructionKind::MADD64ADp3Src {
6556            Ra: Ra as _,
6557            Rd: Rd as _,
6558            Rm: Rm as _,
6559            Rn: Rn as _,
6560        });
6561    }
6562    if (d & 0xffe08000) == 0x9b008000 {
6563        return Some(InstructionKind::MSUB64ADp3Src {
6564            Ra: Ra as _,
6565            Rd: Rd as _,
6566            Rm: Rm as _,
6567            Rn: Rn as _,
6568        });
6569    }
6570    if (d & 0xffe08000) == 0x9b200000 {
6571        return Some(InstructionKind::SMADDL64WaDp3Src {
6572            Ra: Ra as _,
6573            Rd: Rd as _,
6574            Rm: Rm as _,
6575            Rn: Rn as _,
6576        });
6577    }
6578    if (d & 0xffe08000) == 0x9b208000 {
6579        return Some(InstructionKind::SMSUBL64WaDp3Src {
6580            Ra: Ra as _,
6581            Rd: Rd as _,
6582            Rm: Rm as _,
6583            Rn: Rn as _,
6584        });
6585    }
6586    if (d & 0xffe08000) == 0x9b400000 {
6587        return Some(InstructionKind::SMULH64Dp3Src {
6588            Ra: Ra as _,
6589            Rd: Rd as _,
6590            Rm: Rm as _,
6591            Rn: Rn as _,
6592        });
6593    }
6594    if (d & 0xffe08000) == 0x9ba00000 {
6595        return Some(InstructionKind::UMADDL64WaDp3Src {
6596            Ra: Ra as _,
6597            Rd: Rd as _,
6598            Rm: Rm as _,
6599            Rn: Rn as _,
6600        });
6601    }
6602    if (d & 0xffe08000) == 0x9ba08000 {
6603        return Some(InstructionKind::UMSUBL64WaDp3Src {
6604            Ra: Ra as _,
6605            Rd: Rd as _,
6606            Rm: Rm as _,
6607            Rn: Rn as _,
6608        });
6609    }
6610    if (d & 0xffe08000) == 0x9bc00000 {
6611        return Some(InstructionKind::UMULH64Dp3Src {
6612            Ra: Ra as _,
6613            Rd: Rd as _,
6614            Rm: Rm as _,
6615            Rn: Rn as _,
6616        });
6617    }
6618    None
6619}
6620
6621pub const fn decode_log_shift(d: u32) -> Option<InstructionKind> {
6622    ["Could not decode."][((d & 0x1f000000) != 0x0a000000) as usize];
6623    let N = (d >> 21) & 1;
6624    let Rd = d & 0x1F;
6625    let Rm = (d >> 16) & 0x1F;
6626    let Rn = (d >> 5) & 0x1F;
6627    let imm6 = (d >> 10) & 0x3F;
6628    let opc = (d >> 29) & 3;
6629    let sf = (d >> 31) & 1;
6630    let shift = (d >> 22) & 3;
6631    if (d & 0xff200000) == 0x0a000000 {
6632        return Some(InstructionKind::AND32LogShift {
6633            Rd: Rd as _,
6634            Rm: Rm as _,
6635            Rn: Rn as _,
6636            imm6: imm6 as _,
6637            shift: shift as _,
6638        });
6639    }
6640    if (d & 0xff200000) == 0x0a200000 {
6641        return Some(InstructionKind::BIC32LogShift {
6642            Rd: Rd as _,
6643            Rm: Rm as _,
6644            Rn: Rn as _,
6645            imm6: imm6 as _,
6646            shift: shift as _,
6647        });
6648    }
6649    if (d & 0xff200000) == 0x2a000000 {
6650        return Some(InstructionKind::ORR32LogShift {
6651            Rd: Rd as _,
6652            Rm: Rm as _,
6653            Rn: Rn as _,
6654            imm6: imm6 as _,
6655            shift: shift as _,
6656        });
6657    }
6658    if (d & 0xff200000) == 0x2a200000 {
6659        return Some(InstructionKind::ORN32LogShift {
6660            Rd: Rd as _,
6661            Rm: Rm as _,
6662            Rn: Rn as _,
6663            imm6: imm6 as _,
6664            shift: shift as _,
6665        });
6666    }
6667    if (d & 0xff200000) == 0x4a000000 {
6668        return Some(InstructionKind::EOR32LogShift {
6669            Rd: Rd as _,
6670            Rm: Rm as _,
6671            Rn: Rn as _,
6672            imm6: imm6 as _,
6673            shift: shift as _,
6674        });
6675    }
6676    if (d & 0xff200000) == 0x4a200000 {
6677        return Some(InstructionKind::EON32LogShift {
6678            Rd: Rd as _,
6679            Rm: Rm as _,
6680            Rn: Rn as _,
6681            imm6: imm6 as _,
6682            shift: shift as _,
6683        });
6684    }
6685    if (d & 0xff200000) == 0x6a000000 {
6686        return Some(InstructionKind::ANDS32LogShift {
6687            Rd: Rd as _,
6688            Rm: Rm as _,
6689            Rn: Rn as _,
6690            imm6: imm6 as _,
6691            shift: shift as _,
6692        });
6693    }
6694    if (d & 0xff200000) == 0x6a200000 {
6695        return Some(InstructionKind::BICS32LogShift {
6696            Rd: Rd as _,
6697            Rm: Rm as _,
6698            Rn: Rn as _,
6699            imm6: imm6 as _,
6700            shift: shift as _,
6701        });
6702    }
6703    if (d & 0xff200000) == 0x8a000000 {
6704        return Some(InstructionKind::AND64LogShift {
6705            Rd: Rd as _,
6706            Rm: Rm as _,
6707            Rn: Rn as _,
6708            imm6: imm6 as _,
6709            shift: shift as _,
6710        });
6711    }
6712    if (d & 0xff200000) == 0x8a200000 {
6713        return Some(InstructionKind::BIC64LogShift {
6714            Rd: Rd as _,
6715            Rm: Rm as _,
6716            Rn: Rn as _,
6717            imm6: imm6 as _,
6718            shift: shift as _,
6719        });
6720    }
6721    if (d & 0xff200000) == 0xaa000000 {
6722        return Some(InstructionKind::ORR64LogShift {
6723            Rd: Rd as _,
6724            Rm: Rm as _,
6725            Rn: Rn as _,
6726            imm6: imm6 as _,
6727            shift: shift as _,
6728        });
6729    }
6730    if (d & 0xff200000) == 0xaa200000 {
6731        return Some(InstructionKind::ORN64LogShift {
6732            Rd: Rd as _,
6733            Rm: Rm as _,
6734            Rn: Rn as _,
6735            imm6: imm6 as _,
6736            shift: shift as _,
6737        });
6738    }
6739    if (d & 0xff200000) == 0xca000000 {
6740        return Some(InstructionKind::EOR64LogShift {
6741            Rd: Rd as _,
6742            Rm: Rm as _,
6743            Rn: Rn as _,
6744            imm6: imm6 as _,
6745            shift: shift as _,
6746        });
6747    }
6748    if (d & 0xff200000) == 0xca200000 {
6749        return Some(InstructionKind::EON64LogShift {
6750            Rd: Rd as _,
6751            Rm: Rm as _,
6752            Rn: Rn as _,
6753            imm6: imm6 as _,
6754            shift: shift as _,
6755        });
6756    }
6757    if (d & 0xff200000) == 0xea000000 {
6758        return Some(InstructionKind::ANDS64LogShift {
6759            Rd: Rd as _,
6760            Rm: Rm as _,
6761            Rn: Rn as _,
6762            imm6: imm6 as _,
6763            shift: shift as _,
6764        });
6765    }
6766    if (d & 0xff200000) == 0xea200000 {
6767        return Some(InstructionKind::BICS64LogShift {
6768            Rd: Rd as _,
6769            Rm: Rm as _,
6770            Rn: Rn as _,
6771            imm6: imm6 as _,
6772            shift: shift as _,
6773        });
6774    }
6775    None
6776}
6777
6778pub const fn decode_asimdall(d: u32) -> Option<InstructionKind> {
6779    ["Could not decode."][((d & 0x9f3e0c00) != 0x0e300800) as usize];
6780    let Q = (d >> 30) & 1;
6781    let Rd = d & 0x1F;
6782    let Rn = (d >> 5) & 0x1F;
6783    let U = (d >> 29) & 1;
6784    let opcode = (d >> 12) & 0x1F;
6785    let size = (d >> 22) & 3;
6786    if (d & 0xbffffc00) == 0x0e30c800 {
6787        return Some(InstructionKind::FMAXNMVAsimdallOnlyH {
6788            Q: Q as _,
6789            Rd: Rd as _,
6790            Rn: Rn as _,
6791        });
6792    }
6793    if (d & 0xbffffc00) == 0x0e30f800 {
6794        return Some(InstructionKind::FMAXVAsimdallOnlyH {
6795            Q: Q as _,
6796            Rd: Rd as _,
6797            Rn: Rn as _,
6798        });
6799    }
6800    if (d & 0xbffffc00) == 0x0eb0c800 {
6801        return Some(InstructionKind::FMINNMVAsimdallOnlyH {
6802            Q: Q as _,
6803            Rd: Rd as _,
6804            Rn: Rn as _,
6805        });
6806    }
6807    if (d & 0xbffffc00) == 0x0eb0f800 {
6808        return Some(InstructionKind::FMINVAsimdallOnlyH {
6809            Q: Q as _,
6810            Rd: Rd as _,
6811            Rn: Rn as _,
6812        });
6813    }
6814    if (d & 0xbfbffc00) == 0x2e30c800 {
6815        return Some(InstructionKind::FMAXNMVAsimdallOnlySd {
6816            Q: Q as _,
6817            Rd: Rd as _,
6818            Rn: Rn as _,
6819            size: size as _,
6820        });
6821    }
6822    if (d & 0xbfbffc00) == 0x2e30f800 {
6823        return Some(InstructionKind::FMAXVAsimdallOnlySd {
6824            Q: Q as _,
6825            Rd: Rd as _,
6826            Rn: Rn as _,
6827            size: size as _,
6828        });
6829    }
6830    if (d & 0xbfbffc00) == 0x2eb0c800 {
6831        return Some(InstructionKind::FMINNMVAsimdallOnlySd {
6832            Q: Q as _,
6833            Rd: Rd as _,
6834            Rn: Rn as _,
6835            size: size as _,
6836        });
6837    }
6838    if (d & 0xbfbffc00) == 0x2eb0f800 {
6839        return Some(InstructionKind::FMINVAsimdallOnlySd {
6840            Q: Q as _,
6841            Rd: Rd as _,
6842            Rn: Rn as _,
6843            size: size as _,
6844        });
6845    }
6846    if (d & 0xbf3ffc00) == 0x0e303800 {
6847        return Some(InstructionKind::SADDLVAsimdallOnly {
6848            Q: Q as _,
6849            Rd: Rd as _,
6850            Rn: Rn as _,
6851            size: size as _,
6852        });
6853    }
6854    if (d & 0xbf3ffc00) == 0x0e30a800 {
6855        return Some(InstructionKind::SMAXVAsimdallOnly {
6856            Q: Q as _,
6857            Rd: Rd as _,
6858            Rn: Rn as _,
6859            size: size as _,
6860        });
6861    }
6862    if (d & 0xbf3ffc00) == 0x0e31a800 {
6863        return Some(InstructionKind::SMINVAsimdallOnly {
6864            Q: Q as _,
6865            Rd: Rd as _,
6866            Rn: Rn as _,
6867            size: size as _,
6868        });
6869    }
6870    if (d & 0xbf3ffc00) == 0x0e31b800 {
6871        return Some(InstructionKind::ADDVAsimdallOnly {
6872            Q: Q as _,
6873            Rd: Rd as _,
6874            Rn: Rn as _,
6875            size: size as _,
6876        });
6877    }
6878    if (d & 0xbf3ffc00) == 0x2e303800 {
6879        return Some(InstructionKind::UADDLVAsimdallOnly {
6880            Q: Q as _,
6881            Rd: Rd as _,
6882            Rn: Rn as _,
6883            size: size as _,
6884        });
6885    }
6886    if (d & 0xbf3ffc00) == 0x2e30a800 {
6887        return Some(InstructionKind::UMAXVAsimdallOnly {
6888            Q: Q as _,
6889            Rd: Rd as _,
6890            Rn: Rn as _,
6891            size: size as _,
6892        });
6893    }
6894    if (d & 0xbf3ffc00) == 0x2e31a800 {
6895        return Some(InstructionKind::UMINVAsimdallOnly {
6896            Q: Q as _,
6897            Rd: Rd as _,
6898            Rn: Rn as _,
6899            size: size as _,
6900        });
6901    }
6902    None
6903}
6904
6905pub const fn decode_asimdins(d: u32) -> Option<InstructionKind> {
6906    ["Could not decode."][((d & 0x9fe08400) != 0x0e000400) as usize];
6907    let Q = (d >> 30) & 1;
6908    let Rd = d & 0x1F;
6909    let Rn = (d >> 5) & 0x1F;
6910    let imm4 = (d >> 11) & 0xF;
6911    let imm5 = (d >> 16) & 0x1F;
6912    let op = (d >> 29) & 1;
6913    if (d & 0xffeffc00) == 0x4e083c00 {
6914        return Some(InstructionKind::UMOVAsimdinsXX {
6915            Rd: Rd as _,
6916            Rn: Rn as _,
6917            imm5: imm5 as _,
6918        });
6919    }
6920    if (d & 0xffe0fc00) == 0x0e002c00 {
6921        return Some(InstructionKind::SMOVAsimdinsWW {
6922            Rd: Rd as _,
6923            Rn: Rn as _,
6924            imm5: imm5 as _,
6925        });
6926    }
6927    if (d & 0xffe0fc00) == 0x0e003c00 {
6928        return Some(InstructionKind::UMOVAsimdinsWW {
6929            Rd: Rd as _,
6930            Rn: Rn as _,
6931            imm5: imm5 as _,
6932        });
6933    }
6934    if (d & 0xffe0fc00) == 0x4e001c00 {
6935        return Some(InstructionKind::INSAsimdinsIrR {
6936            Rd: Rd as _,
6937            Rn: Rn as _,
6938            imm5: imm5 as _,
6939        });
6940    }
6941    if (d & 0xffe0fc00) == 0x4e002c00 {
6942        return Some(InstructionKind::SMOVAsimdinsXX {
6943            Rd: Rd as _,
6944            Rn: Rn as _,
6945            imm5: imm5 as _,
6946        });
6947    }
6948    if (d & 0xbfe0fc00) == 0x0e000400 {
6949        return Some(InstructionKind::DUPAsimdinsDvV {
6950            Q: Q as _,
6951            Rd: Rd as _,
6952            Rn: Rn as _,
6953            imm5: imm5 as _,
6954        });
6955    }
6956    if (d & 0xbfe0fc00) == 0x0e000c00 {
6957        return Some(InstructionKind::DUPAsimdinsDrR {
6958            Q: Q as _,
6959            Rd: Rd as _,
6960            Rn: Rn as _,
6961            imm5: imm5 as _,
6962        });
6963    }
6964    if (d & 0xffe08400) == 0x6e000400 {
6965        return Some(InstructionKind::INSAsimdinsIvV {
6966            Rd: Rd as _,
6967            Rn: Rn as _,
6968            imm4: imm4 as _,
6969            imm5: imm5 as _,
6970        });
6971    }
6972    None
6973}
6974
6975pub const fn decode_asimdext(d: u32) -> Option<InstructionKind> {
6976    ["Could not decode."][((d & 0xbf208400) != 0x2e000000) as usize];
6977    let Q = (d >> 30) & 1;
6978    let Rd = d & 0x1F;
6979    let Rm = (d >> 16) & 0x1F;
6980    let Rn = (d >> 5) & 0x1F;
6981    let imm4 = (d >> 11) & 0xF;
6982    let op2 = (d >> 22) & 3;
6983    if (d & 0xbfe08400) == 0x2e000000 {
6984        return Some(InstructionKind::EXTAsimdextOnly {
6985            Q: Q as _,
6986            Rd: Rd as _,
6987            Rm: Rm as _,
6988            Rn: Rn as _,
6989            imm4: imm4 as _,
6990        });
6991    }
6992    None
6993}
6994
6995pub const fn decode_asimdimm(v: u32) -> Option<InstructionKind> {
6996    ["Could not decode."][((v & 0x9ff80400) != 0x0f000400) as usize];
6997    let Q = (v >> 30) & 1;
6998    let Rd = v & 0x1F;
6999    let a = (v >> 18) & 1;
7000    let b = (v >> 17) & 1;
7001    let c = (v >> 16) & 1;
7002    let cmode = (v >> 12) & 0xF;
7003    let d = (v >> 9) & 1;
7004    let e = (v >> 8) & 1;
7005    let f = (v >> 7) & 1;
7006    let g = (v >> 6) & 1;
7007    let h = (v >> 5) & 1;
7008    let o2 = (v >> 11) & 1;
7009    let op = (v >> 29) & 1;
7010    if (v & 0xfff8fc00) == 0x2f00e400 {
7011        return Some(InstructionKind::MOVIAsimdimmDDs {
7012            Rd: Rd as _,
7013            a: a as _,
7014            b: b as _,
7015            c: c as _,
7016            d: d as _,
7017            e: e as _,
7018            f: f as _,
7019            g: g as _,
7020            h: h as _,
7021        });
7022    }
7023    if (v & 0xfff8fc00) == 0x6f00e400 {
7024        return Some(InstructionKind::MOVIAsimdimmD2D {
7025            Rd: Rd as _,
7026            a: a as _,
7027            b: b as _,
7028            c: c as _,
7029            d: d as _,
7030            e: e as _,
7031            f: f as _,
7032            g: g as _,
7033            h: h as _,
7034        });
7035    }
7036    if (v & 0xfff8fc00) == 0x6f00f400 {
7037        return Some(InstructionKind::FMOVAsimdimmD2D {
7038            Rd: Rd as _,
7039            a: a as _,
7040            b: b as _,
7041            c: c as _,
7042            d: d as _,
7043            e: e as _,
7044            f: f as _,
7045            g: g as _,
7046            h: h as _,
7047        });
7048    }
7049    if (v & 0xbff8fc00) == 0x0f00e400 {
7050        return Some(InstructionKind::MOVIAsimdimmNB {
7051            Q: Q as _,
7052            Rd: Rd as _,
7053            a: a as _,
7054            b: b as _,
7055            c: c as _,
7056            d: d as _,
7057            e: e as _,
7058            f: f as _,
7059            g: g as _,
7060            h: h as _,
7061        });
7062    }
7063    if (v & 0xbff8fc00) == 0x0f00f400 {
7064        return Some(InstructionKind::FMOVAsimdimmSS {
7065            Q: Q as _,
7066            Rd: Rd as _,
7067            a: a as _,
7068            b: b as _,
7069            c: c as _,
7070            d: d as _,
7071            e: e as _,
7072            f: f as _,
7073            g: g as _,
7074            h: h as _,
7075        });
7076    }
7077    if (v & 0xbff8fc00) == 0x0f00fc00 {
7078        return Some(InstructionKind::FMOVAsimdimmHH {
7079            Q: Q as _,
7080            Rd: Rd as _,
7081            a: a as _,
7082            b: b as _,
7083            c: c as _,
7084            d: d as _,
7085            e: e as _,
7086            f: f as _,
7087            g: g as _,
7088            h: h as _,
7089        });
7090    }
7091    if (v & 0xbff8dc00) == 0x0f008400 {
7092        return Some(InstructionKind::MOVIAsimdimmLHl {
7093            Q: Q as _,
7094            Rd: Rd as _,
7095            a: a as _,
7096            b: b as _,
7097            c: c as _,
7098            cmode: cmode as _,
7099            d: d as _,
7100            e: e as _,
7101            f: f as _,
7102            g: g as _,
7103            h: h as _,
7104        });
7105    }
7106    if (v & 0xbff8dc00) == 0x0f009400 {
7107        return Some(InstructionKind::ORRAsimdimmLHl {
7108            Q: Q as _,
7109            Rd: Rd as _,
7110            a: a as _,
7111            b: b as _,
7112            c: c as _,
7113            cmode: cmode as _,
7114            d: d as _,
7115            e: e as _,
7116            f: f as _,
7117            g: g as _,
7118            h: h as _,
7119        });
7120    }
7121    if (v & 0xbff8dc00) == 0x2f008400 {
7122        return Some(InstructionKind::MVNIAsimdimmLHl {
7123            Q: Q as _,
7124            Rd: Rd as _,
7125            a: a as _,
7126            b: b as _,
7127            c: c as _,
7128            cmode: cmode as _,
7129            d: d as _,
7130            e: e as _,
7131            f: f as _,
7132            g: g as _,
7133            h: h as _,
7134        });
7135    }
7136    if (v & 0xbff8dc00) == 0x2f009400 {
7137        return Some(InstructionKind::BICAsimdimmLHl {
7138            Q: Q as _,
7139            Rd: Rd as _,
7140            a: a as _,
7141            b: b as _,
7142            c: c as _,
7143            cmode: cmode as _,
7144            d: d as _,
7145            e: e as _,
7146            f: f as _,
7147            g: g as _,
7148            h: h as _,
7149        });
7150    }
7151    if (v & 0xbff8ec00) == 0x0f00c400 {
7152        return Some(InstructionKind::MOVIAsimdimmMSm {
7153            Q: Q as _,
7154            Rd: Rd as _,
7155            a: a as _,
7156            b: b as _,
7157            c: c as _,
7158            cmode: cmode as _,
7159            d: d as _,
7160            e: e as _,
7161            f: f as _,
7162            g: g as _,
7163            h: h as _,
7164        });
7165    }
7166    if (v & 0xbff8ec00) == 0x2f00c400 {
7167        return Some(InstructionKind::MVNIAsimdimmMSm {
7168            Q: Q as _,
7169            Rd: Rd as _,
7170            a: a as _,
7171            b: b as _,
7172            c: c as _,
7173            cmode: cmode as _,
7174            d: d as _,
7175            e: e as _,
7176            f: f as _,
7177            g: g as _,
7178            h: h as _,
7179        });
7180    }
7181    if (v & 0xbff89c00) == 0x0f000400 {
7182        return Some(InstructionKind::MOVIAsimdimmLSl {
7183            Q: Q as _,
7184            Rd: Rd as _,
7185            a: a as _,
7186            b: b as _,
7187            c: c as _,
7188            cmode: cmode as _,
7189            d: d as _,
7190            e: e as _,
7191            f: f as _,
7192            g: g as _,
7193            h: h as _,
7194        });
7195    }
7196    if (v & 0xbff89c00) == 0x0f001400 {
7197        return Some(InstructionKind::ORRAsimdimmLSl {
7198            Q: Q as _,
7199            Rd: Rd as _,
7200            a: a as _,
7201            b: b as _,
7202            c: c as _,
7203            cmode: cmode as _,
7204            d: d as _,
7205            e: e as _,
7206            f: f as _,
7207            g: g as _,
7208            h: h as _,
7209        });
7210    }
7211    if (v & 0xbff89c00) == 0x2f000400 {
7212        return Some(InstructionKind::MVNIAsimdimmLSl {
7213            Q: Q as _,
7214            Rd: Rd as _,
7215            a: a as _,
7216            b: b as _,
7217            c: c as _,
7218            cmode: cmode as _,
7219            d: d as _,
7220            e: e as _,
7221            f: f as _,
7222            g: g as _,
7223            h: h as _,
7224        });
7225    }
7226    if (v & 0xbff89c00) == 0x2f001400 {
7227        return Some(InstructionKind::BICAsimdimmLSl {
7228            Q: Q as _,
7229            Rd: Rd as _,
7230            a: a as _,
7231            b: b as _,
7232            c: c as _,
7233            cmode: cmode as _,
7234            d: d as _,
7235            e: e as _,
7236            f: f as _,
7237            g: g as _,
7238            h: h as _,
7239        });
7240    }
7241    None
7242}
7243
7244pub const fn decode_asimdperm(d: u32) -> Option<InstructionKind> {
7245    ["Could not decode."][((d & 0xbf208c00) != 0x0e000800) as usize];
7246    let Q = (d >> 30) & 1;
7247    let Rd = d & 0x1F;
7248    let Rm = (d >> 16) & 0x1F;
7249    let Rn = (d >> 5) & 0x1F;
7250    let opcode = (d >> 12) & 7;
7251    let size = (d >> 22) & 3;
7252    if (d & 0xbf20fc00) == 0x0e001800 {
7253        return Some(InstructionKind::UZP1AsimdpermOnly {
7254            Q: Q as _,
7255            Rd: Rd as _,
7256            Rm: Rm as _,
7257            Rn: Rn as _,
7258            size: size as _,
7259        });
7260    }
7261    if (d & 0xbf20fc00) == 0x0e002800 {
7262        return Some(InstructionKind::TRN1AsimdpermOnly {
7263            Q: Q as _,
7264            Rd: Rd as _,
7265            Rm: Rm as _,
7266            Rn: Rn as _,
7267            size: size as _,
7268        });
7269    }
7270    if (d & 0xbf20fc00) == 0x0e003800 {
7271        return Some(InstructionKind::ZIP1AsimdpermOnly {
7272            Q: Q as _,
7273            Rd: Rd as _,
7274            Rm: Rm as _,
7275            Rn: Rn as _,
7276            size: size as _,
7277        });
7278    }
7279    if (d & 0xbf20fc00) == 0x0e005800 {
7280        return Some(InstructionKind::UZP2AsimdpermOnly {
7281            Q: Q as _,
7282            Rd: Rd as _,
7283            Rm: Rm as _,
7284            Rn: Rn as _,
7285            size: size as _,
7286        });
7287    }
7288    if (d & 0xbf20fc00) == 0x0e006800 {
7289        return Some(InstructionKind::TRN2AsimdpermOnly {
7290            Q: Q as _,
7291            Rd: Rd as _,
7292            Rm: Rm as _,
7293            Rn: Rn as _,
7294            size: size as _,
7295        });
7296    }
7297    if (d & 0xbf20fc00) == 0x0e007800 {
7298        return Some(InstructionKind::ZIP2AsimdpermOnly {
7299            Q: Q as _,
7300            Rd: Rd as _,
7301            Rm: Rm as _,
7302            Rn: Rn as _,
7303            size: size as _,
7304        });
7305    }
7306    None
7307}
7308
7309pub const fn decode_asisdone(d: u32) -> Option<InstructionKind> {
7310    ["Could not decode."][((d & 0xdfe08400) != 0x5e000400) as usize];
7311    let Rd = d & 0x1F;
7312    let Rn = (d >> 5) & 0x1F;
7313    let imm4 = (d >> 11) & 0xF;
7314    let imm5 = (d >> 16) & 0x1F;
7315    let op = (d >> 29) & 1;
7316    if (d & 0xffe0fc00) == 0x5e000400 {
7317        return Some(InstructionKind::DUPAsisdoneOnly {
7318            Rd: Rd as _,
7319            Rn: Rn as _,
7320            imm5: imm5 as _,
7321        });
7322    }
7323    None
7324}
7325
7326pub const fn decode_asisdpair(d: u32) -> Option<InstructionKind> {
7327    ["Could not decode."][((d & 0xdf3e0c00) != 0x5e300800) as usize];
7328    let Rd = d & 0x1F;
7329    let Rn = (d >> 5) & 0x1F;
7330    let U = (d >> 29) & 1;
7331    let opcode = (d >> 12) & 0x1F;
7332    let size = (d >> 22) & 3;
7333    if (d & 0xfffffc00) == 0x5e30c800 {
7334        return Some(InstructionKind::FMAXNMPAsisdpairOnlyH {
7335            Rd: Rd as _,
7336            Rn: Rn as _,
7337        });
7338    }
7339    if (d & 0xfffffc00) == 0x5e30d800 {
7340        return Some(InstructionKind::FADDPAsisdpairOnlyH {
7341            Rd: Rd as _,
7342            Rn: Rn as _,
7343        });
7344    }
7345    if (d & 0xfffffc00) == 0x5e30f800 {
7346        return Some(InstructionKind::FMAXPAsisdpairOnlyH {
7347            Rd: Rd as _,
7348            Rn: Rn as _,
7349        });
7350    }
7351    if (d & 0xfffffc00) == 0x5eb0c800 {
7352        return Some(InstructionKind::FMINNMPAsisdpairOnlyH {
7353            Rd: Rd as _,
7354            Rn: Rn as _,
7355        });
7356    }
7357    if (d & 0xfffffc00) == 0x5eb0f800 {
7358        return Some(InstructionKind::FMINPAsisdpairOnlyH {
7359            Rd: Rd as _,
7360            Rn: Rn as _,
7361        });
7362    }
7363    if (d & 0xffbffc00) == 0x7e30c800 {
7364        return Some(InstructionKind::FMAXNMPAsisdpairOnlySd {
7365            Rd: Rd as _,
7366            Rn: Rn as _,
7367            size: size as _,
7368        });
7369    }
7370    if (d & 0xffbffc00) == 0x7e30d800 {
7371        return Some(InstructionKind::FADDPAsisdpairOnlySd {
7372            Rd: Rd as _,
7373            Rn: Rn as _,
7374            size: size as _,
7375        });
7376    }
7377    if (d & 0xffbffc00) == 0x7e30f800 {
7378        return Some(InstructionKind::FMAXPAsisdpairOnlySd {
7379            Rd: Rd as _,
7380            Rn: Rn as _,
7381            size: size as _,
7382        });
7383    }
7384    if (d & 0xffbffc00) == 0x7eb0c800 {
7385        return Some(InstructionKind::FMINNMPAsisdpairOnlySd {
7386            Rd: Rd as _,
7387            Rn: Rn as _,
7388            size: size as _,
7389        });
7390    }
7391    if (d & 0xffbffc00) == 0x7eb0f800 {
7392        return Some(InstructionKind::FMINPAsisdpairOnlySd {
7393            Rd: Rd as _,
7394            Rn: Rn as _,
7395            size: size as _,
7396        });
7397    }
7398    if (d & 0xff3ffc00) == 0x5e31b800 {
7399        return Some(InstructionKind::ADDPAsisdpairOnly {
7400            Rd: Rd as _,
7401            Rn: Rn as _,
7402            size: size as _,
7403        });
7404    }
7405    None
7406}
7407
7408pub const fn decode_asisdshf(d: u32) -> Option<InstructionKind> {
7409    ["Could not decode."][((d & 0xdf800400) != 0x5f000400) as usize];
7410    let Rd = d & 0x1F;
7411    let Rn = (d >> 5) & 0x1F;
7412    let U = (d >> 29) & 1;
7413    let immb = (d >> 16) & 7;
7414    let immh = (d >> 19) & 0xF;
7415    let opcode = (d >> 11) & 0x1F;
7416    if (d & 0xff80fc00) == 0x5f000400 && (d & 0x780000) != 0x000000 {
7417        return Some(InstructionKind::SSHRAsisdshfR {
7418            Rd: Rd as _,
7419            Rn: Rn as _,
7420            immb: immb as _,
7421            immh: immh as _,
7422        });
7423    }
7424    if (d & 0xff80fc00) == 0x5f001400 && (d & 0x780000) != 0x000000 {
7425        return Some(InstructionKind::SSRAAsisdshfR {
7426            Rd: Rd as _,
7427            Rn: Rn as _,
7428            immb: immb as _,
7429            immh: immh as _,
7430        });
7431    }
7432    if (d & 0xff80fc00) == 0x5f002400 && (d & 0x780000) != 0x000000 {
7433        return Some(InstructionKind::SRSHRAsisdshfR {
7434            Rd: Rd as _,
7435            Rn: Rn as _,
7436            immb: immb as _,
7437            immh: immh as _,
7438        });
7439    }
7440    if (d & 0xff80fc00) == 0x5f003400 && (d & 0x780000) != 0x000000 {
7441        return Some(InstructionKind::SRSRAAsisdshfR {
7442            Rd: Rd as _,
7443            Rn: Rn as _,
7444            immb: immb as _,
7445            immh: immh as _,
7446        });
7447    }
7448    if (d & 0xff80fc00) == 0x5f005400 && (d & 0x780000) != 0x000000 {
7449        return Some(InstructionKind::SHLAsisdshfR {
7450            Rd: Rd as _,
7451            Rn: Rn as _,
7452            immb: immb as _,
7453            immh: immh as _,
7454        });
7455    }
7456    if (d & 0xff80fc00) == 0x5f007400 && (d & 0x780000) != 0x000000 {
7457        return Some(InstructionKind::SQSHLAsisdshfR {
7458            Rd: Rd as _,
7459            Rn: Rn as _,
7460            immb: immb as _,
7461            immh: immh as _,
7462        });
7463    }
7464    if (d & 0xff80fc00) == 0x5f009400 && (d & 0x780000) != 0x000000 {
7465        return Some(InstructionKind::SQSHRNAsisdshfN {
7466            Rd: Rd as _,
7467            Rn: Rn as _,
7468            immb: immb as _,
7469            immh: immh as _,
7470        });
7471    }
7472    if (d & 0xff80fc00) == 0x5f009c00 && (d & 0x780000) != 0x000000 {
7473        return Some(InstructionKind::SQRSHRNAsisdshfN {
7474            Rd: Rd as _,
7475            Rn: Rn as _,
7476            immb: immb as _,
7477            immh: immh as _,
7478        });
7479    }
7480    if (d & 0xff80fc00) == 0x5f00e400 && (d & 0x780000) != 0x000000 {
7481        return Some(InstructionKind::SCVTFAsisdshfC {
7482            Rd: Rd as _,
7483            Rn: Rn as _,
7484            immb: immb as _,
7485            immh: immh as _,
7486        });
7487    }
7488    if (d & 0xff80fc00) == 0x5f00fc00 && (d & 0x780000) != 0x000000 {
7489        return Some(InstructionKind::FCVTZSAsisdshfC {
7490            Rd: Rd as _,
7491            Rn: Rn as _,
7492            immb: immb as _,
7493            immh: immh as _,
7494        });
7495    }
7496    if (d & 0xff80fc00) == 0x7f000400 && (d & 0x780000) != 0x000000 {
7497        return Some(InstructionKind::USHRAsisdshfR {
7498            Rd: Rd as _,
7499            Rn: Rn as _,
7500            immb: immb as _,
7501            immh: immh as _,
7502        });
7503    }
7504    if (d & 0xff80fc00) == 0x7f001400 && (d & 0x780000) != 0x000000 {
7505        return Some(InstructionKind::USRAAsisdshfR {
7506            Rd: Rd as _,
7507            Rn: Rn as _,
7508            immb: immb as _,
7509            immh: immh as _,
7510        });
7511    }
7512    if (d & 0xff80fc00) == 0x7f002400 && (d & 0x780000) != 0x000000 {
7513        return Some(InstructionKind::URSHRAsisdshfR {
7514            Rd: Rd as _,
7515            Rn: Rn as _,
7516            immb: immb as _,
7517            immh: immh as _,
7518        });
7519    }
7520    if (d & 0xff80fc00) == 0x7f003400 && (d & 0x780000) != 0x000000 {
7521        return Some(InstructionKind::URSRAAsisdshfR {
7522            Rd: Rd as _,
7523            Rn: Rn as _,
7524            immb: immb as _,
7525            immh: immh as _,
7526        });
7527    }
7528    if (d & 0xff80fc00) == 0x7f004400 && (d & 0x780000) != 0x000000 {
7529        return Some(InstructionKind::SRIAsisdshfR {
7530            Rd: Rd as _,
7531            Rn: Rn as _,
7532            immb: immb as _,
7533            immh: immh as _,
7534        });
7535    }
7536    if (d & 0xff80fc00) == 0x7f005400 && (d & 0x780000) != 0x000000 {
7537        return Some(InstructionKind::SLIAsisdshfR {
7538            Rd: Rd as _,
7539            Rn: Rn as _,
7540            immb: immb as _,
7541            immh: immh as _,
7542        });
7543    }
7544    if (d & 0xff80fc00) == 0x7f006400 && (d & 0x780000) != 0x000000 {
7545        return Some(InstructionKind::SQSHLUAsisdshfR {
7546            Rd: Rd as _,
7547            Rn: Rn as _,
7548            immb: immb as _,
7549            immh: immh as _,
7550        });
7551    }
7552    if (d & 0xff80fc00) == 0x7f007400 && (d & 0x780000) != 0x000000 {
7553        return Some(InstructionKind::UQSHLAsisdshfR {
7554            Rd: Rd as _,
7555            Rn: Rn as _,
7556            immb: immb as _,
7557            immh: immh as _,
7558        });
7559    }
7560    if (d & 0xff80fc00) == 0x7f008400 && (d & 0x780000) != 0x000000 {
7561        return Some(InstructionKind::SQSHRUNAsisdshfN {
7562            Rd: Rd as _,
7563            Rn: Rn as _,
7564            immb: immb as _,
7565            immh: immh as _,
7566        });
7567    }
7568    if (d & 0xff80fc00) == 0x7f008c00 && (d & 0x780000) != 0x000000 {
7569        return Some(InstructionKind::SQRSHRUNAsisdshfN {
7570            Rd: Rd as _,
7571            Rn: Rn as _,
7572            immb: immb as _,
7573            immh: immh as _,
7574        });
7575    }
7576    if (d & 0xff80fc00) == 0x7f009400 && (d & 0x780000) != 0x000000 {
7577        return Some(InstructionKind::UQSHRNAsisdshfN {
7578            Rd: Rd as _,
7579            Rn: Rn as _,
7580            immb: immb as _,
7581            immh: immh as _,
7582        });
7583    }
7584    if (d & 0xff80fc00) == 0x7f009c00 && (d & 0x780000) != 0x000000 {
7585        return Some(InstructionKind::UQRSHRNAsisdshfN {
7586            Rd: Rd as _,
7587            Rn: Rn as _,
7588            immb: immb as _,
7589            immh: immh as _,
7590        });
7591    }
7592    if (d & 0xff80fc00) == 0x7f00e400 && (d & 0x780000) != 0x000000 {
7593        return Some(InstructionKind::UCVTFAsisdshfC {
7594            Rd: Rd as _,
7595            Rn: Rn as _,
7596            immb: immb as _,
7597            immh: immh as _,
7598        });
7599    }
7600    if (d & 0xff80fc00) == 0x7f00fc00 && (d & 0x780000) != 0x000000 {
7601        return Some(InstructionKind::FCVTZUAsisdshfC {
7602            Rd: Rd as _,
7603            Rn: Rn as _,
7604            immb: immb as _,
7605            immh: immh as _,
7606        });
7607    }
7608    None
7609}
7610
7611pub const fn decode_asisddiff(d: u32) -> Option<InstructionKind> {
7612    ["Could not decode."][((d & 0xdf200c00) != 0x5e200000) as usize];
7613    let Rd = d & 0x1F;
7614    let Rm = (d >> 16) & 0x1F;
7615    let Rn = (d >> 5) & 0x1F;
7616    let U = (d >> 29) & 1;
7617    let opcode = (d >> 12) & 0xF;
7618    let size = (d >> 22) & 3;
7619    if (d & 0xff20fc00) == 0x5e209000 {
7620        return Some(InstructionKind::SQDMLALAsisddiffOnly {
7621            Rd: Rd as _,
7622            Rm: Rm as _,
7623            Rn: Rn as _,
7624            size: size as _,
7625        });
7626    }
7627    if (d & 0xff20fc00) == 0x5e20b000 {
7628        return Some(InstructionKind::SQDMLSLAsisddiffOnly {
7629            Rd: Rd as _,
7630            Rm: Rm as _,
7631            Rn: Rn as _,
7632            size: size as _,
7633        });
7634    }
7635    if (d & 0xff20fc00) == 0x5e20d000 {
7636        return Some(InstructionKind::SQDMULLAsisddiffOnly {
7637            Rd: Rd as _,
7638            Rm: Rm as _,
7639            Rn: Rn as _,
7640            size: size as _,
7641        });
7642    }
7643    None
7644}
7645
7646pub const fn decode_asisdsame(d: u32) -> Option<InstructionKind> {
7647    ["Could not decode."][((d & 0xdf200400) != 0x5e200400) as usize];
7648    let Rd = d & 0x1F;
7649    let Rm = (d >> 16) & 0x1F;
7650    let Rn = (d >> 5) & 0x1F;
7651    let U = (d >> 29) & 1;
7652    let opcode = (d >> 11) & 0x1F;
7653    let size = (d >> 22) & 3;
7654    if (d & 0xffa0fc00) == 0x5e20dc00 {
7655        return Some(InstructionKind::FMULXAsisdsameOnly {
7656            Rd: Rd as _,
7657            Rm: Rm as _,
7658            Rn: Rn as _,
7659            size: size as _,
7660        });
7661    }
7662    if (d & 0xffa0fc00) == 0x5e20e400 {
7663        return Some(InstructionKind::FCMEQAsisdsameOnly {
7664            Rd: Rd as _,
7665            Rm: Rm as _,
7666            Rn: Rn as _,
7667            size: size as _,
7668        });
7669    }
7670    if (d & 0xffa0fc00) == 0x5e20fc00 {
7671        return Some(InstructionKind::FRECPSAsisdsameOnly {
7672            Rd: Rd as _,
7673            Rm: Rm as _,
7674            Rn: Rn as _,
7675            size: size as _,
7676        });
7677    }
7678    if (d & 0xffa0fc00) == 0x5ea0fc00 {
7679        return Some(InstructionKind::FRSQRTSAsisdsameOnly {
7680            Rd: Rd as _,
7681            Rm: Rm as _,
7682            Rn: Rn as _,
7683            size: size as _,
7684        });
7685    }
7686    if (d & 0xffa0fc00) == 0x7e20e400 {
7687        return Some(InstructionKind::FCMGEAsisdsameOnly {
7688            Rd: Rd as _,
7689            Rm: Rm as _,
7690            Rn: Rn as _,
7691            size: size as _,
7692        });
7693    }
7694    if (d & 0xffa0fc00) == 0x7e20ec00 {
7695        return Some(InstructionKind::FACGEAsisdsameOnly {
7696            Rd: Rd as _,
7697            Rm: Rm as _,
7698            Rn: Rn as _,
7699            size: size as _,
7700        });
7701    }
7702    if (d & 0xffa0fc00) == 0x7ea0d400 {
7703        return Some(InstructionKind::FABDAsisdsameOnly {
7704            Rd: Rd as _,
7705            Rm: Rm as _,
7706            Rn: Rn as _,
7707            size: size as _,
7708        });
7709    }
7710    if (d & 0xffa0fc00) == 0x7ea0e400 {
7711        return Some(InstructionKind::FCMGTAsisdsameOnly {
7712            Rd: Rd as _,
7713            Rm: Rm as _,
7714            Rn: Rn as _,
7715            size: size as _,
7716        });
7717    }
7718    if (d & 0xffa0fc00) == 0x7ea0ec00 {
7719        return Some(InstructionKind::FACGTAsisdsameOnly {
7720            Rd: Rd as _,
7721            Rm: Rm as _,
7722            Rn: Rn as _,
7723            size: size as _,
7724        });
7725    }
7726    if (d & 0xff20fc00) == 0x5e200c00 {
7727        return Some(InstructionKind::SQADDAsisdsameOnly {
7728            Rd: Rd as _,
7729            Rm: Rm as _,
7730            Rn: Rn as _,
7731            size: size as _,
7732        });
7733    }
7734    if (d & 0xff20fc00) == 0x5e202c00 {
7735        return Some(InstructionKind::SQSUBAsisdsameOnly {
7736            Rd: Rd as _,
7737            Rm: Rm as _,
7738            Rn: Rn as _,
7739            size: size as _,
7740        });
7741    }
7742    if (d & 0xff20fc00) == 0x5e203400 {
7743        return Some(InstructionKind::CMGTAsisdsameOnly {
7744            Rd: Rd as _,
7745            Rm: Rm as _,
7746            Rn: Rn as _,
7747            size: size as _,
7748        });
7749    }
7750    if (d & 0xff20fc00) == 0x5e203c00 {
7751        return Some(InstructionKind::CMGEAsisdsameOnly {
7752            Rd: Rd as _,
7753            Rm: Rm as _,
7754            Rn: Rn as _,
7755            size: size as _,
7756        });
7757    }
7758    if (d & 0xff20fc00) == 0x5e204400 {
7759        return Some(InstructionKind::SSHLAsisdsameOnly {
7760            Rd: Rd as _,
7761            Rm: Rm as _,
7762            Rn: Rn as _,
7763            size: size as _,
7764        });
7765    }
7766    if (d & 0xff20fc00) == 0x5e204c00 {
7767        return Some(InstructionKind::SQSHLAsisdsameOnly {
7768            Rd: Rd as _,
7769            Rm: Rm as _,
7770            Rn: Rn as _,
7771            size: size as _,
7772        });
7773    }
7774    if (d & 0xff20fc00) == 0x5e205400 {
7775        return Some(InstructionKind::SRSHLAsisdsameOnly {
7776            Rd: Rd as _,
7777            Rm: Rm as _,
7778            Rn: Rn as _,
7779            size: size as _,
7780        });
7781    }
7782    if (d & 0xff20fc00) == 0x5e205c00 {
7783        return Some(InstructionKind::SQRSHLAsisdsameOnly {
7784            Rd: Rd as _,
7785            Rm: Rm as _,
7786            Rn: Rn as _,
7787            size: size as _,
7788        });
7789    }
7790    if (d & 0xff20fc00) == 0x5e208400 {
7791        return Some(InstructionKind::ADDAsisdsameOnly {
7792            Rd: Rd as _,
7793            Rm: Rm as _,
7794            Rn: Rn as _,
7795            size: size as _,
7796        });
7797    }
7798    if (d & 0xff20fc00) == 0x5e208c00 {
7799        return Some(InstructionKind::CMTSTAsisdsameOnly {
7800            Rd: Rd as _,
7801            Rm: Rm as _,
7802            Rn: Rn as _,
7803            size: size as _,
7804        });
7805    }
7806    if (d & 0xff20fc00) == 0x5e20b400 {
7807        return Some(InstructionKind::SQDMULHAsisdsameOnly {
7808            Rd: Rd as _,
7809            Rm: Rm as _,
7810            Rn: Rn as _,
7811            size: size as _,
7812        });
7813    }
7814    if (d & 0xff20fc00) == 0x7e200c00 {
7815        return Some(InstructionKind::UQADDAsisdsameOnly {
7816            Rd: Rd as _,
7817            Rm: Rm as _,
7818            Rn: Rn as _,
7819            size: size as _,
7820        });
7821    }
7822    if (d & 0xff20fc00) == 0x7e202c00 {
7823        return Some(InstructionKind::UQSUBAsisdsameOnly {
7824            Rd: Rd as _,
7825            Rm: Rm as _,
7826            Rn: Rn as _,
7827            size: size as _,
7828        });
7829    }
7830    if (d & 0xff20fc00) == 0x7e203400 {
7831        return Some(InstructionKind::CMHIAsisdsameOnly {
7832            Rd: Rd as _,
7833            Rm: Rm as _,
7834            Rn: Rn as _,
7835            size: size as _,
7836        });
7837    }
7838    if (d & 0xff20fc00) == 0x7e203c00 {
7839        return Some(InstructionKind::CMHSAsisdsameOnly {
7840            Rd: Rd as _,
7841            Rm: Rm as _,
7842            Rn: Rn as _,
7843            size: size as _,
7844        });
7845    }
7846    if (d & 0xff20fc00) == 0x7e204400 {
7847        return Some(InstructionKind::USHLAsisdsameOnly {
7848            Rd: Rd as _,
7849            Rm: Rm as _,
7850            Rn: Rn as _,
7851            size: size as _,
7852        });
7853    }
7854    if (d & 0xff20fc00) == 0x7e204c00 {
7855        return Some(InstructionKind::UQSHLAsisdsameOnly {
7856            Rd: Rd as _,
7857            Rm: Rm as _,
7858            Rn: Rn as _,
7859            size: size as _,
7860        });
7861    }
7862    if (d & 0xff20fc00) == 0x7e205400 {
7863        return Some(InstructionKind::URSHLAsisdsameOnly {
7864            Rd: Rd as _,
7865            Rm: Rm as _,
7866            Rn: Rn as _,
7867            size: size as _,
7868        });
7869    }
7870    if (d & 0xff20fc00) == 0x7e205c00 {
7871        return Some(InstructionKind::UQRSHLAsisdsameOnly {
7872            Rd: Rd as _,
7873            Rm: Rm as _,
7874            Rn: Rn as _,
7875            size: size as _,
7876        });
7877    }
7878    if (d & 0xff20fc00) == 0x7e208400 {
7879        return Some(InstructionKind::SUBAsisdsameOnly {
7880            Rd: Rd as _,
7881            Rm: Rm as _,
7882            Rn: Rn as _,
7883            size: size as _,
7884        });
7885    }
7886    if (d & 0xff20fc00) == 0x7e208c00 {
7887        return Some(InstructionKind::CMEQAsisdsameOnly {
7888            Rd: Rd as _,
7889            Rm: Rm as _,
7890            Rn: Rn as _,
7891            size: size as _,
7892        });
7893    }
7894    if (d & 0xff20fc00) == 0x7e20b400 {
7895        return Some(InstructionKind::SQRDMULHAsisdsameOnly {
7896            Rd: Rd as _,
7897            Rm: Rm as _,
7898            Rn: Rn as _,
7899            size: size as _,
7900        });
7901    }
7902    None
7903}
7904
7905pub const fn decode_asisdsamefp16(d: u32) -> Option<InstructionKind> {
7906    ["Could not decode."][((d & 0xdf60c400) != 0x5e400400) as usize];
7907    let Rd = d & 0x1F;
7908    let Rm = (d >> 16) & 0x1F;
7909    let Rn = (d >> 5) & 0x1F;
7910    let U = (d >> 29) & 1;
7911    let a = (d >> 23) & 1;
7912    let opcode = (d >> 11) & 7;
7913    if (d & 0xffe0fc00) == 0x5e401c00 {
7914        return Some(InstructionKind::FMULXAsisdsamefp16Only {
7915            Rd: Rd as _,
7916            Rm: Rm as _,
7917            Rn: Rn as _,
7918        });
7919    }
7920    if (d & 0xffe0fc00) == 0x5e402400 {
7921        return Some(InstructionKind::FCMEQAsisdsamefp16Only {
7922            Rd: Rd as _,
7923            Rm: Rm as _,
7924            Rn: Rn as _,
7925        });
7926    }
7927    if (d & 0xffe0fc00) == 0x5e403c00 {
7928        return Some(InstructionKind::FRECPSAsisdsamefp16Only {
7929            Rd: Rd as _,
7930            Rm: Rm as _,
7931            Rn: Rn as _,
7932        });
7933    }
7934    if (d & 0xffe0fc00) == 0x5ec03c00 {
7935        return Some(InstructionKind::FRSQRTSAsisdsamefp16Only {
7936            Rd: Rd as _,
7937            Rm: Rm as _,
7938            Rn: Rn as _,
7939        });
7940    }
7941    if (d & 0xffe0fc00) == 0x7e402400 {
7942        return Some(InstructionKind::FCMGEAsisdsamefp16Only {
7943            Rd: Rd as _,
7944            Rm: Rm as _,
7945            Rn: Rn as _,
7946        });
7947    }
7948    if (d & 0xffe0fc00) == 0x7e402c00 {
7949        return Some(InstructionKind::FACGEAsisdsamefp16Only {
7950            Rd: Rd as _,
7951            Rm: Rm as _,
7952            Rn: Rn as _,
7953        });
7954    }
7955    if (d & 0xffe0fc00) == 0x7ec01400 {
7956        return Some(InstructionKind::FABDAsisdsamefp16Only {
7957            Rd: Rd as _,
7958            Rm: Rm as _,
7959            Rn: Rn as _,
7960        });
7961    }
7962    if (d & 0xffe0fc00) == 0x7ec02400 {
7963        return Some(InstructionKind::FCMGTAsisdsamefp16Only {
7964            Rd: Rd as _,
7965            Rm: Rm as _,
7966            Rn: Rn as _,
7967        });
7968    }
7969    if (d & 0xffe0fc00) == 0x7ec02c00 {
7970        return Some(InstructionKind::FACGTAsisdsamefp16Only {
7971            Rd: Rd as _,
7972            Rm: Rm as _,
7973            Rn: Rn as _,
7974        });
7975    }
7976    None
7977}
7978
7979pub const fn decode_asisdsame2(d: u32) -> Option<InstructionKind> {
7980    ["Could not decode."][((d & 0xdf208400) != 0x5e008400) as usize];
7981    let Rd = d & 0x1F;
7982    let Rm = (d >> 16) & 0x1F;
7983    let Rn = (d >> 5) & 0x1F;
7984    let U = (d >> 29) & 1;
7985    let opcode = (d >> 11) & 0xF;
7986    let size = (d >> 22) & 3;
7987    if (d & 0xff20fc00) == 0x7e008400 {
7988        return Some(InstructionKind::SQRDMLAHAsisdsame2Only {
7989            Rd: Rd as _,
7990            Rm: Rm as _,
7991            Rn: Rn as _,
7992            size: size as _,
7993        });
7994    }
7995    if (d & 0xff20fc00) == 0x7e008c00 {
7996        return Some(InstructionKind::SQRDMLSHAsisdsame2Only {
7997            Rd: Rd as _,
7998            Rm: Rm as _,
7999            Rn: Rn as _,
8000            size: size as _,
8001        });
8002    }
8003    None
8004}
8005
8006pub const fn decode_asisdmisc(d: u32) -> Option<InstructionKind> {
8007    ["Could not decode."][((d & 0xdf3e0c00) != 0x5e200800) as usize];
8008    let Rd = d & 0x1F;
8009    let Rn = (d >> 5) & 0x1F;
8010    let U = (d >> 29) & 1;
8011    let opcode = (d >> 12) & 0x1F;
8012    let size = (d >> 22) & 3;
8013    if (d & 0xffbffc00) == 0x5e21a800 {
8014        return Some(InstructionKind::FCVTNSAsisdmiscR {
8015            Rd: Rd as _,
8016            Rn: Rn as _,
8017            size: size as _,
8018        });
8019    }
8020    if (d & 0xffbffc00) == 0x5e21b800 {
8021        return Some(InstructionKind::FCVTMSAsisdmiscR {
8022            Rd: Rd as _,
8023            Rn: Rn as _,
8024            size: size as _,
8025        });
8026    }
8027    if (d & 0xffbffc00) == 0x5e21c800 {
8028        return Some(InstructionKind::FCVTASAsisdmiscR {
8029            Rd: Rd as _,
8030            Rn: Rn as _,
8031            size: size as _,
8032        });
8033    }
8034    if (d & 0xffbffc00) == 0x5e21d800 {
8035        return Some(InstructionKind::SCVTFAsisdmiscR {
8036            Rd: Rd as _,
8037            Rn: Rn as _,
8038            size: size as _,
8039        });
8040    }
8041    if (d & 0xffbffc00) == 0x5ea0c800 {
8042        return Some(InstructionKind::FCMGTAsisdmiscFz {
8043            Rd: Rd as _,
8044            Rn: Rn as _,
8045            size: size as _,
8046        });
8047    }
8048    if (d & 0xffbffc00) == 0x5ea0d800 {
8049        return Some(InstructionKind::FCMEQAsisdmiscFz {
8050            Rd: Rd as _,
8051            Rn: Rn as _,
8052            size: size as _,
8053        });
8054    }
8055    if (d & 0xffbffc00) == 0x5ea0e800 {
8056        return Some(InstructionKind::FCMLTAsisdmiscFz {
8057            Rd: Rd as _,
8058            Rn: Rn as _,
8059            size: size as _,
8060        });
8061    }
8062    if (d & 0xffbffc00) == 0x5ea1a800 {
8063        return Some(InstructionKind::FCVTPSAsisdmiscR {
8064            Rd: Rd as _,
8065            Rn: Rn as _,
8066            size: size as _,
8067        });
8068    }
8069    if (d & 0xffbffc00) == 0x5ea1b800 {
8070        return Some(InstructionKind::FCVTZSAsisdmiscR {
8071            Rd: Rd as _,
8072            Rn: Rn as _,
8073            size: size as _,
8074        });
8075    }
8076    if (d & 0xffbffc00) == 0x5ea1d800 {
8077        return Some(InstructionKind::FRECPEAsisdmiscR {
8078            Rd: Rd as _,
8079            Rn: Rn as _,
8080            size: size as _,
8081        });
8082    }
8083    if (d & 0xffbffc00) == 0x5ea1f800 {
8084        return Some(InstructionKind::FRECPXAsisdmiscR {
8085            Rd: Rd as _,
8086            Rn: Rn as _,
8087            size: size as _,
8088        });
8089    }
8090    if (d & 0xffbffc00) == 0x7e216800 {
8091        return Some(InstructionKind::FCVTXNAsisdmiscN {
8092            Rd: Rd as _,
8093            Rn: Rn as _,
8094            size: size as _,
8095        });
8096    }
8097    if (d & 0xffbffc00) == 0x7e21a800 {
8098        return Some(InstructionKind::FCVTNUAsisdmiscR {
8099            Rd: Rd as _,
8100            Rn: Rn as _,
8101            size: size as _,
8102        });
8103    }
8104    if (d & 0xffbffc00) == 0x7e21b800 {
8105        return Some(InstructionKind::FCVTMUAsisdmiscR {
8106            Rd: Rd as _,
8107            Rn: Rn as _,
8108            size: size as _,
8109        });
8110    }
8111    if (d & 0xffbffc00) == 0x7e21c800 {
8112        return Some(InstructionKind::FCVTAUAsisdmiscR {
8113            Rd: Rd as _,
8114            Rn: Rn as _,
8115            size: size as _,
8116        });
8117    }
8118    if (d & 0xffbffc00) == 0x7e21d800 {
8119        return Some(InstructionKind::UCVTFAsisdmiscR {
8120            Rd: Rd as _,
8121            Rn: Rn as _,
8122            size: size as _,
8123        });
8124    }
8125    if (d & 0xffbffc00) == 0x7ea0c800 {
8126        return Some(InstructionKind::FCMGEAsisdmiscFz {
8127            Rd: Rd as _,
8128            Rn: Rn as _,
8129            size: size as _,
8130        });
8131    }
8132    if (d & 0xffbffc00) == 0x7ea0d800 {
8133        return Some(InstructionKind::FCMLEAsisdmiscFz {
8134            Rd: Rd as _,
8135            Rn: Rn as _,
8136            size: size as _,
8137        });
8138    }
8139    if (d & 0xffbffc00) == 0x7ea1a800 {
8140        return Some(InstructionKind::FCVTPUAsisdmiscR {
8141            Rd: Rd as _,
8142            Rn: Rn as _,
8143            size: size as _,
8144        });
8145    }
8146    if (d & 0xffbffc00) == 0x7ea1b800 {
8147        return Some(InstructionKind::FCVTZUAsisdmiscR {
8148            Rd: Rd as _,
8149            Rn: Rn as _,
8150            size: size as _,
8151        });
8152    }
8153    if (d & 0xffbffc00) == 0x7ea1d800 {
8154        return Some(InstructionKind::FRSQRTEAsisdmiscR {
8155            Rd: Rd as _,
8156            Rn: Rn as _,
8157            size: size as _,
8158        });
8159    }
8160    if (d & 0xff3ffc00) == 0x5e203800 {
8161        return Some(InstructionKind::SUQADDAsisdmiscR {
8162            Rd: Rd as _,
8163            Rn: Rn as _,
8164            size: size as _,
8165        });
8166    }
8167    if (d & 0xff3ffc00) == 0x5e207800 {
8168        return Some(InstructionKind::SQABSAsisdmiscR {
8169            Rd: Rd as _,
8170            Rn: Rn as _,
8171            size: size as _,
8172        });
8173    }
8174    if (d & 0xff3ffc00) == 0x5e208800 {
8175        return Some(InstructionKind::CMGTAsisdmiscZ {
8176            Rd: Rd as _,
8177            Rn: Rn as _,
8178            size: size as _,
8179        });
8180    }
8181    if (d & 0xff3ffc00) == 0x5e209800 {
8182        return Some(InstructionKind::CMEQAsisdmiscZ {
8183            Rd: Rd as _,
8184            Rn: Rn as _,
8185            size: size as _,
8186        });
8187    }
8188    if (d & 0xff3ffc00) == 0x5e20a800 {
8189        return Some(InstructionKind::CMLTAsisdmiscZ {
8190            Rd: Rd as _,
8191            Rn: Rn as _,
8192            size: size as _,
8193        });
8194    }
8195    if (d & 0xff3ffc00) == 0x5e20b800 {
8196        return Some(InstructionKind::ABSAsisdmiscR {
8197            Rd: Rd as _,
8198            Rn: Rn as _,
8199            size: size as _,
8200        });
8201    }
8202    if (d & 0xff3ffc00) == 0x5e214800 {
8203        return Some(InstructionKind::SQXTNAsisdmiscN {
8204            Rd: Rd as _,
8205            Rn: Rn as _,
8206            size: size as _,
8207        });
8208    }
8209    if (d & 0xff3ffc00) == 0x7e203800 {
8210        return Some(InstructionKind::USQADDAsisdmiscR {
8211            Rd: Rd as _,
8212            Rn: Rn as _,
8213            size: size as _,
8214        });
8215    }
8216    if (d & 0xff3ffc00) == 0x7e207800 {
8217        return Some(InstructionKind::SQNEGAsisdmiscR {
8218            Rd: Rd as _,
8219            Rn: Rn as _,
8220            size: size as _,
8221        });
8222    }
8223    if (d & 0xff3ffc00) == 0x7e208800 {
8224        return Some(InstructionKind::CMGEAsisdmiscZ {
8225            Rd: Rd as _,
8226            Rn: Rn as _,
8227            size: size as _,
8228        });
8229    }
8230    if (d & 0xff3ffc00) == 0x7e209800 {
8231        return Some(InstructionKind::CMLEAsisdmiscZ {
8232            Rd: Rd as _,
8233            Rn: Rn as _,
8234            size: size as _,
8235        });
8236    }
8237    if (d & 0xff3ffc00) == 0x7e20b800 {
8238        return Some(InstructionKind::NEGAsisdmiscR {
8239            Rd: Rd as _,
8240            Rn: Rn as _,
8241            size: size as _,
8242        });
8243    }
8244    if (d & 0xff3ffc00) == 0x7e212800 {
8245        return Some(InstructionKind::SQXTUNAsisdmiscN {
8246            Rd: Rd as _,
8247            Rn: Rn as _,
8248            size: size as _,
8249        });
8250    }
8251    if (d & 0xff3ffc00) == 0x7e214800 {
8252        return Some(InstructionKind::UQXTNAsisdmiscN {
8253            Rd: Rd as _,
8254            Rn: Rn as _,
8255            size: size as _,
8256        });
8257    }
8258    None
8259}
8260
8261pub const fn decode_asisdmiscfp16(d: u32) -> Option<InstructionKind> {
8262    ["Could not decode."][((d & 0xdf7e0c00) != 0x5e780800) as usize];
8263    let Rd = d & 0x1F;
8264    let Rn = (d >> 5) & 0x1F;
8265    let U = (d >> 29) & 1;
8266    let a = (d >> 23) & 1;
8267    let opcode = (d >> 12) & 0x1F;
8268    if (d & 0xfffffc00) == 0x5e79a800 {
8269        return Some(InstructionKind::FCVTNSAsisdmiscfp16R {
8270            Rd: Rd as _,
8271            Rn: Rn as _,
8272        });
8273    }
8274    if (d & 0xfffffc00) == 0x5e79b800 {
8275        return Some(InstructionKind::FCVTMSAsisdmiscfp16R {
8276            Rd: Rd as _,
8277            Rn: Rn as _,
8278        });
8279    }
8280    if (d & 0xfffffc00) == 0x5e79c800 {
8281        return Some(InstructionKind::FCVTASAsisdmiscfp16R {
8282            Rd: Rd as _,
8283            Rn: Rn as _,
8284        });
8285    }
8286    if (d & 0xfffffc00) == 0x5e79d800 {
8287        return Some(InstructionKind::SCVTFAsisdmiscfp16R {
8288            Rd: Rd as _,
8289            Rn: Rn as _,
8290        });
8291    }
8292    if (d & 0xfffffc00) == 0x5ef8c800 {
8293        return Some(InstructionKind::FCMGTAsisdmiscfp16Fz {
8294            Rd: Rd as _,
8295            Rn: Rn as _,
8296        });
8297    }
8298    if (d & 0xfffffc00) == 0x5ef8d800 {
8299        return Some(InstructionKind::FCMEQAsisdmiscfp16Fz {
8300            Rd: Rd as _,
8301            Rn: Rn as _,
8302        });
8303    }
8304    if (d & 0xfffffc00) == 0x5ef8e800 {
8305        return Some(InstructionKind::FCMLTAsisdmiscfp16Fz {
8306            Rd: Rd as _,
8307            Rn: Rn as _,
8308        });
8309    }
8310    if (d & 0xfffffc00) == 0x5ef9a800 {
8311        return Some(InstructionKind::FCVTPSAsisdmiscfp16R {
8312            Rd: Rd as _,
8313            Rn: Rn as _,
8314        });
8315    }
8316    if (d & 0xfffffc00) == 0x5ef9b800 {
8317        return Some(InstructionKind::FCVTZSAsisdmiscfp16R {
8318            Rd: Rd as _,
8319            Rn: Rn as _,
8320        });
8321    }
8322    if (d & 0xfffffc00) == 0x5ef9d800 {
8323        return Some(InstructionKind::FRECPEAsisdmiscfp16R {
8324            Rd: Rd as _,
8325            Rn: Rn as _,
8326        });
8327    }
8328    if (d & 0xfffffc00) == 0x5ef9f800 {
8329        return Some(InstructionKind::FRECPXAsisdmiscfp16R {
8330            Rd: Rd as _,
8331            Rn: Rn as _,
8332        });
8333    }
8334    if (d & 0xfffffc00) == 0x7e79a800 {
8335        return Some(InstructionKind::FCVTNUAsisdmiscfp16R {
8336            Rd: Rd as _,
8337            Rn: Rn as _,
8338        });
8339    }
8340    if (d & 0xfffffc00) == 0x7e79b800 {
8341        return Some(InstructionKind::FCVTMUAsisdmiscfp16R {
8342            Rd: Rd as _,
8343            Rn: Rn as _,
8344        });
8345    }
8346    if (d & 0xfffffc00) == 0x7e79c800 {
8347        return Some(InstructionKind::FCVTAUAsisdmiscfp16R {
8348            Rd: Rd as _,
8349            Rn: Rn as _,
8350        });
8351    }
8352    if (d & 0xfffffc00) == 0x7e79d800 {
8353        return Some(InstructionKind::UCVTFAsisdmiscfp16R {
8354            Rd: Rd as _,
8355            Rn: Rn as _,
8356        });
8357    }
8358    if (d & 0xfffffc00) == 0x7ef8c800 {
8359        return Some(InstructionKind::FCMGEAsisdmiscfp16Fz {
8360            Rd: Rd as _,
8361            Rn: Rn as _,
8362        });
8363    }
8364    if (d & 0xfffffc00) == 0x7ef8d800 {
8365        return Some(InstructionKind::FCMLEAsisdmiscfp16Fz {
8366            Rd: Rd as _,
8367            Rn: Rn as _,
8368        });
8369    }
8370    if (d & 0xfffffc00) == 0x7ef9a800 {
8371        return Some(InstructionKind::FCVTPUAsisdmiscfp16R {
8372            Rd: Rd as _,
8373            Rn: Rn as _,
8374        });
8375    }
8376    if (d & 0xfffffc00) == 0x7ef9b800 {
8377        return Some(InstructionKind::FCVTZUAsisdmiscfp16R {
8378            Rd: Rd as _,
8379            Rn: Rn as _,
8380        });
8381    }
8382    if (d & 0xfffffc00) == 0x7ef9d800 {
8383        return Some(InstructionKind::FRSQRTEAsisdmiscfp16R {
8384            Rd: Rd as _,
8385            Rn: Rn as _,
8386        });
8387    }
8388    None
8389}
8390
8391pub const fn decode_asisdelem(d: u32) -> Option<InstructionKind> {
8392    ["Could not decode."][((d & 0xdf000400) != 0x5f000000) as usize];
8393    let H = (d >> 11) & 1;
8394    let L = (d >> 21) & 1;
8395    let M = (d >> 20) & 1;
8396    let Rd = d & 0x1F;
8397    let Rm = (d >> 16) & 0xF;
8398    let Rn = (d >> 5) & 0x1F;
8399    let U = (d >> 29) & 1;
8400    let opcode = (d >> 12) & 0xF;
8401    let size = (d >> 22) & 3;
8402    if (d & 0xffc0f400) == 0x5f001000 {
8403        return Some(InstructionKind::FMLAAsisdelemRhH {
8404            H: H as _,
8405            L: L as _,
8406            M: M as _,
8407            Rd: Rd as _,
8408            Rm: Rm as _,
8409            Rn: Rn as _,
8410        });
8411    }
8412    if (d & 0xffc0f400) == 0x5f005000 {
8413        return Some(InstructionKind::FMLSAsisdelemRhH {
8414            H: H as _,
8415            L: L as _,
8416            M: M as _,
8417            Rd: Rd as _,
8418            Rm: Rm as _,
8419            Rn: Rn as _,
8420        });
8421    }
8422    if (d & 0xffc0f400) == 0x5f009000 {
8423        return Some(InstructionKind::FMULAsisdelemRhH {
8424            H: H as _,
8425            L: L as _,
8426            M: M as _,
8427            Rd: Rd as _,
8428            Rm: Rm as _,
8429            Rn: Rn as _,
8430        });
8431    }
8432    if (d & 0xffc0f400) == 0x7f009000 {
8433        return Some(InstructionKind::FMULXAsisdelemRhH {
8434            H: H as _,
8435            L: L as _,
8436            M: M as _,
8437            Rd: Rd as _,
8438            Rm: Rm as _,
8439            Rn: Rn as _,
8440        });
8441    }
8442    if (d & 0xff80f400) == 0x5f801000 {
8443        return Some(InstructionKind::FMLAAsisdelemRSd {
8444            H: H as _,
8445            L: L as _,
8446            M: M as _,
8447            Rd: Rd as _,
8448            Rm: Rm as _,
8449            Rn: Rn as _,
8450            size: size as _,
8451        });
8452    }
8453    if (d & 0xff80f400) == 0x5f805000 {
8454        return Some(InstructionKind::FMLSAsisdelemRSd {
8455            H: H as _,
8456            L: L as _,
8457            M: M as _,
8458            Rd: Rd as _,
8459            Rm: Rm as _,
8460            Rn: Rn as _,
8461            size: size as _,
8462        });
8463    }
8464    if (d & 0xff80f400) == 0x5f809000 {
8465        return Some(InstructionKind::FMULAsisdelemRSd {
8466            H: H as _,
8467            L: L as _,
8468            M: M as _,
8469            Rd: Rd as _,
8470            Rm: Rm as _,
8471            Rn: Rn as _,
8472            size: size as _,
8473        });
8474    }
8475    if (d & 0xff80f400) == 0x7f809000 {
8476        return Some(InstructionKind::FMULXAsisdelemRSd {
8477            H: H as _,
8478            L: L as _,
8479            M: M as _,
8480            Rd: Rd as _,
8481            Rm: Rm as _,
8482            Rn: Rn as _,
8483            size: size as _,
8484        });
8485    }
8486    if (d & 0xff00f400) == 0x5f003000 {
8487        return Some(InstructionKind::SQDMLALAsisdelemL {
8488            H: H as _,
8489            L: L as _,
8490            M: M as _,
8491            Rd: Rd as _,
8492            Rm: Rm as _,
8493            Rn: Rn as _,
8494            size: size as _,
8495        });
8496    }
8497    if (d & 0xff00f400) == 0x5f007000 {
8498        return Some(InstructionKind::SQDMLSLAsisdelemL {
8499            H: H as _,
8500            L: L as _,
8501            M: M as _,
8502            Rd: Rd as _,
8503            Rm: Rm as _,
8504            Rn: Rn as _,
8505            size: size as _,
8506        });
8507    }
8508    if (d & 0xff00f400) == 0x5f00b000 {
8509        return Some(InstructionKind::SQDMULLAsisdelemL {
8510            H: H as _,
8511            L: L as _,
8512            M: M as _,
8513            Rd: Rd as _,
8514            Rm: Rm as _,
8515            Rn: Rn as _,
8516            size: size as _,
8517        });
8518    }
8519    if (d & 0xff00f400) == 0x5f00c000 {
8520        return Some(InstructionKind::SQDMULHAsisdelemR {
8521            H: H as _,
8522            L: L as _,
8523            M: M as _,
8524            Rd: Rd as _,
8525            Rm: Rm as _,
8526            Rn: Rn as _,
8527            size: size as _,
8528        });
8529    }
8530    if (d & 0xff00f400) == 0x5f00d000 {
8531        return Some(InstructionKind::SQRDMULHAsisdelemR {
8532            H: H as _,
8533            L: L as _,
8534            M: M as _,
8535            Rd: Rd as _,
8536            Rm: Rm as _,
8537            Rn: Rn as _,
8538            size: size as _,
8539        });
8540    }
8541    if (d & 0xff00f400) == 0x7f00d000 {
8542        return Some(InstructionKind::SQRDMLAHAsisdelemR {
8543            H: H as _,
8544            L: L as _,
8545            M: M as _,
8546            Rd: Rd as _,
8547            Rm: Rm as _,
8548            Rn: Rn as _,
8549            size: size as _,
8550        });
8551    }
8552    if (d & 0xff00f400) == 0x7f00f000 {
8553        return Some(InstructionKind::SQRDMLSHAsisdelemR {
8554            H: H as _,
8555            L: L as _,
8556            M: M as _,
8557            Rd: Rd as _,
8558            Rm: Rm as _,
8559            Rn: Rn as _,
8560            size: size as _,
8561        });
8562    }
8563    None
8564}
8565
8566pub const fn decode_asimdshf(d: u32) -> Option<InstructionKind> {
8567    ["Could not decode."][((d & 0x9f800400) != 0x0f000400 && (d & 0x780000) != 0x000000) as usize];
8568    let Q = (d >> 30) & 1;
8569    let Rd = d & 0x1F;
8570    let Rn = (d >> 5) & 0x1F;
8571    let U = (d >> 29) & 1;
8572    let immb = (d >> 16) & 7;
8573    let immh = (d >> 19) & 0xF;
8574    let opcode = (d >> 11) & 0x1F;
8575    if (d & 0xbf80fc00) == 0x0f000400 && (d & 0x780000) != 0x000000 {
8576        return Some(InstructionKind::SSHRAsimdshfR {
8577            Q: Q as _,
8578            Rd: Rd as _,
8579            Rn: Rn as _,
8580            immb: immb as _,
8581            immh: immh as _,
8582        });
8583    }
8584    if (d & 0xbf80fc00) == 0x0f001400 && (d & 0x780000) != 0x000000 {
8585        return Some(InstructionKind::SSRAAsimdshfR {
8586            Q: Q as _,
8587            Rd: Rd as _,
8588            Rn: Rn as _,
8589            immb: immb as _,
8590            immh: immh as _,
8591        });
8592    }
8593    if (d & 0xbf80fc00) == 0x0f002400 && (d & 0x780000) != 0x000000 {
8594        return Some(InstructionKind::SRSHRAsimdshfR {
8595            Q: Q as _,
8596            Rd: Rd as _,
8597            Rn: Rn as _,
8598            immb: immb as _,
8599            immh: immh as _,
8600        });
8601    }
8602    if (d & 0xbf80fc00) == 0x0f003400 && (d & 0x780000) != 0x000000 {
8603        return Some(InstructionKind::SRSRAAsimdshfR {
8604            Q: Q as _,
8605            Rd: Rd as _,
8606            Rn: Rn as _,
8607            immb: immb as _,
8608            immh: immh as _,
8609        });
8610    }
8611    if (d & 0xbf80fc00) == 0x0f005400 && (d & 0x780000) != 0x000000 {
8612        return Some(InstructionKind::SHLAsimdshfR {
8613            Q: Q as _,
8614            Rd: Rd as _,
8615            Rn: Rn as _,
8616            immb: immb as _,
8617            immh: immh as _,
8618        });
8619    }
8620    if (d & 0xbf80fc00) == 0x0f007400 && (d & 0x780000) != 0x000000 {
8621        return Some(InstructionKind::SQSHLAsimdshfR {
8622            Q: Q as _,
8623            Rd: Rd as _,
8624            Rn: Rn as _,
8625            immb: immb as _,
8626            immh: immh as _,
8627        });
8628    }
8629    if (d & 0xbf80fc00) == 0x0f008400 && (d & 0x780000) != 0x000000 {
8630        return Some(InstructionKind::SHRNAsimdshfN {
8631            Q: Q as _,
8632            Rd: Rd as _,
8633            Rn: Rn as _,
8634            immb: immb as _,
8635            immh: immh as _,
8636        });
8637    }
8638    if (d & 0xbf80fc00) == 0x0f008c00 && (d & 0x780000) != 0x000000 {
8639        return Some(InstructionKind::RSHRNAsimdshfN {
8640            Q: Q as _,
8641            Rd: Rd as _,
8642            Rn: Rn as _,
8643            immb: immb as _,
8644            immh: immh as _,
8645        });
8646    }
8647    if (d & 0xbf80fc00) == 0x0f009400 && (d & 0x780000) != 0x000000 {
8648        return Some(InstructionKind::SQSHRNAsimdshfN {
8649            Q: Q as _,
8650            Rd: Rd as _,
8651            Rn: Rn as _,
8652            immb: immb as _,
8653            immh: immh as _,
8654        });
8655    }
8656    if (d & 0xbf80fc00) == 0x0f009c00 && (d & 0x780000) != 0x000000 {
8657        return Some(InstructionKind::SQRSHRNAsimdshfN {
8658            Q: Q as _,
8659            Rd: Rd as _,
8660            Rn: Rn as _,
8661            immb: immb as _,
8662            immh: immh as _,
8663        });
8664    }
8665    if (d & 0xbf80fc00) == 0x0f00a400 && (d & 0x780000) != 0x000000 {
8666        return Some(InstructionKind::SSHLLAsimdshfL {
8667            Q: Q as _,
8668            Rd: Rd as _,
8669            Rn: Rn as _,
8670            immb: immb as _,
8671            immh: immh as _,
8672        });
8673    }
8674    if (d & 0xbf80fc00) == 0x0f00e400 && (d & 0x780000) != 0x000000 {
8675        return Some(InstructionKind::SCVTFAsimdshfC {
8676            Q: Q as _,
8677            Rd: Rd as _,
8678            Rn: Rn as _,
8679            immb: immb as _,
8680            immh: immh as _,
8681        });
8682    }
8683    if (d & 0xbf80fc00) == 0x0f00fc00 && (d & 0x780000) != 0x000000 {
8684        return Some(InstructionKind::FCVTZSAsimdshfC {
8685            Q: Q as _,
8686            Rd: Rd as _,
8687            Rn: Rn as _,
8688            immb: immb as _,
8689            immh: immh as _,
8690        });
8691    }
8692    if (d & 0xbf80fc00) == 0x2f000400 && (d & 0x780000) != 0x000000 {
8693        return Some(InstructionKind::USHRAsimdshfR {
8694            Q: Q as _,
8695            Rd: Rd as _,
8696            Rn: Rn as _,
8697            immb: immb as _,
8698            immh: immh as _,
8699        });
8700    }
8701    if (d & 0xbf80fc00) == 0x2f001400 && (d & 0x780000) != 0x000000 {
8702        return Some(InstructionKind::USRAAsimdshfR {
8703            Q: Q as _,
8704            Rd: Rd as _,
8705            Rn: Rn as _,
8706            immb: immb as _,
8707            immh: immh as _,
8708        });
8709    }
8710    if (d & 0xbf80fc00) == 0x2f002400 && (d & 0x780000) != 0x000000 {
8711        return Some(InstructionKind::URSHRAsimdshfR {
8712            Q: Q as _,
8713            Rd: Rd as _,
8714            Rn: Rn as _,
8715            immb: immb as _,
8716            immh: immh as _,
8717        });
8718    }
8719    if (d & 0xbf80fc00) == 0x2f003400 && (d & 0x780000) != 0x000000 {
8720        return Some(InstructionKind::URSRAAsimdshfR {
8721            Q: Q as _,
8722            Rd: Rd as _,
8723            Rn: Rn as _,
8724            immb: immb as _,
8725            immh: immh as _,
8726        });
8727    }
8728    if (d & 0xbf80fc00) == 0x2f004400 && (d & 0x780000) != 0x000000 {
8729        return Some(InstructionKind::SRIAsimdshfR {
8730            Q: Q as _,
8731            Rd: Rd as _,
8732            Rn: Rn as _,
8733            immb: immb as _,
8734            immh: immh as _,
8735        });
8736    }
8737    if (d & 0xbf80fc00) == 0x2f005400 && (d & 0x780000) != 0x000000 {
8738        return Some(InstructionKind::SLIAsimdshfR {
8739            Q: Q as _,
8740            Rd: Rd as _,
8741            Rn: Rn as _,
8742            immb: immb as _,
8743            immh: immh as _,
8744        });
8745    }
8746    if (d & 0xbf80fc00) == 0x2f006400 && (d & 0x780000) != 0x000000 {
8747        return Some(InstructionKind::SQSHLUAsimdshfR {
8748            Q: Q as _,
8749            Rd: Rd as _,
8750            Rn: Rn as _,
8751            immb: immb as _,
8752            immh: immh as _,
8753        });
8754    }
8755    if (d & 0xbf80fc00) == 0x2f007400 && (d & 0x780000) != 0x000000 {
8756        return Some(InstructionKind::UQSHLAsimdshfR {
8757            Q: Q as _,
8758            Rd: Rd as _,
8759            Rn: Rn as _,
8760            immb: immb as _,
8761            immh: immh as _,
8762        });
8763    }
8764    if (d & 0xbf80fc00) == 0x2f008400 && (d & 0x780000) != 0x000000 {
8765        return Some(InstructionKind::SQSHRUNAsimdshfN {
8766            Q: Q as _,
8767            Rd: Rd as _,
8768            Rn: Rn as _,
8769            immb: immb as _,
8770            immh: immh as _,
8771        });
8772    }
8773    if (d & 0xbf80fc00) == 0x2f008c00 && (d & 0x780000) != 0x000000 {
8774        return Some(InstructionKind::SQRSHRUNAsimdshfN {
8775            Q: Q as _,
8776            Rd: Rd as _,
8777            Rn: Rn as _,
8778            immb: immb as _,
8779            immh: immh as _,
8780        });
8781    }
8782    if (d & 0xbf80fc00) == 0x2f009400 && (d & 0x780000) != 0x000000 {
8783        return Some(InstructionKind::UQSHRNAsimdshfN {
8784            Q: Q as _,
8785            Rd: Rd as _,
8786            Rn: Rn as _,
8787            immb: immb as _,
8788            immh: immh as _,
8789        });
8790    }
8791    if (d & 0xbf80fc00) == 0x2f009c00 && (d & 0x780000) != 0x000000 {
8792        return Some(InstructionKind::UQRSHRNAsimdshfN {
8793            Q: Q as _,
8794            Rd: Rd as _,
8795            Rn: Rn as _,
8796            immb: immb as _,
8797            immh: immh as _,
8798        });
8799    }
8800    if (d & 0xbf80fc00) == 0x2f00a400 && (d & 0x780000) != 0x000000 {
8801        return Some(InstructionKind::USHLLAsimdshfL {
8802            Q: Q as _,
8803            Rd: Rd as _,
8804            Rn: Rn as _,
8805            immb: immb as _,
8806            immh: immh as _,
8807        });
8808    }
8809    if (d & 0xbf80fc00) == 0x2f00e400 && (d & 0x780000) != 0x000000 {
8810        return Some(InstructionKind::UCVTFAsimdshfC {
8811            Q: Q as _,
8812            Rd: Rd as _,
8813            Rn: Rn as _,
8814            immb: immb as _,
8815            immh: immh as _,
8816        });
8817    }
8818    if (d & 0xbf80fc00) == 0x2f00fc00 && (d & 0x780000) != 0x000000 {
8819        return Some(InstructionKind::FCVTZUAsimdshfC {
8820            Q: Q as _,
8821            Rd: Rd as _,
8822            Rn: Rn as _,
8823            immb: immb as _,
8824            immh: immh as _,
8825        });
8826    }
8827    None
8828}
8829
8830pub const fn decode_asimdtbl(d: u32) -> Option<InstructionKind> {
8831    ["Could not decode."][((d & 0xbf208c00) != 0x0e000000) as usize];
8832    let Q = (d >> 30) & 1;
8833    let Rd = d & 0x1F;
8834    let Rm = (d >> 16) & 0x1F;
8835    let Rn = (d >> 5) & 0x1F;
8836    let len = (d >> 13) & 3;
8837    let op = (d >> 12) & 1;
8838    let op2 = (d >> 22) & 3;
8839    if (d & 0xbfe0fc00) == 0x0e000000 {
8840        return Some(InstructionKind::TBLAsimdtblL11 {
8841            Q: Q as _,
8842            Rd: Rd as _,
8843            Rm: Rm as _,
8844            Rn: Rn as _,
8845        });
8846    }
8847    if (d & 0xbfe0fc00) == 0x0e001000 {
8848        return Some(InstructionKind::TBXAsimdtblL11 {
8849            Q: Q as _,
8850            Rd: Rd as _,
8851            Rm: Rm as _,
8852            Rn: Rn as _,
8853        });
8854    }
8855    if (d & 0xbfe0fc00) == 0x0e002000 {
8856        return Some(InstructionKind::TBLAsimdtblL22 {
8857            Q: Q as _,
8858            Rd: Rd as _,
8859            Rm: Rm as _,
8860            Rn: Rn as _,
8861        });
8862    }
8863    if (d & 0xbfe0fc00) == 0x0e003000 {
8864        return Some(InstructionKind::TBXAsimdtblL22 {
8865            Q: Q as _,
8866            Rd: Rd as _,
8867            Rm: Rm as _,
8868            Rn: Rn as _,
8869        });
8870    }
8871    if (d & 0xbfe0fc00) == 0x0e004000 {
8872        return Some(InstructionKind::TBLAsimdtblL33 {
8873            Q: Q as _,
8874            Rd: Rd as _,
8875            Rm: Rm as _,
8876            Rn: Rn as _,
8877        });
8878    }
8879    if (d & 0xbfe0fc00) == 0x0e005000 {
8880        return Some(InstructionKind::TBXAsimdtblL33 {
8881            Q: Q as _,
8882            Rd: Rd as _,
8883            Rm: Rm as _,
8884            Rn: Rn as _,
8885        });
8886    }
8887    if (d & 0xbfe0fc00) == 0x0e006000 {
8888        return Some(InstructionKind::TBLAsimdtblL44 {
8889            Q: Q as _,
8890            Rd: Rd as _,
8891            Rm: Rm as _,
8892            Rn: Rn as _,
8893        });
8894    }
8895    if (d & 0xbfe0fc00) == 0x0e007000 {
8896        return Some(InstructionKind::TBXAsimdtblL44 {
8897            Q: Q as _,
8898            Rd: Rd as _,
8899            Rm: Rm as _,
8900            Rn: Rn as _,
8901        });
8902    }
8903    None
8904}
8905
8906pub const fn decode_asimddiff(d: u32) -> Option<InstructionKind> {
8907    ["Could not decode."][((d & 0x9f200c00) != 0x0e200000) as usize];
8908    let Q = (d >> 30) & 1;
8909    let Rd = d & 0x1F;
8910    let Rm = (d >> 16) & 0x1F;
8911    let Rn = (d >> 5) & 0x1F;
8912    let U = (d >> 29) & 1;
8913    let opcode = (d >> 12) & 0xF;
8914    let size = (d >> 22) & 3;
8915    if (d & 0xbf20fc00) == 0x0e200000 {
8916        return Some(InstructionKind::SADDLAsimddiffL {
8917            Q: Q as _,
8918            Rd: Rd as _,
8919            Rm: Rm as _,
8920            Rn: Rn as _,
8921            size: size as _,
8922        });
8923    }
8924    if (d & 0xbf20fc00) == 0x0e201000 {
8925        return Some(InstructionKind::SADDWAsimddiffW {
8926            Q: Q as _,
8927            Rd: Rd as _,
8928            Rm: Rm as _,
8929            Rn: Rn as _,
8930            size: size as _,
8931        });
8932    }
8933    if (d & 0xbf20fc00) == 0x0e202000 {
8934        return Some(InstructionKind::SSUBLAsimddiffL {
8935            Q: Q as _,
8936            Rd: Rd as _,
8937            Rm: Rm as _,
8938            Rn: Rn as _,
8939            size: size as _,
8940        });
8941    }
8942    if (d & 0xbf20fc00) == 0x0e203000 {
8943        return Some(InstructionKind::SSUBWAsimddiffW {
8944            Q: Q as _,
8945            Rd: Rd as _,
8946            Rm: Rm as _,
8947            Rn: Rn as _,
8948            size: size as _,
8949        });
8950    }
8951    if (d & 0xbf20fc00) == 0x0e204000 {
8952        return Some(InstructionKind::ADDHNAsimddiffN {
8953            Q: Q as _,
8954            Rd: Rd as _,
8955            Rm: Rm as _,
8956            Rn: Rn as _,
8957            size: size as _,
8958        });
8959    }
8960    if (d & 0xbf20fc00) == 0x0e205000 {
8961        return Some(InstructionKind::SABALAsimddiffL {
8962            Q: Q as _,
8963            Rd: Rd as _,
8964            Rm: Rm as _,
8965            Rn: Rn as _,
8966            size: size as _,
8967        });
8968    }
8969    if (d & 0xbf20fc00) == 0x0e206000 {
8970        return Some(InstructionKind::SUBHNAsimddiffN {
8971            Q: Q as _,
8972            Rd: Rd as _,
8973            Rm: Rm as _,
8974            Rn: Rn as _,
8975            size: size as _,
8976        });
8977    }
8978    if (d & 0xbf20fc00) == 0x0e207000 {
8979        return Some(InstructionKind::SABDLAsimddiffL {
8980            Q: Q as _,
8981            Rd: Rd as _,
8982            Rm: Rm as _,
8983            Rn: Rn as _,
8984            size: size as _,
8985        });
8986    }
8987    if (d & 0xbf20fc00) == 0x0e208000 {
8988        return Some(InstructionKind::SMLALAsimddiffL {
8989            Q: Q as _,
8990            Rd: Rd as _,
8991            Rm: Rm as _,
8992            Rn: Rn as _,
8993            size: size as _,
8994        });
8995    }
8996    if (d & 0xbf20fc00) == 0x0e209000 {
8997        return Some(InstructionKind::SQDMLALAsimddiffL {
8998            Q: Q as _,
8999            Rd: Rd as _,
9000            Rm: Rm as _,
9001            Rn: Rn as _,
9002            size: size as _,
9003        });
9004    }
9005    if (d & 0xbf20fc00) == 0x0e20a000 {
9006        return Some(InstructionKind::SMLSLAsimddiffL {
9007            Q: Q as _,
9008            Rd: Rd as _,
9009            Rm: Rm as _,
9010            Rn: Rn as _,
9011            size: size as _,
9012        });
9013    }
9014    if (d & 0xbf20fc00) == 0x0e20b000 {
9015        return Some(InstructionKind::SQDMLSLAsimddiffL {
9016            Q: Q as _,
9017            Rd: Rd as _,
9018            Rm: Rm as _,
9019            Rn: Rn as _,
9020            size: size as _,
9021        });
9022    }
9023    if (d & 0xbf20fc00) == 0x0e20c000 {
9024        return Some(InstructionKind::SMULLAsimddiffL {
9025            Q: Q as _,
9026            Rd: Rd as _,
9027            Rm: Rm as _,
9028            Rn: Rn as _,
9029            size: size as _,
9030        });
9031    }
9032    if (d & 0xbf20fc00) == 0x0e20d000 {
9033        return Some(InstructionKind::SQDMULLAsimddiffL {
9034            Q: Q as _,
9035            Rd: Rd as _,
9036            Rm: Rm as _,
9037            Rn: Rn as _,
9038            size: size as _,
9039        });
9040    }
9041    if (d & 0xbf20fc00) == 0x0e20e000 {
9042        return Some(InstructionKind::PMULLAsimddiffL {
9043            Q: Q as _,
9044            Rd: Rd as _,
9045            Rm: Rm as _,
9046            Rn: Rn as _,
9047            size: size as _,
9048        });
9049    }
9050    if (d & 0xbf20fc00) == 0x2e200000 {
9051        return Some(InstructionKind::UADDLAsimddiffL {
9052            Q: Q as _,
9053            Rd: Rd as _,
9054            Rm: Rm as _,
9055            Rn: Rn as _,
9056            size: size as _,
9057        });
9058    }
9059    if (d & 0xbf20fc00) == 0x2e201000 {
9060        return Some(InstructionKind::UADDWAsimddiffW {
9061            Q: Q as _,
9062            Rd: Rd as _,
9063            Rm: Rm as _,
9064            Rn: Rn as _,
9065            size: size as _,
9066        });
9067    }
9068    if (d & 0xbf20fc00) == 0x2e202000 {
9069        return Some(InstructionKind::USUBLAsimddiffL {
9070            Q: Q as _,
9071            Rd: Rd as _,
9072            Rm: Rm as _,
9073            Rn: Rn as _,
9074            size: size as _,
9075        });
9076    }
9077    if (d & 0xbf20fc00) == 0x2e203000 {
9078        return Some(InstructionKind::USUBWAsimddiffW {
9079            Q: Q as _,
9080            Rd: Rd as _,
9081            Rm: Rm as _,
9082            Rn: Rn as _,
9083            size: size as _,
9084        });
9085    }
9086    if (d & 0xbf20fc00) == 0x2e204000 {
9087        return Some(InstructionKind::RADDHNAsimddiffN {
9088            Q: Q as _,
9089            Rd: Rd as _,
9090            Rm: Rm as _,
9091            Rn: Rn as _,
9092            size: size as _,
9093        });
9094    }
9095    if (d & 0xbf20fc00) == 0x2e205000 {
9096        return Some(InstructionKind::UABALAsimddiffL {
9097            Q: Q as _,
9098            Rd: Rd as _,
9099            Rm: Rm as _,
9100            Rn: Rn as _,
9101            size: size as _,
9102        });
9103    }
9104    if (d & 0xbf20fc00) == 0x2e206000 {
9105        return Some(InstructionKind::RSUBHNAsimddiffN {
9106            Q: Q as _,
9107            Rd: Rd as _,
9108            Rm: Rm as _,
9109            Rn: Rn as _,
9110            size: size as _,
9111        });
9112    }
9113    if (d & 0xbf20fc00) == 0x2e207000 {
9114        return Some(InstructionKind::UABDLAsimddiffL {
9115            Q: Q as _,
9116            Rd: Rd as _,
9117            Rm: Rm as _,
9118            Rn: Rn as _,
9119            size: size as _,
9120        });
9121    }
9122    if (d & 0xbf20fc00) == 0x2e208000 {
9123        return Some(InstructionKind::UMLALAsimddiffL {
9124            Q: Q as _,
9125            Rd: Rd as _,
9126            Rm: Rm as _,
9127            Rn: Rn as _,
9128            size: size as _,
9129        });
9130    }
9131    if (d & 0xbf20fc00) == 0x2e20a000 {
9132        return Some(InstructionKind::UMLSLAsimddiffL {
9133            Q: Q as _,
9134            Rd: Rd as _,
9135            Rm: Rm as _,
9136            Rn: Rn as _,
9137            size: size as _,
9138        });
9139    }
9140    if (d & 0xbf20fc00) == 0x2e20c000 {
9141        return Some(InstructionKind::UMULLAsimddiffL {
9142            Q: Q as _,
9143            Rd: Rd as _,
9144            Rm: Rm as _,
9145            Rn: Rn as _,
9146            size: size as _,
9147        });
9148    }
9149    None
9150}
9151
9152pub const fn decode_asimdsame(d: u32) -> Option<InstructionKind> {
9153    ["Could not decode."][((d & 0x9f200400) != 0x0e200400) as usize];
9154    let Q = (d >> 30) & 1;
9155    let Rd = d & 0x1F;
9156    let Rm = (d >> 16) & 0x1F;
9157    let Rn = (d >> 5) & 0x1F;
9158    let U = (d >> 29) & 1;
9159    let opcode = (d >> 11) & 0x1F;
9160    let size = (d >> 22) & 3;
9161    if (d & 0xbfe0fc00) == 0x0e201c00 {
9162        return Some(InstructionKind::ANDAsimdsameOnly {
9163            Q: Q as _,
9164            Rd: Rd as _,
9165            Rm: Rm as _,
9166            Rn: Rn as _,
9167        });
9168    }
9169    if (d & 0xbfe0fc00) == 0x0e601c00 {
9170        return Some(InstructionKind::BICAsimdsameOnly {
9171            Q: Q as _,
9172            Rd: Rd as _,
9173            Rm: Rm as _,
9174            Rn: Rn as _,
9175        });
9176    }
9177    if (d & 0xbfe0fc00) == 0x0ea01c00 {
9178        return Some(InstructionKind::ORRAsimdsameOnly {
9179            Q: Q as _,
9180            Rd: Rd as _,
9181            Rm: Rm as _,
9182            Rn: Rn as _,
9183        });
9184    }
9185    if (d & 0xbfe0fc00) == 0x0ee01c00 {
9186        return Some(InstructionKind::ORNAsimdsameOnly {
9187            Q: Q as _,
9188            Rd: Rd as _,
9189            Rm: Rm as _,
9190            Rn: Rn as _,
9191        });
9192    }
9193    if (d & 0xbfe0fc00) == 0x2e201c00 {
9194        return Some(InstructionKind::EORAsimdsameOnly {
9195            Q: Q as _,
9196            Rd: Rd as _,
9197            Rm: Rm as _,
9198            Rn: Rn as _,
9199        });
9200    }
9201    if (d & 0xbfe0fc00) == 0x2e601c00 {
9202        return Some(InstructionKind::BSLAsimdsameOnly {
9203            Q: Q as _,
9204            Rd: Rd as _,
9205            Rm: Rm as _,
9206            Rn: Rn as _,
9207        });
9208    }
9209    if (d & 0xbfe0fc00) == 0x2ea01c00 {
9210        return Some(InstructionKind::BITAsimdsameOnly {
9211            Q: Q as _,
9212            Rd: Rd as _,
9213            Rm: Rm as _,
9214            Rn: Rn as _,
9215        });
9216    }
9217    if (d & 0xbfe0fc00) == 0x2ee01c00 {
9218        return Some(InstructionKind::BIFAsimdsameOnly {
9219            Q: Q as _,
9220            Rd: Rd as _,
9221            Rm: Rm as _,
9222            Rn: Rn as _,
9223        });
9224    }
9225    if (d & 0xbfa0fc00) == 0x0e20c400 {
9226        return Some(InstructionKind::FMAXNMAsimdsameOnly {
9227            Q: Q as _,
9228            Rd: Rd as _,
9229            Rm: Rm as _,
9230            Rn: Rn as _,
9231            size: size as _,
9232        });
9233    }
9234    if (d & 0xbfa0fc00) == 0x0e20cc00 {
9235        return Some(InstructionKind::FMLAAsimdsameOnly {
9236            Q: Q as _,
9237            Rd: Rd as _,
9238            Rm: Rm as _,
9239            Rn: Rn as _,
9240            size: size as _,
9241        });
9242    }
9243    if (d & 0xbfa0fc00) == 0x0e20d400 {
9244        return Some(InstructionKind::FADDAsimdsameOnly {
9245            Q: Q as _,
9246            Rd: Rd as _,
9247            Rm: Rm as _,
9248            Rn: Rn as _,
9249            size: size as _,
9250        });
9251    }
9252    if (d & 0xbfa0fc00) == 0x0e20dc00 {
9253        return Some(InstructionKind::FMULXAsimdsameOnly {
9254            Q: Q as _,
9255            Rd: Rd as _,
9256            Rm: Rm as _,
9257            Rn: Rn as _,
9258            size: size as _,
9259        });
9260    }
9261    if (d & 0xbfa0fc00) == 0x0e20e400 {
9262        return Some(InstructionKind::FCMEQAsimdsameOnly {
9263            Q: Q as _,
9264            Rd: Rd as _,
9265            Rm: Rm as _,
9266            Rn: Rn as _,
9267            size: size as _,
9268        });
9269    }
9270    if (d & 0xbfa0fc00) == 0x0e20f400 {
9271        return Some(InstructionKind::FMAXAsimdsameOnly {
9272            Q: Q as _,
9273            Rd: Rd as _,
9274            Rm: Rm as _,
9275            Rn: Rn as _,
9276            size: size as _,
9277        });
9278    }
9279    if (d & 0xbfa0fc00) == 0x0e20fc00 {
9280        return Some(InstructionKind::FRECPSAsimdsameOnly {
9281            Q: Q as _,
9282            Rd: Rd as _,
9283            Rm: Rm as _,
9284            Rn: Rn as _,
9285            size: size as _,
9286        });
9287    }
9288    if (d & 0xbfa0fc00) == 0x0ea0c400 {
9289        return Some(InstructionKind::FMINNMAsimdsameOnly {
9290            Q: Q as _,
9291            Rd: Rd as _,
9292            Rm: Rm as _,
9293            Rn: Rn as _,
9294            size: size as _,
9295        });
9296    }
9297    if (d & 0xbfa0fc00) == 0x0ea0cc00 {
9298        return Some(InstructionKind::FMLSAsimdsameOnly {
9299            Q: Q as _,
9300            Rd: Rd as _,
9301            Rm: Rm as _,
9302            Rn: Rn as _,
9303            size: size as _,
9304        });
9305    }
9306    if (d & 0xbfa0fc00) == 0x0ea0d400 {
9307        return Some(InstructionKind::FSUBAsimdsameOnly {
9308            Q: Q as _,
9309            Rd: Rd as _,
9310            Rm: Rm as _,
9311            Rn: Rn as _,
9312            size: size as _,
9313        });
9314    }
9315    if (d & 0xbfa0fc00) == 0x0ea0f400 {
9316        return Some(InstructionKind::FMINAsimdsameOnly {
9317            Q: Q as _,
9318            Rd: Rd as _,
9319            Rm: Rm as _,
9320            Rn: Rn as _,
9321            size: size as _,
9322        });
9323    }
9324    if (d & 0xbfa0fc00) == 0x0ea0fc00 {
9325        return Some(InstructionKind::FRSQRTSAsimdsameOnly {
9326            Q: Q as _,
9327            Rd: Rd as _,
9328            Rm: Rm as _,
9329            Rn: Rn as _,
9330            size: size as _,
9331        });
9332    }
9333    if (d & 0xbfa0fc00) == 0x2e20c400 {
9334        return Some(InstructionKind::FMAXNMPAsimdsameOnly {
9335            Q: Q as _,
9336            Rd: Rd as _,
9337            Rm: Rm as _,
9338            Rn: Rn as _,
9339            size: size as _,
9340        });
9341    }
9342    if (d & 0xbfa0fc00) == 0x2e20d400 {
9343        return Some(InstructionKind::FADDPAsimdsameOnly {
9344            Q: Q as _,
9345            Rd: Rd as _,
9346            Rm: Rm as _,
9347            Rn: Rn as _,
9348            size: size as _,
9349        });
9350    }
9351    if (d & 0xbfa0fc00) == 0x2e20dc00 {
9352        return Some(InstructionKind::FMULAsimdsameOnly {
9353            Q: Q as _,
9354            Rd: Rd as _,
9355            Rm: Rm as _,
9356            Rn: Rn as _,
9357            size: size as _,
9358        });
9359    }
9360    if (d & 0xbfa0fc00) == 0x2e20e400 {
9361        return Some(InstructionKind::FCMGEAsimdsameOnly {
9362            Q: Q as _,
9363            Rd: Rd as _,
9364            Rm: Rm as _,
9365            Rn: Rn as _,
9366            size: size as _,
9367        });
9368    }
9369    if (d & 0xbfa0fc00) == 0x2e20ec00 {
9370        return Some(InstructionKind::FACGEAsimdsameOnly {
9371            Q: Q as _,
9372            Rd: Rd as _,
9373            Rm: Rm as _,
9374            Rn: Rn as _,
9375            size: size as _,
9376        });
9377    }
9378    if (d & 0xbfa0fc00) == 0x2e20f400 {
9379        return Some(InstructionKind::FMAXPAsimdsameOnly {
9380            Q: Q as _,
9381            Rd: Rd as _,
9382            Rm: Rm as _,
9383            Rn: Rn as _,
9384            size: size as _,
9385        });
9386    }
9387    if (d & 0xbfa0fc00) == 0x2e20fc00 {
9388        return Some(InstructionKind::FDIVAsimdsameOnly {
9389            Q: Q as _,
9390            Rd: Rd as _,
9391            Rm: Rm as _,
9392            Rn: Rn as _,
9393            size: size as _,
9394        });
9395    }
9396    if (d & 0xbfa0fc00) == 0x2ea0c400 {
9397        return Some(InstructionKind::FMINNMPAsimdsameOnly {
9398            Q: Q as _,
9399            Rd: Rd as _,
9400            Rm: Rm as _,
9401            Rn: Rn as _,
9402            size: size as _,
9403        });
9404    }
9405    if (d & 0xbfa0fc00) == 0x2ea0d400 {
9406        return Some(InstructionKind::FABDAsimdsameOnly {
9407            Q: Q as _,
9408            Rd: Rd as _,
9409            Rm: Rm as _,
9410            Rn: Rn as _,
9411            size: size as _,
9412        });
9413    }
9414    if (d & 0xbfa0fc00) == 0x2ea0e400 {
9415        return Some(InstructionKind::FCMGTAsimdsameOnly {
9416            Q: Q as _,
9417            Rd: Rd as _,
9418            Rm: Rm as _,
9419            Rn: Rn as _,
9420            size: size as _,
9421        });
9422    }
9423    if (d & 0xbfa0fc00) == 0x2ea0ec00 {
9424        return Some(InstructionKind::FACGTAsimdsameOnly {
9425            Q: Q as _,
9426            Rd: Rd as _,
9427            Rm: Rm as _,
9428            Rn: Rn as _,
9429            size: size as _,
9430        });
9431    }
9432    if (d & 0xbfa0fc00) == 0x2ea0f400 {
9433        return Some(InstructionKind::FMINPAsimdsameOnly {
9434            Q: Q as _,
9435            Rd: Rd as _,
9436            Rm: Rm as _,
9437            Rn: Rn as _,
9438            size: size as _,
9439        });
9440    }
9441    if (d & 0xbf20fc00) == 0x0e200400 {
9442        return Some(InstructionKind::SHADDAsimdsameOnly {
9443            Q: Q as _,
9444            Rd: Rd as _,
9445            Rm: Rm as _,
9446            Rn: Rn as _,
9447            size: size as _,
9448        });
9449    }
9450    if (d & 0xbf20fc00) == 0x0e200c00 {
9451        return Some(InstructionKind::SQADDAsimdsameOnly {
9452            Q: Q as _,
9453            Rd: Rd as _,
9454            Rm: Rm as _,
9455            Rn: Rn as _,
9456            size: size as _,
9457        });
9458    }
9459    if (d & 0xbf20fc00) == 0x0e201400 {
9460        return Some(InstructionKind::SRHADDAsimdsameOnly {
9461            Q: Q as _,
9462            Rd: Rd as _,
9463            Rm: Rm as _,
9464            Rn: Rn as _,
9465            size: size as _,
9466        });
9467    }
9468    if (d & 0xbf20fc00) == 0x0e202400 {
9469        return Some(InstructionKind::SHSUBAsimdsameOnly {
9470            Q: Q as _,
9471            Rd: Rd as _,
9472            Rm: Rm as _,
9473            Rn: Rn as _,
9474            size: size as _,
9475        });
9476    }
9477    if (d & 0xbf20fc00) == 0x0e202c00 {
9478        return Some(InstructionKind::SQSUBAsimdsameOnly {
9479            Q: Q as _,
9480            Rd: Rd as _,
9481            Rm: Rm as _,
9482            Rn: Rn as _,
9483            size: size as _,
9484        });
9485    }
9486    if (d & 0xbf20fc00) == 0x0e203400 {
9487        return Some(InstructionKind::CMGTAsimdsameOnly {
9488            Q: Q as _,
9489            Rd: Rd as _,
9490            Rm: Rm as _,
9491            Rn: Rn as _,
9492            size: size as _,
9493        });
9494    }
9495    if (d & 0xbf20fc00) == 0x0e203c00 {
9496        return Some(InstructionKind::CMGEAsimdsameOnly {
9497            Q: Q as _,
9498            Rd: Rd as _,
9499            Rm: Rm as _,
9500            Rn: Rn as _,
9501            size: size as _,
9502        });
9503    }
9504    if (d & 0xbf20fc00) == 0x0e204400 {
9505        return Some(InstructionKind::SSHLAsimdsameOnly {
9506            Q: Q as _,
9507            Rd: Rd as _,
9508            Rm: Rm as _,
9509            Rn: Rn as _,
9510            size: size as _,
9511        });
9512    }
9513    if (d & 0xbf20fc00) == 0x0e204c00 {
9514        return Some(InstructionKind::SQSHLAsimdsameOnly {
9515            Q: Q as _,
9516            Rd: Rd as _,
9517            Rm: Rm as _,
9518            Rn: Rn as _,
9519            size: size as _,
9520        });
9521    }
9522    if (d & 0xbf20fc00) == 0x0e205400 {
9523        return Some(InstructionKind::SRSHLAsimdsameOnly {
9524            Q: Q as _,
9525            Rd: Rd as _,
9526            Rm: Rm as _,
9527            Rn: Rn as _,
9528            size: size as _,
9529        });
9530    }
9531    if (d & 0xbf20fc00) == 0x0e205c00 {
9532        return Some(InstructionKind::SQRSHLAsimdsameOnly {
9533            Q: Q as _,
9534            Rd: Rd as _,
9535            Rm: Rm as _,
9536            Rn: Rn as _,
9537            size: size as _,
9538        });
9539    }
9540    if (d & 0xbf20fc00) == 0x0e206400 {
9541        return Some(InstructionKind::SMAXAsimdsameOnly {
9542            Q: Q as _,
9543            Rd: Rd as _,
9544            Rm: Rm as _,
9545            Rn: Rn as _,
9546            size: size as _,
9547        });
9548    }
9549    if (d & 0xbf20fc00) == 0x0e206c00 {
9550        return Some(InstructionKind::SMINAsimdsameOnly {
9551            Q: Q as _,
9552            Rd: Rd as _,
9553            Rm: Rm as _,
9554            Rn: Rn as _,
9555            size: size as _,
9556        });
9557    }
9558    if (d & 0xbf20fc00) == 0x0e207400 {
9559        return Some(InstructionKind::SABDAsimdsameOnly {
9560            Q: Q as _,
9561            Rd: Rd as _,
9562            Rm: Rm as _,
9563            Rn: Rn as _,
9564            size: size as _,
9565        });
9566    }
9567    if (d & 0xbf20fc00) == 0x0e207c00 {
9568        return Some(InstructionKind::SABAAsimdsameOnly {
9569            Q: Q as _,
9570            Rd: Rd as _,
9571            Rm: Rm as _,
9572            Rn: Rn as _,
9573            size: size as _,
9574        });
9575    }
9576    if (d & 0xbf20fc00) == 0x0e208400 {
9577        return Some(InstructionKind::ADDAsimdsameOnly {
9578            Q: Q as _,
9579            Rd: Rd as _,
9580            Rm: Rm as _,
9581            Rn: Rn as _,
9582            size: size as _,
9583        });
9584    }
9585    if (d & 0xbf20fc00) == 0x0e208c00 {
9586        return Some(InstructionKind::CMTSTAsimdsameOnly {
9587            Q: Q as _,
9588            Rd: Rd as _,
9589            Rm: Rm as _,
9590            Rn: Rn as _,
9591            size: size as _,
9592        });
9593    }
9594    if (d & 0xbf20fc00) == 0x0e209400 {
9595        return Some(InstructionKind::MLAAsimdsameOnly {
9596            Q: Q as _,
9597            Rd: Rd as _,
9598            Rm: Rm as _,
9599            Rn: Rn as _,
9600            size: size as _,
9601        });
9602    }
9603    if (d & 0xbf20fc00) == 0x0e209c00 {
9604        return Some(InstructionKind::MULAsimdsameOnly {
9605            Q: Q as _,
9606            Rd: Rd as _,
9607            Rm: Rm as _,
9608            Rn: Rn as _,
9609            size: size as _,
9610        });
9611    }
9612    if (d & 0xbf20fc00) == 0x0e20a400 {
9613        return Some(InstructionKind::SMAXPAsimdsameOnly {
9614            Q: Q as _,
9615            Rd: Rd as _,
9616            Rm: Rm as _,
9617            Rn: Rn as _,
9618            size: size as _,
9619        });
9620    }
9621    if (d & 0xbf20fc00) == 0x0e20ac00 {
9622        return Some(InstructionKind::SMINPAsimdsameOnly {
9623            Q: Q as _,
9624            Rd: Rd as _,
9625            Rm: Rm as _,
9626            Rn: Rn as _,
9627            size: size as _,
9628        });
9629    }
9630    if (d & 0xbf20fc00) == 0x0e20b400 {
9631        return Some(InstructionKind::SQDMULHAsimdsameOnly {
9632            Q: Q as _,
9633            Rd: Rd as _,
9634            Rm: Rm as _,
9635            Rn: Rn as _,
9636            size: size as _,
9637        });
9638    }
9639    if (d & 0xbf20fc00) == 0x0e20bc00 {
9640        return Some(InstructionKind::ADDPAsimdsameOnly {
9641            Q: Q as _,
9642            Rd: Rd as _,
9643            Rm: Rm as _,
9644            Rn: Rn as _,
9645            size: size as _,
9646        });
9647    }
9648    if (d & 0xbf20fc00) == 0x2e200400 {
9649        return Some(InstructionKind::UHADDAsimdsameOnly {
9650            Q: Q as _,
9651            Rd: Rd as _,
9652            Rm: Rm as _,
9653            Rn: Rn as _,
9654            size: size as _,
9655        });
9656    }
9657    if (d & 0xbf20fc00) == 0x2e200c00 {
9658        return Some(InstructionKind::UQADDAsimdsameOnly {
9659            Q: Q as _,
9660            Rd: Rd as _,
9661            Rm: Rm as _,
9662            Rn: Rn as _,
9663            size: size as _,
9664        });
9665    }
9666    if (d & 0xbf20fc00) == 0x2e201400 {
9667        return Some(InstructionKind::URHADDAsimdsameOnly {
9668            Q: Q as _,
9669            Rd: Rd as _,
9670            Rm: Rm as _,
9671            Rn: Rn as _,
9672            size: size as _,
9673        });
9674    }
9675    if (d & 0xbf20fc00) == 0x2e202400 {
9676        return Some(InstructionKind::UHSUBAsimdsameOnly {
9677            Q: Q as _,
9678            Rd: Rd as _,
9679            Rm: Rm as _,
9680            Rn: Rn as _,
9681            size: size as _,
9682        });
9683    }
9684    if (d & 0xbf20fc00) == 0x2e202c00 {
9685        return Some(InstructionKind::UQSUBAsimdsameOnly {
9686            Q: Q as _,
9687            Rd: Rd as _,
9688            Rm: Rm as _,
9689            Rn: Rn as _,
9690            size: size as _,
9691        });
9692    }
9693    if (d & 0xbf20fc00) == 0x2e203400 {
9694        return Some(InstructionKind::CMHIAsimdsameOnly {
9695            Q: Q as _,
9696            Rd: Rd as _,
9697            Rm: Rm as _,
9698            Rn: Rn as _,
9699            size: size as _,
9700        });
9701    }
9702    if (d & 0xbf20fc00) == 0x2e203c00 {
9703        return Some(InstructionKind::CMHSAsimdsameOnly {
9704            Q: Q as _,
9705            Rd: Rd as _,
9706            Rm: Rm as _,
9707            Rn: Rn as _,
9708            size: size as _,
9709        });
9710    }
9711    if (d & 0xbf20fc00) == 0x2e204400 {
9712        return Some(InstructionKind::USHLAsimdsameOnly {
9713            Q: Q as _,
9714            Rd: Rd as _,
9715            Rm: Rm as _,
9716            Rn: Rn as _,
9717            size: size as _,
9718        });
9719    }
9720    if (d & 0xbf20fc00) == 0x2e204c00 {
9721        return Some(InstructionKind::UQSHLAsimdsameOnly {
9722            Q: Q as _,
9723            Rd: Rd as _,
9724            Rm: Rm as _,
9725            Rn: Rn as _,
9726            size: size as _,
9727        });
9728    }
9729    if (d & 0xbf20fc00) == 0x2e205400 {
9730        return Some(InstructionKind::URSHLAsimdsameOnly {
9731            Q: Q as _,
9732            Rd: Rd as _,
9733            Rm: Rm as _,
9734            Rn: Rn as _,
9735            size: size as _,
9736        });
9737    }
9738    if (d & 0xbf20fc00) == 0x2e205c00 {
9739        return Some(InstructionKind::UQRSHLAsimdsameOnly {
9740            Q: Q as _,
9741            Rd: Rd as _,
9742            Rm: Rm as _,
9743            Rn: Rn as _,
9744            size: size as _,
9745        });
9746    }
9747    if (d & 0xbf20fc00) == 0x2e206400 {
9748        return Some(InstructionKind::UMAXAsimdsameOnly {
9749            Q: Q as _,
9750            Rd: Rd as _,
9751            Rm: Rm as _,
9752            Rn: Rn as _,
9753            size: size as _,
9754        });
9755    }
9756    if (d & 0xbf20fc00) == 0x2e206c00 {
9757        return Some(InstructionKind::UMINAsimdsameOnly {
9758            Q: Q as _,
9759            Rd: Rd as _,
9760            Rm: Rm as _,
9761            Rn: Rn as _,
9762            size: size as _,
9763        });
9764    }
9765    if (d & 0xbf20fc00) == 0x2e207400 {
9766        return Some(InstructionKind::UABDAsimdsameOnly {
9767            Q: Q as _,
9768            Rd: Rd as _,
9769            Rm: Rm as _,
9770            Rn: Rn as _,
9771            size: size as _,
9772        });
9773    }
9774    if (d & 0xbf20fc00) == 0x2e207c00 {
9775        return Some(InstructionKind::UABAAsimdsameOnly {
9776            Q: Q as _,
9777            Rd: Rd as _,
9778            Rm: Rm as _,
9779            Rn: Rn as _,
9780            size: size as _,
9781        });
9782    }
9783    if (d & 0xbf20fc00) == 0x2e208400 {
9784        return Some(InstructionKind::SUBAsimdsameOnly {
9785            Q: Q as _,
9786            Rd: Rd as _,
9787            Rm: Rm as _,
9788            Rn: Rn as _,
9789            size: size as _,
9790        });
9791    }
9792    if (d & 0xbf20fc00) == 0x2e208c00 {
9793        return Some(InstructionKind::CMEQAsimdsameOnly {
9794            Q: Q as _,
9795            Rd: Rd as _,
9796            Rm: Rm as _,
9797            Rn: Rn as _,
9798            size: size as _,
9799        });
9800    }
9801    if (d & 0xbf20fc00) == 0x2e209400 {
9802        return Some(InstructionKind::MLSAsimdsameOnly {
9803            Q: Q as _,
9804            Rd: Rd as _,
9805            Rm: Rm as _,
9806            Rn: Rn as _,
9807            size: size as _,
9808        });
9809    }
9810    if (d & 0xbf20fc00) == 0x2e209c00 {
9811        return Some(InstructionKind::PMULAsimdsameOnly {
9812            Q: Q as _,
9813            Rd: Rd as _,
9814            Rm: Rm as _,
9815            Rn: Rn as _,
9816            size: size as _,
9817        });
9818    }
9819    if (d & 0xbf20fc00) == 0x2e20a400 {
9820        return Some(InstructionKind::UMAXPAsimdsameOnly {
9821            Q: Q as _,
9822            Rd: Rd as _,
9823            Rm: Rm as _,
9824            Rn: Rn as _,
9825            size: size as _,
9826        });
9827    }
9828    if (d & 0xbf20fc00) == 0x2e20ac00 {
9829        return Some(InstructionKind::UMINPAsimdsameOnly {
9830            Q: Q as _,
9831            Rd: Rd as _,
9832            Rm: Rm as _,
9833            Rn: Rn as _,
9834            size: size as _,
9835        });
9836    }
9837    if (d & 0xbf20fc00) == 0x2e20b400 {
9838        return Some(InstructionKind::SQRDMULHAsimdsameOnly {
9839            Q: Q as _,
9840            Rd: Rd as _,
9841            Rm: Rm as _,
9842            Rn: Rn as _,
9843            size: size as _,
9844        });
9845    }
9846    None
9847}
9848
9849pub const fn decode_asimdsamefp16(d: u32) -> Option<InstructionKind> {
9850    ["Could not decode."][((d & 0x9f60c400) != 0x0e400400) as usize];
9851    let Q = (d >> 30) & 1;
9852    let Rd = d & 0x1F;
9853    let Rm = (d >> 16) & 0x1F;
9854    let Rn = (d >> 5) & 0x1F;
9855    let U = (d >> 29) & 1;
9856    let a = (d >> 23) & 1;
9857    let opcode = (d >> 11) & 7;
9858    if (d & 0xbfe0fc00) == 0x0e400400 {
9859        return Some(InstructionKind::FMAXNMAsimdsamefp16Only {
9860            Q: Q as _,
9861            Rd: Rd as _,
9862            Rm: Rm as _,
9863            Rn: Rn as _,
9864        });
9865    }
9866    if (d & 0xbfe0fc00) == 0x0e400c00 {
9867        return Some(InstructionKind::FMLAAsimdsamefp16Only {
9868            Q: Q as _,
9869            Rd: Rd as _,
9870            Rm: Rm as _,
9871            Rn: Rn as _,
9872        });
9873    }
9874    if (d & 0xbfe0fc00) == 0x0e401400 {
9875        return Some(InstructionKind::FADDAsimdsamefp16Only {
9876            Q: Q as _,
9877            Rd: Rd as _,
9878            Rm: Rm as _,
9879            Rn: Rn as _,
9880        });
9881    }
9882    if (d & 0xbfe0fc00) == 0x0e401c00 {
9883        return Some(InstructionKind::FMULXAsimdsamefp16Only {
9884            Q: Q as _,
9885            Rd: Rd as _,
9886            Rm: Rm as _,
9887            Rn: Rn as _,
9888        });
9889    }
9890    if (d & 0xbfe0fc00) == 0x0e402400 {
9891        return Some(InstructionKind::FCMEQAsimdsamefp16Only {
9892            Q: Q as _,
9893            Rd: Rd as _,
9894            Rm: Rm as _,
9895            Rn: Rn as _,
9896        });
9897    }
9898    if (d & 0xbfe0fc00) == 0x0e403400 {
9899        return Some(InstructionKind::FMAXAsimdsamefp16Only {
9900            Q: Q as _,
9901            Rd: Rd as _,
9902            Rm: Rm as _,
9903            Rn: Rn as _,
9904        });
9905    }
9906    if (d & 0xbfe0fc00) == 0x0e403c00 {
9907        return Some(InstructionKind::FRECPSAsimdsamefp16Only {
9908            Q: Q as _,
9909            Rd: Rd as _,
9910            Rm: Rm as _,
9911            Rn: Rn as _,
9912        });
9913    }
9914    if (d & 0xbfe0fc00) == 0x0ec00400 {
9915        return Some(InstructionKind::FMINNMAsimdsamefp16Only {
9916            Q: Q as _,
9917            Rd: Rd as _,
9918            Rm: Rm as _,
9919            Rn: Rn as _,
9920        });
9921    }
9922    if (d & 0xbfe0fc00) == 0x0ec00c00 {
9923        return Some(InstructionKind::FMLSAsimdsamefp16Only {
9924            Q: Q as _,
9925            Rd: Rd as _,
9926            Rm: Rm as _,
9927            Rn: Rn as _,
9928        });
9929    }
9930    if (d & 0xbfe0fc00) == 0x0ec01400 {
9931        return Some(InstructionKind::FSUBAsimdsamefp16Only {
9932            Q: Q as _,
9933            Rd: Rd as _,
9934            Rm: Rm as _,
9935            Rn: Rn as _,
9936        });
9937    }
9938    if (d & 0xbfe0fc00) == 0x0ec03400 {
9939        return Some(InstructionKind::FMINAsimdsamefp16Only {
9940            Q: Q as _,
9941            Rd: Rd as _,
9942            Rm: Rm as _,
9943            Rn: Rn as _,
9944        });
9945    }
9946    if (d & 0xbfe0fc00) == 0x0ec03c00 {
9947        return Some(InstructionKind::FRSQRTSAsimdsamefp16Only {
9948            Q: Q as _,
9949            Rd: Rd as _,
9950            Rm: Rm as _,
9951            Rn: Rn as _,
9952        });
9953    }
9954    if (d & 0xbfe0fc00) == 0x2e400400 {
9955        return Some(InstructionKind::FMAXNMPAsimdsamefp16Only {
9956            Q: Q as _,
9957            Rd: Rd as _,
9958            Rm: Rm as _,
9959            Rn: Rn as _,
9960        });
9961    }
9962    if (d & 0xbfe0fc00) == 0x2e401400 {
9963        return Some(InstructionKind::FADDPAsimdsamefp16Only {
9964            Q: Q as _,
9965            Rd: Rd as _,
9966            Rm: Rm as _,
9967            Rn: Rn as _,
9968        });
9969    }
9970    if (d & 0xbfe0fc00) == 0x2e401c00 {
9971        return Some(InstructionKind::FMULAsimdsamefp16Only {
9972            Q: Q as _,
9973            Rd: Rd as _,
9974            Rm: Rm as _,
9975            Rn: Rn as _,
9976        });
9977    }
9978    if (d & 0xbfe0fc00) == 0x2e402400 {
9979        return Some(InstructionKind::FCMGEAsimdsamefp16Only {
9980            Q: Q as _,
9981            Rd: Rd as _,
9982            Rm: Rm as _,
9983            Rn: Rn as _,
9984        });
9985    }
9986    if (d & 0xbfe0fc00) == 0x2e402c00 {
9987        return Some(InstructionKind::FACGEAsimdsamefp16Only {
9988            Q: Q as _,
9989            Rd: Rd as _,
9990            Rm: Rm as _,
9991            Rn: Rn as _,
9992        });
9993    }
9994    if (d & 0xbfe0fc00) == 0x2e403400 {
9995        return Some(InstructionKind::FMAXPAsimdsamefp16Only {
9996            Q: Q as _,
9997            Rd: Rd as _,
9998            Rm: Rm as _,
9999            Rn: Rn as _,
10000        });
10001    }
10002    if (d & 0xbfe0fc00) == 0x2e403c00 {
10003        return Some(InstructionKind::FDIVAsimdsamefp16Only {
10004            Q: Q as _,
10005            Rd: Rd as _,
10006            Rm: Rm as _,
10007            Rn: Rn as _,
10008        });
10009    }
10010    if (d & 0xbfe0fc00) == 0x2ec00400 {
10011        return Some(InstructionKind::FMINNMPAsimdsamefp16Only {
10012            Q: Q as _,
10013            Rd: Rd as _,
10014            Rm: Rm as _,
10015            Rn: Rn as _,
10016        });
10017    }
10018    if (d & 0xbfe0fc00) == 0x2ec01400 {
10019        return Some(InstructionKind::FABDAsimdsamefp16Only {
10020            Q: Q as _,
10021            Rd: Rd as _,
10022            Rm: Rm as _,
10023            Rn: Rn as _,
10024        });
10025    }
10026    if (d & 0xbfe0fc00) == 0x2ec02400 {
10027        return Some(InstructionKind::FCMGTAsimdsamefp16Only {
10028            Q: Q as _,
10029            Rd: Rd as _,
10030            Rm: Rm as _,
10031            Rn: Rn as _,
10032        });
10033    }
10034    if (d & 0xbfe0fc00) == 0x2ec02c00 {
10035        return Some(InstructionKind::FACGTAsimdsamefp16Only {
10036            Q: Q as _,
10037            Rd: Rd as _,
10038            Rm: Rm as _,
10039            Rn: Rn as _,
10040        });
10041    }
10042    if (d & 0xbfe0fc00) == 0x2ec03400 {
10043        return Some(InstructionKind::FMINPAsimdsamefp16Only {
10044            Q: Q as _,
10045            Rd: Rd as _,
10046            Rm: Rm as _,
10047            Rn: Rn as _,
10048        });
10049    }
10050    None
10051}
10052
10053pub const fn decode_asimdsame2(d: u32) -> Option<InstructionKind> {
10054    ["Could not decode."][((d & 0x9f208400) != 0x0e008400) as usize];
10055    let Q = (d >> 30) & 1;
10056    let Rd = d & 0x1F;
10057    let Rm = (d >> 16) & 0x1F;
10058    let Rn = (d >> 5) & 0x1F;
10059    let U = (d >> 29) & 1;
10060    let opcode = (d >> 11) & 0xF;
10061    let size = (d >> 22) & 3;
10062    if (d & 0xbf20fc00) == 0x0e009400 {
10063        return Some(InstructionKind::SDOTAsimdsame2D {
10064            Q: Q as _,
10065            Rd: Rd as _,
10066            Rm: Rm as _,
10067            Rn: Rn as _,
10068            size: size as _,
10069        });
10070    }
10071    if (d & 0xbf20fc00) == 0x2e008400 {
10072        return Some(InstructionKind::SQRDMLAHAsimdsame2Only {
10073            Q: Q as _,
10074            Rd: Rd as _,
10075            Rm: Rm as _,
10076            Rn: Rn as _,
10077            size: size as _,
10078        });
10079    }
10080    if (d & 0xbf20fc00) == 0x2e008c00 {
10081        return Some(InstructionKind::SQRDMLSHAsimdsame2Only {
10082            Q: Q as _,
10083            Rd: Rd as _,
10084            Rm: Rm as _,
10085            Rn: Rn as _,
10086            size: size as _,
10087        });
10088    }
10089    if (d & 0xbf20fc00) == 0x2e009400 {
10090        return Some(InstructionKind::UDOTAsimdsame2D {
10091            Q: Q as _,
10092            Rd: Rd as _,
10093            Rm: Rm as _,
10094            Rn: Rn as _,
10095            size: size as _,
10096        });
10097    }
10098    if (d & 0xbf20ec00) == 0x2e00e400 {
10099        return Some(InstructionKind::FCADDAsimdsame2C {
10100            Q: Q as _,
10101            Rd: Rd as _,
10102            Rm: Rm as _,
10103            Rn: Rn as _,
10104            opcode: opcode as _,
10105            size: size as _,
10106        });
10107    }
10108    if (d & 0xbf20e400) == 0x2e00c400 {
10109        return Some(InstructionKind::FCMLAAsimdsame2C {
10110            Q: Q as _,
10111            Rd: Rd as _,
10112            Rm: Rm as _,
10113            Rn: Rn as _,
10114            opcode: opcode as _,
10115            size: size as _,
10116        });
10117    }
10118    None
10119}
10120
10121pub const fn decode_asimdmisc(d: u32) -> Option<InstructionKind> {
10122    ["Could not decode."][((d & 0x9f3e0c00) != 0x0e200800) as usize];
10123    let Q = (d >> 30) & 1;
10124    let Rd = d & 0x1F;
10125    let Rn = (d >> 5) & 0x1F;
10126    let U = (d >> 29) & 1;
10127    let opcode = (d >> 12) & 0x1F;
10128    let size = (d >> 22) & 3;
10129    if (d & 0xbffffc00) == 0x2e205800 {
10130        return Some(InstructionKind::NOTAsimdmiscR {
10131            Q: Q as _,
10132            Rd: Rd as _,
10133            Rn: Rn as _,
10134        });
10135    }
10136    if (d & 0xbffffc00) == 0x2e605800 {
10137        return Some(InstructionKind::RBITAsimdmiscR {
10138            Q: Q as _,
10139            Rd: Rd as _,
10140            Rn: Rn as _,
10141        });
10142    }
10143    if (d & 0xbfbffc00) == 0x0e216800 {
10144        return Some(InstructionKind::FCVTNAsimdmiscN {
10145            Q: Q as _,
10146            Rd: Rd as _,
10147            Rn: Rn as _,
10148            size: size as _,
10149        });
10150    }
10151    if (d & 0xbfbffc00) == 0x0e217800 {
10152        return Some(InstructionKind::FCVTLAsimdmiscL {
10153            Q: Q as _,
10154            Rd: Rd as _,
10155            Rn: Rn as _,
10156            size: size as _,
10157        });
10158    }
10159    if (d & 0xbfbffc00) == 0x0e218800 {
10160        return Some(InstructionKind::FRINTNAsimdmiscR {
10161            Q: Q as _,
10162            Rd: Rd as _,
10163            Rn: Rn as _,
10164            size: size as _,
10165        });
10166    }
10167    if (d & 0xbfbffc00) == 0x0e219800 {
10168        return Some(InstructionKind::FRINTMAsimdmiscR {
10169            Q: Q as _,
10170            Rd: Rd as _,
10171            Rn: Rn as _,
10172            size: size as _,
10173        });
10174    }
10175    if (d & 0xbfbffc00) == 0x0e21a800 {
10176        return Some(InstructionKind::FCVTNSAsimdmiscR {
10177            Q: Q as _,
10178            Rd: Rd as _,
10179            Rn: Rn as _,
10180            size: size as _,
10181        });
10182    }
10183    if (d & 0xbfbffc00) == 0x0e21b800 {
10184        return Some(InstructionKind::FCVTMSAsimdmiscR {
10185            Q: Q as _,
10186            Rd: Rd as _,
10187            Rn: Rn as _,
10188            size: size as _,
10189        });
10190    }
10191    if (d & 0xbfbffc00) == 0x0e21c800 {
10192        return Some(InstructionKind::FCVTASAsimdmiscR {
10193            Q: Q as _,
10194            Rd: Rd as _,
10195            Rn: Rn as _,
10196            size: size as _,
10197        });
10198    }
10199    if (d & 0xbfbffc00) == 0x0e21d800 {
10200        return Some(InstructionKind::SCVTFAsimdmiscR {
10201            Q: Q as _,
10202            Rd: Rd as _,
10203            Rn: Rn as _,
10204            size: size as _,
10205        });
10206    }
10207    if (d & 0xbfbffc00) == 0x0ea0c800 {
10208        return Some(InstructionKind::FCMGTAsimdmiscFz {
10209            Q: Q as _,
10210            Rd: Rd as _,
10211            Rn: Rn as _,
10212            size: size as _,
10213        });
10214    }
10215    if (d & 0xbfbffc00) == 0x0ea0d800 {
10216        return Some(InstructionKind::FCMEQAsimdmiscFz {
10217            Q: Q as _,
10218            Rd: Rd as _,
10219            Rn: Rn as _,
10220            size: size as _,
10221        });
10222    }
10223    if (d & 0xbfbffc00) == 0x0ea0e800 {
10224        return Some(InstructionKind::FCMLTAsimdmiscFz {
10225            Q: Q as _,
10226            Rd: Rd as _,
10227            Rn: Rn as _,
10228            size: size as _,
10229        });
10230    }
10231    if (d & 0xbfbffc00) == 0x0ea0f800 {
10232        return Some(InstructionKind::FABSAsimdmiscR {
10233            Q: Q as _,
10234            Rd: Rd as _,
10235            Rn: Rn as _,
10236            size: size as _,
10237        });
10238    }
10239    if (d & 0xbfbffc00) == 0x0ea18800 {
10240        return Some(InstructionKind::FRINTPAsimdmiscR {
10241            Q: Q as _,
10242            Rd: Rd as _,
10243            Rn: Rn as _,
10244            size: size as _,
10245        });
10246    }
10247    if (d & 0xbfbffc00) == 0x0ea19800 {
10248        return Some(InstructionKind::FRINTZAsimdmiscR {
10249            Q: Q as _,
10250            Rd: Rd as _,
10251            Rn: Rn as _,
10252            size: size as _,
10253        });
10254    }
10255    if (d & 0xbfbffc00) == 0x0ea1a800 {
10256        return Some(InstructionKind::FCVTPSAsimdmiscR {
10257            Q: Q as _,
10258            Rd: Rd as _,
10259            Rn: Rn as _,
10260            size: size as _,
10261        });
10262    }
10263    if (d & 0xbfbffc00) == 0x0ea1b800 {
10264        return Some(InstructionKind::FCVTZSAsimdmiscR {
10265            Q: Q as _,
10266            Rd: Rd as _,
10267            Rn: Rn as _,
10268            size: size as _,
10269        });
10270    }
10271    if (d & 0xbfbffc00) == 0x0ea1c800 {
10272        return Some(InstructionKind::URECPEAsimdmiscR {
10273            Q: Q as _,
10274            Rd: Rd as _,
10275            Rn: Rn as _,
10276            size: size as _,
10277        });
10278    }
10279    if (d & 0xbfbffc00) == 0x0ea1d800 {
10280        return Some(InstructionKind::FRECPEAsimdmiscR {
10281            Q: Q as _,
10282            Rd: Rd as _,
10283            Rn: Rn as _,
10284            size: size as _,
10285        });
10286    }
10287    if (d & 0xbfbffc00) == 0x2e216800 {
10288        return Some(InstructionKind::FCVTXNAsimdmiscN {
10289            Q: Q as _,
10290            Rd: Rd as _,
10291            Rn: Rn as _,
10292            size: size as _,
10293        });
10294    }
10295    if (d & 0xbfbffc00) == 0x2e218800 {
10296        return Some(InstructionKind::FRINTAAsimdmiscR {
10297            Q: Q as _,
10298            Rd: Rd as _,
10299            Rn: Rn as _,
10300            size: size as _,
10301        });
10302    }
10303    if (d & 0xbfbffc00) == 0x2e219800 {
10304        return Some(InstructionKind::FRINTXAsimdmiscR {
10305            Q: Q as _,
10306            Rd: Rd as _,
10307            Rn: Rn as _,
10308            size: size as _,
10309        });
10310    }
10311    if (d & 0xbfbffc00) == 0x2e21a800 {
10312        return Some(InstructionKind::FCVTNUAsimdmiscR {
10313            Q: Q as _,
10314            Rd: Rd as _,
10315            Rn: Rn as _,
10316            size: size as _,
10317        });
10318    }
10319    if (d & 0xbfbffc00) == 0x2e21b800 {
10320        return Some(InstructionKind::FCVTMUAsimdmiscR {
10321            Q: Q as _,
10322            Rd: Rd as _,
10323            Rn: Rn as _,
10324            size: size as _,
10325        });
10326    }
10327    if (d & 0xbfbffc00) == 0x2e21c800 {
10328        return Some(InstructionKind::FCVTAUAsimdmiscR {
10329            Q: Q as _,
10330            Rd: Rd as _,
10331            Rn: Rn as _,
10332            size: size as _,
10333        });
10334    }
10335    if (d & 0xbfbffc00) == 0x2e21d800 {
10336        return Some(InstructionKind::UCVTFAsimdmiscR {
10337            Q: Q as _,
10338            Rd: Rd as _,
10339            Rn: Rn as _,
10340            size: size as _,
10341        });
10342    }
10343    if (d & 0xbfbffc00) == 0x2ea0c800 {
10344        return Some(InstructionKind::FCMGEAsimdmiscFz {
10345            Q: Q as _,
10346            Rd: Rd as _,
10347            Rn: Rn as _,
10348            size: size as _,
10349        });
10350    }
10351    if (d & 0xbfbffc00) == 0x2ea0d800 {
10352        return Some(InstructionKind::FCMLEAsimdmiscFz {
10353            Q: Q as _,
10354            Rd: Rd as _,
10355            Rn: Rn as _,
10356            size: size as _,
10357        });
10358    }
10359    if (d & 0xbfbffc00) == 0x2ea0f800 {
10360        return Some(InstructionKind::FNEGAsimdmiscR {
10361            Q: Q as _,
10362            Rd: Rd as _,
10363            Rn: Rn as _,
10364            size: size as _,
10365        });
10366    }
10367    if (d & 0xbfbffc00) == 0x2ea19800 {
10368        return Some(InstructionKind::FRINTIAsimdmiscR {
10369            Q: Q as _,
10370            Rd: Rd as _,
10371            Rn: Rn as _,
10372            size: size as _,
10373        });
10374    }
10375    if (d & 0xbfbffc00) == 0x2ea1a800 {
10376        return Some(InstructionKind::FCVTPUAsimdmiscR {
10377            Q: Q as _,
10378            Rd: Rd as _,
10379            Rn: Rn as _,
10380            size: size as _,
10381        });
10382    }
10383    if (d & 0xbfbffc00) == 0x2ea1b800 {
10384        return Some(InstructionKind::FCVTZUAsimdmiscR {
10385            Q: Q as _,
10386            Rd: Rd as _,
10387            Rn: Rn as _,
10388            size: size as _,
10389        });
10390    }
10391    if (d & 0xbfbffc00) == 0x2ea1c800 {
10392        return Some(InstructionKind::URSQRTEAsimdmiscR {
10393            Q: Q as _,
10394            Rd: Rd as _,
10395            Rn: Rn as _,
10396            size: size as _,
10397        });
10398    }
10399    if (d & 0xbfbffc00) == 0x2ea1d800 {
10400        return Some(InstructionKind::FRSQRTEAsimdmiscR {
10401            Q: Q as _,
10402            Rd: Rd as _,
10403            Rn: Rn as _,
10404            size: size as _,
10405        });
10406    }
10407    if (d & 0xbfbffc00) == 0x2ea1f800 {
10408        return Some(InstructionKind::FSQRTAsimdmiscR {
10409            Q: Q as _,
10410            Rd: Rd as _,
10411            Rn: Rn as _,
10412            size: size as _,
10413        });
10414    }
10415    if (d & 0xbf3ffc00) == 0x0e200800 {
10416        return Some(InstructionKind::REV64AsimdmiscR {
10417            Q: Q as _,
10418            Rd: Rd as _,
10419            Rn: Rn as _,
10420            size: size as _,
10421        });
10422    }
10423    if (d & 0xbf3ffc00) == 0x0e201800 {
10424        return Some(InstructionKind::REV16AsimdmiscR {
10425            Q: Q as _,
10426            Rd: Rd as _,
10427            Rn: Rn as _,
10428            size: size as _,
10429        });
10430    }
10431    if (d & 0xbf3ffc00) == 0x0e202800 {
10432        return Some(InstructionKind::SADDLPAsimdmiscP {
10433            Q: Q as _,
10434            Rd: Rd as _,
10435            Rn: Rn as _,
10436            size: size as _,
10437        });
10438    }
10439    if (d & 0xbf3ffc00) == 0x0e203800 {
10440        return Some(InstructionKind::SUQADDAsimdmiscR {
10441            Q: Q as _,
10442            Rd: Rd as _,
10443            Rn: Rn as _,
10444            size: size as _,
10445        });
10446    }
10447    if (d & 0xbf3ffc00) == 0x0e204800 {
10448        return Some(InstructionKind::CLSAsimdmiscR {
10449            Q: Q as _,
10450            Rd: Rd as _,
10451            Rn: Rn as _,
10452            size: size as _,
10453        });
10454    }
10455    if (d & 0xbf3ffc00) == 0x0e205800 {
10456        return Some(InstructionKind::CNTAsimdmiscR {
10457            Q: Q as _,
10458            Rd: Rd as _,
10459            Rn: Rn as _,
10460            size: size as _,
10461        });
10462    }
10463    if (d & 0xbf3ffc00) == 0x0e206800 {
10464        return Some(InstructionKind::SADALPAsimdmiscP {
10465            Q: Q as _,
10466            Rd: Rd as _,
10467            Rn: Rn as _,
10468            size: size as _,
10469        });
10470    }
10471    if (d & 0xbf3ffc00) == 0x0e207800 {
10472        return Some(InstructionKind::SQABSAsimdmiscR {
10473            Q: Q as _,
10474            Rd: Rd as _,
10475            Rn: Rn as _,
10476            size: size as _,
10477        });
10478    }
10479    if (d & 0xbf3ffc00) == 0x0e208800 {
10480        return Some(InstructionKind::CMGTAsimdmiscZ {
10481            Q: Q as _,
10482            Rd: Rd as _,
10483            Rn: Rn as _,
10484            size: size as _,
10485        });
10486    }
10487    if (d & 0xbf3ffc00) == 0x0e209800 {
10488        return Some(InstructionKind::CMEQAsimdmiscZ {
10489            Q: Q as _,
10490            Rd: Rd as _,
10491            Rn: Rn as _,
10492            size: size as _,
10493        });
10494    }
10495    if (d & 0xbf3ffc00) == 0x0e20a800 {
10496        return Some(InstructionKind::CMLTAsimdmiscZ {
10497            Q: Q as _,
10498            Rd: Rd as _,
10499            Rn: Rn as _,
10500            size: size as _,
10501        });
10502    }
10503    if (d & 0xbf3ffc00) == 0x0e20b800 {
10504        return Some(InstructionKind::ABSAsimdmiscR {
10505            Q: Q as _,
10506            Rd: Rd as _,
10507            Rn: Rn as _,
10508            size: size as _,
10509        });
10510    }
10511    if (d & 0xbf3ffc00) == 0x0e212800 {
10512        return Some(InstructionKind::XTNAsimdmiscN {
10513            Q: Q as _,
10514            Rd: Rd as _,
10515            Rn: Rn as _,
10516            size: size as _,
10517        });
10518    }
10519    if (d & 0xbf3ffc00) == 0x0e214800 {
10520        return Some(InstructionKind::SQXTNAsimdmiscN {
10521            Q: Q as _,
10522            Rd: Rd as _,
10523            Rn: Rn as _,
10524            size: size as _,
10525        });
10526    }
10527    if (d & 0xbf3ffc00) == 0x2e200800 {
10528        return Some(InstructionKind::REV32AsimdmiscR {
10529            Q: Q as _,
10530            Rd: Rd as _,
10531            Rn: Rn as _,
10532            size: size as _,
10533        });
10534    }
10535    if (d & 0xbf3ffc00) == 0x2e202800 {
10536        return Some(InstructionKind::UADDLPAsimdmiscP {
10537            Q: Q as _,
10538            Rd: Rd as _,
10539            Rn: Rn as _,
10540            size: size as _,
10541        });
10542    }
10543    if (d & 0xbf3ffc00) == 0x2e203800 {
10544        return Some(InstructionKind::USQADDAsimdmiscR {
10545            Q: Q as _,
10546            Rd: Rd as _,
10547            Rn: Rn as _,
10548            size: size as _,
10549        });
10550    }
10551    if (d & 0xbf3ffc00) == 0x2e204800 {
10552        return Some(InstructionKind::CLZAsimdmiscR {
10553            Q: Q as _,
10554            Rd: Rd as _,
10555            Rn: Rn as _,
10556            size: size as _,
10557        });
10558    }
10559    if (d & 0xbf3ffc00) == 0x2e206800 {
10560        return Some(InstructionKind::UADALPAsimdmiscP {
10561            Q: Q as _,
10562            Rd: Rd as _,
10563            Rn: Rn as _,
10564            size: size as _,
10565        });
10566    }
10567    if (d & 0xbf3ffc00) == 0x2e207800 {
10568        return Some(InstructionKind::SQNEGAsimdmiscR {
10569            Q: Q as _,
10570            Rd: Rd as _,
10571            Rn: Rn as _,
10572            size: size as _,
10573        });
10574    }
10575    if (d & 0xbf3ffc00) == 0x2e208800 {
10576        return Some(InstructionKind::CMGEAsimdmiscZ {
10577            Q: Q as _,
10578            Rd: Rd as _,
10579            Rn: Rn as _,
10580            size: size as _,
10581        });
10582    }
10583    if (d & 0xbf3ffc00) == 0x2e209800 {
10584        return Some(InstructionKind::CMLEAsimdmiscZ {
10585            Q: Q as _,
10586            Rd: Rd as _,
10587            Rn: Rn as _,
10588            size: size as _,
10589        });
10590    }
10591    if (d & 0xbf3ffc00) == 0x2e20b800 {
10592        return Some(InstructionKind::NEGAsimdmiscR {
10593            Q: Q as _,
10594            Rd: Rd as _,
10595            Rn: Rn as _,
10596            size: size as _,
10597        });
10598    }
10599    if (d & 0xbf3ffc00) == 0x2e212800 {
10600        return Some(InstructionKind::SQXTUNAsimdmiscN {
10601            Q: Q as _,
10602            Rd: Rd as _,
10603            Rn: Rn as _,
10604            size: size as _,
10605        });
10606    }
10607    if (d & 0xbf3ffc00) == 0x2e213800 {
10608        return Some(InstructionKind::SHLLAsimdmiscS {
10609            Q: Q as _,
10610            Rd: Rd as _,
10611            Rn: Rn as _,
10612            size: size as _,
10613        });
10614    }
10615    if (d & 0xbf3ffc00) == 0x2e214800 {
10616        return Some(InstructionKind::UQXTNAsimdmiscN {
10617            Q: Q as _,
10618            Rd: Rd as _,
10619            Rn: Rn as _,
10620            size: size as _,
10621        });
10622    }
10623    None
10624}
10625
10626pub const fn decode_asimdmiscfp16(d: u32) -> Option<InstructionKind> {
10627    ["Could not decode."][((d & 0x9f7e0c00) != 0x0e780800) as usize];
10628    let Q = (d >> 30) & 1;
10629    let Rd = d & 0x1F;
10630    let Rn = (d >> 5) & 0x1F;
10631    let U = (d >> 29) & 1;
10632    let a = (d >> 23) & 1;
10633    let opcode = (d >> 12) & 0x1F;
10634    if (d & 0xbffffc00) == 0x0e798800 {
10635        return Some(InstructionKind::FRINTNAsimdmiscfp16R {
10636            Q: Q as _,
10637            Rd: Rd as _,
10638            Rn: Rn as _,
10639        });
10640    }
10641    if (d & 0xbffffc00) == 0x0e799800 {
10642        return Some(InstructionKind::FRINTMAsimdmiscfp16R {
10643            Q: Q as _,
10644            Rd: Rd as _,
10645            Rn: Rn as _,
10646        });
10647    }
10648    if (d & 0xbffffc00) == 0x0e79a800 {
10649        return Some(InstructionKind::FCVTNSAsimdmiscfp16R {
10650            Q: Q as _,
10651            Rd: Rd as _,
10652            Rn: Rn as _,
10653        });
10654    }
10655    if (d & 0xbffffc00) == 0x0e79b800 {
10656        return Some(InstructionKind::FCVTMSAsimdmiscfp16R {
10657            Q: Q as _,
10658            Rd: Rd as _,
10659            Rn: Rn as _,
10660        });
10661    }
10662    if (d & 0xbffffc00) == 0x0e79c800 {
10663        return Some(InstructionKind::FCVTASAsimdmiscfp16R {
10664            Q: Q as _,
10665            Rd: Rd as _,
10666            Rn: Rn as _,
10667        });
10668    }
10669    if (d & 0xbffffc00) == 0x0e79d800 {
10670        return Some(InstructionKind::SCVTFAsimdmiscfp16R {
10671            Q: Q as _,
10672            Rd: Rd as _,
10673            Rn: Rn as _,
10674        });
10675    }
10676    if (d & 0xbffffc00) == 0x0ef8c800 {
10677        return Some(InstructionKind::FCMGTAsimdmiscfp16Fz {
10678            Q: Q as _,
10679            Rd: Rd as _,
10680            Rn: Rn as _,
10681        });
10682    }
10683    if (d & 0xbffffc00) == 0x0ef8d800 {
10684        return Some(InstructionKind::FCMEQAsimdmiscfp16Fz {
10685            Q: Q as _,
10686            Rd: Rd as _,
10687            Rn: Rn as _,
10688        });
10689    }
10690    if (d & 0xbffffc00) == 0x0ef8e800 {
10691        return Some(InstructionKind::FCMLTAsimdmiscfp16Fz {
10692            Q: Q as _,
10693            Rd: Rd as _,
10694            Rn: Rn as _,
10695        });
10696    }
10697    if (d & 0xbffffc00) == 0x0ef8f800 {
10698        return Some(InstructionKind::FABSAsimdmiscfp16R {
10699            Q: Q as _,
10700            Rd: Rd as _,
10701            Rn: Rn as _,
10702        });
10703    }
10704    if (d & 0xbffffc00) == 0x0ef98800 {
10705        return Some(InstructionKind::FRINTPAsimdmiscfp16R {
10706            Q: Q as _,
10707            Rd: Rd as _,
10708            Rn: Rn as _,
10709        });
10710    }
10711    if (d & 0xbffffc00) == 0x0ef99800 {
10712        return Some(InstructionKind::FRINTZAsimdmiscfp16R {
10713            Q: Q as _,
10714            Rd: Rd as _,
10715            Rn: Rn as _,
10716        });
10717    }
10718    if (d & 0xbffffc00) == 0x0ef9a800 {
10719        return Some(InstructionKind::FCVTPSAsimdmiscfp16R {
10720            Q: Q as _,
10721            Rd: Rd as _,
10722            Rn: Rn as _,
10723        });
10724    }
10725    if (d & 0xbffffc00) == 0x0ef9b800 {
10726        return Some(InstructionKind::FCVTZSAsimdmiscfp16R {
10727            Q: Q as _,
10728            Rd: Rd as _,
10729            Rn: Rn as _,
10730        });
10731    }
10732    if (d & 0xbffffc00) == 0x0ef9d800 {
10733        return Some(InstructionKind::FRECPEAsimdmiscfp16R {
10734            Q: Q as _,
10735            Rd: Rd as _,
10736            Rn: Rn as _,
10737        });
10738    }
10739    if (d & 0xbffffc00) == 0x2e798800 {
10740        return Some(InstructionKind::FRINTAAsimdmiscfp16R {
10741            Q: Q as _,
10742            Rd: Rd as _,
10743            Rn: Rn as _,
10744        });
10745    }
10746    if (d & 0xbffffc00) == 0x2e799800 {
10747        return Some(InstructionKind::FRINTXAsimdmiscfp16R {
10748            Q: Q as _,
10749            Rd: Rd as _,
10750            Rn: Rn as _,
10751        });
10752    }
10753    if (d & 0xbffffc00) == 0x2e79a800 {
10754        return Some(InstructionKind::FCVTNUAsimdmiscfp16R {
10755            Q: Q as _,
10756            Rd: Rd as _,
10757            Rn: Rn as _,
10758        });
10759    }
10760    if (d & 0xbffffc00) == 0x2e79b800 {
10761        return Some(InstructionKind::FCVTMUAsimdmiscfp16R {
10762            Q: Q as _,
10763            Rd: Rd as _,
10764            Rn: Rn as _,
10765        });
10766    }
10767    if (d & 0xbffffc00) == 0x2e79c800 {
10768        return Some(InstructionKind::FCVTAUAsimdmiscfp16R {
10769            Q: Q as _,
10770            Rd: Rd as _,
10771            Rn: Rn as _,
10772        });
10773    }
10774    if (d & 0xbffffc00) == 0x2e79d800 {
10775        return Some(InstructionKind::UCVTFAsimdmiscfp16R {
10776            Q: Q as _,
10777            Rd: Rd as _,
10778            Rn: Rn as _,
10779        });
10780    }
10781    if (d & 0xbffffc00) == 0x2ef8c800 {
10782        return Some(InstructionKind::FCMGEAsimdmiscfp16Fz {
10783            Q: Q as _,
10784            Rd: Rd as _,
10785            Rn: Rn as _,
10786        });
10787    }
10788    if (d & 0xbffffc00) == 0x2ef8d800 {
10789        return Some(InstructionKind::FCMLEAsimdmiscfp16Fz {
10790            Q: Q as _,
10791            Rd: Rd as _,
10792            Rn: Rn as _,
10793        });
10794    }
10795    if (d & 0xbffffc00) == 0x2ef8f800 {
10796        return Some(InstructionKind::FNEGAsimdmiscfp16R {
10797            Q: Q as _,
10798            Rd: Rd as _,
10799            Rn: Rn as _,
10800        });
10801    }
10802    if (d & 0xbffffc00) == 0x2ef99800 {
10803        return Some(InstructionKind::FRINTIAsimdmiscfp16R {
10804            Q: Q as _,
10805            Rd: Rd as _,
10806            Rn: Rn as _,
10807        });
10808    }
10809    if (d & 0xbffffc00) == 0x2ef9a800 {
10810        return Some(InstructionKind::FCVTPUAsimdmiscfp16R {
10811            Q: Q as _,
10812            Rd: Rd as _,
10813            Rn: Rn as _,
10814        });
10815    }
10816    if (d & 0xbffffc00) == 0x2ef9b800 {
10817        return Some(InstructionKind::FCVTZUAsimdmiscfp16R {
10818            Q: Q as _,
10819            Rd: Rd as _,
10820            Rn: Rn as _,
10821        });
10822    }
10823    if (d & 0xbffffc00) == 0x2ef9d800 {
10824        return Some(InstructionKind::FRSQRTEAsimdmiscfp16R {
10825            Q: Q as _,
10826            Rd: Rd as _,
10827            Rn: Rn as _,
10828        });
10829    }
10830    if (d & 0xbffffc00) == 0x2ef9f800 {
10831        return Some(InstructionKind::FSQRTAsimdmiscfp16R {
10832            Q: Q as _,
10833            Rd: Rd as _,
10834            Rn: Rn as _,
10835        });
10836    }
10837    None
10838}
10839
10840pub const fn decode_asimdelem(d: u32) -> Option<InstructionKind> {
10841    ["Could not decode."][((d & 0x9f000400) != 0x0f000000) as usize];
10842    let H = (d >> 11) & 1;
10843    let L = (d >> 21) & 1;
10844    let M = (d >> 20) & 1;
10845    let Q = (d >> 30) & 1;
10846    let Rd = d & 0x1F;
10847    let Rm = (d >> 16) & 0xF;
10848    let Rn = (d >> 5) & 0x1F;
10849    let U = (d >> 29) & 1;
10850    let opcode = (d >> 12) & 0xF;
10851    let size = (d >> 22) & 3;
10852    if (d & 0xbfc0f400) == 0x0f001000 {
10853        return Some(InstructionKind::FMLAAsimdelemRhH {
10854            H: H as _,
10855            L: L as _,
10856            M: M as _,
10857            Q: Q as _,
10858            Rd: Rd as _,
10859            Rm: Rm as _,
10860            Rn: Rn as _,
10861        });
10862    }
10863    if (d & 0xbfc0f400) == 0x0f005000 {
10864        return Some(InstructionKind::FMLSAsimdelemRhH {
10865            H: H as _,
10866            L: L as _,
10867            M: M as _,
10868            Q: Q as _,
10869            Rd: Rd as _,
10870            Rm: Rm as _,
10871            Rn: Rn as _,
10872        });
10873    }
10874    if (d & 0xbfc0f400) == 0x0f009000 {
10875        return Some(InstructionKind::FMULAsimdelemRhH {
10876            H: H as _,
10877            L: L as _,
10878            M: M as _,
10879            Q: Q as _,
10880            Rd: Rd as _,
10881            Rm: Rm as _,
10882            Rn: Rn as _,
10883        });
10884    }
10885    if (d & 0xbfc0f400) == 0x2f009000 {
10886        return Some(InstructionKind::FMULXAsimdelemRhH {
10887            H: H as _,
10888            L: L as _,
10889            M: M as _,
10890            Q: Q as _,
10891            Rd: Rd as _,
10892            Rm: Rm as _,
10893            Rn: Rn as _,
10894        });
10895    }
10896    if (d & 0xbf80f400) == 0x0f801000 {
10897        return Some(InstructionKind::FMLAAsimdelemRSd {
10898            H: H as _,
10899            L: L as _,
10900            M: M as _,
10901            Q: Q as _,
10902            Rd: Rd as _,
10903            Rm: Rm as _,
10904            Rn: Rn as _,
10905            size: size as _,
10906        });
10907    }
10908    if (d & 0xbf80f400) == 0x0f805000 {
10909        return Some(InstructionKind::FMLSAsimdelemRSd {
10910            H: H as _,
10911            L: L as _,
10912            M: M as _,
10913            Q: Q as _,
10914            Rd: Rd as _,
10915            Rm: Rm as _,
10916            Rn: Rn as _,
10917            size: size as _,
10918        });
10919    }
10920    if (d & 0xbf80f400) == 0x0f809000 {
10921        return Some(InstructionKind::FMULAsimdelemRSd {
10922            H: H as _,
10923            L: L as _,
10924            M: M as _,
10925            Q: Q as _,
10926            Rd: Rd as _,
10927            Rm: Rm as _,
10928            Rn: Rn as _,
10929            size: size as _,
10930        });
10931    }
10932    if (d & 0xbf80f400) == 0x2f809000 {
10933        return Some(InstructionKind::FMULXAsimdelemRSd {
10934            H: H as _,
10935            L: L as _,
10936            M: M as _,
10937            Q: Q as _,
10938            Rd: Rd as _,
10939            Rm: Rm as _,
10940            Rn: Rn as _,
10941            size: size as _,
10942        });
10943    }
10944    if (d & 0xbf00f400) == 0x0f002000 {
10945        return Some(InstructionKind::SMLALAsimdelemL {
10946            H: H as _,
10947            L: L as _,
10948            M: M as _,
10949            Q: Q as _,
10950            Rd: Rd as _,
10951            Rm: Rm as _,
10952            Rn: Rn as _,
10953            size: size as _,
10954        });
10955    }
10956    if (d & 0xbf00f400) == 0x0f003000 {
10957        return Some(InstructionKind::SQDMLALAsimdelemL {
10958            H: H as _,
10959            L: L as _,
10960            M: M as _,
10961            Q: Q as _,
10962            Rd: Rd as _,
10963            Rm: Rm as _,
10964            Rn: Rn as _,
10965            size: size as _,
10966        });
10967    }
10968    if (d & 0xbf00f400) == 0x0f006000 {
10969        return Some(InstructionKind::SMLSLAsimdelemL {
10970            H: H as _,
10971            L: L as _,
10972            M: M as _,
10973            Q: Q as _,
10974            Rd: Rd as _,
10975            Rm: Rm as _,
10976            Rn: Rn as _,
10977            size: size as _,
10978        });
10979    }
10980    if (d & 0xbf00f400) == 0x0f007000 {
10981        return Some(InstructionKind::SQDMLSLAsimdelemL {
10982            H: H as _,
10983            L: L as _,
10984            M: M as _,
10985            Q: Q as _,
10986            Rd: Rd as _,
10987            Rm: Rm as _,
10988            Rn: Rn as _,
10989            size: size as _,
10990        });
10991    }
10992    if (d & 0xbf00f400) == 0x0f008000 {
10993        return Some(InstructionKind::MULAsimdelemR {
10994            H: H as _,
10995            L: L as _,
10996            M: M as _,
10997            Q: Q as _,
10998            Rd: Rd as _,
10999            Rm: Rm as _,
11000            Rn: Rn as _,
11001            size: size as _,
11002        });
11003    }
11004    if (d & 0xbf00f400) == 0x0f00a000 {
11005        return Some(InstructionKind::SMULLAsimdelemL {
11006            H: H as _,
11007            L: L as _,
11008            M: M as _,
11009            Q: Q as _,
11010            Rd: Rd as _,
11011            Rm: Rm as _,
11012            Rn: Rn as _,
11013            size: size as _,
11014        });
11015    }
11016    if (d & 0xbf00f400) == 0x0f00b000 {
11017        return Some(InstructionKind::SQDMULLAsimdelemL {
11018            H: H as _,
11019            L: L as _,
11020            M: M as _,
11021            Q: Q as _,
11022            Rd: Rd as _,
11023            Rm: Rm as _,
11024            Rn: Rn as _,
11025            size: size as _,
11026        });
11027    }
11028    if (d & 0xbf00f400) == 0x0f00c000 {
11029        return Some(InstructionKind::SQDMULHAsimdelemR {
11030            H: H as _,
11031            L: L as _,
11032            M: M as _,
11033            Q: Q as _,
11034            Rd: Rd as _,
11035            Rm: Rm as _,
11036            Rn: Rn as _,
11037            size: size as _,
11038        });
11039    }
11040    if (d & 0xbf00f400) == 0x0f00d000 {
11041        return Some(InstructionKind::SQRDMULHAsimdelemR {
11042            H: H as _,
11043            L: L as _,
11044            M: M as _,
11045            Q: Q as _,
11046            Rd: Rd as _,
11047            Rm: Rm as _,
11048            Rn: Rn as _,
11049            size: size as _,
11050        });
11051    }
11052    if (d & 0xbf00f400) == 0x0f00e000 {
11053        return Some(InstructionKind::SDOTAsimdelemD {
11054            H: H as _,
11055            L: L as _,
11056            M: M as _,
11057            Q: Q as _,
11058            Rd: Rd as _,
11059            Rm: Rm as _,
11060            Rn: Rn as _,
11061            size: size as _,
11062        });
11063    }
11064    if (d & 0xbf00f400) == 0x2f000000 {
11065        return Some(InstructionKind::MLAAsimdelemR {
11066            H: H as _,
11067            L: L as _,
11068            M: M as _,
11069            Q: Q as _,
11070            Rd: Rd as _,
11071            Rm: Rm as _,
11072            Rn: Rn as _,
11073            size: size as _,
11074        });
11075    }
11076    if (d & 0xbf00f400) == 0x2f002000 {
11077        return Some(InstructionKind::UMLALAsimdelemL {
11078            H: H as _,
11079            L: L as _,
11080            M: M as _,
11081            Q: Q as _,
11082            Rd: Rd as _,
11083            Rm: Rm as _,
11084            Rn: Rn as _,
11085            size: size as _,
11086        });
11087    }
11088    if (d & 0xbf00f400) == 0x2f004000 {
11089        return Some(InstructionKind::MLSAsimdelemR {
11090            H: H as _,
11091            L: L as _,
11092            M: M as _,
11093            Q: Q as _,
11094            Rd: Rd as _,
11095            Rm: Rm as _,
11096            Rn: Rn as _,
11097            size: size as _,
11098        });
11099    }
11100    if (d & 0xbf00f400) == 0x2f006000 {
11101        return Some(InstructionKind::UMLSLAsimdelemL {
11102            H: H as _,
11103            L: L as _,
11104            M: M as _,
11105            Q: Q as _,
11106            Rd: Rd as _,
11107            Rm: Rm as _,
11108            Rn: Rn as _,
11109            size: size as _,
11110        });
11111    }
11112    if (d & 0xbf00f400) == 0x2f00a000 {
11113        return Some(InstructionKind::UMULLAsimdelemL {
11114            H: H as _,
11115            L: L as _,
11116            M: M as _,
11117            Q: Q as _,
11118            Rd: Rd as _,
11119            Rm: Rm as _,
11120            Rn: Rn as _,
11121            size: size as _,
11122        });
11123    }
11124    if (d & 0xbf00f400) == 0x2f00d000 {
11125        return Some(InstructionKind::SQRDMLAHAsimdelemR {
11126            H: H as _,
11127            L: L as _,
11128            M: M as _,
11129            Q: Q as _,
11130            Rd: Rd as _,
11131            Rm: Rm as _,
11132            Rn: Rn as _,
11133            size: size as _,
11134        });
11135    }
11136    if (d & 0xbf00f400) == 0x2f00e000 {
11137        return Some(InstructionKind::UDOTAsimdelemD {
11138            H: H as _,
11139            L: L as _,
11140            M: M as _,
11141            Q: Q as _,
11142            Rd: Rd as _,
11143            Rm: Rm as _,
11144            Rn: Rn as _,
11145            size: size as _,
11146        });
11147    }
11148    if (d & 0xbf00f400) == 0x2f00f000 {
11149        return Some(InstructionKind::SQRDMLSHAsimdelemR {
11150            H: H as _,
11151            L: L as _,
11152            M: M as _,
11153            Q: Q as _,
11154            Rd: Rd as _,
11155            Rm: Rm as _,
11156            Rn: Rn as _,
11157            size: size as _,
11158        });
11159    }
11160    if (d & 0xbfc09400) == 0x2f401000 {
11161        return Some(InstructionKind::FCMLAAsimdelemCH {
11162            H: H as _,
11163            L: L as _,
11164            M: M as _,
11165            Q: Q as _,
11166            Rd: Rd as _,
11167            Rm: Rm as _,
11168            Rn: Rn as _,
11169            opcode: opcode as _,
11170        });
11171    }
11172    if (d & 0xbfc09400) == 0x2f801000 {
11173        return Some(InstructionKind::FCMLAAsimdelemCS {
11174            H: H as _,
11175            L: L as _,
11176            M: M as _,
11177            Q: Q as _,
11178            Rd: Rd as _,
11179            Rm: Rm as _,
11180            Rn: Rn as _,
11181            opcode: opcode as _,
11182        });
11183    }
11184    None
11185}
11186
11187pub const fn decode_float2fix(d: u32) -> Option<InstructionKind> {
11188    ["Could not decode."][((d & 0x5f200000) != 0x1e000000) as usize];
11189    let Rd = d & 0x1F;
11190    let Rn = (d >> 5) & 0x1F;
11191    let S = (d >> 29) & 1;
11192    let opcode = (d >> 16) & 7;
11193    let rmode = (d >> 19) & 3;
11194    let scale = (d >> 10) & 0x3F;
11195    let sf = (d >> 31) & 1;
11196    let kind = (d >> 22) & 3;
11197    if (d & 0xffff0000) == 0x1e020000 {
11198        return Some(InstructionKind::SCVTFS32Float2Fix {
11199            Rd: Rd as _,
11200            Rn: Rn as _,
11201            scale: scale as _,
11202        });
11203    }
11204    if (d & 0xffff0000) == 0x1e030000 {
11205        return Some(InstructionKind::UCVTFS32Float2Fix {
11206            Rd: Rd as _,
11207            Rn: Rn as _,
11208            scale: scale as _,
11209        });
11210    }
11211    if (d & 0xffff0000) == 0x1e180000 {
11212        return Some(InstructionKind::FCVTZS32SFloat2Fix {
11213            Rd: Rd as _,
11214            Rn: Rn as _,
11215            scale: scale as _,
11216        });
11217    }
11218    if (d & 0xffff0000) == 0x1e190000 {
11219        return Some(InstructionKind::FCVTZU32SFloat2Fix {
11220            Rd: Rd as _,
11221            Rn: Rn as _,
11222            scale: scale as _,
11223        });
11224    }
11225    if (d & 0xffff0000) == 0x1e420000 {
11226        return Some(InstructionKind::SCVTFD32Float2Fix {
11227            Rd: Rd as _,
11228            Rn: Rn as _,
11229            scale: scale as _,
11230        });
11231    }
11232    if (d & 0xffff0000) == 0x1e430000 {
11233        return Some(InstructionKind::UCVTFD32Float2Fix {
11234            Rd: Rd as _,
11235            Rn: Rn as _,
11236            scale: scale as _,
11237        });
11238    }
11239    if (d & 0xffff0000) == 0x1e580000 {
11240        return Some(InstructionKind::FCVTZS32DFloat2Fix {
11241            Rd: Rd as _,
11242            Rn: Rn as _,
11243            scale: scale as _,
11244        });
11245    }
11246    if (d & 0xffff0000) == 0x1e590000 {
11247        return Some(InstructionKind::FCVTZU32DFloat2Fix {
11248            Rd: Rd as _,
11249            Rn: Rn as _,
11250            scale: scale as _,
11251        });
11252    }
11253    if (d & 0xffff0000) == 0x1ec20000 {
11254        return Some(InstructionKind::SCVTFH32Float2Fix {
11255            Rd: Rd as _,
11256            Rn: Rn as _,
11257            scale: scale as _,
11258        });
11259    }
11260    if (d & 0xffff0000) == 0x1ec30000 {
11261        return Some(InstructionKind::UCVTFH32Float2Fix {
11262            Rd: Rd as _,
11263            Rn: Rn as _,
11264            scale: scale as _,
11265        });
11266    }
11267    if (d & 0xffff0000) == 0x1ed80000 {
11268        return Some(InstructionKind::FCVTZS32HFloat2Fix {
11269            Rd: Rd as _,
11270            Rn: Rn as _,
11271            scale: scale as _,
11272        });
11273    }
11274    if (d & 0xffff0000) == 0x1ed90000 {
11275        return Some(InstructionKind::FCVTZU32HFloat2Fix {
11276            Rd: Rd as _,
11277            Rn: Rn as _,
11278            scale: scale as _,
11279        });
11280    }
11281    if (d & 0xffff0000) == 0x9e020000 {
11282        return Some(InstructionKind::SCVTFS64Float2Fix {
11283            Rd: Rd as _,
11284            Rn: Rn as _,
11285            scale: scale as _,
11286        });
11287    }
11288    if (d & 0xffff0000) == 0x9e030000 {
11289        return Some(InstructionKind::UCVTFS64Float2Fix {
11290            Rd: Rd as _,
11291            Rn: Rn as _,
11292            scale: scale as _,
11293        });
11294    }
11295    if (d & 0xffff0000) == 0x9e180000 {
11296        return Some(InstructionKind::FCVTZS64SFloat2Fix {
11297            Rd: Rd as _,
11298            Rn: Rn as _,
11299            scale: scale as _,
11300        });
11301    }
11302    if (d & 0xffff0000) == 0x9e190000 {
11303        return Some(InstructionKind::FCVTZU64SFloat2Fix {
11304            Rd: Rd as _,
11305            Rn: Rn as _,
11306            scale: scale as _,
11307        });
11308    }
11309    if (d & 0xffff0000) == 0x9e420000 {
11310        return Some(InstructionKind::SCVTFD64Float2Fix {
11311            Rd: Rd as _,
11312            Rn: Rn as _,
11313            scale: scale as _,
11314        });
11315    }
11316    if (d & 0xffff0000) == 0x9e430000 {
11317        return Some(InstructionKind::UCVTFD64Float2Fix {
11318            Rd: Rd as _,
11319            Rn: Rn as _,
11320            scale: scale as _,
11321        });
11322    }
11323    if (d & 0xffff0000) == 0x9e580000 {
11324        return Some(InstructionKind::FCVTZS64DFloat2Fix {
11325            Rd: Rd as _,
11326            Rn: Rn as _,
11327            scale: scale as _,
11328        });
11329    }
11330    if (d & 0xffff0000) == 0x9e590000 {
11331        return Some(InstructionKind::FCVTZU64DFloat2Fix {
11332            Rd: Rd as _,
11333            Rn: Rn as _,
11334            scale: scale as _,
11335        });
11336    }
11337    if (d & 0xffff0000) == 0x9ec20000 {
11338        return Some(InstructionKind::SCVTFH64Float2Fix {
11339            Rd: Rd as _,
11340            Rn: Rn as _,
11341            scale: scale as _,
11342        });
11343    }
11344    if (d & 0xffff0000) == 0x9ec30000 {
11345        return Some(InstructionKind::UCVTFH64Float2Fix {
11346            Rd: Rd as _,
11347            Rn: Rn as _,
11348            scale: scale as _,
11349        });
11350    }
11351    if (d & 0xffff0000) == 0x9ed80000 {
11352        return Some(InstructionKind::FCVTZS64HFloat2Fix {
11353            Rd: Rd as _,
11354            Rn: Rn as _,
11355            scale: scale as _,
11356        });
11357    }
11358    if (d & 0xffff0000) == 0x9ed90000 {
11359        return Some(InstructionKind::FCVTZU64HFloat2Fix {
11360            Rd: Rd as _,
11361            Rn: Rn as _,
11362            scale: scale as _,
11363        });
11364    }
11365    None
11366}
11367
11368pub const fn decode_float2int(d: u32) -> Option<InstructionKind> {
11369    ["Could not decode."][((d & 0x5f20fc00) != 0x1e200000) as usize];
11370    let Rd = d & 0x1F;
11371    let Rn = (d >> 5) & 0x1F;
11372    let S = (d >> 29) & 1;
11373    let opcode = (d >> 16) & 7;
11374    let rmode = (d >> 19) & 3;
11375    let sf = (d >> 31) & 1;
11376    let kind = (d >> 22) & 3;
11377    if (d & 0xfffffc00) == 0x1e200000 {
11378        return Some(InstructionKind::FCVTNS32SFloat2Int {
11379            Rd: Rd as _,
11380            Rn: Rn as _,
11381        });
11382    }
11383    if (d & 0xfffffc00) == 0x1e210000 {
11384        return Some(InstructionKind::FCVTNU32SFloat2Int {
11385            Rd: Rd as _,
11386            Rn: Rn as _,
11387        });
11388    }
11389    if (d & 0xfffffc00) == 0x1e220000 {
11390        return Some(InstructionKind::SCVTFS32Float2Int {
11391            Rd: Rd as _,
11392            Rn: Rn as _,
11393        });
11394    }
11395    if (d & 0xfffffc00) == 0x1e230000 {
11396        return Some(InstructionKind::UCVTFS32Float2Int {
11397            Rd: Rd as _,
11398            Rn: Rn as _,
11399        });
11400    }
11401    if (d & 0xfffffc00) == 0x1e240000 {
11402        return Some(InstructionKind::FCVTAS32SFloat2Int {
11403            Rd: Rd as _,
11404            Rn: Rn as _,
11405        });
11406    }
11407    if (d & 0xfffffc00) == 0x1e250000 {
11408        return Some(InstructionKind::FCVTAU32SFloat2Int {
11409            Rd: Rd as _,
11410            Rn: Rn as _,
11411        });
11412    }
11413    if (d & 0xfffffc00) == 0x1e260000 {
11414        return Some(InstructionKind::FMOV32SFloat2Int {
11415            Rd: Rd as _,
11416            Rn: Rn as _,
11417        });
11418    }
11419    if (d & 0xfffffc00) == 0x1e270000 {
11420        return Some(InstructionKind::FMOVS32Float2Int {
11421            Rd: Rd as _,
11422            Rn: Rn as _,
11423        });
11424    }
11425    if (d & 0xfffffc00) == 0x1e280000 {
11426        return Some(InstructionKind::FCVTPS32SFloat2Int {
11427            Rd: Rd as _,
11428            Rn: Rn as _,
11429        });
11430    }
11431    if (d & 0xfffffc00) == 0x1e290000 {
11432        return Some(InstructionKind::FCVTPU32SFloat2Int {
11433            Rd: Rd as _,
11434            Rn: Rn as _,
11435        });
11436    }
11437    if (d & 0xfffffc00) == 0x1e300000 {
11438        return Some(InstructionKind::FCVTMS32SFloat2Int {
11439            Rd: Rd as _,
11440            Rn: Rn as _,
11441        });
11442    }
11443    if (d & 0xfffffc00) == 0x1e310000 {
11444        return Some(InstructionKind::FCVTMU32SFloat2Int {
11445            Rd: Rd as _,
11446            Rn: Rn as _,
11447        });
11448    }
11449    if (d & 0xfffffc00) == 0x1e380000 {
11450        return Some(InstructionKind::FCVTZS32SFloat2Int {
11451            Rd: Rd as _,
11452            Rn: Rn as _,
11453        });
11454    }
11455    if (d & 0xfffffc00) == 0x1e390000 {
11456        return Some(InstructionKind::FCVTZU32SFloat2Int {
11457            Rd: Rd as _,
11458            Rn: Rn as _,
11459        });
11460    }
11461    if (d & 0xfffffc00) == 0x1e600000 {
11462        return Some(InstructionKind::FCVTNS32DFloat2Int {
11463            Rd: Rd as _,
11464            Rn: Rn as _,
11465        });
11466    }
11467    if (d & 0xfffffc00) == 0x1e610000 {
11468        return Some(InstructionKind::FCVTNU32DFloat2Int {
11469            Rd: Rd as _,
11470            Rn: Rn as _,
11471        });
11472    }
11473    if (d & 0xfffffc00) == 0x1e620000 {
11474        return Some(InstructionKind::SCVTFD32Float2Int {
11475            Rd: Rd as _,
11476            Rn: Rn as _,
11477        });
11478    }
11479    if (d & 0xfffffc00) == 0x1e630000 {
11480        return Some(InstructionKind::UCVTFD32Float2Int {
11481            Rd: Rd as _,
11482            Rn: Rn as _,
11483        });
11484    }
11485    if (d & 0xfffffc00) == 0x1e640000 {
11486        return Some(InstructionKind::FCVTAS32DFloat2Int {
11487            Rd: Rd as _,
11488            Rn: Rn as _,
11489        });
11490    }
11491    if (d & 0xfffffc00) == 0x1e650000 {
11492        return Some(InstructionKind::FCVTAU32DFloat2Int {
11493            Rd: Rd as _,
11494            Rn: Rn as _,
11495        });
11496    }
11497    if (d & 0xfffffc00) == 0x1e680000 {
11498        return Some(InstructionKind::FCVTPS32DFloat2Int {
11499            Rd: Rd as _,
11500            Rn: Rn as _,
11501        });
11502    }
11503    if (d & 0xfffffc00) == 0x1e690000 {
11504        return Some(InstructionKind::FCVTPU32DFloat2Int {
11505            Rd: Rd as _,
11506            Rn: Rn as _,
11507        });
11508    }
11509    if (d & 0xfffffc00) == 0x1e700000 {
11510        return Some(InstructionKind::FCVTMS32DFloat2Int {
11511            Rd: Rd as _,
11512            Rn: Rn as _,
11513        });
11514    }
11515    if (d & 0xfffffc00) == 0x1e710000 {
11516        return Some(InstructionKind::FCVTMU32DFloat2Int {
11517            Rd: Rd as _,
11518            Rn: Rn as _,
11519        });
11520    }
11521    if (d & 0xfffffc00) == 0x1e780000 {
11522        return Some(InstructionKind::FCVTZS32DFloat2Int {
11523            Rd: Rd as _,
11524            Rn: Rn as _,
11525        });
11526    }
11527    if (d & 0xfffffc00) == 0x1e790000 {
11528        return Some(InstructionKind::FCVTZU32DFloat2Int {
11529            Rd: Rd as _,
11530            Rn: Rn as _,
11531        });
11532    }
11533    if (d & 0xfffffc00) == 0x1e7e0000 {
11534        return Some(InstructionKind::FJCVTZS32DFloat2Int {
11535            Rd: Rd as _,
11536            Rn: Rn as _,
11537        });
11538    }
11539    if (d & 0xfffffc00) == 0x1ee00000 {
11540        return Some(InstructionKind::FCVTNS32HFloat2Int {
11541            Rd: Rd as _,
11542            Rn: Rn as _,
11543        });
11544    }
11545    if (d & 0xfffffc00) == 0x1ee10000 {
11546        return Some(InstructionKind::FCVTNU32HFloat2Int {
11547            Rd: Rd as _,
11548            Rn: Rn as _,
11549        });
11550    }
11551    if (d & 0xfffffc00) == 0x1ee20000 {
11552        return Some(InstructionKind::SCVTFH32Float2Int {
11553            Rd: Rd as _,
11554            Rn: Rn as _,
11555        });
11556    }
11557    if (d & 0xfffffc00) == 0x1ee30000 {
11558        return Some(InstructionKind::UCVTFH32Float2Int {
11559            Rd: Rd as _,
11560            Rn: Rn as _,
11561        });
11562    }
11563    if (d & 0xfffffc00) == 0x1ee40000 {
11564        return Some(InstructionKind::FCVTAS32HFloat2Int {
11565            Rd: Rd as _,
11566            Rn: Rn as _,
11567        });
11568    }
11569    if (d & 0xfffffc00) == 0x1ee50000 {
11570        return Some(InstructionKind::FCVTAU32HFloat2Int {
11571            Rd: Rd as _,
11572            Rn: Rn as _,
11573        });
11574    }
11575    if (d & 0xfffffc00) == 0x1ee60000 {
11576        return Some(InstructionKind::FMOV32HFloat2Int {
11577            Rd: Rd as _,
11578            Rn: Rn as _,
11579        });
11580    }
11581    if (d & 0xfffffc00) == 0x1ee70000 {
11582        return Some(InstructionKind::FMOVH32Float2Int {
11583            Rd: Rd as _,
11584            Rn: Rn as _,
11585        });
11586    }
11587    if (d & 0xfffffc00) == 0x1ee80000 {
11588        return Some(InstructionKind::FCVTPS32HFloat2Int {
11589            Rd: Rd as _,
11590            Rn: Rn as _,
11591        });
11592    }
11593    if (d & 0xfffffc00) == 0x1ee90000 {
11594        return Some(InstructionKind::FCVTPU32HFloat2Int {
11595            Rd: Rd as _,
11596            Rn: Rn as _,
11597        });
11598    }
11599    if (d & 0xfffffc00) == 0x1ef00000 {
11600        return Some(InstructionKind::FCVTMS32HFloat2Int {
11601            Rd: Rd as _,
11602            Rn: Rn as _,
11603        });
11604    }
11605    if (d & 0xfffffc00) == 0x1ef10000 {
11606        return Some(InstructionKind::FCVTMU32HFloat2Int {
11607            Rd: Rd as _,
11608            Rn: Rn as _,
11609        });
11610    }
11611    if (d & 0xfffffc00) == 0x1ef80000 {
11612        return Some(InstructionKind::FCVTZS32HFloat2Int {
11613            Rd: Rd as _,
11614            Rn: Rn as _,
11615        });
11616    }
11617    if (d & 0xfffffc00) == 0x1ef90000 {
11618        return Some(InstructionKind::FCVTZU32HFloat2Int {
11619            Rd: Rd as _,
11620            Rn: Rn as _,
11621        });
11622    }
11623    if (d & 0xfffffc00) == 0x9e200000 {
11624        return Some(InstructionKind::FCVTNS64SFloat2Int {
11625            Rd: Rd as _,
11626            Rn: Rn as _,
11627        });
11628    }
11629    if (d & 0xfffffc00) == 0x9e210000 {
11630        return Some(InstructionKind::FCVTNU64SFloat2Int {
11631            Rd: Rd as _,
11632            Rn: Rn as _,
11633        });
11634    }
11635    if (d & 0xfffffc00) == 0x9e220000 {
11636        return Some(InstructionKind::SCVTFS64Float2Int {
11637            Rd: Rd as _,
11638            Rn: Rn as _,
11639        });
11640    }
11641    if (d & 0xfffffc00) == 0x9e230000 {
11642        return Some(InstructionKind::UCVTFS64Float2Int {
11643            Rd: Rd as _,
11644            Rn: Rn as _,
11645        });
11646    }
11647    if (d & 0xfffffc00) == 0x9e240000 {
11648        return Some(InstructionKind::FCVTAS64SFloat2Int {
11649            Rd: Rd as _,
11650            Rn: Rn as _,
11651        });
11652    }
11653    if (d & 0xfffffc00) == 0x9e250000 {
11654        return Some(InstructionKind::FCVTAU64SFloat2Int {
11655            Rd: Rd as _,
11656            Rn: Rn as _,
11657        });
11658    }
11659    if (d & 0xfffffc00) == 0x9e280000 {
11660        return Some(InstructionKind::FCVTPS64SFloat2Int {
11661            Rd: Rd as _,
11662            Rn: Rn as _,
11663        });
11664    }
11665    if (d & 0xfffffc00) == 0x9e290000 {
11666        return Some(InstructionKind::FCVTPU64SFloat2Int {
11667            Rd: Rd as _,
11668            Rn: Rn as _,
11669        });
11670    }
11671    if (d & 0xfffffc00) == 0x9e300000 {
11672        return Some(InstructionKind::FCVTMS64SFloat2Int {
11673            Rd: Rd as _,
11674            Rn: Rn as _,
11675        });
11676    }
11677    if (d & 0xfffffc00) == 0x9e310000 {
11678        return Some(InstructionKind::FCVTMU64SFloat2Int {
11679            Rd: Rd as _,
11680            Rn: Rn as _,
11681        });
11682    }
11683    if (d & 0xfffffc00) == 0x9e380000 {
11684        return Some(InstructionKind::FCVTZS64SFloat2Int {
11685            Rd: Rd as _,
11686            Rn: Rn as _,
11687        });
11688    }
11689    if (d & 0xfffffc00) == 0x9e390000 {
11690        return Some(InstructionKind::FCVTZU64SFloat2Int {
11691            Rd: Rd as _,
11692            Rn: Rn as _,
11693        });
11694    }
11695    if (d & 0xfffffc00) == 0x9e600000 {
11696        return Some(InstructionKind::FCVTNS64DFloat2Int {
11697            Rd: Rd as _,
11698            Rn: Rn as _,
11699        });
11700    }
11701    if (d & 0xfffffc00) == 0x9e610000 {
11702        return Some(InstructionKind::FCVTNU64DFloat2Int {
11703            Rd: Rd as _,
11704            Rn: Rn as _,
11705        });
11706    }
11707    if (d & 0xfffffc00) == 0x9e620000 {
11708        return Some(InstructionKind::SCVTFD64Float2Int {
11709            Rd: Rd as _,
11710            Rn: Rn as _,
11711        });
11712    }
11713    if (d & 0xfffffc00) == 0x9e630000 {
11714        return Some(InstructionKind::UCVTFD64Float2Int {
11715            Rd: Rd as _,
11716            Rn: Rn as _,
11717        });
11718    }
11719    if (d & 0xfffffc00) == 0x9e640000 {
11720        return Some(InstructionKind::FCVTAS64DFloat2Int {
11721            Rd: Rd as _,
11722            Rn: Rn as _,
11723        });
11724    }
11725    if (d & 0xfffffc00) == 0x9e650000 {
11726        return Some(InstructionKind::FCVTAU64DFloat2Int {
11727            Rd: Rd as _,
11728            Rn: Rn as _,
11729        });
11730    }
11731    if (d & 0xfffffc00) == 0x9e660000 {
11732        return Some(InstructionKind::FMOV64DFloat2Int {
11733            Rd: Rd as _,
11734            Rn: Rn as _,
11735        });
11736    }
11737    if (d & 0xfffffc00) == 0x9e670000 {
11738        return Some(InstructionKind::FMOVD64Float2Int {
11739            Rd: Rd as _,
11740            Rn: Rn as _,
11741        });
11742    }
11743    if (d & 0xfffffc00) == 0x9e680000 {
11744        return Some(InstructionKind::FCVTPS64DFloat2Int {
11745            Rd: Rd as _,
11746            Rn: Rn as _,
11747        });
11748    }
11749    if (d & 0xfffffc00) == 0x9e690000 {
11750        return Some(InstructionKind::FCVTPU64DFloat2Int {
11751            Rd: Rd as _,
11752            Rn: Rn as _,
11753        });
11754    }
11755    if (d & 0xfffffc00) == 0x9e700000 {
11756        return Some(InstructionKind::FCVTMS64DFloat2Int {
11757            Rd: Rd as _,
11758            Rn: Rn as _,
11759        });
11760    }
11761    if (d & 0xfffffc00) == 0x9e710000 {
11762        return Some(InstructionKind::FCVTMU64DFloat2Int {
11763            Rd: Rd as _,
11764            Rn: Rn as _,
11765        });
11766    }
11767    if (d & 0xfffffc00) == 0x9e780000 {
11768        return Some(InstructionKind::FCVTZS64DFloat2Int {
11769            Rd: Rd as _,
11770            Rn: Rn as _,
11771        });
11772    }
11773    if (d & 0xfffffc00) == 0x9e790000 {
11774        return Some(InstructionKind::FCVTZU64DFloat2Int {
11775            Rd: Rd as _,
11776            Rn: Rn as _,
11777        });
11778    }
11779    if (d & 0xfffffc00) == 0x9eae0000 {
11780        return Some(InstructionKind::FMOV64VxFloat2Int {
11781            Rd: Rd as _,
11782            Rn: Rn as _,
11783        });
11784    }
11785    if (d & 0xfffffc00) == 0x9eaf0000 {
11786        return Some(InstructionKind::FMOVV64IFloat2Int {
11787            Rd: Rd as _,
11788            Rn: Rn as _,
11789        });
11790    }
11791    if (d & 0xfffffc00) == 0x9ee00000 {
11792        return Some(InstructionKind::FCVTNS64HFloat2Int {
11793            Rd: Rd as _,
11794            Rn: Rn as _,
11795        });
11796    }
11797    if (d & 0xfffffc00) == 0x9ee10000 {
11798        return Some(InstructionKind::FCVTNU64HFloat2Int {
11799            Rd: Rd as _,
11800            Rn: Rn as _,
11801        });
11802    }
11803    if (d & 0xfffffc00) == 0x9ee20000 {
11804        return Some(InstructionKind::SCVTFH64Float2Int {
11805            Rd: Rd as _,
11806            Rn: Rn as _,
11807        });
11808    }
11809    if (d & 0xfffffc00) == 0x9ee30000 {
11810        return Some(InstructionKind::UCVTFH64Float2Int {
11811            Rd: Rd as _,
11812            Rn: Rn as _,
11813        });
11814    }
11815    if (d & 0xfffffc00) == 0x9ee40000 {
11816        return Some(InstructionKind::FCVTAS64HFloat2Int {
11817            Rd: Rd as _,
11818            Rn: Rn as _,
11819        });
11820    }
11821    if (d & 0xfffffc00) == 0x9ee50000 {
11822        return Some(InstructionKind::FCVTAU64HFloat2Int {
11823            Rd: Rd as _,
11824            Rn: Rn as _,
11825        });
11826    }
11827    if (d & 0xfffffc00) == 0x9ee60000 {
11828        return Some(InstructionKind::FMOV64HFloat2Int {
11829            Rd: Rd as _,
11830            Rn: Rn as _,
11831        });
11832    }
11833    if (d & 0xfffffc00) == 0x9ee70000 {
11834        return Some(InstructionKind::FMOVH64Float2Int {
11835            Rd: Rd as _,
11836            Rn: Rn as _,
11837        });
11838    }
11839    if (d & 0xfffffc00) == 0x9ee80000 {
11840        return Some(InstructionKind::FCVTPS64HFloat2Int {
11841            Rd: Rd as _,
11842            Rn: Rn as _,
11843        });
11844    }
11845    if (d & 0xfffffc00) == 0x9ee90000 {
11846        return Some(InstructionKind::FCVTPU64HFloat2Int {
11847            Rd: Rd as _,
11848            Rn: Rn as _,
11849        });
11850    }
11851    if (d & 0xfffffc00) == 0x9ef00000 {
11852        return Some(InstructionKind::FCVTMS64HFloat2Int {
11853            Rd: Rd as _,
11854            Rn: Rn as _,
11855        });
11856    }
11857    if (d & 0xfffffc00) == 0x9ef10000 {
11858        return Some(InstructionKind::FCVTMU64HFloat2Int {
11859            Rd: Rd as _,
11860            Rn: Rn as _,
11861        });
11862    }
11863    if (d & 0xfffffc00) == 0x9ef80000 {
11864        return Some(InstructionKind::FCVTZS64HFloat2Int {
11865            Rd: Rd as _,
11866            Rn: Rn as _,
11867        });
11868    }
11869    if (d & 0xfffffc00) == 0x9ef90000 {
11870        return Some(InstructionKind::FCVTZU64HFloat2Int {
11871            Rd: Rd as _,
11872            Rn: Rn as _,
11873        });
11874    }
11875    None
11876}
11877
11878pub const fn decode_cryptoaes(d: u32) -> Option<InstructionKind> {
11879    ["Could not decode."][((d & 0xff3e0c00) != 0x4e280800) as usize];
11880    let Rd = d & 0x1F;
11881    let Rn = (d >> 5) & 0x1F;
11882    let opcode = (d >> 12) & 0x1F;
11883    let size = (d >> 22) & 3;
11884    if (d & 0xfffffc00) == 0x4e284800 {
11885        return Some(InstructionKind::AESEBCryptoaes {
11886            Rd: Rd as _,
11887            Rn: Rn as _,
11888        });
11889    }
11890    if (d & 0xfffffc00) == 0x4e285800 {
11891        return Some(InstructionKind::AESDBCryptoaes {
11892            Rd: Rd as _,
11893            Rn: Rn as _,
11894        });
11895    }
11896    if (d & 0xfffffc00) == 0x4e286800 {
11897        return Some(InstructionKind::AESMCBCryptoaes {
11898            Rd: Rd as _,
11899            Rn: Rn as _,
11900        });
11901    }
11902    if (d & 0xfffffc00) == 0x4e287800 {
11903        return Some(InstructionKind::AESIMCBCryptoaes {
11904            Rd: Rd as _,
11905            Rn: Rn as _,
11906        });
11907    }
11908    None
11909}
11910
11911pub const fn decode_crypto4(d: u32) -> Option<InstructionKind> {
11912    ["Could not decode."][((d & 0xff808000) != 0xce000000) as usize];
11913    let Op0 = (d >> 21) & 3;
11914    let Ra = (d >> 10) & 0x1F;
11915    let Rd = d & 0x1F;
11916    let Rm = (d >> 16) & 0x1F;
11917    let Rn = (d >> 5) & 0x1F;
11918    if (d & 0xffe08000) == 0xce000000 {
11919        return Some(InstructionKind::EOR3Vvv16Crypto4 {
11920            Ra: Ra as _,
11921            Rd: Rd as _,
11922            Rm: Rm as _,
11923            Rn: Rn as _,
11924        });
11925    }
11926    if (d & 0xffe08000) == 0xce200000 {
11927        return Some(InstructionKind::BCAXVvv16Crypto4 {
11928            Ra: Ra as _,
11929            Rd: Rd as _,
11930            Rm: Rm as _,
11931            Rn: Rn as _,
11932        });
11933    }
11934    if (d & 0xffe08000) == 0xce400000 {
11935        return Some(InstructionKind::SM3SS1Vvv4Crypto4 {
11936            Ra: Ra as _,
11937            Rd: Rd as _,
11938            Rm: Rm as _,
11939            Rn: Rn as _,
11940        });
11941    }
11942    None
11943}
11944
11945pub const fn decode_cryptosha3(d: u32) -> Option<InstructionKind> {
11946    ["Could not decode."][((d & 0xff208c00) != 0x5e000000) as usize];
11947    let Rd = d & 0x1F;
11948    let Rm = (d >> 16) & 0x1F;
11949    let Rn = (d >> 5) & 0x1F;
11950    let opcode = (d >> 12) & 7;
11951    let size = (d >> 22) & 3;
11952    if (d & 0xffe0fc00) == 0x5e000000 {
11953        return Some(InstructionKind::SHA1CQsvCryptosha3 {
11954            Rd: Rd as _,
11955            Rm: Rm as _,
11956            Rn: Rn as _,
11957        });
11958    }
11959    if (d & 0xffe0fc00) == 0x5e001000 {
11960        return Some(InstructionKind::SHA1PQsvCryptosha3 {
11961            Rd: Rd as _,
11962            Rm: Rm as _,
11963            Rn: Rn as _,
11964        });
11965    }
11966    if (d & 0xffe0fc00) == 0x5e002000 {
11967        return Some(InstructionKind::SHA1MQsvCryptosha3 {
11968            Rd: Rd as _,
11969            Rm: Rm as _,
11970            Rn: Rn as _,
11971        });
11972    }
11973    if (d & 0xffe0fc00) == 0x5e003000 {
11974        return Some(InstructionKind::SHA1SU0VvvCryptosha3 {
11975            Rd: Rd as _,
11976            Rm: Rm as _,
11977            Rn: Rn as _,
11978        });
11979    }
11980    if (d & 0xffe0fc00) == 0x5e004000 {
11981        return Some(InstructionKind::SHA256HQqvCryptosha3 {
11982            Rd: Rd as _,
11983            Rm: Rm as _,
11984            Rn: Rn as _,
11985        });
11986    }
11987    if (d & 0xffe0fc00) == 0x5e005000 {
11988        return Some(InstructionKind::SHA256H2QqvCryptosha3 {
11989            Rd: Rd as _,
11990            Rm: Rm as _,
11991            Rn: Rn as _,
11992        });
11993    }
11994    if (d & 0xffe0fc00) == 0x5e006000 {
11995        return Some(InstructionKind::SHA256SU1VvvCryptosha3 {
11996            Rd: Rd as _,
11997            Rm: Rm as _,
11998            Rn: Rn as _,
11999        });
12000    }
12001    None
12002}
12003
12004pub const fn decode_cryptosha512_3(d: u32) -> Option<InstructionKind> {
12005    ["Could not decode."][((d & 0xffe0b000) != 0xce608000) as usize];
12006    let O = (d >> 14) & 1;
12007    let Rd = d & 0x1F;
12008    let Rm = (d >> 16) & 0x1F;
12009    let Rn = (d >> 5) & 0x1F;
12010    let opcode = (d >> 10) & 3;
12011    if (d & 0xffe0fc00) == 0xce608000 {
12012        return Some(InstructionKind::SHA512HQqvCryptosha5123 {
12013            Rd: Rd as _,
12014            Rm: Rm as _,
12015            Rn: Rn as _,
12016        });
12017    }
12018    if (d & 0xffe0fc00) == 0xce608400 {
12019        return Some(InstructionKind::SHA512H2QqvCryptosha5123 {
12020            Rd: Rd as _,
12021            Rm: Rm as _,
12022            Rn: Rn as _,
12023        });
12024    }
12025    if (d & 0xffe0fc00) == 0xce608800 {
12026        return Some(InstructionKind::SHA512SU1Vvv2Cryptosha5123 {
12027            Rd: Rd as _,
12028            Rm: Rm as _,
12029            Rn: Rn as _,
12030        });
12031    }
12032    if (d & 0xffe0fc00) == 0xce608c00 {
12033        return Some(InstructionKind::RAX1Vvv2Cryptosha5123 {
12034            Rd: Rd as _,
12035            Rm: Rm as _,
12036            Rn: Rn as _,
12037        });
12038    }
12039    if (d & 0xffe0fc00) == 0xce60c000 {
12040        return Some(InstructionKind::SM3PARTW1Vvv4Cryptosha5123 {
12041            Rd: Rd as _,
12042            Rm: Rm as _,
12043            Rn: Rn as _,
12044        });
12045    }
12046    if (d & 0xffe0fc00) == 0xce60c400 {
12047        return Some(InstructionKind::SM3PARTW2Vvv4Cryptosha5123 {
12048            Rd: Rd as _,
12049            Rm: Rm as _,
12050            Rn: Rn as _,
12051        });
12052    }
12053    if (d & 0xffe0fc00) == 0xce60c800 {
12054        return Some(InstructionKind::SM4EKEYVvv4Cryptosha5123 {
12055            Rd: Rd as _,
12056            Rm: Rm as _,
12057            Rn: Rn as _,
12058        });
12059    }
12060    None
12061}
12062
12063pub const fn decode_crypto3_imm2(d: u32) -> Option<InstructionKind> {
12064    ["Could not decode."][((d & 0xffe0c000) != 0xce408000) as usize];
12065    let Rd = d & 0x1F;
12066    let Rm = (d >> 16) & 0x1F;
12067    let Rn = (d >> 5) & 0x1F;
12068    let imm2 = (d >> 12) & 3;
12069    let opcode = (d >> 10) & 3;
12070    if (d & 0xffe0cc00) == 0xce408000 {
12071        return Some(InstructionKind::SM3TT1AVvv4Crypto3Imm2 {
12072            Rd: Rd as _,
12073            Rm: Rm as _,
12074            Rn: Rn as _,
12075            imm2: imm2 as _,
12076        });
12077    }
12078    if (d & 0xffe0cc00) == 0xce408400 {
12079        return Some(InstructionKind::SM3TT1BVvv4Crypto3Imm2 {
12080            Rd: Rd as _,
12081            Rm: Rm as _,
12082            Rn: Rn as _,
12083            imm2: imm2 as _,
12084        });
12085    }
12086    if (d & 0xffe0cc00) == 0xce408800 {
12087        return Some(InstructionKind::SM3TT2AVvv4Crypto3Imm2 {
12088            Rd: Rd as _,
12089            Rm: Rm as _,
12090            Rn: Rn as _,
12091            imm2: imm2 as _,
12092        });
12093    }
12094    if (d & 0xffe0cc00) == 0xce408c00 {
12095        return Some(InstructionKind::SM3TT2BVvvCrypto3Imm2 {
12096            Rd: Rd as _,
12097            Rm: Rm as _,
12098            Rn: Rn as _,
12099            imm2: imm2 as _,
12100        });
12101    }
12102    None
12103}
12104
12105pub const fn decode_crypto3_imm6(d: u32) -> Option<InstructionKind> {
12106    ["Could not decode."][((d & 0xffe00000) != 0xce800000) as usize];
12107    let Rd = d & 0x1F;
12108    let Rm = (d >> 16) & 0x1F;
12109    let Rn = (d >> 5) & 0x1F;
12110    let imm6 = (d >> 10) & 0x3F;
12111    if (d & 0xffe00000) == 0xce800000 {
12112        return Some(InstructionKind::XARVvv2Crypto3Imm6 {
12113            Rd: Rd as _,
12114            Rm: Rm as _,
12115            Rn: Rn as _,
12116            imm6: imm6 as _,
12117        });
12118    }
12119    None
12120}
12121
12122pub const fn decode_cryptosha2(d: u32) -> Option<InstructionKind> {
12123    ["Could not decode."][((d & 0xff3e0c00) != 0x5e280800) as usize];
12124    let Rd = d & 0x1F;
12125    let Rn = (d >> 5) & 0x1F;
12126    let opcode = (d >> 12) & 0x1F;
12127    let size = (d >> 22) & 3;
12128    if (d & 0xfffffc00) == 0x5e280800 {
12129        return Some(InstructionKind::SHA1HSsCryptosha2 {
12130            Rd: Rd as _,
12131            Rn: Rn as _,
12132        });
12133    }
12134    if (d & 0xfffffc00) == 0x5e281800 {
12135        return Some(InstructionKind::SHA1SU1VvCryptosha2 {
12136            Rd: Rd as _,
12137            Rn: Rn as _,
12138        });
12139    }
12140    if (d & 0xfffffc00) == 0x5e282800 {
12141        return Some(InstructionKind::SHA256SU0VvCryptosha2 {
12142            Rd: Rd as _,
12143            Rn: Rn as _,
12144        });
12145    }
12146    None
12147}
12148
12149pub const fn decode_cryptosha512_2(d: u32) -> Option<InstructionKind> {
12150    ["Could not decode."][((d & 0xfffff000) != 0xcec08000) as usize];
12151    let Rd = d & 0x1F;
12152    let Rn = (d >> 5) & 0x1F;
12153    let opcode = (d >> 10) & 3;
12154    if (d & 0xfffffc00) == 0xcec08000 {
12155        return Some(InstructionKind::SHA512SU0Vv2Cryptosha5122 {
12156            Rd: Rd as _,
12157            Rn: Rn as _,
12158        });
12159    }
12160    if (d & 0xfffffc00) == 0xcec08400 {
12161        return Some(InstructionKind::SM4EVv4Cryptosha5122 {
12162            Rd: Rd as _,
12163            Rn: Rn as _,
12164        });
12165    }
12166    None
12167}
12168
12169pub const fn decode_floatcmp(d: u32) -> Option<InstructionKind> {
12170    ["Could not decode."][((d & 0x5f203c00) != 0x1e202000) as usize];
12171    let M = (d >> 31) & 1;
12172    let Rm = (d >> 16) & 0x1F;
12173    let Rn = (d >> 5) & 0x1F;
12174    let S = (d >> 29) & 1;
12175    let op = (d >> 14) & 3;
12176    let opcode2 = d & 0x1F;
12177    let kind = (d >> 22) & 3;
12178    if (d & 0xffe0fc1f) == 0x1e202000 {
12179        return Some(InstructionKind::FCMPSFloatcmp {
12180            Rm: Rm as _,
12181            Rn: Rn as _,
12182        });
12183    }
12184    if (d & 0xffe0fc1f) == 0x1e202008 {
12185        return Some(InstructionKind::FCMPSzFloatcmp {
12186            Rm: Rm as _,
12187            Rn: Rn as _,
12188        });
12189    }
12190    if (d & 0xffe0fc1f) == 0x1e202010 {
12191        return Some(InstructionKind::FCMPESFloatcmp {
12192            Rm: Rm as _,
12193            Rn: Rn as _,
12194        });
12195    }
12196    if (d & 0xffe0fc1f) == 0x1e202018 {
12197        return Some(InstructionKind::FCMPESzFloatcmp {
12198            Rm: Rm as _,
12199            Rn: Rn as _,
12200        });
12201    }
12202    if (d & 0xffe0fc1f) == 0x1e602000 {
12203        return Some(InstructionKind::FCMPDFloatcmp {
12204            Rm: Rm as _,
12205            Rn: Rn as _,
12206        });
12207    }
12208    if (d & 0xffe0fc1f) == 0x1e602008 {
12209        return Some(InstructionKind::FCMPDzFloatcmp {
12210            Rm: Rm as _,
12211            Rn: Rn as _,
12212        });
12213    }
12214    if (d & 0xffe0fc1f) == 0x1e602010 {
12215        return Some(InstructionKind::FCMPEDFloatcmp {
12216            Rm: Rm as _,
12217            Rn: Rn as _,
12218        });
12219    }
12220    if (d & 0xffe0fc1f) == 0x1e602018 {
12221        return Some(InstructionKind::FCMPEDzFloatcmp {
12222            Rm: Rm as _,
12223            Rn: Rn as _,
12224        });
12225    }
12226    if (d & 0xffe0fc1f) == 0x1ee02000 {
12227        return Some(InstructionKind::FCMPHFloatcmp {
12228            Rm: Rm as _,
12229            Rn: Rn as _,
12230        });
12231    }
12232    if (d & 0xffe0fc1f) == 0x1ee02008 {
12233        return Some(InstructionKind::FCMPHzFloatcmp {
12234            Rm: Rm as _,
12235            Rn: Rn as _,
12236        });
12237    }
12238    if (d & 0xffe0fc1f) == 0x1ee02010 {
12239        return Some(InstructionKind::FCMPEHFloatcmp {
12240            Rm: Rm as _,
12241            Rn: Rn as _,
12242        });
12243    }
12244    if (d & 0xffe0fc1f) == 0x1ee02018 {
12245        return Some(InstructionKind::FCMPEHzFloatcmp {
12246            Rm: Rm as _,
12247            Rn: Rn as _,
12248        });
12249    }
12250    None
12251}
12252
12253pub const fn decode_floatccmp(d: u32) -> Option<InstructionKind> {
12254    ["Could not decode."][((d & 0x5f200c00) != 0x1e200400) as usize];
12255    let M = (d >> 31) & 1;
12256    let Rm = (d >> 16) & 0x1F;
12257    let Rn = (d >> 5) & 0x1F;
12258    let S = (d >> 29) & 1;
12259    let cond = (d >> 12) & 0xF;
12260    let nzcv = d & 0xF;
12261    let op = (d >> 4) & 1;
12262    let kind = (d >> 22) & 3;
12263    if (d & 0xffe00c10) == 0x1e200400 {
12264        return Some(InstructionKind::FCCMPSFloatccmp {
12265            Rm: Rm as _,
12266            Rn: Rn as _,
12267            cond: cond as _,
12268            nzcv: nzcv as _,
12269        });
12270    }
12271    if (d & 0xffe00c10) == 0x1e200410 {
12272        return Some(InstructionKind::FCCMPESFloatccmp {
12273            Rm: Rm as _,
12274            Rn: Rn as _,
12275            cond: cond as _,
12276            nzcv: nzcv as _,
12277        });
12278    }
12279    if (d & 0xffe00c10) == 0x1e600400 {
12280        return Some(InstructionKind::FCCMPDFloatccmp {
12281            Rm: Rm as _,
12282            Rn: Rn as _,
12283            cond: cond as _,
12284            nzcv: nzcv as _,
12285        });
12286    }
12287    if (d & 0xffe00c10) == 0x1e600410 {
12288        return Some(InstructionKind::FCCMPEDFloatccmp {
12289            Rm: Rm as _,
12290            Rn: Rn as _,
12291            cond: cond as _,
12292            nzcv: nzcv as _,
12293        });
12294    }
12295    if (d & 0xffe00c10) == 0x1ee00400 {
12296        return Some(InstructionKind::FCCMPHFloatccmp {
12297            Rm: Rm as _,
12298            Rn: Rn as _,
12299            cond: cond as _,
12300            nzcv: nzcv as _,
12301        });
12302    }
12303    if (d & 0xffe00c10) == 0x1ee00410 {
12304        return Some(InstructionKind::FCCMPEHFloatccmp {
12305            Rm: Rm as _,
12306            Rn: Rn as _,
12307            cond: cond as _,
12308            nzcv: nzcv as _,
12309        });
12310    }
12311    None
12312}
12313
12314pub const fn decode_floatsel(d: u32) -> Option<InstructionKind> {
12315    ["Could not decode."][((d & 0x5f200c00) != 0x1e200c00) as usize];
12316    let M = (d >> 31) & 1;
12317    let Rd = d & 0x1F;
12318    let Rm = (d >> 16) & 0x1F;
12319    let Rn = (d >> 5) & 0x1F;
12320    let S = (d >> 29) & 1;
12321    let cond = (d >> 12) & 0xF;
12322    let kind = (d >> 22) & 3;
12323    if (d & 0xffe00c00) == 0x1e200c00 {
12324        return Some(InstructionKind::FCSELSFloatsel {
12325            Rd: Rd as _,
12326            Rm: Rm as _,
12327            Rn: Rn as _,
12328            cond: cond as _,
12329        });
12330    }
12331    if (d & 0xffe00c00) == 0x1e600c00 {
12332        return Some(InstructionKind::FCSELDFloatsel {
12333            Rd: Rd as _,
12334            Rm: Rm as _,
12335            Rn: Rn as _,
12336            cond: cond as _,
12337        });
12338    }
12339    if (d & 0xffe00c00) == 0x1ee00c00 {
12340        return Some(InstructionKind::FCSELHFloatsel {
12341            Rd: Rd as _,
12342            Rm: Rm as _,
12343            Rn: Rn as _,
12344            cond: cond as _,
12345        });
12346    }
12347    None
12348}
12349
12350pub const fn decode_floatdp1(d: u32) -> Option<InstructionKind> {
12351    ["Could not decode."][((d & 0x5f207c00) != 0x1e204000) as usize];
12352    let M = (d >> 31) & 1;
12353    let Rd = d & 0x1F;
12354    let Rn = (d >> 5) & 0x1F;
12355    let S = (d >> 29) & 1;
12356    let opcode = (d >> 15) & 0x3F;
12357    let kind = (d >> 22) & 3;
12358    if (d & 0xfffffc00) == 0x1e204000 {
12359        return Some(InstructionKind::FMOVSFloatdp1 {
12360            Rd: Rd as _,
12361            Rn: Rn as _,
12362        });
12363    }
12364    if (d & 0xfffffc00) == 0x1e20c000 {
12365        return Some(InstructionKind::FABSSFloatdp1 {
12366            Rd: Rd as _,
12367            Rn: Rn as _,
12368        });
12369    }
12370    if (d & 0xfffffc00) == 0x1e214000 {
12371        return Some(InstructionKind::FNEGSFloatdp1 {
12372            Rd: Rd as _,
12373            Rn: Rn as _,
12374        });
12375    }
12376    if (d & 0xfffffc00) == 0x1e21c000 {
12377        return Some(InstructionKind::FSQRTSFloatdp1 {
12378            Rd: Rd as _,
12379            Rn: Rn as _,
12380        });
12381    }
12382    if (d & 0xfffffc00) == 0x1e22c000 {
12383        return Some(InstructionKind::FCVTDsFloatdp1 {
12384            Rd: Rd as _,
12385            Rn: Rn as _,
12386        });
12387    }
12388    if (d & 0xfffffc00) == 0x1e23c000 {
12389        return Some(InstructionKind::FCVTHsFloatdp1 {
12390            Rd: Rd as _,
12391            Rn: Rn as _,
12392        });
12393    }
12394    if (d & 0xfffffc00) == 0x1e244000 {
12395        return Some(InstructionKind::FRINTNSFloatdp1 {
12396            Rd: Rd as _,
12397            Rn: Rn as _,
12398        });
12399    }
12400    if (d & 0xfffffc00) == 0x1e24c000 {
12401        return Some(InstructionKind::FRINTPSFloatdp1 {
12402            Rd: Rd as _,
12403            Rn: Rn as _,
12404        });
12405    }
12406    if (d & 0xfffffc00) == 0x1e254000 {
12407        return Some(InstructionKind::FRINTMSFloatdp1 {
12408            Rd: Rd as _,
12409            Rn: Rn as _,
12410        });
12411    }
12412    if (d & 0xfffffc00) == 0x1e25c000 {
12413        return Some(InstructionKind::FRINTZSFloatdp1 {
12414            Rd: Rd as _,
12415            Rn: Rn as _,
12416        });
12417    }
12418    if (d & 0xfffffc00) == 0x1e264000 {
12419        return Some(InstructionKind::FRINTASFloatdp1 {
12420            Rd: Rd as _,
12421            Rn: Rn as _,
12422        });
12423    }
12424    if (d & 0xfffffc00) == 0x1e274000 {
12425        return Some(InstructionKind::FRINTXSFloatdp1 {
12426            Rd: Rd as _,
12427            Rn: Rn as _,
12428        });
12429    }
12430    if (d & 0xfffffc00) == 0x1e27c000 {
12431        return Some(InstructionKind::FRINTISFloatdp1 {
12432            Rd: Rd as _,
12433            Rn: Rn as _,
12434        });
12435    }
12436    if (d & 0xfffffc00) == 0x1e604000 {
12437        return Some(InstructionKind::FMOVDFloatdp1 {
12438            Rd: Rd as _,
12439            Rn: Rn as _,
12440        });
12441    }
12442    if (d & 0xfffffc00) == 0x1e60c000 {
12443        return Some(InstructionKind::FABSDFloatdp1 {
12444            Rd: Rd as _,
12445            Rn: Rn as _,
12446        });
12447    }
12448    if (d & 0xfffffc00) == 0x1e614000 {
12449        return Some(InstructionKind::FNEGDFloatdp1 {
12450            Rd: Rd as _,
12451            Rn: Rn as _,
12452        });
12453    }
12454    if (d & 0xfffffc00) == 0x1e61c000 {
12455        return Some(InstructionKind::FSQRTDFloatdp1 {
12456            Rd: Rd as _,
12457            Rn: Rn as _,
12458        });
12459    }
12460    if (d & 0xfffffc00) == 0x1e624000 {
12461        return Some(InstructionKind::FCVTSdFloatdp1 {
12462            Rd: Rd as _,
12463            Rn: Rn as _,
12464        });
12465    }
12466    if (d & 0xfffffc00) == 0x1e63c000 {
12467        return Some(InstructionKind::FCVTHdFloatdp1 {
12468            Rd: Rd as _,
12469            Rn: Rn as _,
12470        });
12471    }
12472    if (d & 0xfffffc00) == 0x1e644000 {
12473        return Some(InstructionKind::FRINTNDFloatdp1 {
12474            Rd: Rd as _,
12475            Rn: Rn as _,
12476        });
12477    }
12478    if (d & 0xfffffc00) == 0x1e64c000 {
12479        return Some(InstructionKind::FRINTPDFloatdp1 {
12480            Rd: Rd as _,
12481            Rn: Rn as _,
12482        });
12483    }
12484    if (d & 0xfffffc00) == 0x1e654000 {
12485        return Some(InstructionKind::FRINTMDFloatdp1 {
12486            Rd: Rd as _,
12487            Rn: Rn as _,
12488        });
12489    }
12490    if (d & 0xfffffc00) == 0x1e65c000 {
12491        return Some(InstructionKind::FRINTZDFloatdp1 {
12492            Rd: Rd as _,
12493            Rn: Rn as _,
12494        });
12495    }
12496    if (d & 0xfffffc00) == 0x1e664000 {
12497        return Some(InstructionKind::FRINTADFloatdp1 {
12498            Rd: Rd as _,
12499            Rn: Rn as _,
12500        });
12501    }
12502    if (d & 0xfffffc00) == 0x1e674000 {
12503        return Some(InstructionKind::FRINTXDFloatdp1 {
12504            Rd: Rd as _,
12505            Rn: Rn as _,
12506        });
12507    }
12508    if (d & 0xfffffc00) == 0x1e67c000 {
12509        return Some(InstructionKind::FRINTIDFloatdp1 {
12510            Rd: Rd as _,
12511            Rn: Rn as _,
12512        });
12513    }
12514    if (d & 0xfffffc00) == 0x1ee04000 {
12515        return Some(InstructionKind::FMOVHFloatdp1 {
12516            Rd: Rd as _,
12517            Rn: Rn as _,
12518        });
12519    }
12520    if (d & 0xfffffc00) == 0x1ee0c000 {
12521        return Some(InstructionKind::FABSHFloatdp1 {
12522            Rd: Rd as _,
12523            Rn: Rn as _,
12524        });
12525    }
12526    if (d & 0xfffffc00) == 0x1ee14000 {
12527        return Some(InstructionKind::FNEGHFloatdp1 {
12528            Rd: Rd as _,
12529            Rn: Rn as _,
12530        });
12531    }
12532    if (d & 0xfffffc00) == 0x1ee1c000 {
12533        return Some(InstructionKind::FSQRTHFloatdp1 {
12534            Rd: Rd as _,
12535            Rn: Rn as _,
12536        });
12537    }
12538    if (d & 0xfffffc00) == 0x1ee24000 {
12539        return Some(InstructionKind::FCVTShFloatdp1 {
12540            Rd: Rd as _,
12541            Rn: Rn as _,
12542        });
12543    }
12544    if (d & 0xfffffc00) == 0x1ee2c000 {
12545        return Some(InstructionKind::FCVTDhFloatdp1 {
12546            Rd: Rd as _,
12547            Rn: Rn as _,
12548        });
12549    }
12550    if (d & 0xfffffc00) == 0x1ee44000 {
12551        return Some(InstructionKind::FRINTNHFloatdp1 {
12552            Rd: Rd as _,
12553            Rn: Rn as _,
12554        });
12555    }
12556    if (d & 0xfffffc00) == 0x1ee4c000 {
12557        return Some(InstructionKind::FRINTPHFloatdp1 {
12558            Rd: Rd as _,
12559            Rn: Rn as _,
12560        });
12561    }
12562    if (d & 0xfffffc00) == 0x1ee54000 {
12563        return Some(InstructionKind::FRINTMHFloatdp1 {
12564            Rd: Rd as _,
12565            Rn: Rn as _,
12566        });
12567    }
12568    if (d & 0xfffffc00) == 0x1ee5c000 {
12569        return Some(InstructionKind::FRINTZHFloatdp1 {
12570            Rd: Rd as _,
12571            Rn: Rn as _,
12572        });
12573    }
12574    if (d & 0xfffffc00) == 0x1ee64000 {
12575        return Some(InstructionKind::FRINTAHFloatdp1 {
12576            Rd: Rd as _,
12577            Rn: Rn as _,
12578        });
12579    }
12580    if (d & 0xfffffc00) == 0x1ee74000 {
12581        return Some(InstructionKind::FRINTXHFloatdp1 {
12582            Rd: Rd as _,
12583            Rn: Rn as _,
12584        });
12585    }
12586    if (d & 0xfffffc00) == 0x1ee7c000 {
12587        return Some(InstructionKind::FRINTIHFloatdp1 {
12588            Rd: Rd as _,
12589            Rn: Rn as _,
12590        });
12591    }
12592    None
12593}
12594
12595pub const fn decode_floatdp2(d: u32) -> Option<InstructionKind> {
12596    ["Could not decode."][((d & 0x5f200c00) != 0x1e200800) as usize];
12597    let M = (d >> 31) & 1;
12598    let Rd = d & 0x1F;
12599    let Rm = (d >> 16) & 0x1F;
12600    let Rn = (d >> 5) & 0x1F;
12601    let S = (d >> 29) & 1;
12602    let opcode = (d >> 12) & 0xF;
12603    let kind = (d >> 22) & 3;
12604    if (d & 0xffe0fc00) == 0x1e200800 {
12605        return Some(InstructionKind::FMULSFloatdp2 {
12606            Rd: Rd as _,
12607            Rm: Rm as _,
12608            Rn: Rn as _,
12609        });
12610    }
12611    if (d & 0xffe0fc00) == 0x1e201800 {
12612        return Some(InstructionKind::FDIVSFloatdp2 {
12613            Rd: Rd as _,
12614            Rm: Rm as _,
12615            Rn: Rn as _,
12616        });
12617    }
12618    if (d & 0xffe0fc00) == 0x1e202800 {
12619        return Some(InstructionKind::FADDSFloatdp2 {
12620            Rd: Rd as _,
12621            Rm: Rm as _,
12622            Rn: Rn as _,
12623        });
12624    }
12625    if (d & 0xffe0fc00) == 0x1e203800 {
12626        return Some(InstructionKind::FSUBSFloatdp2 {
12627            Rd: Rd as _,
12628            Rm: Rm as _,
12629            Rn: Rn as _,
12630        });
12631    }
12632    if (d & 0xffe0fc00) == 0x1e204800 {
12633        return Some(InstructionKind::FMAXSFloatdp2 {
12634            Rd: Rd as _,
12635            Rm: Rm as _,
12636            Rn: Rn as _,
12637        });
12638    }
12639    if (d & 0xffe0fc00) == 0x1e205800 {
12640        return Some(InstructionKind::FMINSFloatdp2 {
12641            Rd: Rd as _,
12642            Rm: Rm as _,
12643            Rn: Rn as _,
12644        });
12645    }
12646    if (d & 0xffe0fc00) == 0x1e206800 {
12647        return Some(InstructionKind::FMAXNMSFloatdp2 {
12648            Rd: Rd as _,
12649            Rm: Rm as _,
12650            Rn: Rn as _,
12651        });
12652    }
12653    if (d & 0xffe0fc00) == 0x1e207800 {
12654        return Some(InstructionKind::FMINNMSFloatdp2 {
12655            Rd: Rd as _,
12656            Rm: Rm as _,
12657            Rn: Rn as _,
12658        });
12659    }
12660    if (d & 0xffe0fc00) == 0x1e208800 {
12661        return Some(InstructionKind::FNMULSFloatdp2 {
12662            Rd: Rd as _,
12663            Rm: Rm as _,
12664            Rn: Rn as _,
12665        });
12666    }
12667    if (d & 0xffe0fc00) == 0x1e600800 {
12668        return Some(InstructionKind::FMULDFloatdp2 {
12669            Rd: Rd as _,
12670            Rm: Rm as _,
12671            Rn: Rn as _,
12672        });
12673    }
12674    if (d & 0xffe0fc00) == 0x1e601800 {
12675        return Some(InstructionKind::FDIVDFloatdp2 {
12676            Rd: Rd as _,
12677            Rm: Rm as _,
12678            Rn: Rn as _,
12679        });
12680    }
12681    if (d & 0xffe0fc00) == 0x1e602800 {
12682        return Some(InstructionKind::FADDDFloatdp2 {
12683            Rd: Rd as _,
12684            Rm: Rm as _,
12685            Rn: Rn as _,
12686        });
12687    }
12688    if (d & 0xffe0fc00) == 0x1e603800 {
12689        return Some(InstructionKind::FSUBDFloatdp2 {
12690            Rd: Rd as _,
12691            Rm: Rm as _,
12692            Rn: Rn as _,
12693        });
12694    }
12695    if (d & 0xffe0fc00) == 0x1e604800 {
12696        return Some(InstructionKind::FMAXDFloatdp2 {
12697            Rd: Rd as _,
12698            Rm: Rm as _,
12699            Rn: Rn as _,
12700        });
12701    }
12702    if (d & 0xffe0fc00) == 0x1e605800 {
12703        return Some(InstructionKind::FMINDFloatdp2 {
12704            Rd: Rd as _,
12705            Rm: Rm as _,
12706            Rn: Rn as _,
12707        });
12708    }
12709    if (d & 0xffe0fc00) == 0x1e606800 {
12710        return Some(InstructionKind::FMAXNMDFloatdp2 {
12711            Rd: Rd as _,
12712            Rm: Rm as _,
12713            Rn: Rn as _,
12714        });
12715    }
12716    if (d & 0xffe0fc00) == 0x1e607800 {
12717        return Some(InstructionKind::FMINNMDFloatdp2 {
12718            Rd: Rd as _,
12719            Rm: Rm as _,
12720            Rn: Rn as _,
12721        });
12722    }
12723    if (d & 0xffe0fc00) == 0x1e608800 {
12724        return Some(InstructionKind::FNMULDFloatdp2 {
12725            Rd: Rd as _,
12726            Rm: Rm as _,
12727            Rn: Rn as _,
12728        });
12729    }
12730    if (d & 0xffe0fc00) == 0x1ee00800 {
12731        return Some(InstructionKind::FMULHFloatdp2 {
12732            Rd: Rd as _,
12733            Rm: Rm as _,
12734            Rn: Rn as _,
12735        });
12736    }
12737    if (d & 0xffe0fc00) == 0x1ee01800 {
12738        return Some(InstructionKind::FDIVHFloatdp2 {
12739            Rd: Rd as _,
12740            Rm: Rm as _,
12741            Rn: Rn as _,
12742        });
12743    }
12744    if (d & 0xffe0fc00) == 0x1ee02800 {
12745        return Some(InstructionKind::FADDHFloatdp2 {
12746            Rd: Rd as _,
12747            Rm: Rm as _,
12748            Rn: Rn as _,
12749        });
12750    }
12751    if (d & 0xffe0fc00) == 0x1ee03800 {
12752        return Some(InstructionKind::FSUBHFloatdp2 {
12753            Rd: Rd as _,
12754            Rm: Rm as _,
12755            Rn: Rn as _,
12756        });
12757    }
12758    if (d & 0xffe0fc00) == 0x1ee04800 {
12759        return Some(InstructionKind::FMAXHFloatdp2 {
12760            Rd: Rd as _,
12761            Rm: Rm as _,
12762            Rn: Rn as _,
12763        });
12764    }
12765    if (d & 0xffe0fc00) == 0x1ee05800 {
12766        return Some(InstructionKind::FMINHFloatdp2 {
12767            Rd: Rd as _,
12768            Rm: Rm as _,
12769            Rn: Rn as _,
12770        });
12771    }
12772    if (d & 0xffe0fc00) == 0x1ee06800 {
12773        return Some(InstructionKind::FMAXNMHFloatdp2 {
12774            Rd: Rd as _,
12775            Rm: Rm as _,
12776            Rn: Rn as _,
12777        });
12778    }
12779    if (d & 0xffe0fc00) == 0x1ee07800 {
12780        return Some(InstructionKind::FMINNMHFloatdp2 {
12781            Rd: Rd as _,
12782            Rm: Rm as _,
12783            Rn: Rn as _,
12784        });
12785    }
12786    if (d & 0xffe0fc00) == 0x1ee08800 {
12787        return Some(InstructionKind::FNMULHFloatdp2 {
12788            Rd: Rd as _,
12789            Rm: Rm as _,
12790            Rn: Rn as _,
12791        });
12792    }
12793    None
12794}
12795
12796pub const fn decode_floatdp3(d: u32) -> Option<InstructionKind> {
12797    ["Could not decode."][((d & 0x5f000000) != 0x1f000000) as usize];
12798    let M = (d >> 31) & 1;
12799    let Ra = (d >> 10) & 0x1F;
12800    let Rd = d & 0x1F;
12801    let Rm = (d >> 16) & 0x1F;
12802    let Rn = (d >> 5) & 0x1F;
12803    let S = (d >> 29) & 1;
12804    let o0 = (d >> 15) & 1;
12805    let o1 = (d >> 21) & 1;
12806    let kind = (d >> 22) & 3;
12807    if (d & 0xffe08000) == 0x1f000000 {
12808        return Some(InstructionKind::FMADDSFloatdp3 {
12809            Ra: Ra as _,
12810            Rd: Rd as _,
12811            Rm: Rm as _,
12812            Rn: Rn as _,
12813        });
12814    }
12815    if (d & 0xffe08000) == 0x1f008000 {
12816        return Some(InstructionKind::FMSUBSFloatdp3 {
12817            Ra: Ra as _,
12818            Rd: Rd as _,
12819            Rm: Rm as _,
12820            Rn: Rn as _,
12821        });
12822    }
12823    if (d & 0xffe08000) == 0x1f200000 {
12824        return Some(InstructionKind::FNMADDSFloatdp3 {
12825            Ra: Ra as _,
12826            Rd: Rd as _,
12827            Rm: Rm as _,
12828            Rn: Rn as _,
12829        });
12830    }
12831    if (d & 0xffe08000) == 0x1f208000 {
12832        return Some(InstructionKind::FNMSUBSFloatdp3 {
12833            Ra: Ra as _,
12834            Rd: Rd as _,
12835            Rm: Rm as _,
12836            Rn: Rn as _,
12837        });
12838    }
12839    if (d & 0xffe08000) == 0x1f400000 {
12840        return Some(InstructionKind::FMADDDFloatdp3 {
12841            Ra: Ra as _,
12842            Rd: Rd as _,
12843            Rm: Rm as _,
12844            Rn: Rn as _,
12845        });
12846    }
12847    if (d & 0xffe08000) == 0x1f408000 {
12848        return Some(InstructionKind::FMSUBDFloatdp3 {
12849            Ra: Ra as _,
12850            Rd: Rd as _,
12851            Rm: Rm as _,
12852            Rn: Rn as _,
12853        });
12854    }
12855    if (d & 0xffe08000) == 0x1f600000 {
12856        return Some(InstructionKind::FNMADDDFloatdp3 {
12857            Ra: Ra as _,
12858            Rd: Rd as _,
12859            Rm: Rm as _,
12860            Rn: Rn as _,
12861        });
12862    }
12863    if (d & 0xffe08000) == 0x1f608000 {
12864        return Some(InstructionKind::FNMSUBDFloatdp3 {
12865            Ra: Ra as _,
12866            Rd: Rd as _,
12867            Rm: Rm as _,
12868            Rn: Rn as _,
12869        });
12870    }
12871    if (d & 0xffe08000) == 0x1fc00000 {
12872        return Some(InstructionKind::FMADDHFloatdp3 {
12873            Ra: Ra as _,
12874            Rd: Rd as _,
12875            Rm: Rm as _,
12876            Rn: Rn as _,
12877        });
12878    }
12879    if (d & 0xffe08000) == 0x1fc08000 {
12880        return Some(InstructionKind::FMSUBHFloatdp3 {
12881            Ra: Ra as _,
12882            Rd: Rd as _,
12883            Rm: Rm as _,
12884            Rn: Rn as _,
12885        });
12886    }
12887    if (d & 0xffe08000) == 0x1fe00000 {
12888        return Some(InstructionKind::FNMADDHFloatdp3 {
12889            Ra: Ra as _,
12890            Rd: Rd as _,
12891            Rm: Rm as _,
12892            Rn: Rn as _,
12893        });
12894    }
12895    if (d & 0xffe08000) == 0x1fe08000 {
12896        return Some(InstructionKind::FNMSUBHFloatdp3 {
12897            Ra: Ra as _,
12898            Rd: Rd as _,
12899            Rm: Rm as _,
12900            Rn: Rn as _,
12901        });
12902    }
12903    None
12904}
12905
12906pub const fn decode_floatimm(d: u32) -> Option<InstructionKind> {
12907    ["Could not decode."][((d & 0x5f201c00) != 0x1e201000) as usize];
12908    let M = (d >> 31) & 1;
12909    let Rd = d & 0x1F;
12910    let S = (d >> 29) & 1;
12911    let imm5 = (d >> 5) & 0x1F;
12912    let imm8 = (d >> 13) & 0xFF;
12913    let kind = (d >> 22) & 3;
12914    if (d & 0xffe01fe0) == 0x1e201000 {
12915        return Some(InstructionKind::FMOVSFloatimm {
12916            Rd: Rd as _,
12917            imm8: imm8 as _,
12918        });
12919    }
12920    if (d & 0xffe01fe0) == 0x1e601000 {
12921        return Some(InstructionKind::FMOVDFloatimm {
12922            Rd: Rd as _,
12923            imm8: imm8 as _,
12924        });
12925    }
12926    if (d & 0xffe01fe0) == 0x1ee01000 {
12927        return Some(InstructionKind::FMOVHFloatimm {
12928            Rd: Rd as _,
12929            imm8: imm8 as _,
12930        });
12931    }
12932    None
12933}
12934
12935const fn unwrap(value: Option<InstructionKind>) -> InstructionKind {
12936    #[allow(unconditional_panic)]
12937    [][match value {
12938        Some(x) => return x,
12939        None => 0,
12940    }]
12941}
12942
12943pub const fn decode_addsub_carry_unwrap(d: u32) -> InstructionKind {
12944    unwrap(decode_addsub_carry(d))
12945}
12946
12947pub const fn decode_addsub_ext_unwrap(d: u32) -> InstructionKind {
12948    unwrap(decode_addsub_ext(d))
12949}
12950
12951pub const fn decode_addsub_imm_unwrap(d: u32) -> InstructionKind {
12952    unwrap(decode_addsub_imm(d))
12953}
12954
12955pub const fn decode_addsub_shift_unwrap(d: u32) -> InstructionKind {
12956    unwrap(decode_addsub_shift(d))
12957}
12958
12959pub const fn decode_asimdall_unwrap(d: u32) -> InstructionKind {
12960    unwrap(decode_asimdall(d))
12961}
12962
12963pub const fn decode_asimddiff_unwrap(d: u32) -> InstructionKind {
12964    unwrap(decode_asimddiff(d))
12965}
12966
12967pub const fn decode_asimdelem_unwrap(d: u32) -> InstructionKind {
12968    unwrap(decode_asimdelem(d))
12969}
12970
12971pub const fn decode_asimdext_unwrap(d: u32) -> InstructionKind {
12972    unwrap(decode_asimdext(d))
12973}
12974
12975pub const fn decode_asimdimm_unwrap(d: u32) -> InstructionKind {
12976    unwrap(decode_asimdimm(d))
12977}
12978
12979pub const fn decode_asimdins_unwrap(d: u32) -> InstructionKind {
12980    unwrap(decode_asimdins(d))
12981}
12982
12983pub const fn decode_asimdmisc_unwrap(d: u32) -> InstructionKind {
12984    unwrap(decode_asimdmisc(d))
12985}
12986
12987pub const fn decode_asimdmiscfp16_unwrap(d: u32) -> InstructionKind {
12988    unwrap(decode_asimdmiscfp16(d))
12989}
12990
12991pub const fn decode_asimdperm_unwrap(d: u32) -> InstructionKind {
12992    unwrap(decode_asimdperm(d))
12993}
12994
12995pub const fn decode_asimdsame_unwrap(d: u32) -> InstructionKind {
12996    unwrap(decode_asimdsame(d))
12997}
12998
12999pub const fn decode_asimdsame2_unwrap(d: u32) -> InstructionKind {
13000    unwrap(decode_asimdsame2(d))
13001}
13002
13003pub const fn decode_asimdsamefp16_unwrap(d: u32) -> InstructionKind {
13004    unwrap(decode_asimdsamefp16(d))
13005}
13006
13007pub const fn decode_asimdshf_unwrap(d: u32) -> InstructionKind {
13008    unwrap(decode_asimdshf(d))
13009}
13010
13011pub const fn decode_asimdtbl_unwrap(d: u32) -> InstructionKind {
13012    unwrap(decode_asimdtbl(d))
13013}
13014
13015pub const fn decode_asisddiff_unwrap(d: u32) -> InstructionKind {
13016    unwrap(decode_asisddiff(d))
13017}
13018
13019pub const fn decode_asisdelem_unwrap(d: u32) -> InstructionKind {
13020    unwrap(decode_asisdelem(d))
13021}
13022
13023pub const fn decode_asisdlse_unwrap(d: u32) -> InstructionKind {
13024    unwrap(decode_asisdlse(d))
13025}
13026
13027pub const fn decode_asisdlsep_unwrap(d: u32) -> InstructionKind {
13028    unwrap(decode_asisdlsep(d))
13029}
13030
13031pub const fn decode_asisdlso_unwrap(d: u32) -> InstructionKind {
13032    unwrap(decode_asisdlso(d))
13033}
13034
13035pub const fn decode_asisdlsop_unwrap(d: u32) -> InstructionKind {
13036    unwrap(decode_asisdlsop(d))
13037}
13038
13039pub const fn decode_asisdmisc_unwrap(d: u32) -> InstructionKind {
13040    unwrap(decode_asisdmisc(d))
13041}
13042
13043pub const fn decode_asisdmiscfp16_unwrap(d: u32) -> InstructionKind {
13044    unwrap(decode_asisdmiscfp16(d))
13045}
13046
13047pub const fn decode_asisdone_unwrap(d: u32) -> InstructionKind {
13048    unwrap(decode_asisdone(d))
13049}
13050
13051pub const fn decode_asisdpair_unwrap(d: u32) -> InstructionKind {
13052    unwrap(decode_asisdpair(d))
13053}
13054
13055pub const fn decode_asisdsame_unwrap(d: u32) -> InstructionKind {
13056    unwrap(decode_asisdsame(d))
13057}
13058
13059pub const fn decode_asisdsame2_unwrap(d: u32) -> InstructionKind {
13060    unwrap(decode_asisdsame2(d))
13061}
13062
13063pub const fn decode_asisdsamefp16_unwrap(d: u32) -> InstructionKind {
13064    unwrap(decode_asisdsamefp16(d))
13065}
13066
13067pub const fn decode_asisdshf_unwrap(d: u32) -> InstructionKind {
13068    unwrap(decode_asisdshf(d))
13069}
13070
13071pub const fn decode_bitfield_unwrap(d: u32) -> InstructionKind {
13072    unwrap(decode_bitfield(d))
13073}
13074
13075pub const fn decode_branch_and_sys_unwrap(d: u32) -> InstructionKind {
13076    unwrap(decode_branch_and_sys(d))
13077}
13078
13079pub const fn decode_branch_imm_unwrap(d: u32) -> InstructionKind {
13080    unwrap(decode_branch_imm(d))
13081}
13082
13083pub const fn decode_branch_reg_unwrap(d: u32) -> InstructionKind {
13084    unwrap(decode_branch_reg(d))
13085}
13086
13087pub const fn decode_compbranch_unwrap(d: u32) -> InstructionKind {
13088    unwrap(decode_compbranch(d))
13089}
13090
13091pub const fn decode_condbranch_unwrap(d: u32) -> InstructionKind {
13092    unwrap(decode_condbranch(d))
13093}
13094
13095pub const fn decode_condcmp_imm_unwrap(d: u32) -> InstructionKind {
13096    unwrap(decode_condcmp_imm(d))
13097}
13098
13099pub const fn decode_condcmp_reg_unwrap(d: u32) -> InstructionKind {
13100    unwrap(decode_condcmp_reg(d))
13101}
13102
13103pub const fn decode_condsel_unwrap(d: u32) -> InstructionKind {
13104    unwrap(decode_condsel(d))
13105}
13106
13107pub const fn decode_crypto3_imm2_unwrap(d: u32) -> InstructionKind {
13108    unwrap(decode_crypto3_imm2(d))
13109}
13110
13111pub const fn decode_crypto3_imm6_unwrap(d: u32) -> InstructionKind {
13112    unwrap(decode_crypto3_imm6(d))
13113}
13114
13115pub const fn decode_crypto4_unwrap(d: u32) -> InstructionKind {
13116    unwrap(decode_crypto4(d))
13117}
13118
13119pub const fn decode_cryptoaes_unwrap(d: u32) -> InstructionKind {
13120    unwrap(decode_cryptoaes(d))
13121}
13122
13123pub const fn decode_cryptosha2_unwrap(d: u32) -> InstructionKind {
13124    unwrap(decode_cryptosha2(d))
13125}
13126
13127pub const fn decode_cryptosha3_unwrap(d: u32) -> InstructionKind {
13128    unwrap(decode_cryptosha3(d))
13129}
13130
13131pub const fn decode_cryptosha512_2_unwrap(d: u32) -> InstructionKind {
13132    unwrap(decode_cryptosha512_2(d))
13133}
13134
13135pub const fn decode_cryptosha512_3_unwrap(d: u32) -> InstructionKind {
13136    unwrap(decode_cryptosha512_3(d))
13137}
13138
13139pub const fn decode_dataproc_immediate_unwrap(d: u32) -> InstructionKind {
13140    unwrap(decode_dataproc_immediate(d))
13141}
13142
13143pub const fn decode_dataproc_register_unwrap(d: u32) -> InstructionKind {
13144    unwrap(decode_dataproc_register(d))
13145}
13146
13147pub const fn decode_dataproc_simd_unwrap(d: u32) -> InstructionKind {
13148    unwrap(decode_dataproc_simd(d))
13149}
13150
13151pub const fn decode_dp_1src_unwrap(d: u32) -> InstructionKind {
13152    unwrap(decode_dp_1src(d))
13153}
13154
13155pub const fn decode_dp_2src_unwrap(d: u32) -> InstructionKind {
13156    unwrap(decode_dp_2src(d))
13157}
13158
13159pub const fn decode_dp_3src_unwrap(d: u32) -> InstructionKind {
13160    unwrap(decode_dp_3src(d))
13161}
13162
13163pub const fn decode_exception_unwrap(d: u32) -> InstructionKind {
13164    unwrap(decode_exception(d))
13165}
13166
13167pub const fn decode_extract_unwrap(d: u32) -> InstructionKind {
13168    unwrap(decode_extract(d))
13169}
13170
13171pub const fn decode_float2fix_unwrap(d: u32) -> InstructionKind {
13172    unwrap(decode_float2fix(d))
13173}
13174
13175pub const fn decode_float2int_unwrap(d: u32) -> InstructionKind {
13176    unwrap(decode_float2int(d))
13177}
13178
13179pub const fn decode_floatccmp_unwrap(d: u32) -> InstructionKind {
13180    unwrap(decode_floatccmp(d))
13181}
13182
13183pub const fn decode_floatcmp_unwrap(d: u32) -> InstructionKind {
13184    unwrap(decode_floatcmp(d))
13185}
13186
13187pub const fn decode_floatdp1_unwrap(d: u32) -> InstructionKind {
13188    unwrap(decode_floatdp1(d))
13189}
13190
13191pub const fn decode_floatdp2_unwrap(d: u32) -> InstructionKind {
13192    unwrap(decode_floatdp2(d))
13193}
13194
13195pub const fn decode_floatdp3_unwrap(d: u32) -> InstructionKind {
13196    unwrap(decode_floatdp3(d))
13197}
13198
13199pub const fn decode_floatimm_unwrap(d: u32) -> InstructionKind {
13200    unwrap(decode_floatimm(d))
13201}
13202
13203pub const fn decode_floatsel_unwrap(d: u32) -> InstructionKind {
13204    unwrap(decode_floatsel(d))
13205}
13206
13207pub const fn decode_ldst_immpost_unwrap(d: u32) -> InstructionKind {
13208    unwrap(decode_ldst_immpost(d))
13209}
13210
13211pub const fn decode_ldst_immpre_unwrap(d: u32) -> InstructionKind {
13212    unwrap(decode_ldst_immpre(d))
13213}
13214
13215pub const fn decode_ldst_pac_unwrap(d: u32) -> InstructionKind {
13216    unwrap(decode_ldst_pac(d))
13217}
13218
13219pub const fn decode_ldst_pos_unwrap(d: u32) -> InstructionKind {
13220    unwrap(decode_ldst_pos(d))
13221}
13222
13223pub const fn decode_ldst_regoff_unwrap(d: u32) -> InstructionKind {
13224    unwrap(decode_ldst_regoff(d))
13225}
13226
13227pub const fn decode_ldst_unpriv_unwrap(d: u32) -> InstructionKind {
13228    unwrap(decode_ldst_unpriv(d))
13229}
13230
13231pub const fn decode_ldst_unscaled_unwrap(d: u32) -> InstructionKind {
13232    unwrap(decode_ldst_unscaled(d))
13233}
13234
13235pub const fn decode_ldstexcl_unwrap(d: u32) -> InstructionKind {
13236    unwrap(decode_ldstexcl(d))
13237}
13238
13239pub const fn decode_ldstnapair_offs_unwrap(d: u32) -> InstructionKind {
13240    unwrap(decode_ldstnapair_offs(d))
13241}
13242
13243pub const fn decode_ldstpair_off_unwrap(d: u32) -> InstructionKind {
13244    unwrap(decode_ldstpair_off(d))
13245}
13246
13247pub const fn decode_ldstpair_post_unwrap(d: u32) -> InstructionKind {
13248    unwrap(decode_ldstpair_post(d))
13249}
13250
13251pub const fn decode_ldstpair_pre_unwrap(d: u32) -> InstructionKind {
13252    unwrap(decode_ldstpair_pre(d))
13253}
13254
13255pub const fn decode_load_and_store_unwrap(d: u32) -> InstructionKind {
13256    unwrap(decode_load_and_store(d))
13257}
13258
13259pub const fn decode_loadlit_unwrap(d: u32) -> InstructionKind {
13260    unwrap(decode_loadlit(d))
13261}
13262
13263pub const fn decode_log_imm_unwrap(d: u32) -> InstructionKind {
13264    unwrap(decode_log_imm(d))
13265}
13266
13267pub const fn decode_log_shift_unwrap(d: u32) -> InstructionKind {
13268    unwrap(decode_log_shift(d))
13269}
13270
13271pub const fn decode_memop_unwrap(d: u32) -> InstructionKind {
13272    unwrap(decode_memop(d))
13273}
13274
13275pub const fn decode_movewide_unwrap(d: u32) -> InstructionKind {
13276    unwrap(decode_movewide(d))
13277}
13278
13279pub const fn decode_pcreladdr_unwrap(d: u32) -> InstructionKind {
13280    unwrap(decode_pcreladdr(d))
13281}
13282
13283pub const fn decode_root_unwrap(d: u32) -> InstructionKind {
13284    unwrap(decode_root(d))
13285}
13286
13287pub const fn decode_system_unwrap(d: u32) -> InstructionKind {
13288    unwrap(decode_system(d))
13289}
13290
13291pub const fn decode_testbranch_unwrap(d: u32) -> InstructionKind {
13292    unwrap(decode_testbranch(d))
13293}
13294
13295pub const fn is_ldst_immpre(d: u32) -> bool {
13296    (d & 0x3b200c00) == 0x38000c00
13297}
13298
13299pub const fn is_memop(d: u32) -> bool {
13300    (d & 0x3b200c00) == 0x38200000
13301}
13302
13303pub const fn is_ldst_regoff(d: u32) -> bool {
13304    (d & 0x3b200c00) == 0x38200800
13305}
13306
13307pub const fn is_ldst_pac(d: u32) -> bool {
13308    (d & 0x3b200400) == 0x38200400
13309}
13310
13311pub const fn is_ldst_pos(d: u32) -> bool {
13312    (d & 0x3b000000) == 0x39000000
13313}
13314
13315pub const fn is_dp_2src(d: u32) -> bool {
13316    (d & 0x5fe00000) == 0x1ac00000
13317}
13318
13319pub const fn is_dp_1src(d: u32) -> bool {
13320    (d & 0x5fe00000) == 0x5ac00000
13321}
13322
13323pub const fn is_log_shift(d: u32) -> bool {
13324    (d & 0x1f000000) == 0x0a000000
13325}
13326
13327pub const fn is_addsub_shift(d: u32) -> bool {
13328    (d & 0x1f200000) == 0x0b000000
13329}
13330
13331pub const fn is_addsub_ext(d: u32) -> bool {
13332    (d & 0x1f200000) == 0x0b200000
13333}
13334
13335pub const fn is_addsub_carry(d: u32) -> bool {
13336    (d & 0x1fe00000) == 0x1a000000
13337}
13338
13339pub const fn is_condcmp_reg(d: u32) -> bool {
13340    (d & 0x1fe00800) == 0x1a400000
13341}
13342
13343pub const fn is_condcmp_imm(d: u32) -> bool {
13344    (d & 0x1fe00800) == 0x1a400800
13345}
13346
13347pub const fn is_condsel(d: u32) -> bool {
13348    (d & 0x1fe00000) == 0x1a800000
13349}
13350
13351pub const fn is_dp_3src(d: u32) -> bool {
13352    (d & 0x1f000000) == 0x1b000000
13353}
13354
13355pub const fn is_cryptoaes(d: u32) -> bool {
13356    (d & 0xff3e0c00) == 0x4e280800
13357}
13358
13359pub const fn is_cryptosha3(d: u32) -> bool {
13360    (d & 0xff208c00) == 0x5e000000
13361}
13362
13363pub const fn is_cryptosha2(d: u32) -> bool {
13364    (d & 0xff3e0c00) == 0x5e280800
13365}
13366
13367pub const fn is_asisdone(d: u32) -> bool {
13368    (d & 0xdfe08400) == 0x5e000400
13369}
13370
13371pub const fn is_asisdsamefp16(d: u32) -> bool {
13372    (d & 0xdf60c400) == 0x5e400400
13373}
13374
13375pub const fn is_asisdmiscfp16(d: u32) -> bool {
13376    (d & 0xdf7e0c00) == 0x5e780800
13377}
13378
13379pub const fn is_asisdsame2(d: u32) -> bool {
13380    (d & 0xdf208400) == 0x5e008400
13381}
13382
13383pub const fn is_asisdmisc(d: u32) -> bool {
13384    (d & 0xdf3e0c00) == 0x5e200800
13385}
13386
13387pub const fn is_asisdpair(d: u32) -> bool {
13388    (d & 0xdf3e0c00) == 0x5e300800
13389}
13390
13391pub const fn is_asisddiff(d: u32) -> bool {
13392    (d & 0xdf200c00) == 0x5e200000
13393}
13394
13395pub const fn is_asisdsame(d: u32) -> bool {
13396    (d & 0xdf200400) == 0x5e200400
13397}
13398
13399pub const fn is_asisdshf(d: u32) -> bool {
13400    (d & 0xdf800400) == 0x5f000400
13401}
13402
13403pub const fn is_asisdelem(d: u32) -> bool {
13404    (d & 0xdf000400) == 0x5f000000
13405}
13406
13407pub const fn is_asimdtbl(d: u32) -> bool {
13408    (d & 0xbf208c00) == 0x0e000000
13409}
13410
13411pub const fn is_asimdperm(d: u32) -> bool {
13412    (d & 0xbf208c00) == 0x0e000800
13413}
13414
13415pub const fn is_asimdext(d: u32) -> bool {
13416    (d & 0xbf208400) == 0x2e000000
13417}
13418
13419pub const fn is_asimdins(d: u32) -> bool {
13420    (d & 0x9fe08400) == 0x0e000400
13421}
13422
13423pub const fn is_asimdsamefp16(d: u32) -> bool {
13424    (d & 0x9f60c400) == 0x0e400400
13425}
13426
13427pub const fn is_asimdmiscfp16(d: u32) -> bool {
13428    (d & 0x9f7e0c00) == 0x0e780800
13429}
13430
13431pub const fn is_asimdsame2(d: u32) -> bool {
13432    (d & 0x9f208400) == 0x0e008400
13433}
13434
13435pub const fn is_asimdmisc(d: u32) -> bool {
13436    (d & 0x9f3e0c00) == 0x0e200800
13437}
13438
13439pub const fn is_asimdall(d: u32) -> bool {
13440    (d & 0x9f3e0c00) == 0x0e300800
13441}
13442
13443pub const fn is_asimddiff(d: u32) -> bool {
13444    (d & 0x9f200c00) == 0x0e200000
13445}
13446
13447pub const fn is_asimdsame(d: u32) -> bool {
13448    (d & 0x9f200400) == 0x0e200400
13449}
13450
13451pub const fn is_asimdimm(d: u32) -> bool {
13452    (d & 0x9ff80400) == 0x0f000400
13453}
13454
13455pub const fn is_asimdshf(d: u32) -> bool {
13456    (d & 0x9f800400) == 0x0f000400 && (d & 0x780000) != 0x000000
13457}
13458
13459pub const fn is_asimdelem(d: u32) -> bool {
13460    (d & 0x9f000400) == 0x0f000000
13461}
13462
13463pub const fn is_crypto3_imm2(d: u32) -> bool {
13464    (d & 0xffe0c000) == 0xce408000
13465}
13466
13467pub const fn is_cryptosha512_3(d: u32) -> bool {
13468    (d & 0xffe0b000) == 0xce608000
13469}
13470
13471pub const fn is_crypto4(d: u32) -> bool {
13472    (d & 0xff808000) == 0xce000000
13473}
13474
13475pub const fn is_crypto3_imm6(d: u32) -> bool {
13476    (d & 0xffe00000) == 0xce800000
13477}
13478
13479pub const fn is_cryptosha512_2(d: u32) -> bool {
13480    (d & 0xfffff000) == 0xcec08000
13481}
13482
13483pub const fn is_float2fix(d: u32) -> bool {
13484    (d & 0x5f200000) == 0x1e000000
13485}
13486
13487pub const fn is_float2int(d: u32) -> bool {
13488    (d & 0x5f20fc00) == 0x1e200000
13489}
13490
13491pub const fn is_floatdp1(d: u32) -> bool {
13492    (d & 0x5f207c00) == 0x1e204000
13493}
13494
13495pub const fn is_floatcmp(d: u32) -> bool {
13496    (d & 0x5f203c00) == 0x1e202000
13497}
13498
13499pub const fn is_floatimm(d: u32) -> bool {
13500    (d & 0x5f201c00) == 0x1e201000
13501}
13502
13503pub const fn is_floatccmp(d: u32) -> bool {
13504    (d & 0x5f200c00) == 0x1e200400
13505}
13506
13507pub const fn is_floatdp2(d: u32) -> bool {
13508    (d & 0x5f200c00) == 0x1e200800
13509}
13510
13511pub const fn is_floatsel(d: u32) -> bool {
13512    (d & 0x5f200c00) == 0x1e200c00
13513}
13514
13515pub const fn is_floatdp3(d: u32) -> bool {
13516    (d & 0x5f000000) == 0x1f000000
13517}
13518
13519pub const fn is_CBZ_32_compbranch(d: u32) -> bool {
13520    (d & 0xff000000) == 0x34000000
13521}
13522
13523pub const fn is_CBNZ_32_compbranch(d: u32) -> bool {
13524    (d & 0xff000000) == 0x35000000
13525}
13526
13527pub const fn is_CBZ_64_compbranch(d: u32) -> bool {
13528    (d & 0xff000000) == 0xb4000000
13529}
13530
13531pub const fn is_CBNZ_64_compbranch(d: u32) -> bool {
13532    (d & 0xff000000) == 0xb5000000
13533}
13534
13535pub const fn is_B_only_condbranch(d: u32) -> bool {
13536    (d & 0xff000010) == 0x54000000
13537}
13538
13539pub const fn is_SVC_EX_exception(d: u32) -> bool {
13540    (d & 0xffe0001f) == 0xd4000001
13541}
13542
13543pub const fn is_HVC_EX_exception(d: u32) -> bool {
13544    (d & 0xffe0001f) == 0xd4000002
13545}
13546
13547pub const fn is_SMC_EX_exception(d: u32) -> bool {
13548    (d & 0xffe0001f) == 0xd4000003
13549}
13550
13551pub const fn is_BRK_EX_exception(d: u32) -> bool {
13552    (d & 0xffe0001f) == 0xd4200000
13553}
13554
13555pub const fn is_HLT_EX_exception(d: u32) -> bool {
13556    (d & 0xffe0001f) == 0xd4400000
13557}
13558
13559pub const fn is_DCPS1_DC_exception(d: u32) -> bool {
13560    (d & 0xffe0001f) == 0xd4a00001
13561}
13562
13563pub const fn is_DCPS2_DC_exception(d: u32) -> bool {
13564    (d & 0xffe0001f) == 0xd4a00002
13565}
13566
13567pub const fn is_DCPS3_DC_exception(d: u32) -> bool {
13568    (d & 0xffe0001f) == 0xd4a00003
13569}
13570
13571pub const fn is_MSR_SI_system(d: u32) -> bool {
13572    (d & 0xfff8f01f) == 0xd500401f
13573}
13574
13575pub const fn is_HINT_2(d: u32) -> bool {
13576    (d & 0xfffff01f) == 0xd503201f && (d & 0x000d00) != 0x000000
13577}
13578
13579pub const fn is_NOP_HI_system(d: u32) -> bool {
13580    d == 0xd503201f
13581}
13582
13583pub const fn is_YIELD_HI_system(d: u32) -> bool {
13584    d == 0xd503203f
13585}
13586
13587pub const fn is_WFE_HI_system(d: u32) -> bool {
13588    d == 0xd503205f
13589}
13590
13591pub const fn is_WFI_HI_system(d: u32) -> bool {
13592    d == 0xd503207f
13593}
13594
13595pub const fn is_SEV_HI_system(d: u32) -> bool {
13596    d == 0xd503209f
13597}
13598
13599pub const fn is_SEVL_HI_system(d: u32) -> bool {
13600    d == 0xd50320bf
13601}
13602
13603pub const fn is_HINT_1(d: u32) -> bool {
13604    (d & 0xffffffdf) == 0xd50320df
13605}
13606
13607pub const fn is_XPACLRI_HI_system(d: u32) -> bool {
13608    d == 0xd50320ff
13609}
13610
13611pub const fn is_PACIA1716_HI_system(d: u32) -> bool {
13612    d == 0xd503211f
13613}
13614
13615pub const fn is_PACIB1716_HI_system(d: u32) -> bool {
13616    d == 0xd503215f
13617}
13618
13619pub const fn is_AUTIA1716_HI_system(d: u32) -> bool {
13620    d == 0xd503219f
13621}
13622
13623pub const fn is_AUTIB1716_HI_system(d: u32) -> bool {
13624    d == 0xd50321df
13625}
13626
13627pub const fn is_HINT_3(d: u32) -> bool {
13628    (d & 0xffffff1f) == 0xd503221f && (d & 0x0000c0) != 0x000000
13629}
13630
13631pub const fn is_ESB_HI_system(d: u32) -> bool {
13632    d == 0xd503221f
13633}
13634
13635pub const fn is_PSB_HC_system(d: u32) -> bool {
13636    d == 0xd503223f
13637}
13638
13639pub const fn is_PACIAZ_HI_system(d: u32) -> bool {
13640    d == 0xd503231f
13641}
13642
13643pub const fn is_PACIASP_HI_system(d: u32) -> bool {
13644    d == 0xd503233f
13645}
13646
13647pub const fn is_PACIBZ_HI_system(d: u32) -> bool {
13648    d == 0xd503235f
13649}
13650
13651pub const fn is_PACIBSP_HI_system(d: u32) -> bool {
13652    d == 0xd503237f
13653}
13654
13655pub const fn is_AUTIAZ_HI_system(d: u32) -> bool {
13656    d == 0xd503239f
13657}
13658
13659pub const fn is_AUTIASP_HI_system(d: u32) -> bool {
13660    d == 0xd50323bf
13661}
13662
13663pub const fn is_AUTIBZ_HI_system(d: u32) -> bool {
13664    d == 0xd50323df
13665}
13666
13667pub const fn is_AUTIBSP_HI_system(d: u32) -> bool {
13668    d == 0xd50323ff
13669}
13670
13671pub const fn is_CLREX_BN_system(d: u32) -> bool {
13672    (d & 0xfffff0ff) == 0xd503305f
13673}
13674
13675pub const fn is_DSB_BO_system(d: u32) -> bool {
13676    (d & 0xfffff0ff) == 0xd503309f
13677}
13678
13679pub const fn is_DMB_BO_system(d: u32) -> bool {
13680    (d & 0xfffff0ff) == 0xd50330bf
13681}
13682
13683pub const fn is_ISB_BI_system(d: u32) -> bool {
13684    (d & 0xfffff0ff) == 0xd50330df
13685}
13686
13687pub const fn is_SYS_CR_system(d: u32) -> bool {
13688    (d & 0xfff80000) == 0xd5080000
13689}
13690
13691pub const fn is_MSR_SR_system(d: u32) -> bool {
13692    (d & 0xfff00000) == 0xd5100000
13693}
13694
13695pub const fn is_SYSL_RC_system(d: u32) -> bool {
13696    (d & 0xfff80000) == 0xd5280000
13697}
13698
13699pub const fn is_MRS_RS_system(d: u32) -> bool {
13700    (d & 0xfff00000) == 0xd5300000
13701}
13702
13703pub const fn is_TBZ_only_testbranch(d: u32) -> bool {
13704    (d & 0x7f000000) == 0x36000000
13705}
13706
13707pub const fn is_TBNZ_only_testbranch(d: u32) -> bool {
13708    (d & 0x7f000000) == 0x37000000
13709}
13710
13711pub const fn is_B_only_branch_imm(d: u32) -> bool {
13712    (d & 0xfc000000) == 0x14000000
13713}
13714
13715pub const fn is_BL_only_branch_imm(d: u32) -> bool {
13716    (d & 0xfc000000) == 0x94000000
13717}
13718
13719pub const fn is_BR_64_branch_reg(d: u32) -> bool {
13720    (d & 0xfffffc1f) == 0xd61f0000
13721}
13722
13723pub const fn is_BRAAZ_64_branch_reg(d: u32) -> bool {
13724    (d & 0xfffffc1f) == 0xd61f081f
13725}
13726
13727pub const fn is_BRABZ_64_branch_reg(d: u32) -> bool {
13728    (d & 0xfffffc1f) == 0xd61f0c1f
13729}
13730
13731pub const fn is_BLR_64_branch_reg(d: u32) -> bool {
13732    (d & 0xfffffc1f) == 0xd63f0000
13733}
13734
13735pub const fn is_BLRAAZ_64_branch_reg(d: u32) -> bool {
13736    (d & 0xfffffc1f) == 0xd63f081f
13737}
13738
13739pub const fn is_BLRABZ_64_branch_reg(d: u32) -> bool {
13740    (d & 0xfffffc1f) == 0xd63f0c1f
13741}
13742
13743pub const fn is_RET_64R_branch_reg(d: u32) -> bool {
13744    (d & 0xfffffc1f) == 0xd65f0000
13745}
13746
13747pub const fn is_RETAA_64E_branch_reg(d: u32) -> bool {
13748    d == 0xd65f0bff
13749}
13750
13751pub const fn is_RETAB_64E_branch_reg(d: u32) -> bool {
13752    d == 0xd65f0fff
13753}
13754
13755pub const fn is_ERET_64E_branch_reg(d: u32) -> bool {
13756    d == 0xd69f03e0
13757}
13758
13759pub const fn is_ERETAA_64E_branch_reg(d: u32) -> bool {
13760    d == 0xd69f0bff
13761}
13762
13763pub const fn is_ERETAB_64E_branch_reg(d: u32) -> bool {
13764    d == 0xd69f0fff
13765}
13766
13767pub const fn is_DRPS_64E_branch_reg(d: u32) -> bool {
13768    d == 0xd6bf03e0
13769}
13770
13771pub const fn is_BRAA_64P_branch_reg(d: u32) -> bool {
13772    (d & 0xfffffc00) == 0xd71f0800
13773}
13774
13775pub const fn is_BRAB_64P_branch_reg(d: u32) -> bool {
13776    (d & 0xfffffc00) == 0xd71f0c00
13777}
13778
13779pub const fn is_BLRAA_64P_branch_reg(d: u32) -> bool {
13780    (d & 0xfffffc00) == 0xd73f0800
13781}
13782
13783pub const fn is_BLRAB_64P_branch_reg(d: u32) -> bool {
13784    (d & 0xfffffc00) == 0xd73f0c00
13785}
13786
13787pub const fn is_ST4_asisdlse_R4(d: u32) -> bool {
13788    (d & 0xbffff000) == 0x0c000000
13789}
13790
13791pub const fn is_ST1_asisdlse_R4_4v(d: u32) -> bool {
13792    (d & 0xbffff000) == 0x0c002000
13793}
13794
13795pub const fn is_ST3_asisdlse_R3(d: u32) -> bool {
13796    (d & 0xbffff000) == 0x0c004000
13797}
13798
13799pub const fn is_ST1_asisdlse_R3_3v(d: u32) -> bool {
13800    (d & 0xbffff000) == 0x0c006000
13801}
13802
13803pub const fn is_ST1_asisdlse_R1_1v(d: u32) -> bool {
13804    (d & 0xbffff000) == 0x0c007000
13805}
13806
13807pub const fn is_ST2_asisdlse_R2(d: u32) -> bool {
13808    (d & 0xbffff000) == 0x0c008000
13809}
13810
13811pub const fn is_ST1_asisdlse_R2_2v(d: u32) -> bool {
13812    (d & 0xbffff000) == 0x0c00a000
13813}
13814
13815pub const fn is_LD4_asisdlse_R4(d: u32) -> bool {
13816    (d & 0xbffff000) == 0x0c400000
13817}
13818
13819pub const fn is_LD1_asisdlse_R4_4v(d: u32) -> bool {
13820    (d & 0xbffff000) == 0x0c402000
13821}
13822
13823pub const fn is_LD3_asisdlse_R3(d: u32) -> bool {
13824    (d & 0xbffff000) == 0x0c404000
13825}
13826
13827pub const fn is_LD1_asisdlse_R3_3v(d: u32) -> bool {
13828    (d & 0xbffff000) == 0x0c406000
13829}
13830
13831pub const fn is_LD1_asisdlse_R1_1v(d: u32) -> bool {
13832    (d & 0xbffff000) == 0x0c407000
13833}
13834
13835pub const fn is_LD2_asisdlse_R2(d: u32) -> bool {
13836    (d & 0xbffff000) == 0x0c408000
13837}
13838
13839pub const fn is_LD1_asisdlse_R2_2v(d: u32) -> bool {
13840    (d & 0xbffff000) == 0x0c40a000
13841}
13842
13843pub const fn is_ST4_asisdlsep_R4_r(d: u32) -> bool {
13844    (d & 0xbfe0f000) == 0x0c800000 && (d & 0x1f0000) != 0x1f0000
13845}
13846
13847pub const fn is_ST1_asisdlsep_R4_r4(d: u32) -> bool {
13848    (d & 0xbfe0f000) == 0x0c802000 && (d & 0x1f0000) != 0x1f0000
13849}
13850
13851pub const fn is_ST3_asisdlsep_R3_r(d: u32) -> bool {
13852    (d & 0xbfe0f000) == 0x0c804000 && (d & 0x1f0000) != 0x1f0000
13853}
13854
13855pub const fn is_ST1_asisdlsep_R3_r3(d: u32) -> bool {
13856    (d & 0xbfe0f000) == 0x0c806000 && (d & 0x1f0000) != 0x1f0000
13857}
13858
13859pub const fn is_ST1_asisdlsep_R1_r1(d: u32) -> bool {
13860    (d & 0xbfe0f000) == 0x0c807000 && (d & 0x1f0000) != 0x1f0000
13861}
13862
13863pub const fn is_ST2_asisdlsep_R2_r(d: u32) -> bool {
13864    (d & 0xbfe0f000) == 0x0c808000 && (d & 0x1f0000) != 0x1f0000
13865}
13866
13867pub const fn is_ST1_asisdlsep_R2_r2(d: u32) -> bool {
13868    (d & 0xbfe0f000) == 0x0c80a000 && (d & 0x1f0000) != 0x1f0000
13869}
13870
13871pub const fn is_ST4_asisdlsep_I4_i(d: u32) -> bool {
13872    (d & 0xbffff000) == 0x0c9f0000
13873}
13874
13875pub const fn is_ST1_asisdlsep_I4_i4(d: u32) -> bool {
13876    (d & 0xbffff000) == 0x0c9f2000
13877}
13878
13879pub const fn is_ST3_asisdlsep_I3_i(d: u32) -> bool {
13880    (d & 0xbffff000) == 0x0c9f4000
13881}
13882
13883pub const fn is_ST1_asisdlsep_I3_i3(d: u32) -> bool {
13884    (d & 0xbffff000) == 0x0c9f6000
13885}
13886
13887pub const fn is_ST1_asisdlsep_I1_i1(d: u32) -> bool {
13888    (d & 0xbffff000) == 0x0c9f7000
13889}
13890
13891pub const fn is_ST2_asisdlsep_I2_i(d: u32) -> bool {
13892    (d & 0xbffff000) == 0x0c9f8000
13893}
13894
13895pub const fn is_ST1_asisdlsep_I2_i2(d: u32) -> bool {
13896    (d & 0xbffff000) == 0x0c9fa000
13897}
13898
13899pub const fn is_LD4_asisdlsep_R4_r(d: u32) -> bool {
13900    (d & 0xbfe0f000) == 0x0cc00000 && (d & 0x1f0000) != 0x1f0000
13901}
13902
13903pub const fn is_LD1_asisdlsep_R4_r4(d: u32) -> bool {
13904    (d & 0xbfe0f000) == 0x0cc02000 && (d & 0x1f0000) != 0x1f0000
13905}
13906
13907pub const fn is_LD3_asisdlsep_R3_r(d: u32) -> bool {
13908    (d & 0xbfe0f000) == 0x0cc04000 && (d & 0x1f0000) != 0x1f0000
13909}
13910
13911pub const fn is_LD1_asisdlsep_R3_r3(d: u32) -> bool {
13912    (d & 0xbfe0f000) == 0x0cc06000 && (d & 0x1f0000) != 0x1f0000
13913}
13914
13915pub const fn is_LD1_asisdlsep_R1_r1(d: u32) -> bool {
13916    (d & 0xbfe0f000) == 0x0cc07000 && (d & 0x1f0000) != 0x1f0000
13917}
13918
13919pub const fn is_LD2_asisdlsep_R2_r(d: u32) -> bool {
13920    (d & 0xbfe0f000) == 0x0cc08000 && (d & 0x1f0000) != 0x1f0000
13921}
13922
13923pub const fn is_LD1_asisdlsep_R2_r2(d: u32) -> bool {
13924    (d & 0xbfe0f000) == 0x0cc0a000 && (d & 0x1f0000) != 0x1f0000
13925}
13926
13927pub const fn is_LD4_asisdlsep_I4_i(d: u32) -> bool {
13928    (d & 0xbffff000) == 0x0cdf0000
13929}
13930
13931pub const fn is_LD1_asisdlsep_I4_i4(d: u32) -> bool {
13932    (d & 0xbffff000) == 0x0cdf2000
13933}
13934
13935pub const fn is_LD3_asisdlsep_I3_i(d: u32) -> bool {
13936    (d & 0xbffff000) == 0x0cdf4000
13937}
13938
13939pub const fn is_LD1_asisdlsep_I3_i3(d: u32) -> bool {
13940    (d & 0xbffff000) == 0x0cdf6000
13941}
13942
13943pub const fn is_LD1_asisdlsep_I1_i1(d: u32) -> bool {
13944    (d & 0xbffff000) == 0x0cdf7000
13945}
13946
13947pub const fn is_LD2_asisdlsep_I2_i(d: u32) -> bool {
13948    (d & 0xbffff000) == 0x0cdf8000
13949}
13950
13951pub const fn is_LD1_asisdlsep_I2_i2(d: u32) -> bool {
13952    (d & 0xbffff000) == 0x0cdfa000
13953}
13954
13955pub const fn is_ST1_asisdlso_B1_1b(d: u32) -> bool {
13956    (d & 0xbfffe000) == 0x0d000000
13957}
13958
13959pub const fn is_ST3_asisdlso_B3_3b(d: u32) -> bool {
13960    (d & 0xbfffe000) == 0x0d002000
13961}
13962
13963pub const fn is_ST1_asisdlso_H1_1h(d: u32) -> bool {
13964    (d & 0xbfffe400) == 0x0d004000
13965}
13966
13967pub const fn is_ST3_asisdlso_H3_3h(d: u32) -> bool {
13968    (d & 0xbfffe400) == 0x0d006000
13969}
13970
13971pub const fn is_ST1_asisdlso_S1_1s(d: u32) -> bool {
13972    (d & 0xbfffec00) == 0x0d008000
13973}
13974
13975pub const fn is_ST1_asisdlso_D1_1d(d: u32) -> bool {
13976    (d & 0xbffffc00) == 0x0d008400
13977}
13978
13979pub const fn is_ST3_asisdlso_S3_3s(d: u32) -> bool {
13980    (d & 0xbfffec00) == 0x0d00a000
13981}
13982
13983pub const fn is_ST3_asisdlso_D3_3d(d: u32) -> bool {
13984    (d & 0xbffffc00) == 0x0d00a400
13985}
13986
13987pub const fn is_ST2_asisdlso_B2_2b(d: u32) -> bool {
13988    (d & 0xbfffe000) == 0x0d200000
13989}
13990
13991pub const fn is_ST4_asisdlso_B4_4b(d: u32) -> bool {
13992    (d & 0xbfffe000) == 0x0d202000
13993}
13994
13995pub const fn is_ST2_asisdlso_H2_2h(d: u32) -> bool {
13996    (d & 0xbfffe400) == 0x0d204000
13997}
13998
13999pub const fn is_ST4_asisdlso_H4_4h(d: u32) -> bool {
14000    (d & 0xbfffe400) == 0x0d206000
14001}
14002
14003pub const fn is_ST2_asisdlso_S2_2s(d: u32) -> bool {
14004    (d & 0xbfffec00) == 0x0d208000
14005}
14006
14007pub const fn is_ST2_asisdlso_D2_2d(d: u32) -> bool {
14008    (d & 0xbffffc00) == 0x0d208400
14009}
14010
14011pub const fn is_ST4_asisdlso_S4_4s(d: u32) -> bool {
14012    (d & 0xbfffec00) == 0x0d20a000
14013}
14014
14015pub const fn is_ST4_asisdlso_D4_4d(d: u32) -> bool {
14016    (d & 0xbffffc00) == 0x0d20a400
14017}
14018
14019pub const fn is_LD1_asisdlso_B1_1b(d: u32) -> bool {
14020    (d & 0xbfffe000) == 0x0d400000
14021}
14022
14023pub const fn is_LD3_asisdlso_B3_3b(d: u32) -> bool {
14024    (d & 0xbfffe000) == 0x0d402000
14025}
14026
14027pub const fn is_LD1_asisdlso_H1_1h(d: u32) -> bool {
14028    (d & 0xbfffe400) == 0x0d404000
14029}
14030
14031pub const fn is_LD3_asisdlso_H3_3h(d: u32) -> bool {
14032    (d & 0xbfffe400) == 0x0d406000
14033}
14034
14035pub const fn is_LD1_asisdlso_S1_1s(d: u32) -> bool {
14036    (d & 0xbfffec00) == 0x0d408000
14037}
14038
14039pub const fn is_LD1_asisdlso_D1_1d(d: u32) -> bool {
14040    (d & 0xbffffc00) == 0x0d408400
14041}
14042
14043pub const fn is_LD3_asisdlso_S3_3s(d: u32) -> bool {
14044    (d & 0xbfffec00) == 0x0d40a000
14045}
14046
14047pub const fn is_LD3_asisdlso_D3_3d(d: u32) -> bool {
14048    (d & 0xbffffc00) == 0x0d40a400
14049}
14050
14051pub const fn is_LD1R_asisdlso_R1(d: u32) -> bool {
14052    (d & 0xbffff000) == 0x0d40c000
14053}
14054
14055pub const fn is_LD3R_asisdlso_R3(d: u32) -> bool {
14056    (d & 0xbffff000) == 0x0d40e000
14057}
14058
14059pub const fn is_LD2_asisdlso_B2_2b(d: u32) -> bool {
14060    (d & 0xbfffe000) == 0x0d600000
14061}
14062
14063pub const fn is_LD4_asisdlso_B4_4b(d: u32) -> bool {
14064    (d & 0xbfffe000) == 0x0d602000
14065}
14066
14067pub const fn is_LD2_asisdlso_H2_2h(d: u32) -> bool {
14068    (d & 0xbfffe400) == 0x0d604000
14069}
14070
14071pub const fn is_LD4_asisdlso_H4_4h(d: u32) -> bool {
14072    (d & 0xbfffe400) == 0x0d606000
14073}
14074
14075pub const fn is_LD2_asisdlso_S2_2s(d: u32) -> bool {
14076    (d & 0xbfffec00) == 0x0d608000
14077}
14078
14079pub const fn is_LD2_asisdlso_D2_2d(d: u32) -> bool {
14080    (d & 0xbffffc00) == 0x0d608400
14081}
14082
14083pub const fn is_LD4_asisdlso_S4_4s(d: u32) -> bool {
14084    (d & 0xbfffec00) == 0x0d60a000
14085}
14086
14087pub const fn is_LD4_asisdlso_D4_4d(d: u32) -> bool {
14088    (d & 0xbffffc00) == 0x0d60a400
14089}
14090
14091pub const fn is_LD2R_asisdlso_R2(d: u32) -> bool {
14092    (d & 0xbffff000) == 0x0d60c000
14093}
14094
14095pub const fn is_LD4R_asisdlso_R4(d: u32) -> bool {
14096    (d & 0xbffff000) == 0x0d60e000
14097}
14098
14099pub const fn is_ST1_asisdlsop_BX1_r1b(d: u32) -> bool {
14100    (d & 0xbfe0e000) == 0x0d800000 && (d & 0x1f0000) != 0x1f0000
14101}
14102
14103pub const fn is_ST3_asisdlsop_BX3_r3b(d: u32) -> bool {
14104    (d & 0xbfe0e000) == 0x0d802000 && (d & 0x1f0000) != 0x1f0000
14105}
14106
14107pub const fn is_ST1_asisdlsop_HX1_r1h(d: u32) -> bool {
14108    (d & 0xbfe0e400) == 0x0d804000 && (d & 0x1f0000) != 0x1f0000
14109}
14110
14111pub const fn is_ST3_asisdlsop_HX3_r3h(d: u32) -> bool {
14112    (d & 0xbfe0e400) == 0x0d806000 && (d & 0x1f0000) != 0x1f0000
14113}
14114
14115pub const fn is_ST1_asisdlsop_SX1_r1s(d: u32) -> bool {
14116    (d & 0xbfe0ec00) == 0x0d808000 && (d & 0x1f0000) != 0x1f0000
14117}
14118
14119pub const fn is_ST1_asisdlsop_DX1_r1d(d: u32) -> bool {
14120    (d & 0xbfe0fc00) == 0x0d808400 && (d & 0x1f0000) != 0x1f0000
14121}
14122
14123pub const fn is_ST3_asisdlsop_SX3_r3s(d: u32) -> bool {
14124    (d & 0xbfe0ec00) == 0x0d80a000 && (d & 0x1f0000) != 0x1f0000
14125}
14126
14127pub const fn is_ST3_asisdlsop_DX3_r3d(d: u32) -> bool {
14128    (d & 0xbfe0fc00) == 0x0d80a400 && (d & 0x1f0000) != 0x1f0000
14129}
14130
14131pub const fn is_ST1_asisdlsop_B1_i1b(d: u32) -> bool {
14132    (d & 0xbfffe000) == 0x0d9f0000
14133}
14134
14135pub const fn is_ST3_asisdlsop_B3_i3b(d: u32) -> bool {
14136    (d & 0xbfffe000) == 0x0d9f2000
14137}
14138
14139pub const fn is_ST1_asisdlsop_H1_i1h(d: u32) -> bool {
14140    (d & 0xbfffe400) == 0x0d9f4000
14141}
14142
14143pub const fn is_ST3_asisdlsop_H3_i3h(d: u32) -> bool {
14144    (d & 0xbfffe400) == 0x0d9f6000
14145}
14146
14147pub const fn is_ST1_asisdlsop_S1_i1s(d: u32) -> bool {
14148    (d & 0xbfffec00) == 0x0d9f8000
14149}
14150
14151pub const fn is_ST1_asisdlsop_D1_i1d(d: u32) -> bool {
14152    (d & 0xbffffc00) == 0x0d9f8400
14153}
14154
14155pub const fn is_ST3_asisdlsop_S3_i3s(d: u32) -> bool {
14156    (d & 0xbfffec00) == 0x0d9fa000
14157}
14158
14159pub const fn is_ST3_asisdlsop_D3_i3d(d: u32) -> bool {
14160    (d & 0xbffffc00) == 0x0d9fa400
14161}
14162
14163pub const fn is_ST2_asisdlsop_BX2_r2b(d: u32) -> bool {
14164    (d & 0xbfe0e000) == 0x0da00000 && (d & 0x1f0000) != 0x1f0000
14165}
14166
14167pub const fn is_ST4_asisdlsop_BX4_r4b(d: u32) -> bool {
14168    (d & 0xbfe0e000) == 0x0da02000 && (d & 0x1f0000) != 0x1f0000
14169}
14170
14171pub const fn is_ST2_asisdlsop_HX2_r2h(d: u32) -> bool {
14172    (d & 0xbfe0e400) == 0x0da04000 && (d & 0x1f0000) != 0x1f0000
14173}
14174
14175pub const fn is_ST4_asisdlsop_HX4_r4h(d: u32) -> bool {
14176    (d & 0xbfe0e400) == 0x0da06000 && (d & 0x1f0000) != 0x1f0000
14177}
14178
14179pub const fn is_ST2_asisdlsop_SX2_r2s(d: u32) -> bool {
14180    (d & 0xbfe0ec00) == 0x0da08000 && (d & 0x1f0000) != 0x1f0000
14181}
14182
14183pub const fn is_ST2_asisdlsop_DX2_r2d(d: u32) -> bool {
14184    (d & 0xbfe0fc00) == 0x0da08400 && (d & 0x1f0000) != 0x1f0000
14185}
14186
14187pub const fn is_ST4_asisdlsop_SX4_r4s(d: u32) -> bool {
14188    (d & 0xbfe0ec00) == 0x0da0a000 && (d & 0x1f0000) != 0x1f0000
14189}
14190
14191pub const fn is_ST4_asisdlsop_DX4_r4d(d: u32) -> bool {
14192    (d & 0xbfe0fc00) == 0x0da0a400 && (d & 0x1f0000) != 0x1f0000
14193}
14194
14195pub const fn is_ST2_asisdlsop_B2_i2b(d: u32) -> bool {
14196    (d & 0xbfffe000) == 0x0dbf0000
14197}
14198
14199pub const fn is_ST4_asisdlsop_B4_i4b(d: u32) -> bool {
14200    (d & 0xbfffe000) == 0x0dbf2000
14201}
14202
14203pub const fn is_ST2_asisdlsop_H2_i2h(d: u32) -> bool {
14204    (d & 0xbfffe400) == 0x0dbf4000
14205}
14206
14207pub const fn is_ST4_asisdlsop_H4_i4h(d: u32) -> bool {
14208    (d & 0xbfffe400) == 0x0dbf6000
14209}
14210
14211pub const fn is_ST2_asisdlsop_S2_i2s(d: u32) -> bool {
14212    (d & 0xbfffec00) == 0x0dbf8000
14213}
14214
14215pub const fn is_ST2_asisdlsop_D2_i2d(d: u32) -> bool {
14216    (d & 0xbffffc00) == 0x0dbf8400
14217}
14218
14219pub const fn is_ST4_asisdlsop_S4_i4s(d: u32) -> bool {
14220    (d & 0xbfffec00) == 0x0dbfa000
14221}
14222
14223pub const fn is_ST4_asisdlsop_D4_i4d(d: u32) -> bool {
14224    (d & 0xbffffc00) == 0x0dbfa400
14225}
14226
14227pub const fn is_LD1_asisdlsop_BX1_r1b(d: u32) -> bool {
14228    (d & 0xbfe0e000) == 0x0dc00000 && (d & 0x1f0000) != 0x1f0000
14229}
14230
14231pub const fn is_LD3_asisdlsop_BX3_r3b(d: u32) -> bool {
14232    (d & 0xbfe0e000) == 0x0dc02000 && (d & 0x1f0000) != 0x1f0000
14233}
14234
14235pub const fn is_LD1_asisdlsop_HX1_r1h(d: u32) -> bool {
14236    (d & 0xbfe0e400) == 0x0dc04000 && (d & 0x1f0000) != 0x1f0000
14237}
14238
14239pub const fn is_LD3_asisdlsop_HX3_r3h(d: u32) -> bool {
14240    (d & 0xbfe0e400) == 0x0dc06000 && (d & 0x1f0000) != 0x1f0000
14241}
14242
14243pub const fn is_LD1_asisdlsop_SX1_r1s(d: u32) -> bool {
14244    (d & 0xbfe0ec00) == 0x0dc08000 && (d & 0x1f0000) != 0x1f0000
14245}
14246
14247pub const fn is_LD1_asisdlsop_DX1_r1d(d: u32) -> bool {
14248    (d & 0xbfe0fc00) == 0x0dc08400 && (d & 0x1f0000) != 0x1f0000
14249}
14250
14251pub const fn is_LD3_asisdlsop_SX3_r3s(d: u32) -> bool {
14252    (d & 0xbfe0ec00) == 0x0dc0a000 && (d & 0x1f0000) != 0x1f0000
14253}
14254
14255pub const fn is_LD3_asisdlsop_DX3_r3d(d: u32) -> bool {
14256    (d & 0xbfe0fc00) == 0x0dc0a400 && (d & 0x1f0000) != 0x1f0000
14257}
14258
14259pub const fn is_LD1R_asisdlsop_RX1_r(d: u32) -> bool {
14260    (d & 0xbfe0f000) == 0x0dc0c000 && (d & 0x1f0000) != 0x1f0000
14261}
14262
14263pub const fn is_LD3R_asisdlsop_RX3_r(d: u32) -> bool {
14264    (d & 0xbfe0f000) == 0x0dc0e000 && (d & 0x1f0000) != 0x1f0000
14265}
14266
14267pub const fn is_LD1_asisdlsop_B1_i1b(d: u32) -> bool {
14268    (d & 0xbfffe000) == 0x0ddf0000
14269}
14270
14271pub const fn is_LD3_asisdlsop_B3_i3b(d: u32) -> bool {
14272    (d & 0xbfffe000) == 0x0ddf2000
14273}
14274
14275pub const fn is_LD1_asisdlsop_H1_i1h(d: u32) -> bool {
14276    (d & 0xbfffe400) == 0x0ddf4000
14277}
14278
14279pub const fn is_LD3_asisdlsop_H3_i3h(d: u32) -> bool {
14280    (d & 0xbfffe400) == 0x0ddf6000
14281}
14282
14283pub const fn is_LD1_asisdlsop_S1_i1s(d: u32) -> bool {
14284    (d & 0xbfffec00) == 0x0ddf8000
14285}
14286
14287pub const fn is_LD1_asisdlsop_D1_i1d(d: u32) -> bool {
14288    (d & 0xbffffc00) == 0x0ddf8400
14289}
14290
14291pub const fn is_LD3_asisdlsop_S3_i3s(d: u32) -> bool {
14292    (d & 0xbfffec00) == 0x0ddfa000
14293}
14294
14295pub const fn is_LD3_asisdlsop_D3_i3d(d: u32) -> bool {
14296    (d & 0xbffffc00) == 0x0ddfa400
14297}
14298
14299pub const fn is_LD1R_asisdlsop_R1_i(d: u32) -> bool {
14300    (d & 0xbffff000) == 0x0ddfc000
14301}
14302
14303pub const fn is_LD3R_asisdlsop_R3_i(d: u32) -> bool {
14304    (d & 0xbffff000) == 0x0ddfe000
14305}
14306
14307pub const fn is_LD2_asisdlsop_BX2_r2b(d: u32) -> bool {
14308    (d & 0xbfe0e000) == 0x0de00000 && (d & 0x1f0000) != 0x1f0000
14309}
14310
14311pub const fn is_LD4_asisdlsop_BX4_r4b(d: u32) -> bool {
14312    (d & 0xbfe0e000) == 0x0de02000 && (d & 0x1f0000) != 0x1f0000
14313}
14314
14315pub const fn is_LD2_asisdlsop_HX2_r2h(d: u32) -> bool {
14316    (d & 0xbfe0e400) == 0x0de04000 && (d & 0x1f0000) != 0x1f0000
14317}
14318
14319pub const fn is_LD4_asisdlsop_HX4_r4h(d: u32) -> bool {
14320    (d & 0xbfe0e400) == 0x0de06000 && (d & 0x1f0000) != 0x1f0000
14321}
14322
14323pub const fn is_LD2_asisdlsop_SX2_r2s(d: u32) -> bool {
14324    (d & 0xbfe0ec00) == 0x0de08000 && (d & 0x1f0000) != 0x1f0000
14325}
14326
14327pub const fn is_LD2_asisdlsop_DX2_r2d(d: u32) -> bool {
14328    (d & 0xbfe0fc00) == 0x0de08400 && (d & 0x1f0000) != 0x1f0000
14329}
14330
14331pub const fn is_LD4_asisdlsop_SX4_r4s(d: u32) -> bool {
14332    (d & 0xbfe0ec00) == 0x0de0a000 && (d & 0x1f0000) != 0x1f0000
14333}
14334
14335pub const fn is_LD4_asisdlsop_DX4_r4d(d: u32) -> bool {
14336    (d & 0xbfe0fc00) == 0x0de0a400 && (d & 0x1f0000) != 0x1f0000
14337}
14338
14339pub const fn is_LD2R_asisdlsop_RX2_r(d: u32) -> bool {
14340    (d & 0xbfe0f000) == 0x0de0c000 && (d & 0x1f0000) != 0x1f0000
14341}
14342
14343pub const fn is_LD4R_asisdlsop_RX4_r(d: u32) -> bool {
14344    (d & 0xbfe0f000) == 0x0de0e000 && (d & 0x1f0000) != 0x1f0000
14345}
14346
14347pub const fn is_LD2_asisdlsop_B2_i2b(d: u32) -> bool {
14348    (d & 0xbfffe000) == 0x0dff0000
14349}
14350
14351pub const fn is_LD4_asisdlsop_B4_i4b(d: u32) -> bool {
14352    (d & 0xbfffe000) == 0x0dff2000
14353}
14354
14355pub const fn is_LD2_asisdlsop_H2_i2h(d: u32) -> bool {
14356    (d & 0xbfffe400) == 0x0dff4000
14357}
14358
14359pub const fn is_LD4_asisdlsop_H4_i4h(d: u32) -> bool {
14360    (d & 0xbfffe400) == 0x0dff6000
14361}
14362
14363pub const fn is_LD2_asisdlsop_S2_i2s(d: u32) -> bool {
14364    (d & 0xbfffec00) == 0x0dff8000
14365}
14366
14367pub const fn is_LD2_asisdlsop_D2_i2d(d: u32) -> bool {
14368    (d & 0xbffffc00) == 0x0dff8400
14369}
14370
14371pub const fn is_LD4_asisdlsop_S4_i4s(d: u32) -> bool {
14372    (d & 0xbfffec00) == 0x0dffa000
14373}
14374
14375pub const fn is_LD4_asisdlsop_D4_i4d(d: u32) -> bool {
14376    (d & 0xbffffc00) == 0x0dffa400
14377}
14378
14379pub const fn is_LD2R_asisdlsop_R2_i(d: u32) -> bool {
14380    (d & 0xbffff000) == 0x0dffc000
14381}
14382
14383pub const fn is_LD4R_asisdlsop_R4_i(d: u32) -> bool {
14384    (d & 0xbffff000) == 0x0dffe000
14385}
14386
14387pub const fn is_LDADDB_32_memop(d: u32) -> bool {
14388    (d & 0xffe0fc00) == 0x38200000 && (d & 0x00001f) != 0x00001f
14389}
14390
14391pub const fn is_STADDB_32S_memop(d: u32) -> bool {
14392    (d & 0xffe0fc1f) == 0x3820001f
14393}
14394
14395pub const fn is_LDCLRB_32_memop(d: u32) -> bool {
14396    (d & 0xffe0fc00) == 0x38201000 && (d & 0x00001f) != 0x00001f
14397}
14398
14399pub const fn is_STCLRB_32S_memop(d: u32) -> bool {
14400    (d & 0xffe0fc1f) == 0x3820101f
14401}
14402
14403pub const fn is_LDEORB_32_memop(d: u32) -> bool {
14404    (d & 0xffe0fc00) == 0x38202000 && (d & 0x00001f) != 0x00001f
14405}
14406
14407pub const fn is_STEORB_32S_memop(d: u32) -> bool {
14408    (d & 0xffe0fc1f) == 0x3820201f
14409}
14410
14411pub const fn is_LDSETB_32_memop(d: u32) -> bool {
14412    (d & 0xffe0fc00) == 0x38203000 && (d & 0x00001f) != 0x00001f
14413}
14414
14415pub const fn is_STSETB_32S_memop(d: u32) -> bool {
14416    (d & 0xffe0fc1f) == 0x3820301f
14417}
14418
14419pub const fn is_LDSMAXB_32_memop(d: u32) -> bool {
14420    (d & 0xffe0fc00) == 0x38204000 && (d & 0x00001f) != 0x00001f
14421}
14422
14423pub const fn is_STSMAXB_32S_memop(d: u32) -> bool {
14424    (d & 0xffe0fc1f) == 0x3820401f
14425}
14426
14427pub const fn is_LDSMINB_32_memop(d: u32) -> bool {
14428    (d & 0xffe0fc00) == 0x38205000 && (d & 0x00001f) != 0x00001f
14429}
14430
14431pub const fn is_STSMINB_32S_memop(d: u32) -> bool {
14432    (d & 0xffe0fc1f) == 0x3820501f
14433}
14434
14435pub const fn is_LDUMAXB_32_memop(d: u32) -> bool {
14436    (d & 0xffe0fc00) == 0x38206000 && (d & 0x00001f) != 0x00001f
14437}
14438
14439pub const fn is_STUMAXB_32S_memop(d: u32) -> bool {
14440    (d & 0xffe0fc1f) == 0x3820601f
14441}
14442
14443pub const fn is_LDUMINB_32_memop(d: u32) -> bool {
14444    (d & 0xffe0fc00) == 0x38207000 && (d & 0x00001f) != 0x00001f
14445}
14446
14447pub const fn is_STUMINB_32S_memop(d: u32) -> bool {
14448    (d & 0xffe0fc1f) == 0x3820701f
14449}
14450
14451pub const fn is_SWPB_32_memop(d: u32) -> bool {
14452    (d & 0xffe0fc00) == 0x38208000
14453}
14454
14455pub const fn is_LDADDLB_32_memop(d: u32) -> bool {
14456    (d & 0xffe0fc00) == 0x38600000 && (d & 0x00001f) != 0x00001f
14457}
14458
14459pub const fn is_STADDLB_32S_memop(d: u32) -> bool {
14460    (d & 0xffe0fc1f) == 0x3860001f
14461}
14462
14463pub const fn is_LDCLRLB_32_memop(d: u32) -> bool {
14464    (d & 0xffe0fc00) == 0x38601000 && (d & 0x00001f) != 0x00001f
14465}
14466
14467pub const fn is_STCLRLB_32S_memop(d: u32) -> bool {
14468    (d & 0xffe0fc1f) == 0x3860101f
14469}
14470
14471pub const fn is_LDEORLB_32_memop(d: u32) -> bool {
14472    (d & 0xffe0fc00) == 0x38602000 && (d & 0x00001f) != 0x00001f
14473}
14474
14475pub const fn is_STEORLB_32S_memop(d: u32) -> bool {
14476    (d & 0xffe0fc1f) == 0x3860201f
14477}
14478
14479pub const fn is_LDSETLB_32_memop(d: u32) -> bool {
14480    (d & 0xffe0fc00) == 0x38603000 && (d & 0x00001f) != 0x00001f
14481}
14482
14483pub const fn is_STSETLB_32S_memop(d: u32) -> bool {
14484    (d & 0xffe0fc1f) == 0x3860301f
14485}
14486
14487pub const fn is_LDSMAXLB_32_memop(d: u32) -> bool {
14488    (d & 0xffe0fc00) == 0x38604000 && (d & 0x00001f) != 0x00001f
14489}
14490
14491pub const fn is_STSMAXLB_32S_memop(d: u32) -> bool {
14492    (d & 0xffe0fc1f) == 0x3860401f
14493}
14494
14495pub const fn is_LDSMINLB_32_memop(d: u32) -> bool {
14496    (d & 0xffe0fc00) == 0x38605000 && (d & 0x00001f) != 0x00001f
14497}
14498
14499pub const fn is_STSMINLB_32S_memop(d: u32) -> bool {
14500    (d & 0xffe0fc1f) == 0x3860501f
14501}
14502
14503pub const fn is_LDUMAXLB_32_memop(d: u32) -> bool {
14504    (d & 0xffe0fc00) == 0x38606000 && (d & 0x00001f) != 0x00001f
14505}
14506
14507pub const fn is_STUMAXLB_32S_memop(d: u32) -> bool {
14508    (d & 0xffe0fc1f) == 0x3860601f
14509}
14510
14511pub const fn is_LDUMINLB_32_memop(d: u32) -> bool {
14512    (d & 0xffe0fc00) == 0x38607000 && (d & 0x00001f) != 0x00001f
14513}
14514
14515pub const fn is_STUMINLB_32S_memop(d: u32) -> bool {
14516    (d & 0xffe0fc1f) == 0x3860701f
14517}
14518
14519pub const fn is_SWPLB_32_memop(d: u32) -> bool {
14520    (d & 0xffe0fc00) == 0x38608000
14521}
14522
14523pub const fn is_LDADDAB_32_memop(d: u32) -> bool {
14524    (d & 0xffe0fc00) == 0x38a00000
14525}
14526
14527pub const fn is_LDCLRAB_32_memop(d: u32) -> bool {
14528    (d & 0xffe0fc00) == 0x38a01000
14529}
14530
14531pub const fn is_LDEORAB_32_memop(d: u32) -> bool {
14532    (d & 0xffe0fc00) == 0x38a02000
14533}
14534
14535pub const fn is_LDSETAB_32_memop(d: u32) -> bool {
14536    (d & 0xffe0fc00) == 0x38a03000
14537}
14538
14539pub const fn is_LDSMAXAB_32_memop(d: u32) -> bool {
14540    (d & 0xffe0fc00) == 0x38a04000
14541}
14542
14543pub const fn is_LDSMINAB_32_memop(d: u32) -> bool {
14544    (d & 0xffe0fc00) == 0x38a05000
14545}
14546
14547pub const fn is_LDUMAXAB_32_memop(d: u32) -> bool {
14548    (d & 0xffe0fc00) == 0x38a06000
14549}
14550
14551pub const fn is_LDUMINAB_32_memop(d: u32) -> bool {
14552    (d & 0xffe0fc00) == 0x38a07000
14553}
14554
14555pub const fn is_SWPAB_32_memop(d: u32) -> bool {
14556    (d & 0xffe0fc00) == 0x38a08000
14557}
14558
14559pub const fn is_LDAPRB_32L_memop(d: u32) -> bool {
14560    (d & 0xffe0fc00) == 0x38a0c000
14561}
14562
14563pub const fn is_LDADDALB_32_memop(d: u32) -> bool {
14564    (d & 0xffe0fc00) == 0x38e00000
14565}
14566
14567pub const fn is_LDCLRALB_32_memop(d: u32) -> bool {
14568    (d & 0xffe0fc00) == 0x38e01000
14569}
14570
14571pub const fn is_LDEORALB_32_memop(d: u32) -> bool {
14572    (d & 0xffe0fc00) == 0x38e02000
14573}
14574
14575pub const fn is_LDSETALB_32_memop(d: u32) -> bool {
14576    (d & 0xffe0fc00) == 0x38e03000
14577}
14578
14579pub const fn is_LDSMAXALB_32_memop(d: u32) -> bool {
14580    (d & 0xffe0fc00) == 0x38e04000
14581}
14582
14583pub const fn is_LDSMINALB_32_memop(d: u32) -> bool {
14584    (d & 0xffe0fc00) == 0x38e05000
14585}
14586
14587pub const fn is_LDUMAXALB_32_memop(d: u32) -> bool {
14588    (d & 0xffe0fc00) == 0x38e06000
14589}
14590
14591pub const fn is_LDUMINALB_32_memop(d: u32) -> bool {
14592    (d & 0xffe0fc00) == 0x38e07000
14593}
14594
14595pub const fn is_SWPALB_32_memop(d: u32) -> bool {
14596    (d & 0xffe0fc00) == 0x38e08000
14597}
14598
14599pub const fn is_LDADDH_32_memop(d: u32) -> bool {
14600    (d & 0xffe0fc00) == 0x78200000 && (d & 0x00001f) != 0x00001f
14601}
14602
14603pub const fn is_STADDH_32S_memop(d: u32) -> bool {
14604    (d & 0xffe0fc1f) == 0x7820001f
14605}
14606
14607pub const fn is_LDCLRH_32_memop(d: u32) -> bool {
14608    (d & 0xffe0fc00) == 0x78201000 && (d & 0x00001f) != 0x00001f
14609}
14610
14611pub const fn is_STCLRH_32S_memop(d: u32) -> bool {
14612    (d & 0xffe0fc1f) == 0x7820101f
14613}
14614
14615pub const fn is_LDEORH_32_memop(d: u32) -> bool {
14616    (d & 0xffe0fc00) == 0x78202000 && (d & 0x00001f) != 0x00001f
14617}
14618
14619pub const fn is_STEORH_32S_memop(d: u32) -> bool {
14620    (d & 0xffe0fc1f) == 0x7820201f
14621}
14622
14623pub const fn is_LDSETH_32_memop(d: u32) -> bool {
14624    (d & 0xffe0fc00) == 0x78203000 && (d & 0x00001f) != 0x00001f
14625}
14626
14627pub const fn is_STSETH_32S_memop(d: u32) -> bool {
14628    (d & 0xffe0fc1f) == 0x7820301f
14629}
14630
14631pub const fn is_LDSMAXH_32_memop(d: u32) -> bool {
14632    (d & 0xffe0fc00) == 0x78204000 && (d & 0x00001f) != 0x00001f
14633}
14634
14635pub const fn is_STSMAXH_32S_memop(d: u32) -> bool {
14636    (d & 0xffe0fc1f) == 0x7820401f
14637}
14638
14639pub const fn is_LDSMINH_32_memop(d: u32) -> bool {
14640    (d & 0xffe0fc00) == 0x78205000 && (d & 0x00001f) != 0x00001f
14641}
14642
14643pub const fn is_STSMINH_32S_memop(d: u32) -> bool {
14644    (d & 0xffe0fc1f) == 0x7820501f
14645}
14646
14647pub const fn is_LDUMAXH_32_memop(d: u32) -> bool {
14648    (d & 0xffe0fc00) == 0x78206000 && (d & 0x00001f) != 0x00001f
14649}
14650
14651pub const fn is_STUMAXH_32S_memop(d: u32) -> bool {
14652    (d & 0xffe0fc1f) == 0x7820601f
14653}
14654
14655pub const fn is_LDUMINH_32_memop(d: u32) -> bool {
14656    (d & 0xffe0fc00) == 0x78207000 && (d & 0x00001f) != 0x00001f
14657}
14658
14659pub const fn is_STUMINH_32S_memop(d: u32) -> bool {
14660    (d & 0xffe0fc1f) == 0x7820701f
14661}
14662
14663pub const fn is_SWPH_32_memop(d: u32) -> bool {
14664    (d & 0xffe0fc00) == 0x78208000
14665}
14666
14667pub const fn is_LDADDLH_32_memop(d: u32) -> bool {
14668    (d & 0xffe0fc00) == 0x78600000 && (d & 0x00001f) != 0x00001f
14669}
14670
14671pub const fn is_STADDLH_32S_memop(d: u32) -> bool {
14672    (d & 0xffe0fc1f) == 0x7860001f
14673}
14674
14675pub const fn is_LDCLRLH_32_memop(d: u32) -> bool {
14676    (d & 0xffe0fc00) == 0x78601000 && (d & 0x00001f) != 0x00001f
14677}
14678
14679pub const fn is_STCLRLH_32S_memop(d: u32) -> bool {
14680    (d & 0xffe0fc1f) == 0x7860101f
14681}
14682
14683pub const fn is_LDEORLH_32_memop(d: u32) -> bool {
14684    (d & 0xffe0fc00) == 0x78602000 && (d & 0x00001f) != 0x00001f
14685}
14686
14687pub const fn is_STEORLH_32S_memop(d: u32) -> bool {
14688    (d & 0xffe0fc1f) == 0x7860201f
14689}
14690
14691pub const fn is_LDSETLH_32_memop(d: u32) -> bool {
14692    (d & 0xffe0fc00) == 0x78603000 && (d & 0x00001f) != 0x00001f
14693}
14694
14695pub const fn is_STSETLH_32S_memop(d: u32) -> bool {
14696    (d & 0xffe0fc1f) == 0x7860301f
14697}
14698
14699pub const fn is_LDSMAXLH_32_memop(d: u32) -> bool {
14700    (d & 0xffe0fc00) == 0x78604000 && (d & 0x00001f) != 0x00001f
14701}
14702
14703pub const fn is_STSMAXLH_32S_memop(d: u32) -> bool {
14704    (d & 0xffe0fc1f) == 0x7860401f
14705}
14706
14707pub const fn is_LDSMINLH_32_memop(d: u32) -> bool {
14708    (d & 0xffe0fc00) == 0x78605000 && (d & 0x00001f) != 0x00001f
14709}
14710
14711pub const fn is_STSMINLH_32S_memop(d: u32) -> bool {
14712    (d & 0xffe0fc1f) == 0x7860501f
14713}
14714
14715pub const fn is_LDUMAXLH_32_memop(d: u32) -> bool {
14716    (d & 0xffe0fc00) == 0x78606000 && (d & 0x00001f) != 0x00001f
14717}
14718
14719pub const fn is_STUMAXLH_32S_memop(d: u32) -> bool {
14720    (d & 0xffe0fc1f) == 0x7860601f
14721}
14722
14723pub const fn is_LDUMINLH_32_memop(d: u32) -> bool {
14724    (d & 0xffe0fc00) == 0x78607000 && (d & 0x00001f) != 0x00001f
14725}
14726
14727pub const fn is_STUMINLH_32S_memop(d: u32) -> bool {
14728    (d & 0xffe0fc1f) == 0x7860701f
14729}
14730
14731pub const fn is_SWPLH_32_memop(d: u32) -> bool {
14732    (d & 0xffe0fc00) == 0x78608000
14733}
14734
14735pub const fn is_LDADDAH_32_memop(d: u32) -> bool {
14736    (d & 0xffe0fc00) == 0x78a00000
14737}
14738
14739pub const fn is_LDCLRAH_32_memop(d: u32) -> bool {
14740    (d & 0xffe0fc00) == 0x78a01000
14741}
14742
14743pub const fn is_LDEORAH_32_memop(d: u32) -> bool {
14744    (d & 0xffe0fc00) == 0x78a02000
14745}
14746
14747pub const fn is_LDSETAH_32_memop(d: u32) -> bool {
14748    (d & 0xffe0fc00) == 0x78a03000
14749}
14750
14751pub const fn is_LDSMAXAH_32_memop(d: u32) -> bool {
14752    (d & 0xffe0fc00) == 0x78a04000
14753}
14754
14755pub const fn is_LDSMINAH_32_memop(d: u32) -> bool {
14756    (d & 0xffe0fc00) == 0x78a05000
14757}
14758
14759pub const fn is_LDUMAXAH_32_memop(d: u32) -> bool {
14760    (d & 0xffe0fc00) == 0x78a06000
14761}
14762
14763pub const fn is_LDUMINAH_32_memop(d: u32) -> bool {
14764    (d & 0xffe0fc00) == 0x78a07000
14765}
14766
14767pub const fn is_SWPAH_32_memop(d: u32) -> bool {
14768    (d & 0xffe0fc00) == 0x78a08000
14769}
14770
14771pub const fn is_LDAPRH_32L_memop(d: u32) -> bool {
14772    (d & 0xffe0fc00) == 0x78a0c000
14773}
14774
14775pub const fn is_LDADDALH_32_memop(d: u32) -> bool {
14776    (d & 0xffe0fc00) == 0x78e00000
14777}
14778
14779pub const fn is_LDCLRALH_32_memop(d: u32) -> bool {
14780    (d & 0xffe0fc00) == 0x78e01000
14781}
14782
14783pub const fn is_LDEORALH_32_memop(d: u32) -> bool {
14784    (d & 0xffe0fc00) == 0x78e02000
14785}
14786
14787pub const fn is_LDSETALH_32_memop(d: u32) -> bool {
14788    (d & 0xffe0fc00) == 0x78e03000
14789}
14790
14791pub const fn is_LDSMAXALH_32_memop(d: u32) -> bool {
14792    (d & 0xffe0fc00) == 0x78e04000
14793}
14794
14795pub const fn is_LDSMINALH_32_memop(d: u32) -> bool {
14796    (d & 0xffe0fc00) == 0x78e05000
14797}
14798
14799pub const fn is_LDUMAXALH_32_memop(d: u32) -> bool {
14800    (d & 0xffe0fc00) == 0x78e06000
14801}
14802
14803pub const fn is_LDUMINALH_32_memop(d: u32) -> bool {
14804    (d & 0xffe0fc00) == 0x78e07000
14805}
14806
14807pub const fn is_SWPALH_32_memop(d: u32) -> bool {
14808    (d & 0xffe0fc00) == 0x78e08000
14809}
14810
14811pub const fn is_LDADD_32_memop(d: u32) -> bool {
14812    (d & 0xffe0fc00) == 0xb8200000 && (d & 0x00001f) != 0x00001f
14813}
14814
14815pub const fn is_STADD_32S_memop(d: u32) -> bool {
14816    (d & 0xffe0fc1f) == 0xb820001f
14817}
14818
14819pub const fn is_LDCLR_32_memop(d: u32) -> bool {
14820    (d & 0xffe0fc00) == 0xb8201000 && (d & 0x00001f) != 0x00001f
14821}
14822
14823pub const fn is_STCLR_32S_memop(d: u32) -> bool {
14824    (d & 0xffe0fc1f) == 0xb820101f
14825}
14826
14827pub const fn is_LDEOR_32_memop(d: u32) -> bool {
14828    (d & 0xffe0fc00) == 0xb8202000 && (d & 0x00001f) != 0x00001f
14829}
14830
14831pub const fn is_STEOR_32S_memop(d: u32) -> bool {
14832    (d & 0xffe0fc1f) == 0xb820201f
14833}
14834
14835pub const fn is_LDSET_32_memop(d: u32) -> bool {
14836    (d & 0xffe0fc00) == 0xb8203000 && (d & 0x00001f) != 0x00001f
14837}
14838
14839pub const fn is_STSET_32S_memop(d: u32) -> bool {
14840    (d & 0xffe0fc1f) == 0xb820301f
14841}
14842
14843pub const fn is_LDSMAX_32_memop(d: u32) -> bool {
14844    (d & 0xffe0fc00) == 0xb8204000 && (d & 0x00001f) != 0x00001f
14845}
14846
14847pub const fn is_STSMAX_32S_memop(d: u32) -> bool {
14848    (d & 0xffe0fc1f) == 0xb820401f
14849}
14850
14851pub const fn is_LDSMIN_32_memop(d: u32) -> bool {
14852    (d & 0xffe0fc00) == 0xb8205000 && (d & 0x00001f) != 0x00001f
14853}
14854
14855pub const fn is_STSMIN_32S_memop(d: u32) -> bool {
14856    (d & 0xffe0fc1f) == 0xb820501f
14857}
14858
14859pub const fn is_LDUMAX_32_memop(d: u32) -> bool {
14860    (d & 0xffe0fc00) == 0xb8206000 && (d & 0x00001f) != 0x00001f
14861}
14862
14863pub const fn is_STUMAX_32S_memop(d: u32) -> bool {
14864    (d & 0xffe0fc1f) == 0xb820601f
14865}
14866
14867pub const fn is_LDUMIN_32_memop(d: u32) -> bool {
14868    (d & 0xffe0fc00) == 0xb8207000 && (d & 0x00001f) != 0x00001f
14869}
14870
14871pub const fn is_STUMIN_32S_memop(d: u32) -> bool {
14872    (d & 0xffe0fc1f) == 0xb820701f
14873}
14874
14875pub const fn is_SWP_32_memop(d: u32) -> bool {
14876    (d & 0xffe0fc00) == 0xb8208000
14877}
14878
14879pub const fn is_LDADDL_32_memop(d: u32) -> bool {
14880    (d & 0xffe0fc00) == 0xb8600000 && (d & 0x00001f) != 0x00001f
14881}
14882
14883pub const fn is_STADDL_32S_memop(d: u32) -> bool {
14884    (d & 0xffe0fc1f) == 0xb860001f
14885}
14886
14887pub const fn is_LDCLRL_32_memop(d: u32) -> bool {
14888    (d & 0xffe0fc00) == 0xb8601000 && (d & 0x00001f) != 0x00001f
14889}
14890
14891pub const fn is_STCLRL_32S_memop(d: u32) -> bool {
14892    (d & 0xffe0fc1f) == 0xb860101f
14893}
14894
14895pub const fn is_LDEORL_32_memop(d: u32) -> bool {
14896    (d & 0xffe0fc00) == 0xb8602000 && (d & 0x00001f) != 0x00001f
14897}
14898
14899pub const fn is_STEORL_32S_memop(d: u32) -> bool {
14900    (d & 0xffe0fc1f) == 0xb860201f
14901}
14902
14903pub const fn is_LDSETL_32_memop(d: u32) -> bool {
14904    (d & 0xffe0fc00) == 0xb8603000 && (d & 0x00001f) != 0x00001f
14905}
14906
14907pub const fn is_STSETL_32S_memop(d: u32) -> bool {
14908    (d & 0xffe0fc1f) == 0xb860301f
14909}
14910
14911pub const fn is_LDSMAXL_32_memop(d: u32) -> bool {
14912    (d & 0xffe0fc00) == 0xb8604000 && (d & 0x00001f) != 0x00001f
14913}
14914
14915pub const fn is_STSMAXL_32S_memop(d: u32) -> bool {
14916    (d & 0xffe0fc1f) == 0xb860401f
14917}
14918
14919pub const fn is_LDSMINL_32_memop(d: u32) -> bool {
14920    (d & 0xffe0fc00) == 0xb8605000 && (d & 0x00001f) != 0x00001f
14921}
14922
14923pub const fn is_STSMINL_32S_memop(d: u32) -> bool {
14924    (d & 0xffe0fc1f) == 0xb860501f
14925}
14926
14927pub const fn is_LDUMAXL_32_memop(d: u32) -> bool {
14928    (d & 0xffe0fc00) == 0xb8606000 && (d & 0x00001f) != 0x00001f
14929}
14930
14931pub const fn is_STUMAXL_32S_memop(d: u32) -> bool {
14932    (d & 0xffe0fc1f) == 0xb860601f
14933}
14934
14935pub const fn is_LDUMINL_32_memop(d: u32) -> bool {
14936    (d & 0xffe0fc00) == 0xb8607000 && (d & 0x00001f) != 0x00001f
14937}
14938
14939pub const fn is_STUMINL_32S_memop(d: u32) -> bool {
14940    (d & 0xffe0fc1f) == 0xb860701f
14941}
14942
14943pub const fn is_SWPL_32_memop(d: u32) -> bool {
14944    (d & 0xffe0fc00) == 0xb8608000
14945}
14946
14947pub const fn is_LDADDA_32_memop(d: u32) -> bool {
14948    (d & 0xffe0fc00) == 0xb8a00000
14949}
14950
14951pub const fn is_LDCLRA_32_memop(d: u32) -> bool {
14952    (d & 0xffe0fc00) == 0xb8a01000
14953}
14954
14955pub const fn is_LDEORA_32_memop(d: u32) -> bool {
14956    (d & 0xffe0fc00) == 0xb8a02000
14957}
14958
14959pub const fn is_LDSETA_32_memop(d: u32) -> bool {
14960    (d & 0xffe0fc00) == 0xb8a03000
14961}
14962
14963pub const fn is_LDSMAXA_32_memop(d: u32) -> bool {
14964    (d & 0xffe0fc00) == 0xb8a04000
14965}
14966
14967pub const fn is_LDSMINA_32_memop(d: u32) -> bool {
14968    (d & 0xffe0fc00) == 0xb8a05000
14969}
14970
14971pub const fn is_LDUMAXA_32_memop(d: u32) -> bool {
14972    (d & 0xffe0fc00) == 0xb8a06000
14973}
14974
14975pub const fn is_LDUMINA_32_memop(d: u32) -> bool {
14976    (d & 0xffe0fc00) == 0xb8a07000
14977}
14978
14979pub const fn is_SWPA_32_memop(d: u32) -> bool {
14980    (d & 0xffe0fc00) == 0xb8a08000
14981}
14982
14983pub const fn is_LDAPR_32L_memop(d: u32) -> bool {
14984    (d & 0xffe0fc00) == 0xb8a0c000
14985}
14986
14987pub const fn is_LDADDAL_32_memop(d: u32) -> bool {
14988    (d & 0xffe0fc00) == 0xb8e00000
14989}
14990
14991pub const fn is_LDCLRAL_32_memop(d: u32) -> bool {
14992    (d & 0xffe0fc00) == 0xb8e01000
14993}
14994
14995pub const fn is_LDEORAL_32_memop(d: u32) -> bool {
14996    (d & 0xffe0fc00) == 0xb8e02000
14997}
14998
14999pub const fn is_LDSETAL_32_memop(d: u32) -> bool {
15000    (d & 0xffe0fc00) == 0xb8e03000
15001}
15002
15003pub const fn is_LDSMAXAL_32_memop(d: u32) -> bool {
15004    (d & 0xffe0fc00) == 0xb8e04000
15005}
15006
15007pub const fn is_LDSMINAL_32_memop(d: u32) -> bool {
15008    (d & 0xffe0fc00) == 0xb8e05000
15009}
15010
15011pub const fn is_LDUMAXAL_32_memop(d: u32) -> bool {
15012    (d & 0xffe0fc00) == 0xb8e06000
15013}
15014
15015pub const fn is_LDUMINAL_32_memop(d: u32) -> bool {
15016    (d & 0xffe0fc00) == 0xb8e07000
15017}
15018
15019pub const fn is_SWPAL_32_memop(d: u32) -> bool {
15020    (d & 0xffe0fc00) == 0xb8e08000
15021}
15022
15023pub const fn is_LDADD_64_memop(d: u32) -> bool {
15024    (d & 0xffe0fc00) == 0xf8200000 && (d & 0x00001f) != 0x00001f
15025}
15026
15027pub const fn is_STADD_64S_memop(d: u32) -> bool {
15028    (d & 0xffe0fc1f) == 0xf820001f
15029}
15030
15031pub const fn is_LDCLR_64_memop(d: u32) -> bool {
15032    (d & 0xffe0fc00) == 0xf8201000 && (d & 0x00001f) != 0x00001f
15033}
15034
15035pub const fn is_STCLR_64S_memop(d: u32) -> bool {
15036    (d & 0xffe0fc1f) == 0xf820101f
15037}
15038
15039pub const fn is_LDEOR_64_memop(d: u32) -> bool {
15040    (d & 0xffe0fc00) == 0xf8202000 && (d & 0x00001f) != 0x00001f
15041}
15042
15043pub const fn is_STEOR_64S_memop(d: u32) -> bool {
15044    (d & 0xffe0fc1f) == 0xf820201f
15045}
15046
15047pub const fn is_LDSET_64_memop(d: u32) -> bool {
15048    (d & 0xffe0fc00) == 0xf8203000 && (d & 0x00001f) != 0x00001f
15049}
15050
15051pub const fn is_STSET_64S_memop(d: u32) -> bool {
15052    (d & 0xffe0fc1f) == 0xf820301f
15053}
15054
15055pub const fn is_LDSMAX_64_memop(d: u32) -> bool {
15056    (d & 0xffe0fc00) == 0xf8204000 && (d & 0x00001f) != 0x00001f
15057}
15058
15059pub const fn is_STSMAX_64S_memop(d: u32) -> bool {
15060    (d & 0xffe0fc1f) == 0xf820401f
15061}
15062
15063pub const fn is_LDSMIN_64_memop(d: u32) -> bool {
15064    (d & 0xffe0fc00) == 0xf8205000 && (d & 0x00001f) != 0x00001f
15065}
15066
15067pub const fn is_STSMIN_64S_memop(d: u32) -> bool {
15068    (d & 0xffe0fc1f) == 0xf820501f
15069}
15070
15071pub const fn is_LDUMAX_64_memop(d: u32) -> bool {
15072    (d & 0xffe0fc00) == 0xf8206000 && (d & 0x00001f) != 0x00001f
15073}
15074
15075pub const fn is_STUMAX_64S_memop(d: u32) -> bool {
15076    (d & 0xffe0fc1f) == 0xf820601f
15077}
15078
15079pub const fn is_LDUMIN_64_memop(d: u32) -> bool {
15080    (d & 0xffe0fc00) == 0xf8207000 && (d & 0x00001f) != 0x00001f
15081}
15082
15083pub const fn is_STUMIN_64S_memop(d: u32) -> bool {
15084    (d & 0xffe0fc1f) == 0xf820701f
15085}
15086
15087pub const fn is_SWP_64_memop(d: u32) -> bool {
15088    (d & 0xffe0fc00) == 0xf8208000
15089}
15090
15091pub const fn is_LDADDL_64_memop(d: u32) -> bool {
15092    (d & 0xffe0fc00) == 0xf8600000 && (d & 0x00001f) != 0x00001f
15093}
15094
15095pub const fn is_STADDL_64S_memop(d: u32) -> bool {
15096    (d & 0xffe0fc1f) == 0xf860001f
15097}
15098
15099pub const fn is_LDCLRL_64_memop(d: u32) -> bool {
15100    (d & 0xffe0fc00) == 0xf8601000 && (d & 0x00001f) != 0x00001f
15101}
15102
15103pub const fn is_STCLRL_64S_memop(d: u32) -> bool {
15104    (d & 0xffe0fc1f) == 0xf860101f
15105}
15106
15107pub const fn is_LDEORL_64_memop(d: u32) -> bool {
15108    (d & 0xffe0fc00) == 0xf8602000 && (d & 0x00001f) != 0x00001f
15109}
15110
15111pub const fn is_STEORL_64S_memop(d: u32) -> bool {
15112    (d & 0xffe0fc1f) == 0xf860201f
15113}
15114
15115pub const fn is_LDSETL_64_memop(d: u32) -> bool {
15116    (d & 0xffe0fc00) == 0xf8603000 && (d & 0x00001f) != 0x00001f
15117}
15118
15119pub const fn is_STSETL_64S_memop(d: u32) -> bool {
15120    (d & 0xffe0fc1f) == 0xf860301f
15121}
15122
15123pub const fn is_LDSMAXL_64_memop(d: u32) -> bool {
15124    (d & 0xffe0fc00) == 0xf8604000 && (d & 0x00001f) != 0x00001f
15125}
15126
15127pub const fn is_STSMAXL_64S_memop(d: u32) -> bool {
15128    (d & 0xffe0fc1f) == 0xf860401f
15129}
15130
15131pub const fn is_LDSMINL_64_memop(d: u32) -> bool {
15132    (d & 0xffe0fc00) == 0xf8605000 && (d & 0x00001f) != 0x00001f
15133}
15134
15135pub const fn is_STSMINL_64S_memop(d: u32) -> bool {
15136    (d & 0xffe0fc1f) == 0xf860501f
15137}
15138
15139pub const fn is_LDUMAXL_64_memop(d: u32) -> bool {
15140    (d & 0xffe0fc00) == 0xf8606000 && (d & 0x00001f) != 0x00001f
15141}
15142
15143pub const fn is_STUMAXL_64S_memop(d: u32) -> bool {
15144    (d & 0xffe0fc1f) == 0xf860601f
15145}
15146
15147pub const fn is_LDUMINL_64_memop(d: u32) -> bool {
15148    (d & 0xffe0fc00) == 0xf8607000 && (d & 0x00001f) != 0x00001f
15149}
15150
15151pub const fn is_STUMINL_64S_memop(d: u32) -> bool {
15152    (d & 0xffe0fc1f) == 0xf860701f
15153}
15154
15155pub const fn is_SWPL_64_memop(d: u32) -> bool {
15156    (d & 0xffe0fc00) == 0xf8608000
15157}
15158
15159pub const fn is_LDADDA_64_memop(d: u32) -> bool {
15160    (d & 0xffe0fc00) == 0xf8a00000
15161}
15162
15163pub const fn is_LDCLRA_64_memop(d: u32) -> bool {
15164    (d & 0xffe0fc00) == 0xf8a01000
15165}
15166
15167pub const fn is_LDEORA_64_memop(d: u32) -> bool {
15168    (d & 0xffe0fc00) == 0xf8a02000
15169}
15170
15171pub const fn is_LDSETA_64_memop(d: u32) -> bool {
15172    (d & 0xffe0fc00) == 0xf8a03000
15173}
15174
15175pub const fn is_LDSMAXA_64_memop(d: u32) -> bool {
15176    (d & 0xffe0fc00) == 0xf8a04000
15177}
15178
15179pub const fn is_LDSMINA_64_memop(d: u32) -> bool {
15180    (d & 0xffe0fc00) == 0xf8a05000
15181}
15182
15183pub const fn is_LDUMAXA_64_memop(d: u32) -> bool {
15184    (d & 0xffe0fc00) == 0xf8a06000
15185}
15186
15187pub const fn is_LDUMINA_64_memop(d: u32) -> bool {
15188    (d & 0xffe0fc00) == 0xf8a07000
15189}
15190
15191pub const fn is_SWPA_64_memop(d: u32) -> bool {
15192    (d & 0xffe0fc00) == 0xf8a08000
15193}
15194
15195pub const fn is_LDAPR_64L_memop(d: u32) -> bool {
15196    (d & 0xffe0fc00) == 0xf8a0c000
15197}
15198
15199pub const fn is_LDADDAL_64_memop(d: u32) -> bool {
15200    (d & 0xffe0fc00) == 0xf8e00000
15201}
15202
15203pub const fn is_LDCLRAL_64_memop(d: u32) -> bool {
15204    (d & 0xffe0fc00) == 0xf8e01000
15205}
15206
15207pub const fn is_LDEORAL_64_memop(d: u32) -> bool {
15208    (d & 0xffe0fc00) == 0xf8e02000
15209}
15210
15211pub const fn is_LDSETAL_64_memop(d: u32) -> bool {
15212    (d & 0xffe0fc00) == 0xf8e03000
15213}
15214
15215pub const fn is_LDSMAXAL_64_memop(d: u32) -> bool {
15216    (d & 0xffe0fc00) == 0xf8e04000
15217}
15218
15219pub const fn is_LDSMINAL_64_memop(d: u32) -> bool {
15220    (d & 0xffe0fc00) == 0xf8e05000
15221}
15222
15223pub const fn is_LDUMAXAL_64_memop(d: u32) -> bool {
15224    (d & 0xffe0fc00) == 0xf8e06000
15225}
15226
15227pub const fn is_LDUMINAL_64_memop(d: u32) -> bool {
15228    (d & 0xffe0fc00) == 0xf8e07000
15229}
15230
15231pub const fn is_SWPAL_64_memop(d: u32) -> bool {
15232    (d & 0xffe0fc00) == 0xf8e08000
15233}
15234
15235pub const fn is_LDR_32_loadlit(d: u32) -> bool {
15236    (d & 0xff000000) == 0x18000000
15237}
15238
15239pub const fn is_LDR_S_loadlit(d: u32) -> bool {
15240    (d & 0xff000000) == 0x1c000000
15241}
15242
15243pub const fn is_LDR_64_loadlit(d: u32) -> bool {
15244    (d & 0xff000000) == 0x58000000
15245}
15246
15247pub const fn is_LDR_D_loadlit(d: u32) -> bool {
15248    (d & 0xff000000) == 0x5c000000
15249}
15250
15251pub const fn is_LDRSW_64_loadlit(d: u32) -> bool {
15252    (d & 0xff000000) == 0x98000000
15253}
15254
15255pub const fn is_LDR_Q_loadlit(d: u32) -> bool {
15256    (d & 0xff000000) == 0x9c000000
15257}
15258
15259pub const fn is_PRFM_P_loadlit(d: u32) -> bool {
15260    (d & 0xff000000) == 0xd8000000
15261}
15262
15263pub const fn is_STXRB_SR32_ldstexcl(d: u32) -> bool {
15264    (d & 0xffe08000) == 0x08000000
15265}
15266
15267pub const fn is_STLXRB_SR32_ldstexcl(d: u32) -> bool {
15268    (d & 0xffe08000) == 0x08008000
15269}
15270
15271pub const fn is_CASP_CP32_ldstexcl(d: u32) -> bool {
15272    (d & 0xffe0fc00) == 0x08207c00
15273}
15274
15275pub const fn is_CASPL_CP32_ldstexcl(d: u32) -> bool {
15276    (d & 0xffe0fc00) == 0x0820fc00
15277}
15278
15279pub const fn is_LDXRB_LR32_ldstexcl(d: u32) -> bool {
15280    (d & 0xffe08000) == 0x08400000
15281}
15282
15283pub const fn is_LDAXRB_LR32_ldstexcl(d: u32) -> bool {
15284    (d & 0xffe08000) == 0x08408000
15285}
15286
15287pub const fn is_CASPA_CP32_ldstexcl(d: u32) -> bool {
15288    (d & 0xffe0fc00) == 0x08607c00
15289}
15290
15291pub const fn is_CASPAL_CP32_ldstexcl(d: u32) -> bool {
15292    (d & 0xffe0fc00) == 0x0860fc00
15293}
15294
15295pub const fn is_STLLRB_SL32_ldstexcl(d: u32) -> bool {
15296    (d & 0xffe08000) == 0x08800000
15297}
15298
15299pub const fn is_STLRB_SL32_ldstexcl(d: u32) -> bool {
15300    (d & 0xffe08000) == 0x08808000
15301}
15302
15303pub const fn is_CASB_C32_ldstexcl(d: u32) -> bool {
15304    (d & 0xffe0fc00) == 0x08a07c00
15305}
15306
15307pub const fn is_CASLB_C32_ldstexcl(d: u32) -> bool {
15308    (d & 0xffe0fc00) == 0x08a0fc00
15309}
15310
15311pub const fn is_LDLARB_LR32_ldstexcl(d: u32) -> bool {
15312    (d & 0xffe08000) == 0x08c00000
15313}
15314
15315pub const fn is_LDARB_LR32_ldstexcl(d: u32) -> bool {
15316    (d & 0xffe08000) == 0x08c08000
15317}
15318
15319pub const fn is_CASAB_C32_ldstexcl(d: u32) -> bool {
15320    (d & 0xffe0fc00) == 0x08e07c00
15321}
15322
15323pub const fn is_CASALB_C32_ldstexcl(d: u32) -> bool {
15324    (d & 0xffe0fc00) == 0x08e0fc00
15325}
15326
15327pub const fn is_STXRH_SR32_ldstexcl(d: u32) -> bool {
15328    (d & 0xffe08000) == 0x48000000
15329}
15330
15331pub const fn is_STLXRH_SR32_ldstexcl(d: u32) -> bool {
15332    (d & 0xffe08000) == 0x48008000
15333}
15334
15335pub const fn is_CASP_CP64_ldstexcl(d: u32) -> bool {
15336    (d & 0xffe0fc00) == 0x48207c00
15337}
15338
15339pub const fn is_CASPL_CP64_ldstexcl(d: u32) -> bool {
15340    (d & 0xffe0fc00) == 0x4820fc00
15341}
15342
15343pub const fn is_LDXRH_LR32_ldstexcl(d: u32) -> bool {
15344    (d & 0xffe08000) == 0x48400000
15345}
15346
15347pub const fn is_LDAXRH_LR32_ldstexcl(d: u32) -> bool {
15348    (d & 0xffe08000) == 0x48408000
15349}
15350
15351pub const fn is_CASPA_CP64_ldstexcl(d: u32) -> bool {
15352    (d & 0xffe0fc00) == 0x48607c00
15353}
15354
15355pub const fn is_CASPAL_CP64_ldstexcl(d: u32) -> bool {
15356    (d & 0xffe0fc00) == 0x4860fc00
15357}
15358
15359pub const fn is_STLLRH_SL32_ldstexcl(d: u32) -> bool {
15360    (d & 0xffe08000) == 0x48800000
15361}
15362
15363pub const fn is_STLRH_SL32_ldstexcl(d: u32) -> bool {
15364    (d & 0xffe08000) == 0x48808000
15365}
15366
15367pub const fn is_CASH_C32_ldstexcl(d: u32) -> bool {
15368    (d & 0xffe0fc00) == 0x48a07c00
15369}
15370
15371pub const fn is_CASLH_C32_ldstexcl(d: u32) -> bool {
15372    (d & 0xffe0fc00) == 0x48a0fc00
15373}
15374
15375pub const fn is_LDLARH_LR32_ldstexcl(d: u32) -> bool {
15376    (d & 0xffe08000) == 0x48c00000
15377}
15378
15379pub const fn is_LDARH_LR32_ldstexcl(d: u32) -> bool {
15380    (d & 0xffe08000) == 0x48c08000
15381}
15382
15383pub const fn is_CASAH_C32_ldstexcl(d: u32) -> bool {
15384    (d & 0xffe0fc00) == 0x48e07c00
15385}
15386
15387pub const fn is_CASALH_C32_ldstexcl(d: u32) -> bool {
15388    (d & 0xffe0fc00) == 0x48e0fc00
15389}
15390
15391pub const fn is_STXR_SR32_ldstexcl(d: u32) -> bool {
15392    (d & 0xffe08000) == 0x88000000
15393}
15394
15395pub const fn is_STLXR_SR32_ldstexcl(d: u32) -> bool {
15396    (d & 0xffe08000) == 0x88008000
15397}
15398
15399pub const fn is_STXP_SP32_ldstexcl(d: u32) -> bool {
15400    (d & 0xffe08000) == 0x88200000
15401}
15402
15403pub const fn is_STLXP_SP32_ldstexcl(d: u32) -> bool {
15404    (d & 0xffe08000) == 0x88208000
15405}
15406
15407pub const fn is_LDXR_LR32_ldstexcl(d: u32) -> bool {
15408    (d & 0xffe08000) == 0x88400000
15409}
15410
15411pub const fn is_LDAXR_LR32_ldstexcl(d: u32) -> bool {
15412    (d & 0xffe08000) == 0x88408000
15413}
15414
15415pub const fn is_LDXP_LP32_ldstexcl(d: u32) -> bool {
15416    (d & 0xffe08000) == 0x88600000
15417}
15418
15419pub const fn is_LDAXP_LP32_ldstexcl(d: u32) -> bool {
15420    (d & 0xffe08000) == 0x88608000
15421}
15422
15423pub const fn is_STLLR_SL32_ldstexcl(d: u32) -> bool {
15424    (d & 0xffe08000) == 0x88800000
15425}
15426
15427pub const fn is_STLR_SL32_ldstexcl(d: u32) -> bool {
15428    (d & 0xffe08000) == 0x88808000
15429}
15430
15431pub const fn is_CAS_C32_ldstexcl(d: u32) -> bool {
15432    (d & 0xffe0fc00) == 0x88a07c00
15433}
15434
15435pub const fn is_CASL_C32_ldstexcl(d: u32) -> bool {
15436    (d & 0xffe0fc00) == 0x88a0fc00
15437}
15438
15439pub const fn is_LDLAR_LR32_ldstexcl(d: u32) -> bool {
15440    (d & 0xffe08000) == 0x88c00000
15441}
15442
15443pub const fn is_LDAR_LR32_ldstexcl(d: u32) -> bool {
15444    (d & 0xffe08000) == 0x88c08000
15445}
15446
15447pub const fn is_CASA_C32_ldstexcl(d: u32) -> bool {
15448    (d & 0xffe0fc00) == 0x88e07c00
15449}
15450
15451pub const fn is_CASAL_C32_ldstexcl(d: u32) -> bool {
15452    (d & 0xffe0fc00) == 0x88e0fc00
15453}
15454
15455pub const fn is_STXR_SR64_ldstexcl(d: u32) -> bool {
15456    (d & 0xffe08000) == 0xc8000000
15457}
15458
15459pub const fn is_STLXR_SR64_ldstexcl(d: u32) -> bool {
15460    (d & 0xffe08000) == 0xc8008000
15461}
15462
15463pub const fn is_STXP_SP64_ldstexcl(d: u32) -> bool {
15464    (d & 0xffe08000) == 0xc8200000
15465}
15466
15467pub const fn is_STLXP_SP64_ldstexcl(d: u32) -> bool {
15468    (d & 0xffe08000) == 0xc8208000
15469}
15470
15471pub const fn is_LDXR_LR64_ldstexcl(d: u32) -> bool {
15472    (d & 0xffe08000) == 0xc8400000
15473}
15474
15475pub const fn is_LDAXR_LR64_ldstexcl(d: u32) -> bool {
15476    (d & 0xffe08000) == 0xc8408000
15477}
15478
15479pub const fn is_LDXP_LP64_ldstexcl(d: u32) -> bool {
15480    (d & 0xffe08000) == 0xc8600000
15481}
15482
15483pub const fn is_LDAXP_LP64_ldstexcl(d: u32) -> bool {
15484    (d & 0xffe08000) == 0xc8608000
15485}
15486
15487pub const fn is_STLLR_SL64_ldstexcl(d: u32) -> bool {
15488    (d & 0xffe08000) == 0xc8800000
15489}
15490
15491pub const fn is_STLR_SL64_ldstexcl(d: u32) -> bool {
15492    (d & 0xffe08000) == 0xc8808000
15493}
15494
15495pub const fn is_CAS_C64_ldstexcl(d: u32) -> bool {
15496    (d & 0xffe0fc00) == 0xc8a07c00
15497}
15498
15499pub const fn is_CASL_C64_ldstexcl(d: u32) -> bool {
15500    (d & 0xffe0fc00) == 0xc8a0fc00
15501}
15502
15503pub const fn is_LDLAR_LR64_ldstexcl(d: u32) -> bool {
15504    (d & 0xffe08000) == 0xc8c00000
15505}
15506
15507pub const fn is_LDAR_LR64_ldstexcl(d: u32) -> bool {
15508    (d & 0xffe08000) == 0xc8c08000
15509}
15510
15511pub const fn is_CASA_C64_ldstexcl(d: u32) -> bool {
15512    (d & 0xffe0fc00) == 0xc8e07c00
15513}
15514
15515pub const fn is_CASAL_C64_ldstexcl(d: u32) -> bool {
15516    (d & 0xffe0fc00) == 0xc8e0fc00
15517}
15518
15519pub const fn is_STNP_32_ldstnapair_offs(d: u32) -> bool {
15520    (d & 0xffc00000) == 0x28000000
15521}
15522
15523pub const fn is_LDNP_32_ldstnapair_offs(d: u32) -> bool {
15524    (d & 0xffc00000) == 0x28400000
15525}
15526
15527pub const fn is_STNP_S_ldstnapair_offs(d: u32) -> bool {
15528    (d & 0xffc00000) == 0x2c000000
15529}
15530
15531pub const fn is_LDNP_S_ldstnapair_offs(d: u32) -> bool {
15532    (d & 0xffc00000) == 0x2c400000
15533}
15534
15535pub const fn is_STNP_D_ldstnapair_offs(d: u32) -> bool {
15536    (d & 0xffc00000) == 0x6c000000
15537}
15538
15539pub const fn is_LDNP_D_ldstnapair_offs(d: u32) -> bool {
15540    (d & 0xffc00000) == 0x6c400000
15541}
15542
15543pub const fn is_STNP_64_ldstnapair_offs(d: u32) -> bool {
15544    (d & 0xffc00000) == 0xa8000000
15545}
15546
15547pub const fn is_LDNP_64_ldstnapair_offs(d: u32) -> bool {
15548    (d & 0xffc00000) == 0xa8400000
15549}
15550
15551pub const fn is_STNP_Q_ldstnapair_offs(d: u32) -> bool {
15552    (d & 0xffc00000) == 0xac000000
15553}
15554
15555pub const fn is_LDNP_Q_ldstnapair_offs(d: u32) -> bool {
15556    (d & 0xffc00000) == 0xac400000
15557}
15558
15559pub const fn is_STRB_32_ldst_immpost(d: u32) -> bool {
15560    (d & 0xffe00c00) == 0x38000400
15561}
15562
15563pub const fn is_LDRB_32_ldst_immpost(d: u32) -> bool {
15564    (d & 0xffe00c00) == 0x38400400
15565}
15566
15567pub const fn is_LDRSB_64_ldst_immpost(d: u32) -> bool {
15568    (d & 0xffe00c00) == 0x38800400
15569}
15570
15571pub const fn is_LDRSB_32_ldst_immpost(d: u32) -> bool {
15572    (d & 0xffe00c00) == 0x38c00400
15573}
15574
15575pub const fn is_STR_B_ldst_immpost(d: u32) -> bool {
15576    (d & 0xffe00c00) == 0x3c000400
15577}
15578
15579pub const fn is_LDR_B_ldst_immpost(d: u32) -> bool {
15580    (d & 0xffe00c00) == 0x3c400400
15581}
15582
15583pub const fn is_STR_Q_ldst_immpost(d: u32) -> bool {
15584    (d & 0xffe00c00) == 0x3c800400
15585}
15586
15587pub const fn is_LDR_Q_ldst_immpost(d: u32) -> bool {
15588    (d & 0xffe00c00) == 0x3cc00400
15589}
15590
15591pub const fn is_STRH_32_ldst_immpost(d: u32) -> bool {
15592    (d & 0xffe00c00) == 0x78000400
15593}
15594
15595pub const fn is_LDRH_32_ldst_immpost(d: u32) -> bool {
15596    (d & 0xffe00c00) == 0x78400400
15597}
15598
15599pub const fn is_LDRSH_64_ldst_immpost(d: u32) -> bool {
15600    (d & 0xffe00c00) == 0x78800400
15601}
15602
15603pub const fn is_LDRSH_32_ldst_immpost(d: u32) -> bool {
15604    (d & 0xffe00c00) == 0x78c00400
15605}
15606
15607pub const fn is_STR_H_ldst_immpost(d: u32) -> bool {
15608    (d & 0xffe00c00) == 0x7c000400
15609}
15610
15611pub const fn is_LDR_H_ldst_immpost(d: u32) -> bool {
15612    (d & 0xffe00c00) == 0x7c400400
15613}
15614
15615pub const fn is_STR_32_ldst_immpost(d: u32) -> bool {
15616    (d & 0xffe00c00) == 0xb8000400
15617}
15618
15619pub const fn is_LDR_32_ldst_immpost(d: u32) -> bool {
15620    (d & 0xffe00c00) == 0xb8400400
15621}
15622
15623pub const fn is_LDRSW_64_ldst_immpost(d: u32) -> bool {
15624    (d & 0xffe00c00) == 0xb8800400
15625}
15626
15627pub const fn is_STR_S_ldst_immpost(d: u32) -> bool {
15628    (d & 0xffe00c00) == 0xbc000400
15629}
15630
15631pub const fn is_LDR_S_ldst_immpost(d: u32) -> bool {
15632    (d & 0xffe00c00) == 0xbc400400
15633}
15634
15635pub const fn is_STR_64_ldst_immpost(d: u32) -> bool {
15636    (d & 0xffe00c00) == 0xf8000400
15637}
15638
15639pub const fn is_LDR_64_ldst_immpost(d: u32) -> bool {
15640    (d & 0xffe00c00) == 0xf8400400
15641}
15642
15643pub const fn is_STR_D_ldst_immpost(d: u32) -> bool {
15644    (d & 0xffe00c00) == 0xfc000400
15645}
15646
15647pub const fn is_LDR_D_ldst_immpost(d: u32) -> bool {
15648    (d & 0xffe00c00) == 0xfc400400
15649}
15650
15651pub const fn is_STRB_32_ldst_immpre(d: u32) -> bool {
15652    (d & 0xffe00c00) == 0x38000c00
15653}
15654
15655pub const fn is_LDRB_32_ldst_immpre(d: u32) -> bool {
15656    (d & 0xffe00c00) == 0x38400c00
15657}
15658
15659pub const fn is_LDRSB_64_ldst_immpre(d: u32) -> bool {
15660    (d & 0xffe00c00) == 0x38800c00
15661}
15662
15663pub const fn is_LDRSB_32_ldst_immpre(d: u32) -> bool {
15664    (d & 0xffe00c00) == 0x38c00c00
15665}
15666
15667pub const fn is_STR_B_ldst_immpre(d: u32) -> bool {
15668    (d & 0xffe00c00) == 0x3c000c00
15669}
15670
15671pub const fn is_LDR_B_ldst_immpre(d: u32) -> bool {
15672    (d & 0xffe00c00) == 0x3c400c00
15673}
15674
15675pub const fn is_STR_Q_ldst_immpre(d: u32) -> bool {
15676    (d & 0xffe00c00) == 0x3c800c00
15677}
15678
15679pub const fn is_LDR_Q_ldst_immpre(d: u32) -> bool {
15680    (d & 0xffe00c00) == 0x3cc00c00
15681}
15682
15683pub const fn is_STRH_32_ldst_immpre(d: u32) -> bool {
15684    (d & 0xffe00c00) == 0x78000c00
15685}
15686
15687pub const fn is_LDRH_32_ldst_immpre(d: u32) -> bool {
15688    (d & 0xffe00c00) == 0x78400c00
15689}
15690
15691pub const fn is_LDRSH_64_ldst_immpre(d: u32) -> bool {
15692    (d & 0xffe00c00) == 0x78800c00
15693}
15694
15695pub const fn is_LDRSH_32_ldst_immpre(d: u32) -> bool {
15696    (d & 0xffe00c00) == 0x78c00c00
15697}
15698
15699pub const fn is_STR_H_ldst_immpre(d: u32) -> bool {
15700    (d & 0xffe00c00) == 0x7c000c00
15701}
15702
15703pub const fn is_LDR_H_ldst_immpre(d: u32) -> bool {
15704    (d & 0xffe00c00) == 0x7c400c00
15705}
15706
15707pub const fn is_STR_32_ldst_immpre(d: u32) -> bool {
15708    (d & 0xffe00c00) == 0xb8000c00
15709}
15710
15711pub const fn is_LDR_32_ldst_immpre(d: u32) -> bool {
15712    (d & 0xffe00c00) == 0xb8400c00
15713}
15714
15715pub const fn is_LDRSW_64_ldst_immpre(d: u32) -> bool {
15716    (d & 0xffe00c00) == 0xb8800c00
15717}
15718
15719pub const fn is_STR_S_ldst_immpre(d: u32) -> bool {
15720    (d & 0xffe00c00) == 0xbc000c00
15721}
15722
15723pub const fn is_LDR_S_ldst_immpre(d: u32) -> bool {
15724    (d & 0xffe00c00) == 0xbc400c00
15725}
15726
15727pub const fn is_STR_64_ldst_immpre(d: u32) -> bool {
15728    (d & 0xffe00c00) == 0xf8000c00
15729}
15730
15731pub const fn is_LDR_64_ldst_immpre(d: u32) -> bool {
15732    (d & 0xffe00c00) == 0xf8400c00
15733}
15734
15735pub const fn is_STR_D_ldst_immpre(d: u32) -> bool {
15736    (d & 0xffe00c00) == 0xfc000c00
15737}
15738
15739pub const fn is_LDR_D_ldst_immpre(d: u32) -> bool {
15740    (d & 0xffe00c00) == 0xfc400c00
15741}
15742
15743pub const fn is_LDRAA_64_ldst_pac(d: u32) -> bool {
15744    (d & 0xfba00c00) == 0xf8200400
15745}
15746
15747pub const fn is_LDRAA_64W_ldst_pac(d: u32) -> bool {
15748    (d & 0xfba00c00) == 0xf8200c00
15749}
15750
15751pub const fn is_LDRAB_64_ldst_pac(d: u32) -> bool {
15752    (d & 0xfba00c00) == 0xf8a00400
15753}
15754
15755pub const fn is_LDRAB_64W_ldst_pac(d: u32) -> bool {
15756    (d & 0xfba00c00) == 0xf8a00c00
15757}
15758
15759pub const fn is_STRB_32B_ldst_regoff(d: u32) -> bool {
15760    (d & 0xffe00c00) == 0x38200800 && (d & 0x00e000) != 0x006000
15761}
15762
15763pub const fn is_STRB_32BL_ldst_regoff(d: u32) -> bool {
15764    (d & 0xffe0ec00) == 0x38206800
15765}
15766
15767pub const fn is_LDRB_32B_ldst_regoff(d: u32) -> bool {
15768    (d & 0xffe00c00) == 0x38600800 && (d & 0x00e000) != 0x006000
15769}
15770
15771pub const fn is_LDRB_32BL_ldst_regoff(d: u32) -> bool {
15772    (d & 0xffe0ec00) == 0x38606800
15773}
15774
15775pub const fn is_LDRSB_64B_ldst_regoff(d: u32) -> bool {
15776    (d & 0xffe00c00) == 0x38a00800 && (d & 0x00e000) != 0x006000
15777}
15778
15779pub const fn is_LDRSB_64BL_ldst_regoff(d: u32) -> bool {
15780    (d & 0xffe0ec00) == 0x38a06800
15781}
15782
15783pub const fn is_LDRSB_32B_ldst_regoff(d: u32) -> bool {
15784    (d & 0xffe00c00) == 0x38e00800 && (d & 0x00e000) != 0x006000
15785}
15786
15787pub const fn is_LDRSB_32BL_ldst_regoff(d: u32) -> bool {
15788    (d & 0xffe0ec00) == 0x38e06800
15789}
15790
15791pub const fn is_STR_B_ldst_regoff(d: u32) -> bool {
15792    (d & 0xffe00c00) == 0x3c200800 && (d & 0x00e000) != 0x006000
15793}
15794
15795pub const fn is_STR_BL_ldst_regoff(d: u32) -> bool {
15796    (d & 0xffe0ec00) == 0x3c206800
15797}
15798
15799pub const fn is_LDR_B_ldst_regoff(d: u32) -> bool {
15800    (d & 0xffe00c00) == 0x3c600800 && (d & 0x00e000) != 0x006000
15801}
15802
15803pub const fn is_LDR_BL_ldst_regoff(d: u32) -> bool {
15804    (d & 0xffe0ec00) == 0x3c606800
15805}
15806
15807pub const fn is_STR_Q_ldst_regoff(d: u32) -> bool {
15808    (d & 0xffe00c00) == 0x3ca00800
15809}
15810
15811pub const fn is_LDR_Q_ldst_regoff(d: u32) -> bool {
15812    (d & 0xffe00c00) == 0x3ce00800
15813}
15814
15815pub const fn is_STRH_32_ldst_regoff(d: u32) -> bool {
15816    (d & 0xffe00c00) == 0x78200800
15817}
15818
15819pub const fn is_LDRH_32_ldst_regoff(d: u32) -> bool {
15820    (d & 0xffe00c00) == 0x78600800
15821}
15822
15823pub const fn is_LDRSH_64_ldst_regoff(d: u32) -> bool {
15824    (d & 0xffe00c00) == 0x78a00800
15825}
15826
15827pub const fn is_LDRSH_32_ldst_regoff(d: u32) -> bool {
15828    (d & 0xffe00c00) == 0x78e00800
15829}
15830
15831pub const fn is_STR_H_ldst_regoff(d: u32) -> bool {
15832    (d & 0xffe00c00) == 0x7c200800
15833}
15834
15835pub const fn is_LDR_H_ldst_regoff(d: u32) -> bool {
15836    (d & 0xffe00c00) == 0x7c600800
15837}
15838
15839pub const fn is_STR_32_ldst_regoff(d: u32) -> bool {
15840    (d & 0xffe00c00) == 0xb8200800
15841}
15842
15843pub const fn is_LDR_32_ldst_regoff(d: u32) -> bool {
15844    (d & 0xffe00c00) == 0xb8600800
15845}
15846
15847pub const fn is_LDRSW_64_ldst_regoff(d: u32) -> bool {
15848    (d & 0xffe00c00) == 0xb8a00800
15849}
15850
15851pub const fn is_STR_S_ldst_regoff(d: u32) -> bool {
15852    (d & 0xffe00c00) == 0xbc200800
15853}
15854
15855pub const fn is_LDR_S_ldst_regoff(d: u32) -> bool {
15856    (d & 0xffe00c00) == 0xbc600800
15857}
15858
15859pub const fn is_STR_64_ldst_regoff(d: u32) -> bool {
15860    (d & 0xffe00c00) == 0xf8200800
15861}
15862
15863pub const fn is_LDR_64_ldst_regoff(d: u32) -> bool {
15864    (d & 0xffe00c00) == 0xf8600800
15865}
15866
15867pub const fn is_PRFM_P_ldst_regoff(d: u32) -> bool {
15868    (d & 0xffe00c00) == 0xf8a00800
15869}
15870
15871pub const fn is_STR_D_ldst_regoff(d: u32) -> bool {
15872    (d & 0xffe00c00) == 0xfc200800
15873}
15874
15875pub const fn is_LDR_D_ldst_regoff(d: u32) -> bool {
15876    (d & 0xffe00c00) == 0xfc600800
15877}
15878
15879pub const fn is_STTRB_32_ldst_unpriv(d: u32) -> bool {
15880    (d & 0xffe00c00) == 0x38000800
15881}
15882
15883pub const fn is_LDTRB_32_ldst_unpriv(d: u32) -> bool {
15884    (d & 0xffe00c00) == 0x38400800
15885}
15886
15887pub const fn is_LDTRSB_64_ldst_unpriv(d: u32) -> bool {
15888    (d & 0xffe00c00) == 0x38800800
15889}
15890
15891pub const fn is_LDTRSB_32_ldst_unpriv(d: u32) -> bool {
15892    (d & 0xffe00c00) == 0x38c00800
15893}
15894
15895pub const fn is_STTRH_32_ldst_unpriv(d: u32) -> bool {
15896    (d & 0xffe00c00) == 0x78000800
15897}
15898
15899pub const fn is_LDTRH_32_ldst_unpriv(d: u32) -> bool {
15900    (d & 0xffe00c00) == 0x78400800
15901}
15902
15903pub const fn is_LDTRSH_64_ldst_unpriv(d: u32) -> bool {
15904    (d & 0xffe00c00) == 0x78800800
15905}
15906
15907pub const fn is_LDTRSH_32_ldst_unpriv(d: u32) -> bool {
15908    (d & 0xffe00c00) == 0x78c00800
15909}
15910
15911pub const fn is_STTR_32_ldst_unpriv(d: u32) -> bool {
15912    (d & 0xffe00c00) == 0xb8000800
15913}
15914
15915pub const fn is_LDTR_32_ldst_unpriv(d: u32) -> bool {
15916    (d & 0xffe00c00) == 0xb8400800
15917}
15918
15919pub const fn is_LDTRSW_64_ldst_unpriv(d: u32) -> bool {
15920    (d & 0xffe00c00) == 0xb8800800
15921}
15922
15923pub const fn is_STTR_64_ldst_unpriv(d: u32) -> bool {
15924    (d & 0xffe00c00) == 0xf8000800
15925}
15926
15927pub const fn is_LDTR_64_ldst_unpriv(d: u32) -> bool {
15928    (d & 0xffe00c00) == 0xf8400800
15929}
15930
15931pub const fn is_STURB_32_ldst_unscaled(d: u32) -> bool {
15932    (d & 0xffe00c00) == 0x38000000
15933}
15934
15935pub const fn is_LDURB_32_ldst_unscaled(d: u32) -> bool {
15936    (d & 0xffe00c00) == 0x38400000
15937}
15938
15939pub const fn is_LDURSB_64_ldst_unscaled(d: u32) -> bool {
15940    (d & 0xffe00c00) == 0x38800000
15941}
15942
15943pub const fn is_LDURSB_32_ldst_unscaled(d: u32) -> bool {
15944    (d & 0xffe00c00) == 0x38c00000
15945}
15946
15947pub const fn is_STUR_B_ldst_unscaled(d: u32) -> bool {
15948    (d & 0xffe00c00) == 0x3c000000
15949}
15950
15951pub const fn is_LDUR_B_ldst_unscaled(d: u32) -> bool {
15952    (d & 0xffe00c00) == 0x3c400000
15953}
15954
15955pub const fn is_STUR_Q_ldst_unscaled(d: u32) -> bool {
15956    (d & 0xffe00c00) == 0x3c800000
15957}
15958
15959pub const fn is_LDUR_Q_ldst_unscaled(d: u32) -> bool {
15960    (d & 0xffe00c00) == 0x3cc00000
15961}
15962
15963pub const fn is_STURH_32_ldst_unscaled(d: u32) -> bool {
15964    (d & 0xffe00c00) == 0x78000000
15965}
15966
15967pub const fn is_LDURH_32_ldst_unscaled(d: u32) -> bool {
15968    (d & 0xffe00c00) == 0x78400000
15969}
15970
15971pub const fn is_LDURSH_64_ldst_unscaled(d: u32) -> bool {
15972    (d & 0xffe00c00) == 0x78800000
15973}
15974
15975pub const fn is_LDURSH_32_ldst_unscaled(d: u32) -> bool {
15976    (d & 0xffe00c00) == 0x78c00000
15977}
15978
15979pub const fn is_STUR_H_ldst_unscaled(d: u32) -> bool {
15980    (d & 0xffe00c00) == 0x7c000000
15981}
15982
15983pub const fn is_LDUR_H_ldst_unscaled(d: u32) -> bool {
15984    (d & 0xffe00c00) == 0x7c400000
15985}
15986
15987pub const fn is_STUR_32_ldst_unscaled(d: u32) -> bool {
15988    (d & 0xffe00c00) == 0xb8000000
15989}
15990
15991pub const fn is_LDUR_32_ldst_unscaled(d: u32) -> bool {
15992    (d & 0xffe00c00) == 0xb8400000
15993}
15994
15995pub const fn is_LDURSW_64_ldst_unscaled(d: u32) -> bool {
15996    (d & 0xffe00c00) == 0xb8800000
15997}
15998
15999pub const fn is_STUR_S_ldst_unscaled(d: u32) -> bool {
16000    (d & 0xffe00c00) == 0xbc000000
16001}
16002
16003pub const fn is_LDUR_S_ldst_unscaled(d: u32) -> bool {
16004    (d & 0xffe00c00) == 0xbc400000
16005}
16006
16007pub const fn is_STUR_64_ldst_unscaled(d: u32) -> bool {
16008    (d & 0xffe00c00) == 0xf8000000
16009}
16010
16011pub const fn is_LDUR_64_ldst_unscaled(d: u32) -> bool {
16012    (d & 0xffe00c00) == 0xf8400000
16013}
16014
16015pub const fn is_PRFUM_P_ldst_unscaled(d: u32) -> bool {
16016    (d & 0xffe00c00) == 0xf8800000
16017}
16018
16019pub const fn is_STUR_D_ldst_unscaled(d: u32) -> bool {
16020    (d & 0xffe00c00) == 0xfc000000
16021}
16022
16023pub const fn is_LDUR_D_ldst_unscaled(d: u32) -> bool {
16024    (d & 0xffe00c00) == 0xfc400000
16025}
16026
16027pub const fn is_STRB_32_ldst_pos(d: u32) -> bool {
16028    (d & 0xffc00000) == 0x39000000
16029}
16030
16031pub const fn is_LDRB_32_ldst_pos(d: u32) -> bool {
16032    (d & 0xffc00000) == 0x39400000
16033}
16034
16035pub const fn is_LDRSB_64_ldst_pos(d: u32) -> bool {
16036    (d & 0xffc00000) == 0x39800000
16037}
16038
16039pub const fn is_LDRSB_32_ldst_pos(d: u32) -> bool {
16040    (d & 0xffc00000) == 0x39c00000
16041}
16042
16043pub const fn is_STR_B_ldst_pos(d: u32) -> bool {
16044    (d & 0xffc00000) == 0x3d000000
16045}
16046
16047pub const fn is_LDR_B_ldst_pos(d: u32) -> bool {
16048    (d & 0xffc00000) == 0x3d400000
16049}
16050
16051pub const fn is_STR_Q_ldst_pos(d: u32) -> bool {
16052    (d & 0xffc00000) == 0x3d800000
16053}
16054
16055pub const fn is_LDR_Q_ldst_pos(d: u32) -> bool {
16056    (d & 0xffc00000) == 0x3dc00000
16057}
16058
16059pub const fn is_STRH_32_ldst_pos(d: u32) -> bool {
16060    (d & 0xffc00000) == 0x79000000
16061}
16062
16063pub const fn is_LDRH_32_ldst_pos(d: u32) -> bool {
16064    (d & 0xffc00000) == 0x79400000
16065}
16066
16067pub const fn is_LDRSH_64_ldst_pos(d: u32) -> bool {
16068    (d & 0xffc00000) == 0x79800000
16069}
16070
16071pub const fn is_LDRSH_32_ldst_pos(d: u32) -> bool {
16072    (d & 0xffc00000) == 0x79c00000
16073}
16074
16075pub const fn is_STR_H_ldst_pos(d: u32) -> bool {
16076    (d & 0xffc00000) == 0x7d000000
16077}
16078
16079pub const fn is_LDR_H_ldst_pos(d: u32) -> bool {
16080    (d & 0xffc00000) == 0x7d400000
16081}
16082
16083pub const fn is_STR_32_ldst_pos(d: u32) -> bool {
16084    (d & 0xffc00000) == 0xb9000000
16085}
16086
16087pub const fn is_LDR_32_ldst_pos(d: u32) -> bool {
16088    (d & 0xffc00000) == 0xb9400000
16089}
16090
16091pub const fn is_LDRSW_64_ldst_pos(d: u32) -> bool {
16092    (d & 0xffc00000) == 0xb9800000
16093}
16094
16095pub const fn is_STR_S_ldst_pos(d: u32) -> bool {
16096    (d & 0xffc00000) == 0xbd000000
16097}
16098
16099pub const fn is_LDR_S_ldst_pos(d: u32) -> bool {
16100    (d & 0xffc00000) == 0xbd400000
16101}
16102
16103pub const fn is_STR_64_ldst_pos(d: u32) -> bool {
16104    (d & 0xffc00000) == 0xf9000000
16105}
16106
16107pub const fn is_LDR_64_ldst_pos(d: u32) -> bool {
16108    (d & 0xffc00000) == 0xf9400000
16109}
16110
16111pub const fn is_PRFM_P_ldst_pos(d: u32) -> bool {
16112    (d & 0xffc00000) == 0xf9800000
16113}
16114
16115pub const fn is_STR_D_ldst_pos(d: u32) -> bool {
16116    (d & 0xffc00000) == 0xfd000000
16117}
16118
16119pub const fn is_LDR_D_ldst_pos(d: u32) -> bool {
16120    (d & 0xffc00000) == 0xfd400000
16121}
16122
16123pub const fn is_STP_32_ldstpair_off(d: u32) -> bool {
16124    (d & 0xffc00000) == 0x29000000
16125}
16126
16127pub const fn is_LDP_32_ldstpair_off(d: u32) -> bool {
16128    (d & 0xffc00000) == 0x29400000
16129}
16130
16131pub const fn is_STP_S_ldstpair_off(d: u32) -> bool {
16132    (d & 0xffc00000) == 0x2d000000
16133}
16134
16135pub const fn is_LDP_S_ldstpair_off(d: u32) -> bool {
16136    (d & 0xffc00000) == 0x2d400000
16137}
16138
16139pub const fn is_LDPSW_64_ldstpair_off(d: u32) -> bool {
16140    (d & 0xffc00000) == 0x69400000
16141}
16142
16143pub const fn is_STP_D_ldstpair_off(d: u32) -> bool {
16144    (d & 0xffc00000) == 0x6d000000
16145}
16146
16147pub const fn is_LDP_D_ldstpair_off(d: u32) -> bool {
16148    (d & 0xffc00000) == 0x6d400000
16149}
16150
16151pub const fn is_STP_64_ldstpair_off(d: u32) -> bool {
16152    (d & 0xffc00000) == 0xa9000000
16153}
16154
16155pub const fn is_LDP_64_ldstpair_off(d: u32) -> bool {
16156    (d & 0xffc00000) == 0xa9400000
16157}
16158
16159pub const fn is_STP_Q_ldstpair_off(d: u32) -> bool {
16160    (d & 0xffc00000) == 0xad000000
16161}
16162
16163pub const fn is_LDP_Q_ldstpair_off(d: u32) -> bool {
16164    (d & 0xffc00000) == 0xad400000
16165}
16166
16167pub const fn is_STP_32_ldstpair_post(d: u32) -> bool {
16168    (d & 0xffc00000) == 0x28800000
16169}
16170
16171pub const fn is_LDP_32_ldstpair_post(d: u32) -> bool {
16172    (d & 0xffc00000) == 0x28c00000
16173}
16174
16175pub const fn is_STP_S_ldstpair_post(d: u32) -> bool {
16176    (d & 0xffc00000) == 0x2c800000
16177}
16178
16179pub const fn is_LDP_S_ldstpair_post(d: u32) -> bool {
16180    (d & 0xffc00000) == 0x2cc00000
16181}
16182
16183pub const fn is_LDPSW_64_ldstpair_post(d: u32) -> bool {
16184    (d & 0xffc00000) == 0x68c00000
16185}
16186
16187pub const fn is_STP_D_ldstpair_post(d: u32) -> bool {
16188    (d & 0xffc00000) == 0x6c800000
16189}
16190
16191pub const fn is_LDP_D_ldstpair_post(d: u32) -> bool {
16192    (d & 0xffc00000) == 0x6cc00000
16193}
16194
16195pub const fn is_STP_64_ldstpair_post(d: u32) -> bool {
16196    (d & 0xffc00000) == 0xa8800000
16197}
16198
16199pub const fn is_LDP_64_ldstpair_post(d: u32) -> bool {
16200    (d & 0xffc00000) == 0xa8c00000
16201}
16202
16203pub const fn is_STP_Q_ldstpair_post(d: u32) -> bool {
16204    (d & 0xffc00000) == 0xac800000
16205}
16206
16207pub const fn is_LDP_Q_ldstpair_post(d: u32) -> bool {
16208    (d & 0xffc00000) == 0xacc00000
16209}
16210
16211pub const fn is_STP_32_ldstpair_pre(d: u32) -> bool {
16212    (d & 0xffc00000) == 0x29800000
16213}
16214
16215pub const fn is_LDP_32_ldstpair_pre(d: u32) -> bool {
16216    (d & 0xffc00000) == 0x29c00000
16217}
16218
16219pub const fn is_STP_S_ldstpair_pre(d: u32) -> bool {
16220    (d & 0xffc00000) == 0x2d800000
16221}
16222
16223pub const fn is_LDP_S_ldstpair_pre(d: u32) -> bool {
16224    (d & 0xffc00000) == 0x2dc00000
16225}
16226
16227pub const fn is_LDPSW_64_ldstpair_pre(d: u32) -> bool {
16228    (d & 0xffc00000) == 0x69c00000
16229}
16230
16231pub const fn is_STP_D_ldstpair_pre(d: u32) -> bool {
16232    (d & 0xffc00000) == 0x6d800000
16233}
16234
16235pub const fn is_LDP_D_ldstpair_pre(d: u32) -> bool {
16236    (d & 0xffc00000) == 0x6dc00000
16237}
16238
16239pub const fn is_STP_64_ldstpair_pre(d: u32) -> bool {
16240    (d & 0xffc00000) == 0xa9800000
16241}
16242
16243pub const fn is_LDP_64_ldstpair_pre(d: u32) -> bool {
16244    (d & 0xffc00000) == 0xa9c00000
16245}
16246
16247pub const fn is_STP_Q_ldstpair_pre(d: u32) -> bool {
16248    (d & 0xffc00000) == 0xad800000
16249}
16250
16251pub const fn is_LDP_Q_ldstpair_pre(d: u32) -> bool {
16252    (d & 0xffc00000) == 0xadc00000
16253}
16254
16255pub const fn is_ADD_32_addsub_imm(d: u32) -> bool {
16256    (d & 0xff000000) == 0x11000000
16257}
16258
16259pub const fn is_ADDS_32S_addsub_imm(d: u32) -> bool {
16260    (d & 0xff000000) == 0x31000000
16261}
16262
16263pub const fn is_SUB_32_addsub_imm(d: u32) -> bool {
16264    (d & 0xff000000) == 0x51000000
16265}
16266
16267pub const fn is_SUBS_32S_addsub_imm(d: u32) -> bool {
16268    (d & 0xff000000) == 0x71000000
16269}
16270
16271pub const fn is_ADD_64_addsub_imm(d: u32) -> bool {
16272    (d & 0xff000000) == 0x91000000
16273}
16274
16275pub const fn is_ADDS_64S_addsub_imm(d: u32) -> bool {
16276    (d & 0xff000000) == 0xb1000000
16277}
16278
16279pub const fn is_SUB_64_addsub_imm(d: u32) -> bool {
16280    (d & 0xff000000) == 0xd1000000
16281}
16282
16283pub const fn is_SUBS_64S_addsub_imm(d: u32) -> bool {
16284    (d & 0xff000000) == 0xf1000000
16285}
16286
16287pub const fn is_SBFM_32M_bitfield(d: u32) -> bool {
16288    (d & 0xffc00000) == 0x13000000
16289}
16290
16291pub const fn is_BFM_32M_bitfield(d: u32) -> bool {
16292    (d & 0xffc00000) == 0x33000000
16293}
16294
16295pub const fn is_UBFM_32M_bitfield(d: u32) -> bool {
16296    (d & 0xffc00000) == 0x53000000
16297}
16298
16299pub const fn is_SBFM_64M_bitfield(d: u32) -> bool {
16300    (d & 0xffc00000) == 0x93400000
16301}
16302
16303pub const fn is_BFM_64M_bitfield(d: u32) -> bool {
16304    (d & 0xffc00000) == 0xb3400000
16305}
16306
16307pub const fn is_UBFM_64M_bitfield(d: u32) -> bool {
16308    (d & 0xffc00000) == 0xd3400000
16309}
16310
16311pub const fn is_EXTR_32_extract(d: u32) -> bool {
16312    (d & 0xffe08000) == 0x13800000
16313}
16314
16315pub const fn is_EXTR_64_extract(d: u32) -> bool {
16316    (d & 0xffe00000) == 0x93c00000
16317}
16318
16319pub const fn is_AND_32_log_imm(d: u32) -> bool {
16320    (d & 0xffc00000) == 0x12000000
16321}
16322
16323pub const fn is_ORR_32_log_imm(d: u32) -> bool {
16324    (d & 0xffc00000) == 0x32000000
16325}
16326
16327pub const fn is_EOR_32_log_imm(d: u32) -> bool {
16328    (d & 0xffc00000) == 0x52000000
16329}
16330
16331pub const fn is_ANDS_32S_log_imm(d: u32) -> bool {
16332    (d & 0xffc00000) == 0x72000000
16333}
16334
16335pub const fn is_AND_64_log_imm(d: u32) -> bool {
16336    (d & 0xff800000) == 0x92000000
16337}
16338
16339pub const fn is_ORR_64_log_imm(d: u32) -> bool {
16340    (d & 0xff800000) == 0xb2000000
16341}
16342
16343pub const fn is_EOR_64_log_imm(d: u32) -> bool {
16344    (d & 0xff800000) == 0xd2000000
16345}
16346
16347pub const fn is_ANDS_64S_log_imm(d: u32) -> bool {
16348    (d & 0xff800000) == 0xf2000000
16349}
16350
16351pub const fn is_MOVN_32_movewide(d: u32) -> bool {
16352    (d & 0xff800000) == 0x12800000
16353}
16354
16355pub const fn is_MOVZ_32_movewide(d: u32) -> bool {
16356    (d & 0xff800000) == 0x52800000
16357}
16358
16359pub const fn is_MOVK_32_movewide(d: u32) -> bool {
16360    (d & 0xff800000) == 0x72800000
16361}
16362
16363pub const fn is_MOVN_64_movewide(d: u32) -> bool {
16364    (d & 0xff800000) == 0x92800000
16365}
16366
16367pub const fn is_MOVZ_64_movewide(d: u32) -> bool {
16368    (d & 0xff800000) == 0xd2800000
16369}
16370
16371pub const fn is_MOVK_64_movewide(d: u32) -> bool {
16372    (d & 0xff800000) == 0xf2800000
16373}
16374
16375pub const fn is_ADR_only_pcreladdr(d: u32) -> bool {
16376    (d & 0x9f000000) == 0x10000000
16377}
16378
16379pub const fn is_ADRP_only_pcreladdr(d: u32) -> bool {
16380    (d & 0x9f000000) == 0x90000000
16381}
16382
16383pub const fn is_ADD_32_addsub_ext(d: u32) -> bool {
16384    (d & 0xffe00000) == 0x0b200000
16385}
16386
16387pub const fn is_ADDS_32S_addsub_ext(d: u32) -> bool {
16388    (d & 0xffe00000) == 0x2b200000
16389}
16390
16391pub const fn is_SUB_32_addsub_ext(d: u32) -> bool {
16392    (d & 0xffe00000) == 0x4b200000
16393}
16394
16395pub const fn is_SUBS_32S_addsub_ext(d: u32) -> bool {
16396    (d & 0xffe00000) == 0x6b200000
16397}
16398
16399pub const fn is_ADD_64_addsub_ext(d: u32) -> bool {
16400    (d & 0xffe00000) == 0x8b200000
16401}
16402
16403pub const fn is_ADDS_64S_addsub_ext(d: u32) -> bool {
16404    (d & 0xffe00000) == 0xab200000
16405}
16406
16407pub const fn is_SUB_64_addsub_ext(d: u32) -> bool {
16408    (d & 0xffe00000) == 0xcb200000
16409}
16410
16411pub const fn is_SUBS_64S_addsub_ext(d: u32) -> bool {
16412    (d & 0xffe00000) == 0xeb200000
16413}
16414
16415pub const fn is_ADD_32_addsub_shift(d: u32) -> bool {
16416    (d & 0xff200000) == 0x0b000000
16417}
16418
16419pub const fn is_ADDS_32_addsub_shift(d: u32) -> bool {
16420    (d & 0xff200000) == 0x2b000000
16421}
16422
16423pub const fn is_SUB_32_addsub_shift(d: u32) -> bool {
16424    (d & 0xff200000) == 0x4b000000
16425}
16426
16427pub const fn is_SUBS_32_addsub_shift(d: u32) -> bool {
16428    (d & 0xff200000) == 0x6b000000
16429}
16430
16431pub const fn is_ADD_64_addsub_shift(d: u32) -> bool {
16432    (d & 0xff200000) == 0x8b000000
16433}
16434
16435pub const fn is_ADDS_64_addsub_shift(d: u32) -> bool {
16436    (d & 0xff200000) == 0xab000000
16437}
16438
16439pub const fn is_SUB_64_addsub_shift(d: u32) -> bool {
16440    (d & 0xff200000) == 0xcb000000
16441}
16442
16443pub const fn is_SUBS_64_addsub_shift(d: u32) -> bool {
16444    (d & 0xff200000) == 0xeb000000
16445}
16446
16447pub const fn is_ADC_32_addsub_carry(d: u32) -> bool {
16448    (d & 0xffe0fc00) == 0x1a000000
16449}
16450
16451pub const fn is_ADCS_32_addsub_carry(d: u32) -> bool {
16452    (d & 0xffe0fc00) == 0x3a000000
16453}
16454
16455pub const fn is_SBC_32_addsub_carry(d: u32) -> bool {
16456    (d & 0xffe0fc00) == 0x5a000000
16457}
16458
16459pub const fn is_SBCS_32_addsub_carry(d: u32) -> bool {
16460    (d & 0xffe0fc00) == 0x7a000000
16461}
16462
16463pub const fn is_ADC_64_addsub_carry(d: u32) -> bool {
16464    (d & 0xffe0fc00) == 0x9a000000
16465}
16466
16467pub const fn is_ADCS_64_addsub_carry(d: u32) -> bool {
16468    (d & 0xffe0fc00) == 0xba000000
16469}
16470
16471pub const fn is_SBC_64_addsub_carry(d: u32) -> bool {
16472    (d & 0xffe0fc00) == 0xda000000
16473}
16474
16475pub const fn is_SBCS_64_addsub_carry(d: u32) -> bool {
16476    (d & 0xffe0fc00) == 0xfa000000
16477}
16478
16479pub const fn is_CCMN_32_condcmp_imm(d: u32) -> bool {
16480    (d & 0xffe00c10) == 0x3a400800
16481}
16482
16483pub const fn is_CCMP_32_condcmp_imm(d: u32) -> bool {
16484    (d & 0xffe00c10) == 0x7a400800
16485}
16486
16487pub const fn is_CCMN_64_condcmp_imm(d: u32) -> bool {
16488    (d & 0xffe00c10) == 0xba400800
16489}
16490
16491pub const fn is_CCMP_64_condcmp_imm(d: u32) -> bool {
16492    (d & 0xffe00c10) == 0xfa400800
16493}
16494
16495pub const fn is_CCMN_32_condcmp_reg(d: u32) -> bool {
16496    (d & 0xffe00c10) == 0x3a400000
16497}
16498
16499pub const fn is_CCMP_32_condcmp_reg(d: u32) -> bool {
16500    (d & 0xffe00c10) == 0x7a400000
16501}
16502
16503pub const fn is_CCMN_64_condcmp_reg(d: u32) -> bool {
16504    (d & 0xffe00c10) == 0xba400000
16505}
16506
16507pub const fn is_CCMP_64_condcmp_reg(d: u32) -> bool {
16508    (d & 0xffe00c10) == 0xfa400000
16509}
16510
16511pub const fn is_CSEL_32_condsel(d: u32) -> bool {
16512    (d & 0xffe00c00) == 0x1a800000
16513}
16514
16515pub const fn is_CSINC_32_condsel(d: u32) -> bool {
16516    (d & 0xffe00c00) == 0x1a800400
16517}
16518
16519pub const fn is_CSINV_32_condsel(d: u32) -> bool {
16520    (d & 0xffe00c00) == 0x5a800000
16521}
16522
16523pub const fn is_CSNEG_32_condsel(d: u32) -> bool {
16524    (d & 0xffe00c00) == 0x5a800400
16525}
16526
16527pub const fn is_CSEL_64_condsel(d: u32) -> bool {
16528    (d & 0xffe00c00) == 0x9a800000
16529}
16530
16531pub const fn is_CSINC_64_condsel(d: u32) -> bool {
16532    (d & 0xffe00c00) == 0x9a800400
16533}
16534
16535pub const fn is_CSINV_64_condsel(d: u32) -> bool {
16536    (d & 0xffe00c00) == 0xda800000
16537}
16538
16539pub const fn is_CSNEG_64_condsel(d: u32) -> bool {
16540    (d & 0xffe00c00) == 0xda800400
16541}
16542
16543pub const fn is_RBIT_32_dp_1src(d: u32) -> bool {
16544    (d & 0xfffffc00) == 0x5ac00000
16545}
16546
16547pub const fn is_REV16_32_dp_1src(d: u32) -> bool {
16548    (d & 0xfffffc00) == 0x5ac00400
16549}
16550
16551pub const fn is_REV_32_dp_1src(d: u32) -> bool {
16552    (d & 0xfffffc00) == 0x5ac00800
16553}
16554
16555pub const fn is_CLZ_32_dp_1src(d: u32) -> bool {
16556    (d & 0xfffffc00) == 0x5ac01000
16557}
16558
16559pub const fn is_CLS_32_dp_1src(d: u32) -> bool {
16560    (d & 0xfffffc00) == 0x5ac01400
16561}
16562
16563pub const fn is_RBIT_64_dp_1src(d: u32) -> bool {
16564    (d & 0xfffffc00) == 0xdac00000
16565}
16566
16567pub const fn is_REV16_64_dp_1src(d: u32) -> bool {
16568    (d & 0xfffffc00) == 0xdac00400
16569}
16570
16571pub const fn is_REV32_64_dp_1src(d: u32) -> bool {
16572    (d & 0xfffffc00) == 0xdac00800
16573}
16574
16575pub const fn is_REV_64_dp_1src(d: u32) -> bool {
16576    (d & 0xfffffc00) == 0xdac00c00
16577}
16578
16579pub const fn is_CLZ_64_dp_1src(d: u32) -> bool {
16580    (d & 0xfffffc00) == 0xdac01000
16581}
16582
16583pub const fn is_CLS_64_dp_1src(d: u32) -> bool {
16584    (d & 0xfffffc00) == 0xdac01400
16585}
16586
16587pub const fn is_PACIA_64P_dp_1src(d: u32) -> bool {
16588    (d & 0xfffffc00) == 0xdac10000
16589}
16590
16591pub const fn is_PACIB_64P_dp_1src(d: u32) -> bool {
16592    (d & 0xfffffc00) == 0xdac10400
16593}
16594
16595pub const fn is_PACDA_64P_dp_1src(d: u32) -> bool {
16596    (d & 0xfffffc00) == 0xdac10800
16597}
16598
16599pub const fn is_PACDB_64P_dp_1src(d: u32) -> bool {
16600    (d & 0xfffffc00) == 0xdac10c00
16601}
16602
16603pub const fn is_AUTIA_64P_dp_1src(d: u32) -> bool {
16604    (d & 0xfffffc00) == 0xdac11000
16605}
16606
16607pub const fn is_AUTIB_64P_dp_1src(d: u32) -> bool {
16608    (d & 0xfffffc00) == 0xdac11400
16609}
16610
16611pub const fn is_AUTDA_64P_dp_1src(d: u32) -> bool {
16612    (d & 0xfffffc00) == 0xdac11800
16613}
16614
16615pub const fn is_AUTDB_64P_dp_1src(d: u32) -> bool {
16616    (d & 0xfffffc00) == 0xdac11c00
16617}
16618
16619pub const fn is_PACIZA_64Z_dp_1src(d: u32) -> bool {
16620    (d & 0xffffffe0) == 0xdac123e0
16621}
16622
16623pub const fn is_PACIZB_64Z_dp_1src(d: u32) -> bool {
16624    (d & 0xffffffe0) == 0xdac127e0
16625}
16626
16627pub const fn is_PACDZA_64Z_dp_1src(d: u32) -> bool {
16628    (d & 0xffffffe0) == 0xdac12be0
16629}
16630
16631pub const fn is_PACDZB_64Z_dp_1src(d: u32) -> bool {
16632    (d & 0xffffffe0) == 0xdac12fe0
16633}
16634
16635pub const fn is_AUTIZA_64Z_dp_1src(d: u32) -> bool {
16636    (d & 0xffffffe0) == 0xdac133e0
16637}
16638
16639pub const fn is_AUTIZB_64Z_dp_1src(d: u32) -> bool {
16640    (d & 0xffffffe0) == 0xdac137e0
16641}
16642
16643pub const fn is_AUTDZA_64Z_dp_1src(d: u32) -> bool {
16644    (d & 0xffffffe0) == 0xdac13be0
16645}
16646
16647pub const fn is_AUTDZB_64Z_dp_1src(d: u32) -> bool {
16648    (d & 0xffffffe0) == 0xdac13fe0
16649}
16650
16651pub const fn is_XPACI_64Z_dp_1src(d: u32) -> bool {
16652    (d & 0xffffffe0) == 0xdac143e0
16653}
16654
16655pub const fn is_XPACD_64Z_dp_1src(d: u32) -> bool {
16656    (d & 0xffffffe0) == 0xdac147e0
16657}
16658
16659pub const fn is_UDIV_32_dp_2src(d: u32) -> bool {
16660    (d & 0xffe0fc00) == 0x1ac00800
16661}
16662
16663pub const fn is_SDIV_32_dp_2src(d: u32) -> bool {
16664    (d & 0xffe0fc00) == 0x1ac00c00
16665}
16666
16667pub const fn is_LSLV_32_dp_2src(d: u32) -> bool {
16668    (d & 0xffe0fc00) == 0x1ac02000
16669}
16670
16671pub const fn is_LSRV_32_dp_2src(d: u32) -> bool {
16672    (d & 0xffe0fc00) == 0x1ac02400
16673}
16674
16675pub const fn is_ASRV_32_dp_2src(d: u32) -> bool {
16676    (d & 0xffe0fc00) == 0x1ac02800
16677}
16678
16679pub const fn is_RORV_32_dp_2src(d: u32) -> bool {
16680    (d & 0xffe0fc00) == 0x1ac02c00
16681}
16682
16683pub const fn is_CRC32B_32C_dp_2src(d: u32) -> bool {
16684    (d & 0xffe0fc00) == 0x1ac04000
16685}
16686
16687pub const fn is_CRC32H_32C_dp_2src(d: u32) -> bool {
16688    (d & 0xffe0fc00) == 0x1ac04400
16689}
16690
16691pub const fn is_CRC32W_32C_dp_2src(d: u32) -> bool {
16692    (d & 0xffe0fc00) == 0x1ac04800
16693}
16694
16695pub const fn is_CRC32CB_32C_dp_2src(d: u32) -> bool {
16696    (d & 0xffe0fc00) == 0x1ac05000
16697}
16698
16699pub const fn is_CRC32CH_32C_dp_2src(d: u32) -> bool {
16700    (d & 0xffe0fc00) == 0x1ac05400
16701}
16702
16703pub const fn is_CRC32CW_32C_dp_2src(d: u32) -> bool {
16704    (d & 0xffe0fc00) == 0x1ac05800
16705}
16706
16707pub const fn is_UDIV_64_dp_2src(d: u32) -> bool {
16708    (d & 0xffe0fc00) == 0x9ac00800
16709}
16710
16711pub const fn is_SDIV_64_dp_2src(d: u32) -> bool {
16712    (d & 0xffe0fc00) == 0x9ac00c00
16713}
16714
16715pub const fn is_LSLV_64_dp_2src(d: u32) -> bool {
16716    (d & 0xffe0fc00) == 0x9ac02000
16717}
16718
16719pub const fn is_LSRV_64_dp_2src(d: u32) -> bool {
16720    (d & 0xffe0fc00) == 0x9ac02400
16721}
16722
16723pub const fn is_ASRV_64_dp_2src(d: u32) -> bool {
16724    (d & 0xffe0fc00) == 0x9ac02800
16725}
16726
16727pub const fn is_RORV_64_dp_2src(d: u32) -> bool {
16728    (d & 0xffe0fc00) == 0x9ac02c00
16729}
16730
16731pub const fn is_PACGA_64P_dp_2src(d: u32) -> bool {
16732    (d & 0xffe0fc00) == 0x9ac03000
16733}
16734
16735pub const fn is_CRC32X_64C_dp_2src(d: u32) -> bool {
16736    (d & 0xffe0fc00) == 0x9ac04c00
16737}
16738
16739pub const fn is_CRC32CX_64C_dp_2src(d: u32) -> bool {
16740    (d & 0xffe0fc00) == 0x9ac05c00
16741}
16742
16743pub const fn is_MADD_32A_dp_3src(d: u32) -> bool {
16744    (d & 0xffe08000) == 0x1b000000
16745}
16746
16747pub const fn is_MSUB_32A_dp_3src(d: u32) -> bool {
16748    (d & 0xffe08000) == 0x1b008000
16749}
16750
16751pub const fn is_MADD_64A_dp_3src(d: u32) -> bool {
16752    (d & 0xffe08000) == 0x9b000000
16753}
16754
16755pub const fn is_MSUB_64A_dp_3src(d: u32) -> bool {
16756    (d & 0xffe08000) == 0x9b008000
16757}
16758
16759pub const fn is_SMADDL_64WA_dp_3src(d: u32) -> bool {
16760    (d & 0xffe08000) == 0x9b200000
16761}
16762
16763pub const fn is_SMSUBL_64WA_dp_3src(d: u32) -> bool {
16764    (d & 0xffe08000) == 0x9b208000
16765}
16766
16767pub const fn is_SMULH_64_dp_3src(d: u32) -> bool {
16768    (d & 0xffe08000) == 0x9b400000
16769}
16770
16771pub const fn is_UMADDL_64WA_dp_3src(d: u32) -> bool {
16772    (d & 0xffe08000) == 0x9ba00000
16773}
16774
16775pub const fn is_UMSUBL_64WA_dp_3src(d: u32) -> bool {
16776    (d & 0xffe08000) == 0x9ba08000
16777}
16778
16779pub const fn is_UMULH_64_dp_3src(d: u32) -> bool {
16780    (d & 0xffe08000) == 0x9bc00000
16781}
16782
16783pub const fn is_AND_32_log_shift(d: u32) -> bool {
16784    (d & 0xff200000) == 0x0a000000
16785}
16786
16787pub const fn is_BIC_32_log_shift(d: u32) -> bool {
16788    (d & 0xff200000) == 0x0a200000
16789}
16790
16791pub const fn is_ORR_32_log_shift(d: u32) -> bool {
16792    (d & 0xff200000) == 0x2a000000
16793}
16794
16795pub const fn is_ORN_32_log_shift(d: u32) -> bool {
16796    (d & 0xff200000) == 0x2a200000
16797}
16798
16799pub const fn is_EOR_32_log_shift(d: u32) -> bool {
16800    (d & 0xff200000) == 0x4a000000
16801}
16802
16803pub const fn is_EON_32_log_shift(d: u32) -> bool {
16804    (d & 0xff200000) == 0x4a200000
16805}
16806
16807pub const fn is_ANDS_32_log_shift(d: u32) -> bool {
16808    (d & 0xff200000) == 0x6a000000
16809}
16810
16811pub const fn is_BICS_32_log_shift(d: u32) -> bool {
16812    (d & 0xff200000) == 0x6a200000
16813}
16814
16815pub const fn is_AND_64_log_shift(d: u32) -> bool {
16816    (d & 0xff200000) == 0x8a000000
16817}
16818
16819pub const fn is_BIC_64_log_shift(d: u32) -> bool {
16820    (d & 0xff200000) == 0x8a200000
16821}
16822
16823pub const fn is_ORR_64_log_shift(d: u32) -> bool {
16824    (d & 0xff200000) == 0xaa000000
16825}
16826
16827pub const fn is_ORN_64_log_shift(d: u32) -> bool {
16828    (d & 0xff200000) == 0xaa200000
16829}
16830
16831pub const fn is_EOR_64_log_shift(d: u32) -> bool {
16832    (d & 0xff200000) == 0xca000000
16833}
16834
16835pub const fn is_EON_64_log_shift(d: u32) -> bool {
16836    (d & 0xff200000) == 0xca200000
16837}
16838
16839pub const fn is_ANDS_64_log_shift(d: u32) -> bool {
16840    (d & 0xff200000) == 0xea000000
16841}
16842
16843pub const fn is_BICS_64_log_shift(d: u32) -> bool {
16844    (d & 0xff200000) == 0xea200000
16845}
16846
16847pub const fn is_SADDLV_asimdall_only(d: u32) -> bool {
16848    (d & 0xbf3ffc00) == 0x0e303800
16849}
16850
16851pub const fn is_SMAXV_asimdall_only(d: u32) -> bool {
16852    (d & 0xbf3ffc00) == 0x0e30a800
16853}
16854
16855pub const fn is_SMINV_asimdall_only(d: u32) -> bool {
16856    (d & 0xbf3ffc00) == 0x0e31a800
16857}
16858
16859pub const fn is_ADDV_asimdall_only(d: u32) -> bool {
16860    (d & 0xbf3ffc00) == 0x0e31b800
16861}
16862
16863pub const fn is_FMAXNMV_asimdall_only_H(d: u32) -> bool {
16864    (d & 0xbffffc00) == 0x0e30c800
16865}
16866
16867pub const fn is_FMAXV_asimdall_only_H(d: u32) -> bool {
16868    (d & 0xbffffc00) == 0x0e30f800
16869}
16870
16871pub const fn is_FMINNMV_asimdall_only_H(d: u32) -> bool {
16872    (d & 0xbffffc00) == 0x0eb0c800
16873}
16874
16875pub const fn is_FMINV_asimdall_only_H(d: u32) -> bool {
16876    (d & 0xbffffc00) == 0x0eb0f800
16877}
16878
16879pub const fn is_UADDLV_asimdall_only(d: u32) -> bool {
16880    (d & 0xbf3ffc00) == 0x2e303800
16881}
16882
16883pub const fn is_UMAXV_asimdall_only(d: u32) -> bool {
16884    (d & 0xbf3ffc00) == 0x2e30a800
16885}
16886
16887pub const fn is_UMINV_asimdall_only(d: u32) -> bool {
16888    (d & 0xbf3ffc00) == 0x2e31a800
16889}
16890
16891pub const fn is_FMAXNMV_asimdall_only_SD(d: u32) -> bool {
16892    (d & 0xbfbffc00) == 0x2e30c800
16893}
16894
16895pub const fn is_FMAXV_asimdall_only_SD(d: u32) -> bool {
16896    (d & 0xbfbffc00) == 0x2e30f800
16897}
16898
16899pub const fn is_FMINNMV_asimdall_only_SD(d: u32) -> bool {
16900    (d & 0xbfbffc00) == 0x2eb0c800
16901}
16902
16903pub const fn is_FMINV_asimdall_only_SD(d: u32) -> bool {
16904    (d & 0xbfbffc00) == 0x2eb0f800
16905}
16906
16907pub const fn is_DUP_asimdins_DV_v(d: u32) -> bool {
16908    (d & 0xbfe0fc00) == 0x0e000400
16909}
16910
16911pub const fn is_DUP_asimdins_DR_r(d: u32) -> bool {
16912    (d & 0xbfe0fc00) == 0x0e000c00
16913}
16914
16915pub const fn is_SMOV_asimdins_W_w(d: u32) -> bool {
16916    (d & 0xffe0fc00) == 0x0e002c00
16917}
16918
16919pub const fn is_UMOV_asimdins_W_w(d: u32) -> bool {
16920    (d & 0xffe0fc00) == 0x0e003c00
16921}
16922
16923pub const fn is_INS_asimdins_IR_r(d: u32) -> bool {
16924    (d & 0xffe0fc00) == 0x4e001c00
16925}
16926
16927pub const fn is_SMOV_asimdins_X_x(d: u32) -> bool {
16928    (d & 0xffe0fc00) == 0x4e002c00
16929}
16930
16931pub const fn is_UMOV_asimdins_X_x(d: u32) -> bool {
16932    (d & 0xffeffc00) == 0x4e083c00
16933}
16934
16935pub const fn is_INS_asimdins_IV_v(d: u32) -> bool {
16936    (d & 0xffe08400) == 0x6e000400
16937}
16938
16939pub const fn is_EXT_asimdext_only(d: u32) -> bool {
16940    (d & 0xbfe08400) == 0x2e000000
16941}
16942
16943pub const fn is_MOVI_asimdimm_L_sl(d: u32) -> bool {
16944    (d & 0xbff89c00) == 0x0f000400
16945}
16946
16947pub const fn is_ORR_asimdimm_L_sl(d: u32) -> bool {
16948    (d & 0xbff89c00) == 0x0f001400
16949}
16950
16951pub const fn is_MOVI_asimdimm_L_hl(d: u32) -> bool {
16952    (d & 0xbff8dc00) == 0x0f008400
16953}
16954
16955pub const fn is_ORR_asimdimm_L_hl(d: u32) -> bool {
16956    (d & 0xbff8dc00) == 0x0f009400
16957}
16958
16959pub const fn is_MOVI_asimdimm_M_sm(d: u32) -> bool {
16960    (d & 0xbff8ec00) == 0x0f00c400
16961}
16962
16963pub const fn is_MOVI_asimdimm_N_b(d: u32) -> bool {
16964    (d & 0xbff8fc00) == 0x0f00e400
16965}
16966
16967pub const fn is_FMOV_asimdimm_S_s(d: u32) -> bool {
16968    (d & 0xbff8fc00) == 0x0f00f400
16969}
16970
16971pub const fn is_FMOV_asimdimm_H_h(d: u32) -> bool {
16972    (d & 0xbff8fc00) == 0x0f00fc00
16973}
16974
16975pub const fn is_MVNI_asimdimm_L_sl(d: u32) -> bool {
16976    (d & 0xbff89c00) == 0x2f000400
16977}
16978
16979pub const fn is_BIC_asimdimm_L_sl(d: u32) -> bool {
16980    (d & 0xbff89c00) == 0x2f001400
16981}
16982
16983pub const fn is_MVNI_asimdimm_L_hl(d: u32) -> bool {
16984    (d & 0xbff8dc00) == 0x2f008400
16985}
16986
16987pub const fn is_BIC_asimdimm_L_hl(d: u32) -> bool {
16988    (d & 0xbff8dc00) == 0x2f009400
16989}
16990
16991pub const fn is_MVNI_asimdimm_M_sm(d: u32) -> bool {
16992    (d & 0xbff8ec00) == 0x2f00c400
16993}
16994
16995pub const fn is_MOVI_asimdimm_D_ds(d: u32) -> bool {
16996    (d & 0xfff8fc00) == 0x2f00e400
16997}
16998
16999pub const fn is_MOVI_asimdimm_D2_d(d: u32) -> bool {
17000    (d & 0xfff8fc00) == 0x6f00e400
17001}
17002
17003pub const fn is_FMOV_asimdimm_D2_d(d: u32) -> bool {
17004    (d & 0xfff8fc00) == 0x6f00f400
17005}
17006
17007pub const fn is_UZP1_asimdperm_only(d: u32) -> bool {
17008    (d & 0xbf20fc00) == 0x0e001800
17009}
17010
17011pub const fn is_TRN1_asimdperm_only(d: u32) -> bool {
17012    (d & 0xbf20fc00) == 0x0e002800
17013}
17014
17015pub const fn is_ZIP1_asimdperm_only(d: u32) -> bool {
17016    (d & 0xbf20fc00) == 0x0e003800
17017}
17018
17019pub const fn is_UZP2_asimdperm_only(d: u32) -> bool {
17020    (d & 0xbf20fc00) == 0x0e005800
17021}
17022
17023pub const fn is_TRN2_asimdperm_only(d: u32) -> bool {
17024    (d & 0xbf20fc00) == 0x0e006800
17025}
17026
17027pub const fn is_ZIP2_asimdperm_only(d: u32) -> bool {
17028    (d & 0xbf20fc00) == 0x0e007800
17029}
17030
17031pub const fn is_DUP_asisdone_only(d: u32) -> bool {
17032    (d & 0xffe0fc00) == 0x5e000400
17033}
17034
17035pub const fn is_ADDP_asisdpair_only(d: u32) -> bool {
17036    (d & 0xff3ffc00) == 0x5e31b800
17037}
17038
17039pub const fn is_FMAXNMP_asisdpair_only_H(d: u32) -> bool {
17040    (d & 0xfffffc00) == 0x5e30c800
17041}
17042
17043pub const fn is_FADDP_asisdpair_only_H(d: u32) -> bool {
17044    (d & 0xfffffc00) == 0x5e30d800
17045}
17046
17047pub const fn is_FMAXP_asisdpair_only_H(d: u32) -> bool {
17048    (d & 0xfffffc00) == 0x5e30f800
17049}
17050
17051pub const fn is_FMINNMP_asisdpair_only_H(d: u32) -> bool {
17052    (d & 0xfffffc00) == 0x5eb0c800
17053}
17054
17055pub const fn is_FMINP_asisdpair_only_H(d: u32) -> bool {
17056    (d & 0xfffffc00) == 0x5eb0f800
17057}
17058
17059pub const fn is_FMAXNMP_asisdpair_only_SD(d: u32) -> bool {
17060    (d & 0xffbffc00) == 0x7e30c800
17061}
17062
17063pub const fn is_FADDP_asisdpair_only_SD(d: u32) -> bool {
17064    (d & 0xffbffc00) == 0x7e30d800
17065}
17066
17067pub const fn is_FMAXP_asisdpair_only_SD(d: u32) -> bool {
17068    (d & 0xffbffc00) == 0x7e30f800
17069}
17070
17071pub const fn is_FMINNMP_asisdpair_only_SD(d: u32) -> bool {
17072    (d & 0xffbffc00) == 0x7eb0c800
17073}
17074
17075pub const fn is_FMINP_asisdpair_only_SD(d: u32) -> bool {
17076    (d & 0xffbffc00) == 0x7eb0f800
17077}
17078
17079pub const fn is_SSHR_asisdshf_R(d: u32) -> bool {
17080    (d & 0xff80fc00) == 0x5f000400 && (d & 0x780000) != 0x000000
17081}
17082
17083pub const fn is_SSRA_asisdshf_R(d: u32) -> bool {
17084    (d & 0xff80fc00) == 0x5f001400 && (d & 0x780000) != 0x000000
17085}
17086
17087pub const fn is_SRSHR_asisdshf_R(d: u32) -> bool {
17088    (d & 0xff80fc00) == 0x5f002400 && (d & 0x780000) != 0x000000
17089}
17090
17091pub const fn is_SRSRA_asisdshf_R(d: u32) -> bool {
17092    (d & 0xff80fc00) == 0x5f003400 && (d & 0x780000) != 0x000000
17093}
17094
17095pub const fn is_SHL_asisdshf_R(d: u32) -> bool {
17096    (d & 0xff80fc00) == 0x5f005400 && (d & 0x780000) != 0x000000
17097}
17098
17099pub const fn is_SQSHL_asisdshf_R(d: u32) -> bool {
17100    (d & 0xff80fc00) == 0x5f007400 && (d & 0x780000) != 0x000000
17101}
17102
17103pub const fn is_SQSHRN_asisdshf_N(d: u32) -> bool {
17104    (d & 0xff80fc00) == 0x5f009400 && (d & 0x780000) != 0x000000
17105}
17106
17107pub const fn is_SQRSHRN_asisdshf_N(d: u32) -> bool {
17108    (d & 0xff80fc00) == 0x5f009c00 && (d & 0x780000) != 0x000000
17109}
17110
17111pub const fn is_SCVTF_asisdshf_C(d: u32) -> bool {
17112    (d & 0xff80fc00) == 0x5f00e400 && (d & 0x780000) != 0x000000
17113}
17114
17115pub const fn is_FCVTZS_asisdshf_C(d: u32) -> bool {
17116    (d & 0xff80fc00) == 0x5f00fc00 && (d & 0x780000) != 0x000000
17117}
17118
17119pub const fn is_USHR_asisdshf_R(d: u32) -> bool {
17120    (d & 0xff80fc00) == 0x7f000400 && (d & 0x780000) != 0x000000
17121}
17122
17123pub const fn is_USRA_asisdshf_R(d: u32) -> bool {
17124    (d & 0xff80fc00) == 0x7f001400 && (d & 0x780000) != 0x000000
17125}
17126
17127pub const fn is_URSHR_asisdshf_R(d: u32) -> bool {
17128    (d & 0xff80fc00) == 0x7f002400 && (d & 0x780000) != 0x000000
17129}
17130
17131pub const fn is_URSRA_asisdshf_R(d: u32) -> bool {
17132    (d & 0xff80fc00) == 0x7f003400 && (d & 0x780000) != 0x000000
17133}
17134
17135pub const fn is_SRI_asisdshf_R(d: u32) -> bool {
17136    (d & 0xff80fc00) == 0x7f004400 && (d & 0x780000) != 0x000000
17137}
17138
17139pub const fn is_SLI_asisdshf_R(d: u32) -> bool {
17140    (d & 0xff80fc00) == 0x7f005400 && (d & 0x780000) != 0x000000
17141}
17142
17143pub const fn is_SQSHLU_asisdshf_R(d: u32) -> bool {
17144    (d & 0xff80fc00) == 0x7f006400 && (d & 0x780000) != 0x000000
17145}
17146
17147pub const fn is_UQSHL_asisdshf_R(d: u32) -> bool {
17148    (d & 0xff80fc00) == 0x7f007400 && (d & 0x780000) != 0x000000
17149}
17150
17151pub const fn is_SQSHRUN_asisdshf_N(d: u32) -> bool {
17152    (d & 0xff80fc00) == 0x7f008400 && (d & 0x780000) != 0x000000
17153}
17154
17155pub const fn is_SQRSHRUN_asisdshf_N(d: u32) -> bool {
17156    (d & 0xff80fc00) == 0x7f008c00 && (d & 0x780000) != 0x000000
17157}
17158
17159pub const fn is_UQSHRN_asisdshf_N(d: u32) -> bool {
17160    (d & 0xff80fc00) == 0x7f009400 && (d & 0x780000) != 0x000000
17161}
17162
17163pub const fn is_UQRSHRN_asisdshf_N(d: u32) -> bool {
17164    (d & 0xff80fc00) == 0x7f009c00 && (d & 0x780000) != 0x000000
17165}
17166
17167pub const fn is_UCVTF_asisdshf_C(d: u32) -> bool {
17168    (d & 0xff80fc00) == 0x7f00e400 && (d & 0x780000) != 0x000000
17169}
17170
17171pub const fn is_FCVTZU_asisdshf_C(d: u32) -> bool {
17172    (d & 0xff80fc00) == 0x7f00fc00 && (d & 0x780000) != 0x000000
17173}
17174
17175pub const fn is_SQDMLAL_asisddiff_only(d: u32) -> bool {
17176    (d & 0xff20fc00) == 0x5e209000
17177}
17178
17179pub const fn is_SQDMLSL_asisddiff_only(d: u32) -> bool {
17180    (d & 0xff20fc00) == 0x5e20b000
17181}
17182
17183pub const fn is_SQDMULL_asisddiff_only(d: u32) -> bool {
17184    (d & 0xff20fc00) == 0x5e20d000
17185}
17186
17187pub const fn is_SQADD_asisdsame_only(d: u32) -> bool {
17188    (d & 0xff20fc00) == 0x5e200c00
17189}
17190
17191pub const fn is_SQSUB_asisdsame_only(d: u32) -> bool {
17192    (d & 0xff20fc00) == 0x5e202c00
17193}
17194
17195pub const fn is_CMGT_asisdsame_only(d: u32) -> bool {
17196    (d & 0xff20fc00) == 0x5e203400
17197}
17198
17199pub const fn is_CMGE_asisdsame_only(d: u32) -> bool {
17200    (d & 0xff20fc00) == 0x5e203c00
17201}
17202
17203pub const fn is_SSHL_asisdsame_only(d: u32) -> bool {
17204    (d & 0xff20fc00) == 0x5e204400
17205}
17206
17207pub const fn is_SQSHL_asisdsame_only(d: u32) -> bool {
17208    (d & 0xff20fc00) == 0x5e204c00
17209}
17210
17211pub const fn is_SRSHL_asisdsame_only(d: u32) -> bool {
17212    (d & 0xff20fc00) == 0x5e205400
17213}
17214
17215pub const fn is_SQRSHL_asisdsame_only(d: u32) -> bool {
17216    (d & 0xff20fc00) == 0x5e205c00
17217}
17218
17219pub const fn is_ADD_asisdsame_only(d: u32) -> bool {
17220    (d & 0xff20fc00) == 0x5e208400
17221}
17222
17223pub const fn is_CMTST_asisdsame_only(d: u32) -> bool {
17224    (d & 0xff20fc00) == 0x5e208c00
17225}
17226
17227pub const fn is_SQDMULH_asisdsame_only(d: u32) -> bool {
17228    (d & 0xff20fc00) == 0x5e20b400
17229}
17230
17231pub const fn is_FMULX_asisdsame_only(d: u32) -> bool {
17232    (d & 0xffa0fc00) == 0x5e20dc00
17233}
17234
17235pub const fn is_FCMEQ_asisdsame_only(d: u32) -> bool {
17236    (d & 0xffa0fc00) == 0x5e20e400
17237}
17238
17239pub const fn is_FRECPS_asisdsame_only(d: u32) -> bool {
17240    (d & 0xffa0fc00) == 0x5e20fc00
17241}
17242
17243pub const fn is_FRSQRTS_asisdsame_only(d: u32) -> bool {
17244    (d & 0xffa0fc00) == 0x5ea0fc00
17245}
17246
17247pub const fn is_UQADD_asisdsame_only(d: u32) -> bool {
17248    (d & 0xff20fc00) == 0x7e200c00
17249}
17250
17251pub const fn is_UQSUB_asisdsame_only(d: u32) -> bool {
17252    (d & 0xff20fc00) == 0x7e202c00
17253}
17254
17255pub const fn is_CMHI_asisdsame_only(d: u32) -> bool {
17256    (d & 0xff20fc00) == 0x7e203400
17257}
17258
17259pub const fn is_CMHS_asisdsame_only(d: u32) -> bool {
17260    (d & 0xff20fc00) == 0x7e203c00
17261}
17262
17263pub const fn is_USHL_asisdsame_only(d: u32) -> bool {
17264    (d & 0xff20fc00) == 0x7e204400
17265}
17266
17267pub const fn is_UQSHL_asisdsame_only(d: u32) -> bool {
17268    (d & 0xff20fc00) == 0x7e204c00
17269}
17270
17271pub const fn is_URSHL_asisdsame_only(d: u32) -> bool {
17272    (d & 0xff20fc00) == 0x7e205400
17273}
17274
17275pub const fn is_UQRSHL_asisdsame_only(d: u32) -> bool {
17276    (d & 0xff20fc00) == 0x7e205c00
17277}
17278
17279pub const fn is_SUB_asisdsame_only(d: u32) -> bool {
17280    (d & 0xff20fc00) == 0x7e208400
17281}
17282
17283pub const fn is_CMEQ_asisdsame_only(d: u32) -> bool {
17284    (d & 0xff20fc00) == 0x7e208c00
17285}
17286
17287pub const fn is_SQRDMULH_asisdsame_only(d: u32) -> bool {
17288    (d & 0xff20fc00) == 0x7e20b400
17289}
17290
17291pub const fn is_FCMGE_asisdsame_only(d: u32) -> bool {
17292    (d & 0xffa0fc00) == 0x7e20e400
17293}
17294
17295pub const fn is_FACGE_asisdsame_only(d: u32) -> bool {
17296    (d & 0xffa0fc00) == 0x7e20ec00
17297}
17298
17299pub const fn is_FABD_asisdsame_only(d: u32) -> bool {
17300    (d & 0xffa0fc00) == 0x7ea0d400
17301}
17302
17303pub const fn is_FCMGT_asisdsame_only(d: u32) -> bool {
17304    (d & 0xffa0fc00) == 0x7ea0e400
17305}
17306
17307pub const fn is_FACGT_asisdsame_only(d: u32) -> bool {
17308    (d & 0xffa0fc00) == 0x7ea0ec00
17309}
17310
17311pub const fn is_FMULX_asisdsamefp16_only(d: u32) -> bool {
17312    (d & 0xffe0fc00) == 0x5e401c00
17313}
17314
17315pub const fn is_FCMEQ_asisdsamefp16_only(d: u32) -> bool {
17316    (d & 0xffe0fc00) == 0x5e402400
17317}
17318
17319pub const fn is_FRECPS_asisdsamefp16_only(d: u32) -> bool {
17320    (d & 0xffe0fc00) == 0x5e403c00
17321}
17322
17323pub const fn is_FRSQRTS_asisdsamefp16_only(d: u32) -> bool {
17324    (d & 0xffe0fc00) == 0x5ec03c00
17325}
17326
17327pub const fn is_FCMGE_asisdsamefp16_only(d: u32) -> bool {
17328    (d & 0xffe0fc00) == 0x7e402400
17329}
17330
17331pub const fn is_FACGE_asisdsamefp16_only(d: u32) -> bool {
17332    (d & 0xffe0fc00) == 0x7e402c00
17333}
17334
17335pub const fn is_FABD_asisdsamefp16_only(d: u32) -> bool {
17336    (d & 0xffe0fc00) == 0x7ec01400
17337}
17338
17339pub const fn is_FCMGT_asisdsamefp16_only(d: u32) -> bool {
17340    (d & 0xffe0fc00) == 0x7ec02400
17341}
17342
17343pub const fn is_FACGT_asisdsamefp16_only(d: u32) -> bool {
17344    (d & 0xffe0fc00) == 0x7ec02c00
17345}
17346
17347pub const fn is_SQRDMLAH_asisdsame2_only(d: u32) -> bool {
17348    (d & 0xff20fc00) == 0x7e008400
17349}
17350
17351pub const fn is_SQRDMLSH_asisdsame2_only(d: u32) -> bool {
17352    (d & 0xff20fc00) == 0x7e008c00
17353}
17354
17355pub const fn is_SUQADD_asisdmisc_R(d: u32) -> bool {
17356    (d & 0xff3ffc00) == 0x5e203800
17357}
17358
17359pub const fn is_SQABS_asisdmisc_R(d: u32) -> bool {
17360    (d & 0xff3ffc00) == 0x5e207800
17361}
17362
17363pub const fn is_CMGT_asisdmisc_Z(d: u32) -> bool {
17364    (d & 0xff3ffc00) == 0x5e208800
17365}
17366
17367pub const fn is_CMEQ_asisdmisc_Z(d: u32) -> bool {
17368    (d & 0xff3ffc00) == 0x5e209800
17369}
17370
17371pub const fn is_CMLT_asisdmisc_Z(d: u32) -> bool {
17372    (d & 0xff3ffc00) == 0x5e20a800
17373}
17374
17375pub const fn is_ABS_asisdmisc_R(d: u32) -> bool {
17376    (d & 0xff3ffc00) == 0x5e20b800
17377}
17378
17379pub const fn is_SQXTN_asisdmisc_N(d: u32) -> bool {
17380    (d & 0xff3ffc00) == 0x5e214800
17381}
17382
17383pub const fn is_FCVTNS_asisdmisc_R(d: u32) -> bool {
17384    (d & 0xffbffc00) == 0x5e21a800
17385}
17386
17387pub const fn is_FCVTMS_asisdmisc_R(d: u32) -> bool {
17388    (d & 0xffbffc00) == 0x5e21b800
17389}
17390
17391pub const fn is_FCVTAS_asisdmisc_R(d: u32) -> bool {
17392    (d & 0xffbffc00) == 0x5e21c800
17393}
17394
17395pub const fn is_SCVTF_asisdmisc_R(d: u32) -> bool {
17396    (d & 0xffbffc00) == 0x5e21d800
17397}
17398
17399pub const fn is_FCMGT_asisdmisc_FZ(d: u32) -> bool {
17400    (d & 0xffbffc00) == 0x5ea0c800
17401}
17402
17403pub const fn is_FCMEQ_asisdmisc_FZ(d: u32) -> bool {
17404    (d & 0xffbffc00) == 0x5ea0d800
17405}
17406
17407pub const fn is_FCMLT_asisdmisc_FZ(d: u32) -> bool {
17408    (d & 0xffbffc00) == 0x5ea0e800
17409}
17410
17411pub const fn is_FCVTPS_asisdmisc_R(d: u32) -> bool {
17412    (d & 0xffbffc00) == 0x5ea1a800
17413}
17414
17415pub const fn is_FCVTZS_asisdmisc_R(d: u32) -> bool {
17416    (d & 0xffbffc00) == 0x5ea1b800
17417}
17418
17419pub const fn is_FRECPE_asisdmisc_R(d: u32) -> bool {
17420    (d & 0xffbffc00) == 0x5ea1d800
17421}
17422
17423pub const fn is_FRECPX_asisdmisc_R(d: u32) -> bool {
17424    (d & 0xffbffc00) == 0x5ea1f800
17425}
17426
17427pub const fn is_USQADD_asisdmisc_R(d: u32) -> bool {
17428    (d & 0xff3ffc00) == 0x7e203800
17429}
17430
17431pub const fn is_SQNEG_asisdmisc_R(d: u32) -> bool {
17432    (d & 0xff3ffc00) == 0x7e207800
17433}
17434
17435pub const fn is_CMGE_asisdmisc_Z(d: u32) -> bool {
17436    (d & 0xff3ffc00) == 0x7e208800
17437}
17438
17439pub const fn is_CMLE_asisdmisc_Z(d: u32) -> bool {
17440    (d & 0xff3ffc00) == 0x7e209800
17441}
17442
17443pub const fn is_NEG_asisdmisc_R(d: u32) -> bool {
17444    (d & 0xff3ffc00) == 0x7e20b800
17445}
17446
17447pub const fn is_SQXTUN_asisdmisc_N(d: u32) -> bool {
17448    (d & 0xff3ffc00) == 0x7e212800
17449}
17450
17451pub const fn is_UQXTN_asisdmisc_N(d: u32) -> bool {
17452    (d & 0xff3ffc00) == 0x7e214800
17453}
17454
17455pub const fn is_FCVTXN_asisdmisc_N(d: u32) -> bool {
17456    (d & 0xffbffc00) == 0x7e216800
17457}
17458
17459pub const fn is_FCVTNU_asisdmisc_R(d: u32) -> bool {
17460    (d & 0xffbffc00) == 0x7e21a800
17461}
17462
17463pub const fn is_FCVTMU_asisdmisc_R(d: u32) -> bool {
17464    (d & 0xffbffc00) == 0x7e21b800
17465}
17466
17467pub const fn is_FCVTAU_asisdmisc_R(d: u32) -> bool {
17468    (d & 0xffbffc00) == 0x7e21c800
17469}
17470
17471pub const fn is_UCVTF_asisdmisc_R(d: u32) -> bool {
17472    (d & 0xffbffc00) == 0x7e21d800
17473}
17474
17475pub const fn is_FCMGE_asisdmisc_FZ(d: u32) -> bool {
17476    (d & 0xffbffc00) == 0x7ea0c800
17477}
17478
17479pub const fn is_FCMLE_asisdmisc_FZ(d: u32) -> bool {
17480    (d & 0xffbffc00) == 0x7ea0d800
17481}
17482
17483pub const fn is_FCVTPU_asisdmisc_R(d: u32) -> bool {
17484    (d & 0xffbffc00) == 0x7ea1a800
17485}
17486
17487pub const fn is_FCVTZU_asisdmisc_R(d: u32) -> bool {
17488    (d & 0xffbffc00) == 0x7ea1b800
17489}
17490
17491pub const fn is_FRSQRTE_asisdmisc_R(d: u32) -> bool {
17492    (d & 0xffbffc00) == 0x7ea1d800
17493}
17494
17495pub const fn is_FCVTNS_asisdmiscfp16_R(d: u32) -> bool {
17496    (d & 0xfffffc00) == 0x5e79a800
17497}
17498
17499pub const fn is_FCVTMS_asisdmiscfp16_R(d: u32) -> bool {
17500    (d & 0xfffffc00) == 0x5e79b800
17501}
17502
17503pub const fn is_FCVTAS_asisdmiscfp16_R(d: u32) -> bool {
17504    (d & 0xfffffc00) == 0x5e79c800
17505}
17506
17507pub const fn is_SCVTF_asisdmiscfp16_R(d: u32) -> bool {
17508    (d & 0xfffffc00) == 0x5e79d800
17509}
17510
17511pub const fn is_FCMGT_asisdmiscfp16_FZ(d: u32) -> bool {
17512    (d & 0xfffffc00) == 0x5ef8c800
17513}
17514
17515pub const fn is_FCMEQ_asisdmiscfp16_FZ(d: u32) -> bool {
17516    (d & 0xfffffc00) == 0x5ef8d800
17517}
17518
17519pub const fn is_FCMLT_asisdmiscfp16_FZ(d: u32) -> bool {
17520    (d & 0xfffffc00) == 0x5ef8e800
17521}
17522
17523pub const fn is_FCVTPS_asisdmiscfp16_R(d: u32) -> bool {
17524    (d & 0xfffffc00) == 0x5ef9a800
17525}
17526
17527pub const fn is_FCVTZS_asisdmiscfp16_R(d: u32) -> bool {
17528    (d & 0xfffffc00) == 0x5ef9b800
17529}
17530
17531pub const fn is_FRECPE_asisdmiscfp16_R(d: u32) -> bool {
17532    (d & 0xfffffc00) == 0x5ef9d800
17533}
17534
17535pub const fn is_FRECPX_asisdmiscfp16_R(d: u32) -> bool {
17536    (d & 0xfffffc00) == 0x5ef9f800
17537}
17538
17539pub const fn is_FCVTNU_asisdmiscfp16_R(d: u32) -> bool {
17540    (d & 0xfffffc00) == 0x7e79a800
17541}
17542
17543pub const fn is_FCVTMU_asisdmiscfp16_R(d: u32) -> bool {
17544    (d & 0xfffffc00) == 0x7e79b800
17545}
17546
17547pub const fn is_FCVTAU_asisdmiscfp16_R(d: u32) -> bool {
17548    (d & 0xfffffc00) == 0x7e79c800
17549}
17550
17551pub const fn is_UCVTF_asisdmiscfp16_R(d: u32) -> bool {
17552    (d & 0xfffffc00) == 0x7e79d800
17553}
17554
17555pub const fn is_FCMGE_asisdmiscfp16_FZ(d: u32) -> bool {
17556    (d & 0xfffffc00) == 0x7ef8c800
17557}
17558
17559pub const fn is_FCMLE_asisdmiscfp16_FZ(d: u32) -> bool {
17560    (d & 0xfffffc00) == 0x7ef8d800
17561}
17562
17563pub const fn is_FCVTPU_asisdmiscfp16_R(d: u32) -> bool {
17564    (d & 0xfffffc00) == 0x7ef9a800
17565}
17566
17567pub const fn is_FCVTZU_asisdmiscfp16_R(d: u32) -> bool {
17568    (d & 0xfffffc00) == 0x7ef9b800
17569}
17570
17571pub const fn is_FRSQRTE_asisdmiscfp16_R(d: u32) -> bool {
17572    (d & 0xfffffc00) == 0x7ef9d800
17573}
17574
17575pub const fn is_SQDMLAL_asisdelem_L(d: u32) -> bool {
17576    (d & 0xff00f400) == 0x5f003000
17577}
17578
17579pub const fn is_SQDMLSL_asisdelem_L(d: u32) -> bool {
17580    (d & 0xff00f400) == 0x5f007000
17581}
17582
17583pub const fn is_SQDMULL_asisdelem_L(d: u32) -> bool {
17584    (d & 0xff00f400) == 0x5f00b000
17585}
17586
17587pub const fn is_SQDMULH_asisdelem_R(d: u32) -> bool {
17588    (d & 0xff00f400) == 0x5f00c000
17589}
17590
17591pub const fn is_SQRDMULH_asisdelem_R(d: u32) -> bool {
17592    (d & 0xff00f400) == 0x5f00d000
17593}
17594
17595pub const fn is_FMLA_asisdelem_RH_H(d: u32) -> bool {
17596    (d & 0xffc0f400) == 0x5f001000
17597}
17598
17599pub const fn is_FMLS_asisdelem_RH_H(d: u32) -> bool {
17600    (d & 0xffc0f400) == 0x5f005000
17601}
17602
17603pub const fn is_FMUL_asisdelem_RH_H(d: u32) -> bool {
17604    (d & 0xffc0f400) == 0x5f009000
17605}
17606
17607pub const fn is_FMLA_asisdelem_R_SD(d: u32) -> bool {
17608    (d & 0xff80f400) == 0x5f801000
17609}
17610
17611pub const fn is_FMLS_asisdelem_R_SD(d: u32) -> bool {
17612    (d & 0xff80f400) == 0x5f805000
17613}
17614
17615pub const fn is_FMUL_asisdelem_R_SD(d: u32) -> bool {
17616    (d & 0xff80f400) == 0x5f809000
17617}
17618
17619pub const fn is_SQRDMLAH_asisdelem_R(d: u32) -> bool {
17620    (d & 0xff00f400) == 0x7f00d000
17621}
17622
17623pub const fn is_SQRDMLSH_asisdelem_R(d: u32) -> bool {
17624    (d & 0xff00f400) == 0x7f00f000
17625}
17626
17627pub const fn is_FMULX_asisdelem_RH_H(d: u32) -> bool {
17628    (d & 0xffc0f400) == 0x7f009000
17629}
17630
17631pub const fn is_FMULX_asisdelem_R_SD(d: u32) -> bool {
17632    (d & 0xff80f400) == 0x7f809000
17633}
17634
17635pub const fn is_SSHR_asimdshf_R(d: u32) -> bool {
17636    (d & 0xbf80fc00) == 0x0f000400 && (d & 0x780000) != 0x000000
17637}
17638
17639pub const fn is_SSRA_asimdshf_R(d: u32) -> bool {
17640    (d & 0xbf80fc00) == 0x0f001400 && (d & 0x780000) != 0x000000
17641}
17642
17643pub const fn is_SRSHR_asimdshf_R(d: u32) -> bool {
17644    (d & 0xbf80fc00) == 0x0f002400 && (d & 0x780000) != 0x000000
17645}
17646
17647pub const fn is_SRSRA_asimdshf_R(d: u32) -> bool {
17648    (d & 0xbf80fc00) == 0x0f003400 && (d & 0x780000) != 0x000000
17649}
17650
17651pub const fn is_SHL_asimdshf_R(d: u32) -> bool {
17652    (d & 0xbf80fc00) == 0x0f005400 && (d & 0x780000) != 0x000000
17653}
17654
17655pub const fn is_SQSHL_asimdshf_R(d: u32) -> bool {
17656    (d & 0xbf80fc00) == 0x0f007400 && (d & 0x780000) != 0x000000
17657}
17658
17659pub const fn is_SHRN_asimdshf_N(d: u32) -> bool {
17660    (d & 0xbf80fc00) == 0x0f008400 && (d & 0x780000) != 0x000000
17661}
17662
17663pub const fn is_RSHRN_asimdshf_N(d: u32) -> bool {
17664    (d & 0xbf80fc00) == 0x0f008c00 && (d & 0x780000) != 0x000000
17665}
17666
17667pub const fn is_SQSHRN_asimdshf_N(d: u32) -> bool {
17668    (d & 0xbf80fc00) == 0x0f009400 && (d & 0x780000) != 0x000000
17669}
17670
17671pub const fn is_SQRSHRN_asimdshf_N(d: u32) -> bool {
17672    (d & 0xbf80fc00) == 0x0f009c00 && (d & 0x780000) != 0x000000
17673}
17674
17675pub const fn is_SSHLL_asimdshf_L(d: u32) -> bool {
17676    (d & 0xbf80fc00) == 0x0f00a400 && (d & 0x780000) != 0x000000
17677}
17678
17679pub const fn is_SCVTF_asimdshf_C(d: u32) -> bool {
17680    (d & 0xbf80fc00) == 0x0f00e400 && (d & 0x780000) != 0x000000
17681}
17682
17683pub const fn is_FCVTZS_asimdshf_C(d: u32) -> bool {
17684    (d & 0xbf80fc00) == 0x0f00fc00 && (d & 0x780000) != 0x000000
17685}
17686
17687pub const fn is_USHR_asimdshf_R(d: u32) -> bool {
17688    (d & 0xbf80fc00) == 0x2f000400 && (d & 0x780000) != 0x000000
17689}
17690
17691pub const fn is_USRA_asimdshf_R(d: u32) -> bool {
17692    (d & 0xbf80fc00) == 0x2f001400 && (d & 0x780000) != 0x000000
17693}
17694
17695pub const fn is_URSHR_asimdshf_R(d: u32) -> bool {
17696    (d & 0xbf80fc00) == 0x2f002400 && (d & 0x780000) != 0x000000
17697}
17698
17699pub const fn is_URSRA_asimdshf_R(d: u32) -> bool {
17700    (d & 0xbf80fc00) == 0x2f003400 && (d & 0x780000) != 0x000000
17701}
17702
17703pub const fn is_SRI_asimdshf_R(d: u32) -> bool {
17704    (d & 0xbf80fc00) == 0x2f004400 && (d & 0x780000) != 0x000000
17705}
17706
17707pub const fn is_SLI_asimdshf_R(d: u32) -> bool {
17708    (d & 0xbf80fc00) == 0x2f005400 && (d & 0x780000) != 0x000000
17709}
17710
17711pub const fn is_SQSHLU_asimdshf_R(d: u32) -> bool {
17712    (d & 0xbf80fc00) == 0x2f006400 && (d & 0x780000) != 0x000000
17713}
17714
17715pub const fn is_UQSHL_asimdshf_R(d: u32) -> bool {
17716    (d & 0xbf80fc00) == 0x2f007400 && (d & 0x780000) != 0x000000
17717}
17718
17719pub const fn is_SQSHRUN_asimdshf_N(d: u32) -> bool {
17720    (d & 0xbf80fc00) == 0x2f008400 && (d & 0x780000) != 0x000000
17721}
17722
17723pub const fn is_SQRSHRUN_asimdshf_N(d: u32) -> bool {
17724    (d & 0xbf80fc00) == 0x2f008c00 && (d & 0x780000) != 0x000000
17725}
17726
17727pub const fn is_UQSHRN_asimdshf_N(d: u32) -> bool {
17728    (d & 0xbf80fc00) == 0x2f009400 && (d & 0x780000) != 0x000000
17729}
17730
17731pub const fn is_UQRSHRN_asimdshf_N(d: u32) -> bool {
17732    (d & 0xbf80fc00) == 0x2f009c00 && (d & 0x780000) != 0x000000
17733}
17734
17735pub const fn is_USHLL_asimdshf_L(d: u32) -> bool {
17736    (d & 0xbf80fc00) == 0x2f00a400 && (d & 0x780000) != 0x000000
17737}
17738
17739pub const fn is_UCVTF_asimdshf_C(d: u32) -> bool {
17740    (d & 0xbf80fc00) == 0x2f00e400 && (d & 0x780000) != 0x000000
17741}
17742
17743pub const fn is_FCVTZU_asimdshf_C(d: u32) -> bool {
17744    (d & 0xbf80fc00) == 0x2f00fc00 && (d & 0x780000) != 0x000000
17745}
17746
17747pub const fn is_TBL_asimdtbl_L1_1(d: u32) -> bool {
17748    (d & 0xbfe0fc00) == 0x0e000000
17749}
17750
17751pub const fn is_TBX_asimdtbl_L1_1(d: u32) -> bool {
17752    (d & 0xbfe0fc00) == 0x0e001000
17753}
17754
17755pub const fn is_TBL_asimdtbl_L2_2(d: u32) -> bool {
17756    (d & 0xbfe0fc00) == 0x0e002000
17757}
17758
17759pub const fn is_TBX_asimdtbl_L2_2(d: u32) -> bool {
17760    (d & 0xbfe0fc00) == 0x0e003000
17761}
17762
17763pub const fn is_TBL_asimdtbl_L3_3(d: u32) -> bool {
17764    (d & 0xbfe0fc00) == 0x0e004000
17765}
17766
17767pub const fn is_TBX_asimdtbl_L3_3(d: u32) -> bool {
17768    (d & 0xbfe0fc00) == 0x0e005000
17769}
17770
17771pub const fn is_TBL_asimdtbl_L4_4(d: u32) -> bool {
17772    (d & 0xbfe0fc00) == 0x0e006000
17773}
17774
17775pub const fn is_TBX_asimdtbl_L4_4(d: u32) -> bool {
17776    (d & 0xbfe0fc00) == 0x0e007000
17777}
17778
17779pub const fn is_SADDL_asimddiff_L(d: u32) -> bool {
17780    (d & 0xbf20fc00) == 0x0e200000
17781}
17782
17783pub const fn is_SADDW_asimddiff_W(d: u32) -> bool {
17784    (d & 0xbf20fc00) == 0x0e201000
17785}
17786
17787pub const fn is_SSUBL_asimddiff_L(d: u32) -> bool {
17788    (d & 0xbf20fc00) == 0x0e202000
17789}
17790
17791pub const fn is_SSUBW_asimddiff_W(d: u32) -> bool {
17792    (d & 0xbf20fc00) == 0x0e203000
17793}
17794
17795pub const fn is_ADDHN_asimddiff_N(d: u32) -> bool {
17796    (d & 0xbf20fc00) == 0x0e204000
17797}
17798
17799pub const fn is_SABAL_asimddiff_L(d: u32) -> bool {
17800    (d & 0xbf20fc00) == 0x0e205000
17801}
17802
17803pub const fn is_SUBHN_asimddiff_N(d: u32) -> bool {
17804    (d & 0xbf20fc00) == 0x0e206000
17805}
17806
17807pub const fn is_SABDL_asimddiff_L(d: u32) -> bool {
17808    (d & 0xbf20fc00) == 0x0e207000
17809}
17810
17811pub const fn is_SMLAL_asimddiff_L(d: u32) -> bool {
17812    (d & 0xbf20fc00) == 0x0e208000
17813}
17814
17815pub const fn is_SQDMLAL_asimddiff_L(d: u32) -> bool {
17816    (d & 0xbf20fc00) == 0x0e209000
17817}
17818
17819pub const fn is_SMLSL_asimddiff_L(d: u32) -> bool {
17820    (d & 0xbf20fc00) == 0x0e20a000
17821}
17822
17823pub const fn is_SQDMLSL_asimddiff_L(d: u32) -> bool {
17824    (d & 0xbf20fc00) == 0x0e20b000
17825}
17826
17827pub const fn is_SMULL_asimddiff_L(d: u32) -> bool {
17828    (d & 0xbf20fc00) == 0x0e20c000
17829}
17830
17831pub const fn is_SQDMULL_asimddiff_L(d: u32) -> bool {
17832    (d & 0xbf20fc00) == 0x0e20d000
17833}
17834
17835pub const fn is_PMULL_asimddiff_L(d: u32) -> bool {
17836    (d & 0xbf20fc00) == 0x0e20e000
17837}
17838
17839pub const fn is_UADDL_asimddiff_L(d: u32) -> bool {
17840    (d & 0xbf20fc00) == 0x2e200000
17841}
17842
17843pub const fn is_UADDW_asimddiff_W(d: u32) -> bool {
17844    (d & 0xbf20fc00) == 0x2e201000
17845}
17846
17847pub const fn is_USUBL_asimddiff_L(d: u32) -> bool {
17848    (d & 0xbf20fc00) == 0x2e202000
17849}
17850
17851pub const fn is_USUBW_asimddiff_W(d: u32) -> bool {
17852    (d & 0xbf20fc00) == 0x2e203000
17853}
17854
17855pub const fn is_RADDHN_asimddiff_N(d: u32) -> bool {
17856    (d & 0xbf20fc00) == 0x2e204000
17857}
17858
17859pub const fn is_UABAL_asimddiff_L(d: u32) -> bool {
17860    (d & 0xbf20fc00) == 0x2e205000
17861}
17862
17863pub const fn is_RSUBHN_asimddiff_N(d: u32) -> bool {
17864    (d & 0xbf20fc00) == 0x2e206000
17865}
17866
17867pub const fn is_UABDL_asimddiff_L(d: u32) -> bool {
17868    (d & 0xbf20fc00) == 0x2e207000
17869}
17870
17871pub const fn is_UMLAL_asimddiff_L(d: u32) -> bool {
17872    (d & 0xbf20fc00) == 0x2e208000
17873}
17874
17875pub const fn is_UMLSL_asimddiff_L(d: u32) -> bool {
17876    (d & 0xbf20fc00) == 0x2e20a000
17877}
17878
17879pub const fn is_UMULL_asimddiff_L(d: u32) -> bool {
17880    (d & 0xbf20fc00) == 0x2e20c000
17881}
17882
17883pub const fn is_SHADD_asimdsame_only(d: u32) -> bool {
17884    (d & 0xbf20fc00) == 0x0e200400
17885}
17886
17887pub const fn is_SQADD_asimdsame_only(d: u32) -> bool {
17888    (d & 0xbf20fc00) == 0x0e200c00
17889}
17890
17891pub const fn is_SRHADD_asimdsame_only(d: u32) -> bool {
17892    (d & 0xbf20fc00) == 0x0e201400
17893}
17894
17895pub const fn is_SHSUB_asimdsame_only(d: u32) -> bool {
17896    (d & 0xbf20fc00) == 0x0e202400
17897}
17898
17899pub const fn is_SQSUB_asimdsame_only(d: u32) -> bool {
17900    (d & 0xbf20fc00) == 0x0e202c00
17901}
17902
17903pub const fn is_CMGT_asimdsame_only(d: u32) -> bool {
17904    (d & 0xbf20fc00) == 0x0e203400
17905}
17906
17907pub const fn is_CMGE_asimdsame_only(d: u32) -> bool {
17908    (d & 0xbf20fc00) == 0x0e203c00
17909}
17910
17911pub const fn is_SSHL_asimdsame_only(d: u32) -> bool {
17912    (d & 0xbf20fc00) == 0x0e204400
17913}
17914
17915pub const fn is_SQSHL_asimdsame_only(d: u32) -> bool {
17916    (d & 0xbf20fc00) == 0x0e204c00
17917}
17918
17919pub const fn is_SRSHL_asimdsame_only(d: u32) -> bool {
17920    (d & 0xbf20fc00) == 0x0e205400
17921}
17922
17923pub const fn is_SQRSHL_asimdsame_only(d: u32) -> bool {
17924    (d & 0xbf20fc00) == 0x0e205c00
17925}
17926
17927pub const fn is_SMAX_asimdsame_only(d: u32) -> bool {
17928    (d & 0xbf20fc00) == 0x0e206400
17929}
17930
17931pub const fn is_SMIN_asimdsame_only(d: u32) -> bool {
17932    (d & 0xbf20fc00) == 0x0e206c00
17933}
17934
17935pub const fn is_SABD_asimdsame_only(d: u32) -> bool {
17936    (d & 0xbf20fc00) == 0x0e207400
17937}
17938
17939pub const fn is_SABA_asimdsame_only(d: u32) -> bool {
17940    (d & 0xbf20fc00) == 0x0e207c00
17941}
17942
17943pub const fn is_ADD_asimdsame_only(d: u32) -> bool {
17944    (d & 0xbf20fc00) == 0x0e208400
17945}
17946
17947pub const fn is_CMTST_asimdsame_only(d: u32) -> bool {
17948    (d & 0xbf20fc00) == 0x0e208c00
17949}
17950
17951pub const fn is_MLA_asimdsame_only(d: u32) -> bool {
17952    (d & 0xbf20fc00) == 0x0e209400
17953}
17954
17955pub const fn is_MUL_asimdsame_only(d: u32) -> bool {
17956    (d & 0xbf20fc00) == 0x0e209c00
17957}
17958
17959pub const fn is_SMAXP_asimdsame_only(d: u32) -> bool {
17960    (d & 0xbf20fc00) == 0x0e20a400
17961}
17962
17963pub const fn is_SMINP_asimdsame_only(d: u32) -> bool {
17964    (d & 0xbf20fc00) == 0x0e20ac00
17965}
17966
17967pub const fn is_SQDMULH_asimdsame_only(d: u32) -> bool {
17968    (d & 0xbf20fc00) == 0x0e20b400
17969}
17970
17971pub const fn is_ADDP_asimdsame_only(d: u32) -> bool {
17972    (d & 0xbf20fc00) == 0x0e20bc00
17973}
17974
17975pub const fn is_FMAXNM_asimdsame_only(d: u32) -> bool {
17976    (d & 0xbfa0fc00) == 0x0e20c400
17977}
17978
17979pub const fn is_FMLA_asimdsame_only(d: u32) -> bool {
17980    (d & 0xbfa0fc00) == 0x0e20cc00
17981}
17982
17983pub const fn is_FADD_asimdsame_only(d: u32) -> bool {
17984    (d & 0xbfa0fc00) == 0x0e20d400
17985}
17986
17987pub const fn is_FMULX_asimdsame_only(d: u32) -> bool {
17988    (d & 0xbfa0fc00) == 0x0e20dc00
17989}
17990
17991pub const fn is_FCMEQ_asimdsame_only(d: u32) -> bool {
17992    (d & 0xbfa0fc00) == 0x0e20e400
17993}
17994
17995pub const fn is_FMAX_asimdsame_only(d: u32) -> bool {
17996    (d & 0xbfa0fc00) == 0x0e20f400
17997}
17998
17999pub const fn is_FRECPS_asimdsame_only(d: u32) -> bool {
18000    (d & 0xbfa0fc00) == 0x0e20fc00
18001}
18002
18003pub const fn is_AND_asimdsame_only(d: u32) -> bool {
18004    (d & 0xbfe0fc00) == 0x0e201c00
18005}
18006
18007pub const fn is_BIC_asimdsame_only(d: u32) -> bool {
18008    (d & 0xbfe0fc00) == 0x0e601c00
18009}
18010
18011pub const fn is_FMINNM_asimdsame_only(d: u32) -> bool {
18012    (d & 0xbfa0fc00) == 0x0ea0c400
18013}
18014
18015pub const fn is_FMLS_asimdsame_only(d: u32) -> bool {
18016    (d & 0xbfa0fc00) == 0x0ea0cc00
18017}
18018
18019pub const fn is_FSUB_asimdsame_only(d: u32) -> bool {
18020    (d & 0xbfa0fc00) == 0x0ea0d400
18021}
18022
18023pub const fn is_FMIN_asimdsame_only(d: u32) -> bool {
18024    (d & 0xbfa0fc00) == 0x0ea0f400
18025}
18026
18027pub const fn is_FRSQRTS_asimdsame_only(d: u32) -> bool {
18028    (d & 0xbfa0fc00) == 0x0ea0fc00
18029}
18030
18031pub const fn is_ORR_asimdsame_only(d: u32) -> bool {
18032    (d & 0xbfe0fc00) == 0x0ea01c00
18033}
18034
18035pub const fn is_ORN_asimdsame_only(d: u32) -> bool {
18036    (d & 0xbfe0fc00) == 0x0ee01c00
18037}
18038
18039pub const fn is_UHADD_asimdsame_only(d: u32) -> bool {
18040    (d & 0xbf20fc00) == 0x2e200400
18041}
18042
18043pub const fn is_UQADD_asimdsame_only(d: u32) -> bool {
18044    (d & 0xbf20fc00) == 0x2e200c00
18045}
18046
18047pub const fn is_URHADD_asimdsame_only(d: u32) -> bool {
18048    (d & 0xbf20fc00) == 0x2e201400
18049}
18050
18051pub const fn is_UHSUB_asimdsame_only(d: u32) -> bool {
18052    (d & 0xbf20fc00) == 0x2e202400
18053}
18054
18055pub const fn is_UQSUB_asimdsame_only(d: u32) -> bool {
18056    (d & 0xbf20fc00) == 0x2e202c00
18057}
18058
18059pub const fn is_CMHI_asimdsame_only(d: u32) -> bool {
18060    (d & 0xbf20fc00) == 0x2e203400
18061}
18062
18063pub const fn is_CMHS_asimdsame_only(d: u32) -> bool {
18064    (d & 0xbf20fc00) == 0x2e203c00
18065}
18066
18067pub const fn is_USHL_asimdsame_only(d: u32) -> bool {
18068    (d & 0xbf20fc00) == 0x2e204400
18069}
18070
18071pub const fn is_UQSHL_asimdsame_only(d: u32) -> bool {
18072    (d & 0xbf20fc00) == 0x2e204c00
18073}
18074
18075pub const fn is_URSHL_asimdsame_only(d: u32) -> bool {
18076    (d & 0xbf20fc00) == 0x2e205400
18077}
18078
18079pub const fn is_UQRSHL_asimdsame_only(d: u32) -> bool {
18080    (d & 0xbf20fc00) == 0x2e205c00
18081}
18082
18083pub const fn is_UMAX_asimdsame_only(d: u32) -> bool {
18084    (d & 0xbf20fc00) == 0x2e206400
18085}
18086
18087pub const fn is_UMIN_asimdsame_only(d: u32) -> bool {
18088    (d & 0xbf20fc00) == 0x2e206c00
18089}
18090
18091pub const fn is_UABD_asimdsame_only(d: u32) -> bool {
18092    (d & 0xbf20fc00) == 0x2e207400
18093}
18094
18095pub const fn is_UABA_asimdsame_only(d: u32) -> bool {
18096    (d & 0xbf20fc00) == 0x2e207c00
18097}
18098
18099pub const fn is_SUB_asimdsame_only(d: u32) -> bool {
18100    (d & 0xbf20fc00) == 0x2e208400
18101}
18102
18103pub const fn is_CMEQ_asimdsame_only(d: u32) -> bool {
18104    (d & 0xbf20fc00) == 0x2e208c00
18105}
18106
18107pub const fn is_MLS_asimdsame_only(d: u32) -> bool {
18108    (d & 0xbf20fc00) == 0x2e209400
18109}
18110
18111pub const fn is_PMUL_asimdsame_only(d: u32) -> bool {
18112    (d & 0xbf20fc00) == 0x2e209c00
18113}
18114
18115pub const fn is_UMAXP_asimdsame_only(d: u32) -> bool {
18116    (d & 0xbf20fc00) == 0x2e20a400
18117}
18118
18119pub const fn is_UMINP_asimdsame_only(d: u32) -> bool {
18120    (d & 0xbf20fc00) == 0x2e20ac00
18121}
18122
18123pub const fn is_SQRDMULH_asimdsame_only(d: u32) -> bool {
18124    (d & 0xbf20fc00) == 0x2e20b400
18125}
18126
18127pub const fn is_FMAXNMP_asimdsame_only(d: u32) -> bool {
18128    (d & 0xbfa0fc00) == 0x2e20c400
18129}
18130
18131pub const fn is_FADDP_asimdsame_only(d: u32) -> bool {
18132    (d & 0xbfa0fc00) == 0x2e20d400
18133}
18134
18135pub const fn is_FMUL_asimdsame_only(d: u32) -> bool {
18136    (d & 0xbfa0fc00) == 0x2e20dc00
18137}
18138
18139pub const fn is_FCMGE_asimdsame_only(d: u32) -> bool {
18140    (d & 0xbfa0fc00) == 0x2e20e400
18141}
18142
18143pub const fn is_FACGE_asimdsame_only(d: u32) -> bool {
18144    (d & 0xbfa0fc00) == 0x2e20ec00
18145}
18146
18147pub const fn is_FMAXP_asimdsame_only(d: u32) -> bool {
18148    (d & 0xbfa0fc00) == 0x2e20f400
18149}
18150
18151pub const fn is_FDIV_asimdsame_only(d: u32) -> bool {
18152    (d & 0xbfa0fc00) == 0x2e20fc00
18153}
18154
18155pub const fn is_EOR_asimdsame_only(d: u32) -> bool {
18156    (d & 0xbfe0fc00) == 0x2e201c00
18157}
18158
18159pub const fn is_BSL_asimdsame_only(d: u32) -> bool {
18160    (d & 0xbfe0fc00) == 0x2e601c00
18161}
18162
18163pub const fn is_FMINNMP_asimdsame_only(d: u32) -> bool {
18164    (d & 0xbfa0fc00) == 0x2ea0c400
18165}
18166
18167pub const fn is_FABD_asimdsame_only(d: u32) -> bool {
18168    (d & 0xbfa0fc00) == 0x2ea0d400
18169}
18170
18171pub const fn is_FCMGT_asimdsame_only(d: u32) -> bool {
18172    (d & 0xbfa0fc00) == 0x2ea0e400
18173}
18174
18175pub const fn is_FACGT_asimdsame_only(d: u32) -> bool {
18176    (d & 0xbfa0fc00) == 0x2ea0ec00
18177}
18178
18179pub const fn is_FMINP_asimdsame_only(d: u32) -> bool {
18180    (d & 0xbfa0fc00) == 0x2ea0f400
18181}
18182
18183pub const fn is_BIT_asimdsame_only(d: u32) -> bool {
18184    (d & 0xbfe0fc00) == 0x2ea01c00
18185}
18186
18187pub const fn is_BIF_asimdsame_only(d: u32) -> bool {
18188    (d & 0xbfe0fc00) == 0x2ee01c00
18189}
18190
18191pub const fn is_FMAXNM_asimdsamefp16_only(d: u32) -> bool {
18192    (d & 0xbfe0fc00) == 0x0e400400
18193}
18194
18195pub const fn is_FMLA_asimdsamefp16_only(d: u32) -> bool {
18196    (d & 0xbfe0fc00) == 0x0e400c00
18197}
18198
18199pub const fn is_FADD_asimdsamefp16_only(d: u32) -> bool {
18200    (d & 0xbfe0fc00) == 0x0e401400
18201}
18202
18203pub const fn is_FMULX_asimdsamefp16_only(d: u32) -> bool {
18204    (d & 0xbfe0fc00) == 0x0e401c00
18205}
18206
18207pub const fn is_FCMEQ_asimdsamefp16_only(d: u32) -> bool {
18208    (d & 0xbfe0fc00) == 0x0e402400
18209}
18210
18211pub const fn is_FMAX_asimdsamefp16_only(d: u32) -> bool {
18212    (d & 0xbfe0fc00) == 0x0e403400
18213}
18214
18215pub const fn is_FRECPS_asimdsamefp16_only(d: u32) -> bool {
18216    (d & 0xbfe0fc00) == 0x0e403c00
18217}
18218
18219pub const fn is_FMINNM_asimdsamefp16_only(d: u32) -> bool {
18220    (d & 0xbfe0fc00) == 0x0ec00400
18221}
18222
18223pub const fn is_FMLS_asimdsamefp16_only(d: u32) -> bool {
18224    (d & 0xbfe0fc00) == 0x0ec00c00
18225}
18226
18227pub const fn is_FSUB_asimdsamefp16_only(d: u32) -> bool {
18228    (d & 0xbfe0fc00) == 0x0ec01400
18229}
18230
18231pub const fn is_FMIN_asimdsamefp16_only(d: u32) -> bool {
18232    (d & 0xbfe0fc00) == 0x0ec03400
18233}
18234
18235pub const fn is_FRSQRTS_asimdsamefp16_only(d: u32) -> bool {
18236    (d & 0xbfe0fc00) == 0x0ec03c00
18237}
18238
18239pub const fn is_FMAXNMP_asimdsamefp16_only(d: u32) -> bool {
18240    (d & 0xbfe0fc00) == 0x2e400400
18241}
18242
18243pub const fn is_FADDP_asimdsamefp16_only(d: u32) -> bool {
18244    (d & 0xbfe0fc00) == 0x2e401400
18245}
18246
18247pub const fn is_FMUL_asimdsamefp16_only(d: u32) -> bool {
18248    (d & 0xbfe0fc00) == 0x2e401c00
18249}
18250
18251pub const fn is_FCMGE_asimdsamefp16_only(d: u32) -> bool {
18252    (d & 0xbfe0fc00) == 0x2e402400
18253}
18254
18255pub const fn is_FACGE_asimdsamefp16_only(d: u32) -> bool {
18256    (d & 0xbfe0fc00) == 0x2e402c00
18257}
18258
18259pub const fn is_FMAXP_asimdsamefp16_only(d: u32) -> bool {
18260    (d & 0xbfe0fc00) == 0x2e403400
18261}
18262
18263pub const fn is_FDIV_asimdsamefp16_only(d: u32) -> bool {
18264    (d & 0xbfe0fc00) == 0x2e403c00
18265}
18266
18267pub const fn is_FMINNMP_asimdsamefp16_only(d: u32) -> bool {
18268    (d & 0xbfe0fc00) == 0x2ec00400
18269}
18270
18271pub const fn is_FABD_asimdsamefp16_only(d: u32) -> bool {
18272    (d & 0xbfe0fc00) == 0x2ec01400
18273}
18274
18275pub const fn is_FCMGT_asimdsamefp16_only(d: u32) -> bool {
18276    (d & 0xbfe0fc00) == 0x2ec02400
18277}
18278
18279pub const fn is_FACGT_asimdsamefp16_only(d: u32) -> bool {
18280    (d & 0xbfe0fc00) == 0x2ec02c00
18281}
18282
18283pub const fn is_FMINP_asimdsamefp16_only(d: u32) -> bool {
18284    (d & 0xbfe0fc00) == 0x2ec03400
18285}
18286
18287pub const fn is_SDOT_asimdsame2_D(d: u32) -> bool {
18288    (d & 0xbf20fc00) == 0x0e009400
18289}
18290
18291pub const fn is_SQRDMLAH_asimdsame2_only(d: u32) -> bool {
18292    (d & 0xbf20fc00) == 0x2e008400
18293}
18294
18295pub const fn is_SQRDMLSH_asimdsame2_only(d: u32) -> bool {
18296    (d & 0xbf20fc00) == 0x2e008c00
18297}
18298
18299pub const fn is_UDOT_asimdsame2_D(d: u32) -> bool {
18300    (d & 0xbf20fc00) == 0x2e009400
18301}
18302
18303pub const fn is_FCMLA_asimdsame2_C(d: u32) -> bool {
18304    (d & 0xbf20e400) == 0x2e00c400
18305}
18306
18307pub const fn is_FCADD_asimdsame2_C(d: u32) -> bool {
18308    (d & 0xbf20ec00) == 0x2e00e400
18309}
18310
18311pub const fn is_REV64_asimdmisc_R(d: u32) -> bool {
18312    (d & 0xbf3ffc00) == 0x0e200800
18313}
18314
18315pub const fn is_REV16_asimdmisc_R(d: u32) -> bool {
18316    (d & 0xbf3ffc00) == 0x0e201800
18317}
18318
18319pub const fn is_SADDLP_asimdmisc_P(d: u32) -> bool {
18320    (d & 0xbf3ffc00) == 0x0e202800
18321}
18322
18323pub const fn is_SUQADD_asimdmisc_R(d: u32) -> bool {
18324    (d & 0xbf3ffc00) == 0x0e203800
18325}
18326
18327pub const fn is_CLS_asimdmisc_R(d: u32) -> bool {
18328    (d & 0xbf3ffc00) == 0x0e204800
18329}
18330
18331pub const fn is_CNT_asimdmisc_R(d: u32) -> bool {
18332    (d & 0xbf3ffc00) == 0x0e205800
18333}
18334
18335pub const fn is_SADALP_asimdmisc_P(d: u32) -> bool {
18336    (d & 0xbf3ffc00) == 0x0e206800
18337}
18338
18339pub const fn is_SQABS_asimdmisc_R(d: u32) -> bool {
18340    (d & 0xbf3ffc00) == 0x0e207800
18341}
18342
18343pub const fn is_CMGT_asimdmisc_Z(d: u32) -> bool {
18344    (d & 0xbf3ffc00) == 0x0e208800
18345}
18346
18347pub const fn is_CMEQ_asimdmisc_Z(d: u32) -> bool {
18348    (d & 0xbf3ffc00) == 0x0e209800
18349}
18350
18351pub const fn is_CMLT_asimdmisc_Z(d: u32) -> bool {
18352    (d & 0xbf3ffc00) == 0x0e20a800
18353}
18354
18355pub const fn is_ABS_asimdmisc_R(d: u32) -> bool {
18356    (d & 0xbf3ffc00) == 0x0e20b800
18357}
18358
18359pub const fn is_XTN_asimdmisc_N(d: u32) -> bool {
18360    (d & 0xbf3ffc00) == 0x0e212800
18361}
18362
18363pub const fn is_SQXTN_asimdmisc_N(d: u32) -> bool {
18364    (d & 0xbf3ffc00) == 0x0e214800
18365}
18366
18367pub const fn is_FCVTN_asimdmisc_N(d: u32) -> bool {
18368    (d & 0xbfbffc00) == 0x0e216800
18369}
18370
18371pub const fn is_FCVTL_asimdmisc_L(d: u32) -> bool {
18372    (d & 0xbfbffc00) == 0x0e217800
18373}
18374
18375pub const fn is_FRINTN_asimdmisc_R(d: u32) -> bool {
18376    (d & 0xbfbffc00) == 0x0e218800
18377}
18378
18379pub const fn is_FRINTM_asimdmisc_R(d: u32) -> bool {
18380    (d & 0xbfbffc00) == 0x0e219800
18381}
18382
18383pub const fn is_FCVTNS_asimdmisc_R(d: u32) -> bool {
18384    (d & 0xbfbffc00) == 0x0e21a800
18385}
18386
18387pub const fn is_FCVTMS_asimdmisc_R(d: u32) -> bool {
18388    (d & 0xbfbffc00) == 0x0e21b800
18389}
18390
18391pub const fn is_FCVTAS_asimdmisc_R(d: u32) -> bool {
18392    (d & 0xbfbffc00) == 0x0e21c800
18393}
18394
18395pub const fn is_SCVTF_asimdmisc_R(d: u32) -> bool {
18396    (d & 0xbfbffc00) == 0x0e21d800
18397}
18398
18399pub const fn is_FCMGT_asimdmisc_FZ(d: u32) -> bool {
18400    (d & 0xbfbffc00) == 0x0ea0c800
18401}
18402
18403pub const fn is_FCMEQ_asimdmisc_FZ(d: u32) -> bool {
18404    (d & 0xbfbffc00) == 0x0ea0d800
18405}
18406
18407pub const fn is_FCMLT_asimdmisc_FZ(d: u32) -> bool {
18408    (d & 0xbfbffc00) == 0x0ea0e800
18409}
18410
18411pub const fn is_FABS_asimdmisc_R(d: u32) -> bool {
18412    (d & 0xbfbffc00) == 0x0ea0f800
18413}
18414
18415pub const fn is_FRINTP_asimdmisc_R(d: u32) -> bool {
18416    (d & 0xbfbffc00) == 0x0ea18800
18417}
18418
18419pub const fn is_FRINTZ_asimdmisc_R(d: u32) -> bool {
18420    (d & 0xbfbffc00) == 0x0ea19800
18421}
18422
18423pub const fn is_FCVTPS_asimdmisc_R(d: u32) -> bool {
18424    (d & 0xbfbffc00) == 0x0ea1a800
18425}
18426
18427pub const fn is_FCVTZS_asimdmisc_R(d: u32) -> bool {
18428    (d & 0xbfbffc00) == 0x0ea1b800
18429}
18430
18431pub const fn is_URECPE_asimdmisc_R(d: u32) -> bool {
18432    (d & 0xbfbffc00) == 0x0ea1c800
18433}
18434
18435pub const fn is_FRECPE_asimdmisc_R(d: u32) -> bool {
18436    (d & 0xbfbffc00) == 0x0ea1d800
18437}
18438
18439pub const fn is_REV32_asimdmisc_R(d: u32) -> bool {
18440    (d & 0xbf3ffc00) == 0x2e200800
18441}
18442
18443pub const fn is_UADDLP_asimdmisc_P(d: u32) -> bool {
18444    (d & 0xbf3ffc00) == 0x2e202800
18445}
18446
18447pub const fn is_USQADD_asimdmisc_R(d: u32) -> bool {
18448    (d & 0xbf3ffc00) == 0x2e203800
18449}
18450
18451pub const fn is_CLZ_asimdmisc_R(d: u32) -> bool {
18452    (d & 0xbf3ffc00) == 0x2e204800
18453}
18454
18455pub const fn is_UADALP_asimdmisc_P(d: u32) -> bool {
18456    (d & 0xbf3ffc00) == 0x2e206800
18457}
18458
18459pub const fn is_SQNEG_asimdmisc_R(d: u32) -> bool {
18460    (d & 0xbf3ffc00) == 0x2e207800
18461}
18462
18463pub const fn is_CMGE_asimdmisc_Z(d: u32) -> bool {
18464    (d & 0xbf3ffc00) == 0x2e208800
18465}
18466
18467pub const fn is_CMLE_asimdmisc_Z(d: u32) -> bool {
18468    (d & 0xbf3ffc00) == 0x2e209800
18469}
18470
18471pub const fn is_NEG_asimdmisc_R(d: u32) -> bool {
18472    (d & 0xbf3ffc00) == 0x2e20b800
18473}
18474
18475pub const fn is_SQXTUN_asimdmisc_N(d: u32) -> bool {
18476    (d & 0xbf3ffc00) == 0x2e212800
18477}
18478
18479pub const fn is_SHLL_asimdmisc_S(d: u32) -> bool {
18480    (d & 0xbf3ffc00) == 0x2e213800
18481}
18482
18483pub const fn is_UQXTN_asimdmisc_N(d: u32) -> bool {
18484    (d & 0xbf3ffc00) == 0x2e214800
18485}
18486
18487pub const fn is_FCVTXN_asimdmisc_N(d: u32) -> bool {
18488    (d & 0xbfbffc00) == 0x2e216800
18489}
18490
18491pub const fn is_FRINTA_asimdmisc_R(d: u32) -> bool {
18492    (d & 0xbfbffc00) == 0x2e218800
18493}
18494
18495pub const fn is_FRINTX_asimdmisc_R(d: u32) -> bool {
18496    (d & 0xbfbffc00) == 0x2e219800
18497}
18498
18499pub const fn is_FCVTNU_asimdmisc_R(d: u32) -> bool {
18500    (d & 0xbfbffc00) == 0x2e21a800
18501}
18502
18503pub const fn is_FCVTMU_asimdmisc_R(d: u32) -> bool {
18504    (d & 0xbfbffc00) == 0x2e21b800
18505}
18506
18507pub const fn is_FCVTAU_asimdmisc_R(d: u32) -> bool {
18508    (d & 0xbfbffc00) == 0x2e21c800
18509}
18510
18511pub const fn is_UCVTF_asimdmisc_R(d: u32) -> bool {
18512    (d & 0xbfbffc00) == 0x2e21d800
18513}
18514
18515pub const fn is_NOT_asimdmisc_R(d: u32) -> bool {
18516    (d & 0xbffffc00) == 0x2e205800
18517}
18518
18519pub const fn is_RBIT_asimdmisc_R(d: u32) -> bool {
18520    (d & 0xbffffc00) == 0x2e605800
18521}
18522
18523pub const fn is_FCMGE_asimdmisc_FZ(d: u32) -> bool {
18524    (d & 0xbfbffc00) == 0x2ea0c800
18525}
18526
18527pub const fn is_FCMLE_asimdmisc_FZ(d: u32) -> bool {
18528    (d & 0xbfbffc00) == 0x2ea0d800
18529}
18530
18531pub const fn is_FNEG_asimdmisc_R(d: u32) -> bool {
18532    (d & 0xbfbffc00) == 0x2ea0f800
18533}
18534
18535pub const fn is_FRINTI_asimdmisc_R(d: u32) -> bool {
18536    (d & 0xbfbffc00) == 0x2ea19800
18537}
18538
18539pub const fn is_FCVTPU_asimdmisc_R(d: u32) -> bool {
18540    (d & 0xbfbffc00) == 0x2ea1a800
18541}
18542
18543pub const fn is_FCVTZU_asimdmisc_R(d: u32) -> bool {
18544    (d & 0xbfbffc00) == 0x2ea1b800
18545}
18546
18547pub const fn is_URSQRTE_asimdmisc_R(d: u32) -> bool {
18548    (d & 0xbfbffc00) == 0x2ea1c800
18549}
18550
18551pub const fn is_FRSQRTE_asimdmisc_R(d: u32) -> bool {
18552    (d & 0xbfbffc00) == 0x2ea1d800
18553}
18554
18555pub const fn is_FSQRT_asimdmisc_R(d: u32) -> bool {
18556    (d & 0xbfbffc00) == 0x2ea1f800
18557}
18558
18559pub const fn is_FRINTN_asimdmiscfp16_R(d: u32) -> bool {
18560    (d & 0xbffffc00) == 0x0e798800
18561}
18562
18563pub const fn is_FRINTM_asimdmiscfp16_R(d: u32) -> bool {
18564    (d & 0xbffffc00) == 0x0e799800
18565}
18566
18567pub const fn is_FCVTNS_asimdmiscfp16_R(d: u32) -> bool {
18568    (d & 0xbffffc00) == 0x0e79a800
18569}
18570
18571pub const fn is_FCVTMS_asimdmiscfp16_R(d: u32) -> bool {
18572    (d & 0xbffffc00) == 0x0e79b800
18573}
18574
18575pub const fn is_FCVTAS_asimdmiscfp16_R(d: u32) -> bool {
18576    (d & 0xbffffc00) == 0x0e79c800
18577}
18578
18579pub const fn is_SCVTF_asimdmiscfp16_R(d: u32) -> bool {
18580    (d & 0xbffffc00) == 0x0e79d800
18581}
18582
18583pub const fn is_FCMGT_asimdmiscfp16_FZ(d: u32) -> bool {
18584    (d & 0xbffffc00) == 0x0ef8c800
18585}
18586
18587pub const fn is_FCMEQ_asimdmiscfp16_FZ(d: u32) -> bool {
18588    (d & 0xbffffc00) == 0x0ef8d800
18589}
18590
18591pub const fn is_FCMLT_asimdmiscfp16_FZ(d: u32) -> bool {
18592    (d & 0xbffffc00) == 0x0ef8e800
18593}
18594
18595pub const fn is_FABS_asimdmiscfp16_R(d: u32) -> bool {
18596    (d & 0xbffffc00) == 0x0ef8f800
18597}
18598
18599pub const fn is_FRINTP_asimdmiscfp16_R(d: u32) -> bool {
18600    (d & 0xbffffc00) == 0x0ef98800
18601}
18602
18603pub const fn is_FRINTZ_asimdmiscfp16_R(d: u32) -> bool {
18604    (d & 0xbffffc00) == 0x0ef99800
18605}
18606
18607pub const fn is_FCVTPS_asimdmiscfp16_R(d: u32) -> bool {
18608    (d & 0xbffffc00) == 0x0ef9a800
18609}
18610
18611pub const fn is_FCVTZS_asimdmiscfp16_R(d: u32) -> bool {
18612    (d & 0xbffffc00) == 0x0ef9b800
18613}
18614
18615pub const fn is_FRECPE_asimdmiscfp16_R(d: u32) -> bool {
18616    (d & 0xbffffc00) == 0x0ef9d800
18617}
18618
18619pub const fn is_FRINTA_asimdmiscfp16_R(d: u32) -> bool {
18620    (d & 0xbffffc00) == 0x2e798800
18621}
18622
18623pub const fn is_FRINTX_asimdmiscfp16_R(d: u32) -> bool {
18624    (d & 0xbffffc00) == 0x2e799800
18625}
18626
18627pub const fn is_FCVTNU_asimdmiscfp16_R(d: u32) -> bool {
18628    (d & 0xbffffc00) == 0x2e79a800
18629}
18630
18631pub const fn is_FCVTMU_asimdmiscfp16_R(d: u32) -> bool {
18632    (d & 0xbffffc00) == 0x2e79b800
18633}
18634
18635pub const fn is_FCVTAU_asimdmiscfp16_R(d: u32) -> bool {
18636    (d & 0xbffffc00) == 0x2e79c800
18637}
18638
18639pub const fn is_UCVTF_asimdmiscfp16_R(d: u32) -> bool {
18640    (d & 0xbffffc00) == 0x2e79d800
18641}
18642
18643pub const fn is_FCMGE_asimdmiscfp16_FZ(d: u32) -> bool {
18644    (d & 0xbffffc00) == 0x2ef8c800
18645}
18646
18647pub const fn is_FCMLE_asimdmiscfp16_FZ(d: u32) -> bool {
18648    (d & 0xbffffc00) == 0x2ef8d800
18649}
18650
18651pub const fn is_FNEG_asimdmiscfp16_R(d: u32) -> bool {
18652    (d & 0xbffffc00) == 0x2ef8f800
18653}
18654
18655pub const fn is_FRINTI_asimdmiscfp16_R(d: u32) -> bool {
18656    (d & 0xbffffc00) == 0x2ef99800
18657}
18658
18659pub const fn is_FCVTPU_asimdmiscfp16_R(d: u32) -> bool {
18660    (d & 0xbffffc00) == 0x2ef9a800
18661}
18662
18663pub const fn is_FCVTZU_asimdmiscfp16_R(d: u32) -> bool {
18664    (d & 0xbffffc00) == 0x2ef9b800
18665}
18666
18667pub const fn is_FRSQRTE_asimdmiscfp16_R(d: u32) -> bool {
18668    (d & 0xbffffc00) == 0x2ef9d800
18669}
18670
18671pub const fn is_FSQRT_asimdmiscfp16_R(d: u32) -> bool {
18672    (d & 0xbffffc00) == 0x2ef9f800
18673}
18674
18675pub const fn is_SMLAL_asimdelem_L(d: u32) -> bool {
18676    (d & 0xbf00f400) == 0x0f002000
18677}
18678
18679pub const fn is_SQDMLAL_asimdelem_L(d: u32) -> bool {
18680    (d & 0xbf00f400) == 0x0f003000
18681}
18682
18683pub const fn is_SMLSL_asimdelem_L(d: u32) -> bool {
18684    (d & 0xbf00f400) == 0x0f006000
18685}
18686
18687pub const fn is_SQDMLSL_asimdelem_L(d: u32) -> bool {
18688    (d & 0xbf00f400) == 0x0f007000
18689}
18690
18691pub const fn is_MUL_asimdelem_R(d: u32) -> bool {
18692    (d & 0xbf00f400) == 0x0f008000
18693}
18694
18695pub const fn is_SMULL_asimdelem_L(d: u32) -> bool {
18696    (d & 0xbf00f400) == 0x0f00a000
18697}
18698
18699pub const fn is_SQDMULL_asimdelem_L(d: u32) -> bool {
18700    (d & 0xbf00f400) == 0x0f00b000
18701}
18702
18703pub const fn is_SQDMULH_asimdelem_R(d: u32) -> bool {
18704    (d & 0xbf00f400) == 0x0f00c000
18705}
18706
18707pub const fn is_SQRDMULH_asimdelem_R(d: u32) -> bool {
18708    (d & 0xbf00f400) == 0x0f00d000
18709}
18710
18711pub const fn is_SDOT_asimdelem_D(d: u32) -> bool {
18712    (d & 0xbf00f400) == 0x0f00e000
18713}
18714
18715pub const fn is_FMLA_asimdelem_RH_H(d: u32) -> bool {
18716    (d & 0xbfc0f400) == 0x0f001000
18717}
18718
18719pub const fn is_FMLS_asimdelem_RH_H(d: u32) -> bool {
18720    (d & 0xbfc0f400) == 0x0f005000
18721}
18722
18723pub const fn is_FMUL_asimdelem_RH_H(d: u32) -> bool {
18724    (d & 0xbfc0f400) == 0x0f009000
18725}
18726
18727pub const fn is_FMLA_asimdelem_R_SD(d: u32) -> bool {
18728    (d & 0xbf80f400) == 0x0f801000
18729}
18730
18731pub const fn is_FMLS_asimdelem_R_SD(d: u32) -> bool {
18732    (d & 0xbf80f400) == 0x0f805000
18733}
18734
18735pub const fn is_FMUL_asimdelem_R_SD(d: u32) -> bool {
18736    (d & 0xbf80f400) == 0x0f809000
18737}
18738
18739pub const fn is_MLA_asimdelem_R(d: u32) -> bool {
18740    (d & 0xbf00f400) == 0x2f000000
18741}
18742
18743pub const fn is_UMLAL_asimdelem_L(d: u32) -> bool {
18744    (d & 0xbf00f400) == 0x2f002000
18745}
18746
18747pub const fn is_MLS_asimdelem_R(d: u32) -> bool {
18748    (d & 0xbf00f400) == 0x2f004000
18749}
18750
18751pub const fn is_UMLSL_asimdelem_L(d: u32) -> bool {
18752    (d & 0xbf00f400) == 0x2f006000
18753}
18754
18755pub const fn is_UMULL_asimdelem_L(d: u32) -> bool {
18756    (d & 0xbf00f400) == 0x2f00a000
18757}
18758
18759pub const fn is_SQRDMLAH_asimdelem_R(d: u32) -> bool {
18760    (d & 0xbf00f400) == 0x2f00d000
18761}
18762
18763pub const fn is_UDOT_asimdelem_D(d: u32) -> bool {
18764    (d & 0xbf00f400) == 0x2f00e000
18765}
18766
18767pub const fn is_SQRDMLSH_asimdelem_R(d: u32) -> bool {
18768    (d & 0xbf00f400) == 0x2f00f000
18769}
18770
18771pub const fn is_FMULX_asimdelem_RH_H(d: u32) -> bool {
18772    (d & 0xbfc0f400) == 0x2f009000
18773}
18774
18775pub const fn is_FCMLA_asimdelem_C_H(d: u32) -> bool {
18776    (d & 0xbfc09400) == 0x2f401000
18777}
18778
18779pub const fn is_FMULX_asimdelem_R_SD(d: u32) -> bool {
18780    (d & 0xbf80f400) == 0x2f809000
18781}
18782
18783pub const fn is_FCMLA_asimdelem_C_S(d: u32) -> bool {
18784    (d & 0xbfc09400) == 0x2f801000
18785}
18786
18787pub const fn is_SCVTF_S32_float2fix(d: u32) -> bool {
18788    (d & 0xffff0000) == 0x1e020000
18789}
18790
18791pub const fn is_UCVTF_S32_float2fix(d: u32) -> bool {
18792    (d & 0xffff0000) == 0x1e030000
18793}
18794
18795pub const fn is_FCVTZS_32S_float2fix(d: u32) -> bool {
18796    (d & 0xffff0000) == 0x1e180000
18797}
18798
18799pub const fn is_FCVTZU_32S_float2fix(d: u32) -> bool {
18800    (d & 0xffff0000) == 0x1e190000
18801}
18802
18803pub const fn is_SCVTF_D32_float2fix(d: u32) -> bool {
18804    (d & 0xffff0000) == 0x1e420000
18805}
18806
18807pub const fn is_UCVTF_D32_float2fix(d: u32) -> bool {
18808    (d & 0xffff0000) == 0x1e430000
18809}
18810
18811pub const fn is_FCVTZS_32D_float2fix(d: u32) -> bool {
18812    (d & 0xffff0000) == 0x1e580000
18813}
18814
18815pub const fn is_FCVTZU_32D_float2fix(d: u32) -> bool {
18816    (d & 0xffff0000) == 0x1e590000
18817}
18818
18819pub const fn is_SCVTF_H32_float2fix(d: u32) -> bool {
18820    (d & 0xffff0000) == 0x1ec20000
18821}
18822
18823pub const fn is_UCVTF_H32_float2fix(d: u32) -> bool {
18824    (d & 0xffff0000) == 0x1ec30000
18825}
18826
18827pub const fn is_FCVTZS_32H_float2fix(d: u32) -> bool {
18828    (d & 0xffff0000) == 0x1ed80000
18829}
18830
18831pub const fn is_FCVTZU_32H_float2fix(d: u32) -> bool {
18832    (d & 0xffff0000) == 0x1ed90000
18833}
18834
18835pub const fn is_SCVTF_S64_float2fix(d: u32) -> bool {
18836    (d & 0xffff0000) == 0x9e020000
18837}
18838
18839pub const fn is_UCVTF_S64_float2fix(d: u32) -> bool {
18840    (d & 0xffff0000) == 0x9e030000
18841}
18842
18843pub const fn is_FCVTZS_64S_float2fix(d: u32) -> bool {
18844    (d & 0xffff0000) == 0x9e180000
18845}
18846
18847pub const fn is_FCVTZU_64S_float2fix(d: u32) -> bool {
18848    (d & 0xffff0000) == 0x9e190000
18849}
18850
18851pub const fn is_SCVTF_D64_float2fix(d: u32) -> bool {
18852    (d & 0xffff0000) == 0x9e420000
18853}
18854
18855pub const fn is_UCVTF_D64_float2fix(d: u32) -> bool {
18856    (d & 0xffff0000) == 0x9e430000
18857}
18858
18859pub const fn is_FCVTZS_64D_float2fix(d: u32) -> bool {
18860    (d & 0xffff0000) == 0x9e580000
18861}
18862
18863pub const fn is_FCVTZU_64D_float2fix(d: u32) -> bool {
18864    (d & 0xffff0000) == 0x9e590000
18865}
18866
18867pub const fn is_SCVTF_H64_float2fix(d: u32) -> bool {
18868    (d & 0xffff0000) == 0x9ec20000
18869}
18870
18871pub const fn is_UCVTF_H64_float2fix(d: u32) -> bool {
18872    (d & 0xffff0000) == 0x9ec30000
18873}
18874
18875pub const fn is_FCVTZS_64H_float2fix(d: u32) -> bool {
18876    (d & 0xffff0000) == 0x9ed80000
18877}
18878
18879pub const fn is_FCVTZU_64H_float2fix(d: u32) -> bool {
18880    (d & 0xffff0000) == 0x9ed90000
18881}
18882
18883pub const fn is_FCVTNS_32S_float2int(d: u32) -> bool {
18884    (d & 0xfffffc00) == 0x1e200000
18885}
18886
18887pub const fn is_FCVTNU_32S_float2int(d: u32) -> bool {
18888    (d & 0xfffffc00) == 0x1e210000
18889}
18890
18891pub const fn is_SCVTF_S32_float2int(d: u32) -> bool {
18892    (d & 0xfffffc00) == 0x1e220000
18893}
18894
18895pub const fn is_UCVTF_S32_float2int(d: u32) -> bool {
18896    (d & 0xfffffc00) == 0x1e230000
18897}
18898
18899pub const fn is_FCVTAS_32S_float2int(d: u32) -> bool {
18900    (d & 0xfffffc00) == 0x1e240000
18901}
18902
18903pub const fn is_FCVTAU_32S_float2int(d: u32) -> bool {
18904    (d & 0xfffffc00) == 0x1e250000
18905}
18906
18907pub const fn is_FMOV_32S_float2int(d: u32) -> bool {
18908    (d & 0xfffffc00) == 0x1e260000
18909}
18910
18911pub const fn is_FMOV_S32_float2int(d: u32) -> bool {
18912    (d & 0xfffffc00) == 0x1e270000
18913}
18914
18915pub const fn is_FCVTPS_32S_float2int(d: u32) -> bool {
18916    (d & 0xfffffc00) == 0x1e280000
18917}
18918
18919pub const fn is_FCVTPU_32S_float2int(d: u32) -> bool {
18920    (d & 0xfffffc00) == 0x1e290000
18921}
18922
18923pub const fn is_FCVTMS_32S_float2int(d: u32) -> bool {
18924    (d & 0xfffffc00) == 0x1e300000
18925}
18926
18927pub const fn is_FCVTMU_32S_float2int(d: u32) -> bool {
18928    (d & 0xfffffc00) == 0x1e310000
18929}
18930
18931pub const fn is_FCVTZS_32S_float2int(d: u32) -> bool {
18932    (d & 0xfffffc00) == 0x1e380000
18933}
18934
18935pub const fn is_FCVTZU_32S_float2int(d: u32) -> bool {
18936    (d & 0xfffffc00) == 0x1e390000
18937}
18938
18939pub const fn is_FCVTNS_32D_float2int(d: u32) -> bool {
18940    (d & 0xfffffc00) == 0x1e600000
18941}
18942
18943pub const fn is_FCVTNU_32D_float2int(d: u32) -> bool {
18944    (d & 0xfffffc00) == 0x1e610000
18945}
18946
18947pub const fn is_SCVTF_D32_float2int(d: u32) -> bool {
18948    (d & 0xfffffc00) == 0x1e620000
18949}
18950
18951pub const fn is_UCVTF_D32_float2int(d: u32) -> bool {
18952    (d & 0xfffffc00) == 0x1e630000
18953}
18954
18955pub const fn is_FCVTAS_32D_float2int(d: u32) -> bool {
18956    (d & 0xfffffc00) == 0x1e640000
18957}
18958
18959pub const fn is_FCVTAU_32D_float2int(d: u32) -> bool {
18960    (d & 0xfffffc00) == 0x1e650000
18961}
18962
18963pub const fn is_FCVTPS_32D_float2int(d: u32) -> bool {
18964    (d & 0xfffffc00) == 0x1e680000
18965}
18966
18967pub const fn is_FCVTPU_32D_float2int(d: u32) -> bool {
18968    (d & 0xfffffc00) == 0x1e690000
18969}
18970
18971pub const fn is_FCVTMS_32D_float2int(d: u32) -> bool {
18972    (d & 0xfffffc00) == 0x1e700000
18973}
18974
18975pub const fn is_FCVTMU_32D_float2int(d: u32) -> bool {
18976    (d & 0xfffffc00) == 0x1e710000
18977}
18978
18979pub const fn is_FCVTZS_32D_float2int(d: u32) -> bool {
18980    (d & 0xfffffc00) == 0x1e780000
18981}
18982
18983pub const fn is_FCVTZU_32D_float2int(d: u32) -> bool {
18984    (d & 0xfffffc00) == 0x1e790000
18985}
18986
18987pub const fn is_FJCVTZS_32D_float2int(d: u32) -> bool {
18988    (d & 0xfffffc00) == 0x1e7e0000
18989}
18990
18991pub const fn is_FCVTNS_32H_float2int(d: u32) -> bool {
18992    (d & 0xfffffc00) == 0x1ee00000
18993}
18994
18995pub const fn is_FCVTNU_32H_float2int(d: u32) -> bool {
18996    (d & 0xfffffc00) == 0x1ee10000
18997}
18998
18999pub const fn is_SCVTF_H32_float2int(d: u32) -> bool {
19000    (d & 0xfffffc00) == 0x1ee20000
19001}
19002
19003pub const fn is_UCVTF_H32_float2int(d: u32) -> bool {
19004    (d & 0xfffffc00) == 0x1ee30000
19005}
19006
19007pub const fn is_FCVTAS_32H_float2int(d: u32) -> bool {
19008    (d & 0xfffffc00) == 0x1ee40000
19009}
19010
19011pub const fn is_FCVTAU_32H_float2int(d: u32) -> bool {
19012    (d & 0xfffffc00) == 0x1ee50000
19013}
19014
19015pub const fn is_FMOV_32H_float2int(d: u32) -> bool {
19016    (d & 0xfffffc00) == 0x1ee60000
19017}
19018
19019pub const fn is_FMOV_H32_float2int(d: u32) -> bool {
19020    (d & 0xfffffc00) == 0x1ee70000
19021}
19022
19023pub const fn is_FCVTPS_32H_float2int(d: u32) -> bool {
19024    (d & 0xfffffc00) == 0x1ee80000
19025}
19026
19027pub const fn is_FCVTPU_32H_float2int(d: u32) -> bool {
19028    (d & 0xfffffc00) == 0x1ee90000
19029}
19030
19031pub const fn is_FCVTMS_32H_float2int(d: u32) -> bool {
19032    (d & 0xfffffc00) == 0x1ef00000
19033}
19034
19035pub const fn is_FCVTMU_32H_float2int(d: u32) -> bool {
19036    (d & 0xfffffc00) == 0x1ef10000
19037}
19038
19039pub const fn is_FCVTZS_32H_float2int(d: u32) -> bool {
19040    (d & 0xfffffc00) == 0x1ef80000
19041}
19042
19043pub const fn is_FCVTZU_32H_float2int(d: u32) -> bool {
19044    (d & 0xfffffc00) == 0x1ef90000
19045}
19046
19047pub const fn is_FCVTNS_64S_float2int(d: u32) -> bool {
19048    (d & 0xfffffc00) == 0x9e200000
19049}
19050
19051pub const fn is_FCVTNU_64S_float2int(d: u32) -> bool {
19052    (d & 0xfffffc00) == 0x9e210000
19053}
19054
19055pub const fn is_SCVTF_S64_float2int(d: u32) -> bool {
19056    (d & 0xfffffc00) == 0x9e220000
19057}
19058
19059pub const fn is_UCVTF_S64_float2int(d: u32) -> bool {
19060    (d & 0xfffffc00) == 0x9e230000
19061}
19062
19063pub const fn is_FCVTAS_64S_float2int(d: u32) -> bool {
19064    (d & 0xfffffc00) == 0x9e240000
19065}
19066
19067pub const fn is_FCVTAU_64S_float2int(d: u32) -> bool {
19068    (d & 0xfffffc00) == 0x9e250000
19069}
19070
19071pub const fn is_FCVTPS_64S_float2int(d: u32) -> bool {
19072    (d & 0xfffffc00) == 0x9e280000
19073}
19074
19075pub const fn is_FCVTPU_64S_float2int(d: u32) -> bool {
19076    (d & 0xfffffc00) == 0x9e290000
19077}
19078
19079pub const fn is_FCVTMS_64S_float2int(d: u32) -> bool {
19080    (d & 0xfffffc00) == 0x9e300000
19081}
19082
19083pub const fn is_FCVTMU_64S_float2int(d: u32) -> bool {
19084    (d & 0xfffffc00) == 0x9e310000
19085}
19086
19087pub const fn is_FCVTZS_64S_float2int(d: u32) -> bool {
19088    (d & 0xfffffc00) == 0x9e380000
19089}
19090
19091pub const fn is_FCVTZU_64S_float2int(d: u32) -> bool {
19092    (d & 0xfffffc00) == 0x9e390000
19093}
19094
19095pub const fn is_FCVTNS_64D_float2int(d: u32) -> bool {
19096    (d & 0xfffffc00) == 0x9e600000
19097}
19098
19099pub const fn is_FCVTNU_64D_float2int(d: u32) -> bool {
19100    (d & 0xfffffc00) == 0x9e610000
19101}
19102
19103pub const fn is_SCVTF_D64_float2int(d: u32) -> bool {
19104    (d & 0xfffffc00) == 0x9e620000
19105}
19106
19107pub const fn is_UCVTF_D64_float2int(d: u32) -> bool {
19108    (d & 0xfffffc00) == 0x9e630000
19109}
19110
19111pub const fn is_FCVTAS_64D_float2int(d: u32) -> bool {
19112    (d & 0xfffffc00) == 0x9e640000
19113}
19114
19115pub const fn is_FCVTAU_64D_float2int(d: u32) -> bool {
19116    (d & 0xfffffc00) == 0x9e650000
19117}
19118
19119pub const fn is_FMOV_64D_float2int(d: u32) -> bool {
19120    (d & 0xfffffc00) == 0x9e660000
19121}
19122
19123pub const fn is_FMOV_D64_float2int(d: u32) -> bool {
19124    (d & 0xfffffc00) == 0x9e670000
19125}
19126
19127pub const fn is_FCVTPS_64D_float2int(d: u32) -> bool {
19128    (d & 0xfffffc00) == 0x9e680000
19129}
19130
19131pub const fn is_FCVTPU_64D_float2int(d: u32) -> bool {
19132    (d & 0xfffffc00) == 0x9e690000
19133}
19134
19135pub const fn is_FCVTMS_64D_float2int(d: u32) -> bool {
19136    (d & 0xfffffc00) == 0x9e700000
19137}
19138
19139pub const fn is_FCVTMU_64D_float2int(d: u32) -> bool {
19140    (d & 0xfffffc00) == 0x9e710000
19141}
19142
19143pub const fn is_FCVTZS_64D_float2int(d: u32) -> bool {
19144    (d & 0xfffffc00) == 0x9e780000
19145}
19146
19147pub const fn is_FCVTZU_64D_float2int(d: u32) -> bool {
19148    (d & 0xfffffc00) == 0x9e790000
19149}
19150
19151pub const fn is_FMOV_64VX_float2int(d: u32) -> bool {
19152    (d & 0xfffffc00) == 0x9eae0000
19153}
19154
19155pub const fn is_FMOV_V64I_float2int(d: u32) -> bool {
19156    (d & 0xfffffc00) == 0x9eaf0000
19157}
19158
19159pub const fn is_FCVTNS_64H_float2int(d: u32) -> bool {
19160    (d & 0xfffffc00) == 0x9ee00000
19161}
19162
19163pub const fn is_FCVTNU_64H_float2int(d: u32) -> bool {
19164    (d & 0xfffffc00) == 0x9ee10000
19165}
19166
19167pub const fn is_SCVTF_H64_float2int(d: u32) -> bool {
19168    (d & 0xfffffc00) == 0x9ee20000
19169}
19170
19171pub const fn is_UCVTF_H64_float2int(d: u32) -> bool {
19172    (d & 0xfffffc00) == 0x9ee30000
19173}
19174
19175pub const fn is_FCVTAS_64H_float2int(d: u32) -> bool {
19176    (d & 0xfffffc00) == 0x9ee40000
19177}
19178
19179pub const fn is_FCVTAU_64H_float2int(d: u32) -> bool {
19180    (d & 0xfffffc00) == 0x9ee50000
19181}
19182
19183pub const fn is_FMOV_64H_float2int(d: u32) -> bool {
19184    (d & 0xfffffc00) == 0x9ee60000
19185}
19186
19187pub const fn is_FMOV_H64_float2int(d: u32) -> bool {
19188    (d & 0xfffffc00) == 0x9ee70000
19189}
19190
19191pub const fn is_FCVTPS_64H_float2int(d: u32) -> bool {
19192    (d & 0xfffffc00) == 0x9ee80000
19193}
19194
19195pub const fn is_FCVTPU_64H_float2int(d: u32) -> bool {
19196    (d & 0xfffffc00) == 0x9ee90000
19197}
19198
19199pub const fn is_FCVTMS_64H_float2int(d: u32) -> bool {
19200    (d & 0xfffffc00) == 0x9ef00000
19201}
19202
19203pub const fn is_FCVTMU_64H_float2int(d: u32) -> bool {
19204    (d & 0xfffffc00) == 0x9ef10000
19205}
19206
19207pub const fn is_FCVTZS_64H_float2int(d: u32) -> bool {
19208    (d & 0xfffffc00) == 0x9ef80000
19209}
19210
19211pub const fn is_FCVTZU_64H_float2int(d: u32) -> bool {
19212    (d & 0xfffffc00) == 0x9ef90000
19213}
19214
19215pub const fn is_AESE_B_cryptoaes(d: u32) -> bool {
19216    (d & 0xfffffc00) == 0x4e284800
19217}
19218
19219pub const fn is_AESD_B_cryptoaes(d: u32) -> bool {
19220    (d & 0xfffffc00) == 0x4e285800
19221}
19222
19223pub const fn is_AESMC_B_cryptoaes(d: u32) -> bool {
19224    (d & 0xfffffc00) == 0x4e286800
19225}
19226
19227pub const fn is_AESIMC_B_cryptoaes(d: u32) -> bool {
19228    (d & 0xfffffc00) == 0x4e287800
19229}
19230
19231pub const fn is_EOR3_VVV16_crypto4(d: u32) -> bool {
19232    (d & 0xffe08000) == 0xce000000
19233}
19234
19235pub const fn is_BCAX_VVV16_crypto4(d: u32) -> bool {
19236    (d & 0xffe08000) == 0xce200000
19237}
19238
19239pub const fn is_SM3SS1_VVV4_crypto4(d: u32) -> bool {
19240    (d & 0xffe08000) == 0xce400000
19241}
19242
19243pub const fn is_SHA1C_QSV_cryptosha3(d: u32) -> bool {
19244    (d & 0xffe0fc00) == 0x5e000000
19245}
19246
19247pub const fn is_SHA1P_QSV_cryptosha3(d: u32) -> bool {
19248    (d & 0xffe0fc00) == 0x5e001000
19249}
19250
19251pub const fn is_SHA1M_QSV_cryptosha3(d: u32) -> bool {
19252    (d & 0xffe0fc00) == 0x5e002000
19253}
19254
19255pub const fn is_SHA1SU0_VVV_cryptosha3(d: u32) -> bool {
19256    (d & 0xffe0fc00) == 0x5e003000
19257}
19258
19259pub const fn is_SHA256H_QQV_cryptosha3(d: u32) -> bool {
19260    (d & 0xffe0fc00) == 0x5e004000
19261}
19262
19263pub const fn is_SHA256H2_QQV_cryptosha3(d: u32) -> bool {
19264    (d & 0xffe0fc00) == 0x5e005000
19265}
19266
19267pub const fn is_SHA256SU1_VVV_cryptosha3(d: u32) -> bool {
19268    (d & 0xffe0fc00) == 0x5e006000
19269}
19270
19271pub const fn is_SHA512H_QQV_cryptosha512_3(d: u32) -> bool {
19272    (d & 0xffe0fc00) == 0xce608000
19273}
19274
19275pub const fn is_SHA512H2_QQV_cryptosha512_3(d: u32) -> bool {
19276    (d & 0xffe0fc00) == 0xce608400
19277}
19278
19279pub const fn is_SHA512SU1_VVV2_cryptosha512_3(d: u32) -> bool {
19280    (d & 0xffe0fc00) == 0xce608800
19281}
19282
19283pub const fn is_RAX1_VVV2_cryptosha512_3(d: u32) -> bool {
19284    (d & 0xffe0fc00) == 0xce608c00
19285}
19286
19287pub const fn is_SM3PARTW1_VVV4_cryptosha512_3(d: u32) -> bool {
19288    (d & 0xffe0fc00) == 0xce60c000
19289}
19290
19291pub const fn is_SM3PARTW2_VVV4_cryptosha512_3(d: u32) -> bool {
19292    (d & 0xffe0fc00) == 0xce60c400
19293}
19294
19295pub const fn is_SM4EKEY_VVV4_cryptosha512_3(d: u32) -> bool {
19296    (d & 0xffe0fc00) == 0xce60c800
19297}
19298
19299pub const fn is_SM3TT1A_VVV4_crypto3_imm2(d: u32) -> bool {
19300    (d & 0xffe0cc00) == 0xce408000
19301}
19302
19303pub const fn is_SM3TT1B_VVV4_crypto3_imm2(d: u32) -> bool {
19304    (d & 0xffe0cc00) == 0xce408400
19305}
19306
19307pub const fn is_SM3TT2A_VVV4_crypto3_imm2(d: u32) -> bool {
19308    (d & 0xffe0cc00) == 0xce408800
19309}
19310
19311pub const fn is_SM3TT2B_VVV_crypto3_imm2(d: u32) -> bool {
19312    (d & 0xffe0cc00) == 0xce408c00
19313}
19314
19315pub const fn is_XAR_VVV2_crypto3_imm6(d: u32) -> bool {
19316    (d & 0xffe00000) == 0xce800000
19317}
19318
19319pub const fn is_SHA1H_SS_cryptosha2(d: u32) -> bool {
19320    (d & 0xfffffc00) == 0x5e280800
19321}
19322
19323pub const fn is_SHA1SU1_VV_cryptosha2(d: u32) -> bool {
19324    (d & 0xfffffc00) == 0x5e281800
19325}
19326
19327pub const fn is_SHA256SU0_VV_cryptosha2(d: u32) -> bool {
19328    (d & 0xfffffc00) == 0x5e282800
19329}
19330
19331pub const fn is_SHA512SU0_VV2_cryptosha512_2(d: u32) -> bool {
19332    (d & 0xfffffc00) == 0xcec08000
19333}
19334
19335pub const fn is_SM4E_VV4_cryptosha512_2(d: u32) -> bool {
19336    (d & 0xfffffc00) == 0xcec08400
19337}
19338
19339pub const fn is_FCMP_S_floatcmp(d: u32) -> bool {
19340    (d & 0xffe0fc1f) == 0x1e202000
19341}
19342
19343pub const fn is_FCMP_SZ_floatcmp(d: u32) -> bool {
19344    (d & 0xffe0fc1f) == 0x1e202008
19345}
19346
19347pub const fn is_FCMPE_S_floatcmp(d: u32) -> bool {
19348    (d & 0xffe0fc1f) == 0x1e202010
19349}
19350
19351pub const fn is_FCMPE_SZ_floatcmp(d: u32) -> bool {
19352    (d & 0xffe0fc1f) == 0x1e202018
19353}
19354
19355pub const fn is_FCMP_D_floatcmp(d: u32) -> bool {
19356    (d & 0xffe0fc1f) == 0x1e602000
19357}
19358
19359pub const fn is_FCMP_DZ_floatcmp(d: u32) -> bool {
19360    (d & 0xffe0fc1f) == 0x1e602008
19361}
19362
19363pub const fn is_FCMPE_D_floatcmp(d: u32) -> bool {
19364    (d & 0xffe0fc1f) == 0x1e602010
19365}
19366
19367pub const fn is_FCMPE_DZ_floatcmp(d: u32) -> bool {
19368    (d & 0xffe0fc1f) == 0x1e602018
19369}
19370
19371pub const fn is_FCMP_H_floatcmp(d: u32) -> bool {
19372    (d & 0xffe0fc1f) == 0x1ee02000
19373}
19374
19375pub const fn is_FCMP_HZ_floatcmp(d: u32) -> bool {
19376    (d & 0xffe0fc1f) == 0x1ee02008
19377}
19378
19379pub const fn is_FCMPE_H_floatcmp(d: u32) -> bool {
19380    (d & 0xffe0fc1f) == 0x1ee02010
19381}
19382
19383pub const fn is_FCMPE_HZ_floatcmp(d: u32) -> bool {
19384    (d & 0xffe0fc1f) == 0x1ee02018
19385}
19386
19387pub const fn is_FCCMP_S_floatccmp(d: u32) -> bool {
19388    (d & 0xffe00c10) == 0x1e200400
19389}
19390
19391pub const fn is_FCCMPE_S_floatccmp(d: u32) -> bool {
19392    (d & 0xffe00c10) == 0x1e200410
19393}
19394
19395pub const fn is_FCCMP_D_floatccmp(d: u32) -> bool {
19396    (d & 0xffe00c10) == 0x1e600400
19397}
19398
19399pub const fn is_FCCMPE_D_floatccmp(d: u32) -> bool {
19400    (d & 0xffe00c10) == 0x1e600410
19401}
19402
19403pub const fn is_FCCMP_H_floatccmp(d: u32) -> bool {
19404    (d & 0xffe00c10) == 0x1ee00400
19405}
19406
19407pub const fn is_FCCMPE_H_floatccmp(d: u32) -> bool {
19408    (d & 0xffe00c10) == 0x1ee00410
19409}
19410
19411pub const fn is_FCSEL_S_floatsel(d: u32) -> bool {
19412    (d & 0xffe00c00) == 0x1e200c00
19413}
19414
19415pub const fn is_FCSEL_D_floatsel(d: u32) -> bool {
19416    (d & 0xffe00c00) == 0x1e600c00
19417}
19418
19419pub const fn is_FCSEL_H_floatsel(d: u32) -> bool {
19420    (d & 0xffe00c00) == 0x1ee00c00
19421}
19422
19423pub const fn is_FMOV_S_floatdp1(d: u32) -> bool {
19424    (d & 0xfffffc00) == 0x1e204000
19425}
19426
19427pub const fn is_FABS_S_floatdp1(d: u32) -> bool {
19428    (d & 0xfffffc00) == 0x1e20c000
19429}
19430
19431pub const fn is_FNEG_S_floatdp1(d: u32) -> bool {
19432    (d & 0xfffffc00) == 0x1e214000
19433}
19434
19435pub const fn is_FSQRT_S_floatdp1(d: u32) -> bool {
19436    (d & 0xfffffc00) == 0x1e21c000
19437}
19438
19439pub const fn is_FCVT_DS_floatdp1(d: u32) -> bool {
19440    (d & 0xfffffc00) == 0x1e22c000
19441}
19442
19443pub const fn is_FCVT_HS_floatdp1(d: u32) -> bool {
19444    (d & 0xfffffc00) == 0x1e23c000
19445}
19446
19447pub const fn is_FRINTN_S_floatdp1(d: u32) -> bool {
19448    (d & 0xfffffc00) == 0x1e244000
19449}
19450
19451pub const fn is_FRINTP_S_floatdp1(d: u32) -> bool {
19452    (d & 0xfffffc00) == 0x1e24c000
19453}
19454
19455pub const fn is_FRINTM_S_floatdp1(d: u32) -> bool {
19456    (d & 0xfffffc00) == 0x1e254000
19457}
19458
19459pub const fn is_FRINTZ_S_floatdp1(d: u32) -> bool {
19460    (d & 0xfffffc00) == 0x1e25c000
19461}
19462
19463pub const fn is_FRINTA_S_floatdp1(d: u32) -> bool {
19464    (d & 0xfffffc00) == 0x1e264000
19465}
19466
19467pub const fn is_FRINTX_S_floatdp1(d: u32) -> bool {
19468    (d & 0xfffffc00) == 0x1e274000
19469}
19470
19471pub const fn is_FRINTI_S_floatdp1(d: u32) -> bool {
19472    (d & 0xfffffc00) == 0x1e27c000
19473}
19474
19475pub const fn is_FMOV_D_floatdp1(d: u32) -> bool {
19476    (d & 0xfffffc00) == 0x1e604000
19477}
19478
19479pub const fn is_FABS_D_floatdp1(d: u32) -> bool {
19480    (d & 0xfffffc00) == 0x1e60c000
19481}
19482
19483pub const fn is_FNEG_D_floatdp1(d: u32) -> bool {
19484    (d & 0xfffffc00) == 0x1e614000
19485}
19486
19487pub const fn is_FSQRT_D_floatdp1(d: u32) -> bool {
19488    (d & 0xfffffc00) == 0x1e61c000
19489}
19490
19491pub const fn is_FCVT_SD_floatdp1(d: u32) -> bool {
19492    (d & 0xfffffc00) == 0x1e624000
19493}
19494
19495pub const fn is_FCVT_HD_floatdp1(d: u32) -> bool {
19496    (d & 0xfffffc00) == 0x1e63c000
19497}
19498
19499pub const fn is_FRINTN_D_floatdp1(d: u32) -> bool {
19500    (d & 0xfffffc00) == 0x1e644000
19501}
19502
19503pub const fn is_FRINTP_D_floatdp1(d: u32) -> bool {
19504    (d & 0xfffffc00) == 0x1e64c000
19505}
19506
19507pub const fn is_FRINTM_D_floatdp1(d: u32) -> bool {
19508    (d & 0xfffffc00) == 0x1e654000
19509}
19510
19511pub const fn is_FRINTZ_D_floatdp1(d: u32) -> bool {
19512    (d & 0xfffffc00) == 0x1e65c000
19513}
19514
19515pub const fn is_FRINTA_D_floatdp1(d: u32) -> bool {
19516    (d & 0xfffffc00) == 0x1e664000
19517}
19518
19519pub const fn is_FRINTX_D_floatdp1(d: u32) -> bool {
19520    (d & 0xfffffc00) == 0x1e674000
19521}
19522
19523pub const fn is_FRINTI_D_floatdp1(d: u32) -> bool {
19524    (d & 0xfffffc00) == 0x1e67c000
19525}
19526
19527pub const fn is_FMOV_H_floatdp1(d: u32) -> bool {
19528    (d & 0xfffffc00) == 0x1ee04000
19529}
19530
19531pub const fn is_FABS_H_floatdp1(d: u32) -> bool {
19532    (d & 0xfffffc00) == 0x1ee0c000
19533}
19534
19535pub const fn is_FNEG_H_floatdp1(d: u32) -> bool {
19536    (d & 0xfffffc00) == 0x1ee14000
19537}
19538
19539pub const fn is_FSQRT_H_floatdp1(d: u32) -> bool {
19540    (d & 0xfffffc00) == 0x1ee1c000
19541}
19542
19543pub const fn is_FCVT_SH_floatdp1(d: u32) -> bool {
19544    (d & 0xfffffc00) == 0x1ee24000
19545}
19546
19547pub const fn is_FCVT_DH_floatdp1(d: u32) -> bool {
19548    (d & 0xfffffc00) == 0x1ee2c000
19549}
19550
19551pub const fn is_FRINTN_H_floatdp1(d: u32) -> bool {
19552    (d & 0xfffffc00) == 0x1ee44000
19553}
19554
19555pub const fn is_FRINTP_H_floatdp1(d: u32) -> bool {
19556    (d & 0xfffffc00) == 0x1ee4c000
19557}
19558
19559pub const fn is_FRINTM_H_floatdp1(d: u32) -> bool {
19560    (d & 0xfffffc00) == 0x1ee54000
19561}
19562
19563pub const fn is_FRINTZ_H_floatdp1(d: u32) -> bool {
19564    (d & 0xfffffc00) == 0x1ee5c000
19565}
19566
19567pub const fn is_FRINTA_H_floatdp1(d: u32) -> bool {
19568    (d & 0xfffffc00) == 0x1ee64000
19569}
19570
19571pub const fn is_FRINTX_H_floatdp1(d: u32) -> bool {
19572    (d & 0xfffffc00) == 0x1ee74000
19573}
19574
19575pub const fn is_FRINTI_H_floatdp1(d: u32) -> bool {
19576    (d & 0xfffffc00) == 0x1ee7c000
19577}
19578
19579pub const fn is_FMUL_S_floatdp2(d: u32) -> bool {
19580    (d & 0xffe0fc00) == 0x1e200800
19581}
19582
19583pub const fn is_FDIV_S_floatdp2(d: u32) -> bool {
19584    (d & 0xffe0fc00) == 0x1e201800
19585}
19586
19587pub const fn is_FADD_S_floatdp2(d: u32) -> bool {
19588    (d & 0xffe0fc00) == 0x1e202800
19589}
19590
19591pub const fn is_FSUB_S_floatdp2(d: u32) -> bool {
19592    (d & 0xffe0fc00) == 0x1e203800
19593}
19594
19595pub const fn is_FMAX_S_floatdp2(d: u32) -> bool {
19596    (d & 0xffe0fc00) == 0x1e204800
19597}
19598
19599pub const fn is_FMIN_S_floatdp2(d: u32) -> bool {
19600    (d & 0xffe0fc00) == 0x1e205800
19601}
19602
19603pub const fn is_FMAXNM_S_floatdp2(d: u32) -> bool {
19604    (d & 0xffe0fc00) == 0x1e206800
19605}
19606
19607pub const fn is_FMINNM_S_floatdp2(d: u32) -> bool {
19608    (d & 0xffe0fc00) == 0x1e207800
19609}
19610
19611pub const fn is_FNMUL_S_floatdp2(d: u32) -> bool {
19612    (d & 0xffe0fc00) == 0x1e208800
19613}
19614
19615pub const fn is_FMUL_D_floatdp2(d: u32) -> bool {
19616    (d & 0xffe0fc00) == 0x1e600800
19617}
19618
19619pub const fn is_FDIV_D_floatdp2(d: u32) -> bool {
19620    (d & 0xffe0fc00) == 0x1e601800
19621}
19622
19623pub const fn is_FADD_D_floatdp2(d: u32) -> bool {
19624    (d & 0xffe0fc00) == 0x1e602800
19625}
19626
19627pub const fn is_FSUB_D_floatdp2(d: u32) -> bool {
19628    (d & 0xffe0fc00) == 0x1e603800
19629}
19630
19631pub const fn is_FMAX_D_floatdp2(d: u32) -> bool {
19632    (d & 0xffe0fc00) == 0x1e604800
19633}
19634
19635pub const fn is_FMIN_D_floatdp2(d: u32) -> bool {
19636    (d & 0xffe0fc00) == 0x1e605800
19637}
19638
19639pub const fn is_FMAXNM_D_floatdp2(d: u32) -> bool {
19640    (d & 0xffe0fc00) == 0x1e606800
19641}
19642
19643pub const fn is_FMINNM_D_floatdp2(d: u32) -> bool {
19644    (d & 0xffe0fc00) == 0x1e607800
19645}
19646
19647pub const fn is_FNMUL_D_floatdp2(d: u32) -> bool {
19648    (d & 0xffe0fc00) == 0x1e608800
19649}
19650
19651pub const fn is_FMUL_H_floatdp2(d: u32) -> bool {
19652    (d & 0xffe0fc00) == 0x1ee00800
19653}
19654
19655pub const fn is_FDIV_H_floatdp2(d: u32) -> bool {
19656    (d & 0xffe0fc00) == 0x1ee01800
19657}
19658
19659pub const fn is_FADD_H_floatdp2(d: u32) -> bool {
19660    (d & 0xffe0fc00) == 0x1ee02800
19661}
19662
19663pub const fn is_FSUB_H_floatdp2(d: u32) -> bool {
19664    (d & 0xffe0fc00) == 0x1ee03800
19665}
19666
19667pub const fn is_FMAX_H_floatdp2(d: u32) -> bool {
19668    (d & 0xffe0fc00) == 0x1ee04800
19669}
19670
19671pub const fn is_FMIN_H_floatdp2(d: u32) -> bool {
19672    (d & 0xffe0fc00) == 0x1ee05800
19673}
19674
19675pub const fn is_FMAXNM_H_floatdp2(d: u32) -> bool {
19676    (d & 0xffe0fc00) == 0x1ee06800
19677}
19678
19679pub const fn is_FMINNM_H_floatdp2(d: u32) -> bool {
19680    (d & 0xffe0fc00) == 0x1ee07800
19681}
19682
19683pub const fn is_FNMUL_H_floatdp2(d: u32) -> bool {
19684    (d & 0xffe0fc00) == 0x1ee08800
19685}
19686
19687pub const fn is_FMADD_S_floatdp3(d: u32) -> bool {
19688    (d & 0xffe08000) == 0x1f000000
19689}
19690
19691pub const fn is_FMSUB_S_floatdp3(d: u32) -> bool {
19692    (d & 0xffe08000) == 0x1f008000
19693}
19694
19695pub const fn is_FNMADD_S_floatdp3(d: u32) -> bool {
19696    (d & 0xffe08000) == 0x1f200000
19697}
19698
19699pub const fn is_FNMSUB_S_floatdp3(d: u32) -> bool {
19700    (d & 0xffe08000) == 0x1f208000
19701}
19702
19703pub const fn is_FMADD_D_floatdp3(d: u32) -> bool {
19704    (d & 0xffe08000) == 0x1f400000
19705}
19706
19707pub const fn is_FMSUB_D_floatdp3(d: u32) -> bool {
19708    (d & 0xffe08000) == 0x1f408000
19709}
19710
19711pub const fn is_FNMADD_D_floatdp3(d: u32) -> bool {
19712    (d & 0xffe08000) == 0x1f600000
19713}
19714
19715pub const fn is_FNMSUB_D_floatdp3(d: u32) -> bool {
19716    (d & 0xffe08000) == 0x1f608000
19717}
19718
19719pub const fn is_FMADD_H_floatdp3(d: u32) -> bool {
19720    (d & 0xffe08000) == 0x1fc00000
19721}
19722
19723pub const fn is_FMSUB_H_floatdp3(d: u32) -> bool {
19724    (d & 0xffe08000) == 0x1fc08000
19725}
19726
19727pub const fn is_FNMADD_H_floatdp3(d: u32) -> bool {
19728    (d & 0xffe08000) == 0x1fe00000
19729}
19730
19731pub const fn is_FNMSUB_H_floatdp3(d: u32) -> bool {
19732    (d & 0xffe08000) == 0x1fe08000
19733}
19734
19735pub const fn is_FMOV_S_floatimm(d: u32) -> bool {
19736    (d & 0xffe01fe0) == 0x1e201000
19737}
19738
19739pub const fn is_FMOV_D_floatimm(d: u32) -> bool {
19740    (d & 0xffe01fe0) == 0x1e601000
19741}
19742
19743pub const fn is_FMOV_H_floatimm(d: u32) -> bool {
19744    (d & 0xffe01fe0) == 0x1ee01000
19745}
19746
19747pub const fn get_A(d: u32) -> u32 {
19748    (d >> 23) & 1
19749}
19750
19751pub const fn get_CRm(d: u32) -> u32 {
19752    (d >> 8) & 0xF
19753}
19754
19755pub const fn get_CRn(d: u32) -> u32 {
19756    (d >> 12) & 0xF
19757}
19758
19759pub const fn get_H(d: u32) -> u32 {
19760    (d >> 11) & 1
19761}
19762// pub const fn get_L(d: u32) -> u32 {(d >> 21) & 1	// system, asisdelem, asimdelem
19763// pub const fn get_L(d: u32) -> u32 {(d >> 22) & 1	// asisdlse, asisdlsep, asisdlso, asisdlsop, ldstexcl, ldstnapair_offs, ldstpair_off, ldstpair_post, ldstpair_pre
19764pub const fn get_LL(d: u32) -> u32 {
19765    d & 3
19766}
19767// pub const fn get_M(d: u32) -> u32 {(d >> 20) & 1	// asisdelem, asimdelem
19768// pub const fn get_M(d: u32) -> u32 {(d >> 23) & 1	// ldst_pac
19769// pub const fn get_M(d: u32) -> u32 {(d >> 31) & 1	// floatcmp, floatccmp, floatsel, floatdp1, floatdp2, floatdp3, floatimm
19770// pub const fn get_N(d: u32) -> u32 {(d >> 21) & 1	// log_shift
19771// pub const fn get_N(d: u32) -> u32 {(d >> 22) & 1	// bitfield, extract, log_imm
19772pub const fn get_O(d: u32) -> u32 {
19773    (d >> 14) & 1
19774}
19775
19776pub const fn get_Op0(d: u32) -> u32 {
19777    (d >> 21) & 3
19778}
19779
19780pub const fn get_Q(d: u32) -> u32 {
19781    (d >> 30) & 1
19782}
19783// pub const fn get_R(d: u32) -> u32 {(d >> 21) & 1	// asisdlso, asisdlsop
19784// pub const fn get_R(d: u32) -> u32 {(d >> 22) & 1	// memop
19785pub const fn get_Ra(d: u32) -> u32 {
19786    (d >> 10) & 0x1F
19787}
19788
19789pub const fn get_Rd(d: u32) -> u32 {
19790    d & 0x1F
19791}
19792// pub const fn get_Rm(d: u32) -> u32 {(d >> 16) & 0x1F	// asisdlsep, asisdlsop, ldst_regoff, extract, addsub_ext, addsub_shift, addsub_carry, condcmp_reg, condsel, dp_2src, dp_3src, log_shift, asimdext, asimdperm, asisddiff, asisdsame, asisdsamefp16, asisdsame2, asimdtbl, asimddiff, asimdsame, asimdsamefp16, asimdsame2, crypto4, cryptosha3, cryptosha512_3, crypto3_imm2, crypto3_imm6, floatcmp, floatccmp, floatsel, floatdp2, floatdp3
19793// pub const fn get_Rm(d: u32) -> u32 {(d >> 16) & 0xF	// asisdelem, asimdelem
19794pub const fn get_Rn(d: u32) -> u32 {
19795    (d >> 5) & 0x1F
19796}
19797
19798pub const fn get_Rs(d: u32) -> u32 {
19799    (d >> 16) & 0x1F
19800}
19801
19802pub const fn get_Rt(d: u32) -> u32 {
19803    d & 0x1F
19804}
19805
19806pub const fn get_Rt2(d: u32) -> u32 {
19807    (d >> 10) & 0x1F
19808}
19809// pub const fn get_S(d: u32) -> u32 {(d >> 12) & 1	// asisdlso, asisdlsop, ldst_regoff
19810// pub const fn get_S(d: u32) -> u32 {(d >> 22) & 1	// ldst_pac
19811// pub const fn get_S(d: u32) -> u32 {(d >> 29) & 1	// addsub_imm, addsub_ext, addsub_shift, addsub_carry, condcmp_imm, condcmp_reg, condsel, dp_1src, dp_2src, float2fix, float2int, floatcmp, floatccmp, floatsel, floatdp1, floatdp2, floatdp3, floatimm
19812pub const fn get_U(d: u32) -> u32 {
19813    (d >> 29) & 1
19814}
19815
19816pub const fn get_V(d: u32) -> u32 {
19817    (d >> 26) & 1
19818}
19819
19820pub const fn get_W(d: u32) -> u32 {
19821    (d >> 11) & 1
19822}
19823// pub const fn get_a(d: u32) -> u32 {(d >> 18) & 1	// asimdimm
19824// pub const fn get_a(d: u32) -> u32 {(d >> 23) & 1	// asisdsamefp16, asisdmiscfp16, asimdsamefp16, asimdmiscfp16
19825pub const fn get_b(d: u32) -> u32 {
19826    (d >> 17) & 1
19827}
19828
19829pub const fn get_b40(d: u32) -> u32 {
19830    (d >> 19) & 0x1F
19831}
19832
19833pub const fn get_b5(d: u32) -> u32 {
19834    (d >> 31) & 1
19835}
19836
19837pub const fn get_c(d: u32) -> u32 {
19838    (d >> 16) & 1
19839}
19840
19841pub const fn get_cmode(d: u32) -> u32 {
19842    (d >> 12) & 0xF
19843}
19844// pub const fn get_cond(d: u32) -> u32 {d & 0xF	// condbranch
19845// pub const fn get_cond(d: u32) -> u32 {(d >> 12) & 0xF	// condcmp_imm, condcmp_reg, condsel, floatccmp, floatsel
19846pub const fn get_d(d: u32) -> u32 {
19847    (d >> 9) & 1
19848}
19849
19850pub const fn get_e(d: u32) -> u32 {
19851    (d >> 8) & 1
19852}
19853
19854pub const fn get_f(d: u32) -> u32 {
19855    (d >> 7) & 1
19856}
19857
19858pub const fn get_g(d: u32) -> u32 {
19859    (d >> 6) & 1
19860}
19861
19862pub const fn get_h(d: u32) -> u32 {
19863    (d >> 5) & 1
19864}
19865
19866pub const fn get_hw(d: u32) -> u32 {
19867    (d >> 21) & 3
19868}
19869
19870pub const fn get_imm12(d: u32) -> u32 {
19871    (d >> 10) & 0xFFF
19872}
19873
19874pub const fn get_imm14(d: u32) -> u32 {
19875    (d >> 5) & 0x3FFF
19876}
19877
19878pub const fn get_imm16(d: u32) -> u32 {
19879    (d >> 5) & 0xFFFF
19880}
19881
19882pub const fn get_imm19(d: u32) -> u32 {
19883    (d >> 5) & 0x7FFFF
19884}
19885
19886pub const fn get_imm2(d: u32) -> u32 {
19887    (d >> 12) & 3
19888}
19889
19890pub const fn get_imm26(d: u32) -> u32 {
19891    d & 0x3FFFFFF
19892}
19893
19894pub const fn get_imm3(d: u32) -> u32 {
19895    (d >> 10) & 7
19896}
19897
19898pub const fn get_imm4(d: u32) -> u32 {
19899    (d >> 11) & 0xF
19900}
19901// pub const fn get_imm5(d: u32) -> u32 {(d >> 16) & 0x1F	// condcmp_imm, asimdins, asisdone
19902// pub const fn get_imm5(d: u32) -> u32 {(d >> 5) & 0x1F	// floatimm
19903pub const fn get_imm6(d: u32) -> u32 {
19904    (d >> 10) & 0x3F
19905}
19906
19907pub const fn get_imm7(d: u32) -> u32 {
19908    (d >> 15) & 0x7F
19909}
19910
19911pub const fn get_imm8(d: u32) -> u32 {
19912    (d >> 13) & 0xFF
19913}
19914
19915pub const fn get_imm9(d: u32) -> u32 {
19916    (d >> 12) & 0x1FF
19917}
19918
19919pub const fn get_immb(d: u32) -> u32 {
19920    (d >> 16) & 7
19921}
19922
19923pub const fn get_immh(d: u32) -> u32 {
19924    (d >> 19) & 0xF
19925}
19926
19927pub const fn get_immhi(d: u32) -> u32 {
19928    (d >> 5) & 0x7FFFF
19929}
19930
19931pub const fn get_immlo(d: u32) -> u32 {
19932    (d >> 29) & 3
19933}
19934
19935pub const fn get_immr(d: u32) -> u32 {
19936    (d >> 16) & 0x3F
19937}
19938
19939pub const fn get_imms(d: u32) -> u32 {
19940    (d >> 10) & 0x3F
19941}
19942
19943pub const fn get_len(d: u32) -> u32 {
19944    (d >> 13) & 3
19945}
19946
19947pub const fn get_nzcv(d: u32) -> u32 {
19948    d & 0xF
19949}
19950
19951pub const fn get_rmode(d: u32) -> u32 {
19952    (d >> 19) & 3
19953}
19954
19955pub const fn get_scale(d: u32) -> u32 {
19956    (d >> 10) & 0x3F
19957}
19958
19959pub const fn get_sf(d: u32) -> u32 {
19960    (d >> 31) & 1
19961}
19962
19963pub const fn get_shift(d: u32) -> u32 {
19964    (d >> 22) & 3
19965}
19966// pub const fn get_size(d: u32) -> u32 {(d >> 10) & 3	// asisdlse, asisdlsep, asisdlso, asisdlsop
19967// pub const fn get_size(d: u32) -> u32 {(d >> 22) & 3	// asimdall, asimdperm, asisdpair, asisddiff, asisdsame, asisdsame2, asisdmisc, asisdelem, asimddiff, asimdsame, asimdsame2, asimdmisc, asimdelem, cryptoaes, cryptosha3, cryptosha2
19968// pub const fn get_size(d: u32) -> u32 {(d >> 30) & 3	// memop, ldstexcl, ldst_immpost, ldst_immpre, ldst_pac, ldst_regoff, ldst_unpriv, ldst_unscaled, ldst_pos
19969pub const fn get_type(d: u32) -> u32 {
19970    (d >> 22) & 3
19971}
19972
19973pub const fn get_A_s(d: u32) -> u32 {
19974    ((d >> 23) & 1) | (if (d & 0x800000) != 0 { !1 } else { 0 })
19975}
19976
19977pub const fn get_CRm_s(d: u32) -> u32 {
19978    ((d >> 8) & 0xF) | (if (d & 0x800) != 0 { !0xF } else { 0 })
19979}
19980
19981pub const fn get_CRn_s(d: u32) -> u32 {
19982    ((d >> 12) & 0xF) | (if (d & 0x8000) != 0 { !0xF } else { 0 })
19983}
19984
19985pub const fn get_H_s(d: u32) -> u32 {
19986    ((d >> 11) & 1) | (if (d & 0x800) != 0 { !1 } else { 0 })
19987}
19988// pub const fn get_L_s(d: u32) -> u32 { ((d >> 21) & 1) | ( if (d & 0x200000) != 0 { !1 } else { 0}) }
19989// pub const fn get_L_s(d: u32) -> u32 { ((d >> 22) & 1) | ( if (d & 0x400000) != 0 { !1 } else { 0}) }
19990
19991pub const fn get_LL_s(d: u32) -> u32 {
19992    (d & 3) | (if (d & 2) != 0 { !3 } else { 0 })
19993}
19994// pub const fn get_M_s(d: u32) -> u32 { ((d >> 20) & 1) | ( if (d & 0x100000) != 0 { !1 } else { 0}) }
19995// pub const fn get_M_s(d: u32) -> u32 { ((d >> 23) & 1) | ( if (d & 0x800000) != 0 { !1 } else { 0}) }
19996// pub const fn get_M_s(d: u32) -> u32 { ((d >> 31) & 1) | ( if (d & 0x80000000) != 0 { !1 } else { 0}) }
19997// pub const fn get_N_s(d: u32) -> u32 { ((d >> 21) & 1) | ( if (d & 0x200000) != 0 { !1 } else { 0}) }
19998// pub const fn get_N_s(d: u32) -> u32 { ((d >> 22) & 1) | ( if (d & 0x400000) != 0 { !1 } else { 0}) }
19999
20000pub const fn get_O_s(d: u32) -> u32 {
20001    ((d >> 14) & 1) | (if (d & 0x4000) != 0 { !1 } else { 0 })
20002}
20003
20004pub const fn get_Op0_s(d: u32) -> u32 {
20005    ((d >> 21) & 3) | (if (d & 0x400000) != 0 { !3 } else { 0 })
20006}
20007
20008pub const fn get_Q_s(d: u32) -> u32 {
20009    ((d >> 30) & 1) | (if (d & 0x40000000) != 0 { !1 } else { 0 })
20010}
20011// pub const fn get_R_s(d: u32) -> u32 { ((d >> 21) & 1) | ( if (d & 0x200000) != 0 { !1 } else { 0}) }
20012// pub const fn get_R_s(d: u32) -> u32 { ((d >> 22) & 1) | ( if (d & 0x400000) != 0 { !1 } else { 0}) }
20013
20014pub const fn get_Ra_s(d: u32) -> u32 {
20015    ((d >> 10) & 0x1F) | (if (d & 0x4000) != 0 { !0x1F } else { 0 })
20016}
20017
20018pub const fn get_Rd_s(d: u32) -> u32 {
20019    (d & 0x1F) | (if (d & 0x10) != 0 { !0x1F } else { 0 })
20020}
20021// pub const fn get_Rm_s(d: u32) -> u32 { ((d >> 16) & 0x1F) | ( if (d & 0x100000) != 0 { !0x1F } else { 0}) }
20022// pub const fn get_Rm_s(d: u32) -> u32 { ((d >> 16) & 0xF) | ( if (d & 0x80000) != 0 { !0xF } else { 0}) }
20023
20024pub const fn get_Rn_s(d: u32) -> u32 {
20025    ((d >> 5) & 0x1F) | (if (d & 0x200) != 0 { !0x1F } else { 0 })
20026}
20027
20028pub const fn get_Rs_s(d: u32) -> u32 {
20029    ((d >> 16) & 0x1F) | (if (d & 0x100000) != 0 { !0x1F } else { 0 })
20030}
20031
20032pub const fn get_Rt_s(d: u32) -> u32 {
20033    (d & 0x1F) | (if (d & 0x10) != 0 { !0x1F } else { 0 })
20034}
20035
20036pub const fn get_Rt2_s(d: u32) -> u32 {
20037    ((d >> 10) & 0x1F) | (if (d & 0x4000) != 0 { !0x1F } else { 0 })
20038}
20039// pub const fn get_S_s(d: u32) -> u32 { ((d >> 12) & 1) | ( if (d & 0x1000) != 0 { !1 } else { 0}) }
20040// pub const fn get_S_s(d: u32) -> u32 { ((d >> 22) & 1) | ( if (d & 0x400000) != 0 { !1 } else { 0}) }
20041// pub const fn get_S_s(d: u32) -> u32 { ((d >> 29) & 1) | ( if (d & 0x20000000) != 0 { !1 } else { 0}) }
20042
20043pub const fn get_U_s(d: u32) -> u32 {
20044    ((d >> 29) & 1) | (if (d & 0x20000000) != 0 { !1 } else { 0 })
20045}
20046
20047pub const fn get_V_s(d: u32) -> u32 {
20048    ((d >> 26) & 1) | (if (d & 0x4000000) != 0 { !1 } else { 0 })
20049}
20050
20051pub const fn get_W_s(d: u32) -> u32 {
20052    ((d >> 11) & 1) | (if (d & 0x800) != 0 { !1 } else { 0 })
20053}
20054// pub const fn get_a_s(d: u32) -> u32 { ((d >> 18) & 1) | ( if (d & 0x40000) != 0 { !1 } else { 0}) }
20055// pub const fn get_a_s(d: u32) -> u32 { ((d >> 23) & 1) | ( if (d & 0x800000) != 0 { !1 } else { 0}) }
20056
20057pub const fn get_b_s(d: u32) -> u32 {
20058    ((d >> 17) & 1) | (if (d & 0x20000) != 0 { !1 } else { 0 })
20059}
20060
20061pub const fn get_b40_s(d: u32) -> u32 {
20062    ((d >> 19) & 0x1F) | (if (d & 0x800000) != 0 { !0x1F } else { 0 })
20063}
20064
20065pub const fn get_b5_s(d: u32) -> u32 {
20066    ((d >> 31) & 1) | (if (d & 0x80000000) != 0 { !1 } else { 0 })
20067}
20068
20069pub const fn get_c_s(d: u32) -> u32 {
20070    ((d >> 16) & 1) | (if (d & 0x10000) != 0 { !1 } else { 0 })
20071}
20072
20073pub const fn get_cmode_s(d: u32) -> u32 {
20074    ((d >> 12) & 0xF) | (if (d & 0x8000) != 0 { !0xF } else { 0 })
20075}
20076// pub const fn get_cond_s(d: u32) -> u32 { (d & 0xF) | ( if (d & 8 {) != 0 !0xF } else { 0}) }
20077// pub const fn get_cond_s(d: u32) -> u32 { ((d >> 12) & 0xF) | ( if (d & 0x8000) != 0 { !0xF } else { 0}) }
20078
20079pub const fn get_d_s(d: u32) -> u32 {
20080    ((d >> 9) & 1) | (if (d & 0x200) != 0 { !1 } else { 0 })
20081}
20082
20083pub const fn get_e_s(d: u32) -> u32 {
20084    ((d >> 8) & 1) | (if (d & 0x100) != 0 { !1 } else { 0 })
20085}
20086
20087pub const fn get_f_s(d: u32) -> u32 {
20088    ((d >> 7) & 1) | (if (d & 0x80) != 0 { !1 } else { 0 })
20089}
20090
20091pub const fn get_g_s(d: u32) -> u32 {
20092    ((d >> 6) & 1) | (if (d & 0x40) != 0 { !1 } else { 0 })
20093}
20094
20095pub const fn get_h_s(d: u32) -> u32 {
20096    ((d >> 5) & 1) | (if (d & 0x20) != 0 { !1 } else { 0 })
20097}
20098
20099pub const fn get_hw_s(d: u32) -> u32 {
20100    ((d >> 21) & 3) | (if (d & 0x400000) != 0 { !3 } else { 0 })
20101}
20102
20103pub const fn get_imm12_s(d: u32) -> u32 {
20104    ((d >> 10) & 0xFFF) | (if (d & 0x200000) != 0 { !0xFFF } else { 0 })
20105}
20106
20107pub const fn get_imm14_s(d: u32) -> u32 {
20108    ((d >> 5) & 0x3FFF) | (if (d & 0x40000) != 0 { !0x3FFF } else { 0 })
20109}
20110
20111pub const fn get_imm16_s(d: u32) -> u32 {
20112    ((d >> 5) & 0xFFFF) | (if (d & 0x100000) != 0 { !0xFFFF } else { 0 })
20113}
20114
20115pub const fn get_imm19_s(d: u32) -> u32 {
20116    ((d >> 5) & 0x7FFFF) | (if (d & 0x800000) != 0 { !0x7FFFF } else { 0 })
20117}
20118
20119pub const fn get_imm2_s(d: u32) -> u32 {
20120    ((d >> 12) & 3) | (if (d & 0x2000) != 0 { !3 } else { 0 })
20121}
20122
20123pub const fn get_imm26_s(d: u32) -> u32 {
20124    (d & 0x3FFFFFF) | (if (d & 0x2000000) != 0 { !0x3FFFFFF } else { 0 })
20125}
20126
20127pub const fn get_imm3_s(d: u32) -> u32 {
20128    ((d >> 10) & 7) | (if (d & 0x1000) != 0 { !7 } else { 0 })
20129}
20130
20131pub const fn get_imm4_s(d: u32) -> u32 {
20132    ((d >> 11) & 0xF) | (if (d & 0x4000) != 0 { !0xF } else { 0 })
20133}
20134// pub const fn get_imm5_s(d: u32) -> u32 { ((d >> 16) & 0x1F) | ( if (d & 0x100000) != 0 { !0x1F } else { 0}) }
20135// pub const fn get_imm5_s(d: u32) -> u32 { ((d >> 5) & 0x1F) | ( if (d & 0x200) != 0 { !0x1F } else { 0}) }
20136
20137pub const fn get_imm6_s(d: u32) -> u32 {
20138    ((d >> 10) & 0x3F) | (if (d & 0x8000) != 0 { !0x3F } else { 0 })
20139}
20140
20141pub const fn get_imm7_s(d: u32) -> u32 {
20142    ((d >> 15) & 0x7F) | (if (d & 0x200000) != 0 { !0x7F } else { 0 })
20143}
20144
20145pub const fn get_imm8_s(d: u32) -> u32 {
20146    ((d >> 13) & 0xFF) | (if (d & 0x100000) != 0 { !0xFF } else { 0 })
20147}
20148
20149pub const fn get_imm9_s(d: u32) -> u32 {
20150    ((d >> 12) & 0x1FF) | (if (d & 0x100000) != 0 { !0x1FF } else { 0 })
20151}
20152
20153pub const fn get_immb_s(d: u32) -> u32 {
20154    ((d >> 16) & 7) | (if (d & 0x40000) != 0 { !7 } else { 0 })
20155}
20156
20157pub const fn get_immh_s(d: u32) -> u32 {
20158    ((d >> 19) & 0xF) | (if (d & 0x400000) != 0 { !0xF } else { 0 })
20159}
20160
20161pub const fn get_immhi_s(d: u32) -> u32 {
20162    ((d >> 5) & 0x7FFFF) | (if (d & 0x800000) != 0 { !0x7FFFF } else { 0 })
20163}
20164
20165pub const fn get_immlo_s(d: u32) -> u32 {
20166    ((d >> 29) & 3) | (if (d & 0x40000000) != 0 { !3 } else { 0 })
20167}
20168
20169pub const fn get_immr_s(d: u32) -> u32 {
20170    ((d >> 16) & 0x3F) | (if (d & 0x200000) != 0 { !0x3F } else { 0 })
20171}
20172
20173pub const fn get_imms_s(d: u32) -> u32 {
20174    ((d >> 10) & 0x3F) | (if (d & 0x8000) != 0 { !0x3F } else { 0 })
20175}
20176
20177pub const fn get_len_s(d: u32) -> u32 {
20178    ((d >> 13) & 3) | (if (d & 0x4000) != 0 { !3 } else { 0 })
20179}
20180
20181pub const fn get_nzcv_s(d: u32) -> u32 {
20182    (d & 0xF) | (if (d & 8) != 0 { !0xF } else { 0 })
20183}
20184
20185pub const fn get_rmode_s(d: u32) -> u32 {
20186    ((d >> 19) & 3) | (if (d & 0x100000) != 0 { !3 } else { 0 })
20187}
20188
20189pub const fn get_scale_s(d: u32) -> u32 {
20190    ((d >> 10) & 0x3F) | (if (d & 0x8000) != 0 { !0x3F } else { 0 })
20191}
20192
20193pub const fn get_sf_s(d: u32) -> u32 {
20194    ((d >> 31) & 1) | (if (d & 0x80000000) != 0 { !1 } else { 0 })
20195}
20196
20197pub const fn get_shift_s(d: u32) -> u32 {
20198    ((d >> 22) & 3) | (if (d & 0x800000) != 0 { !3 } else { 0 })
20199}
20200// pub const fn get_size_s(d: u32) -> u32 { ((d >> 10) & 3) | ( if (d & 0x800) != 0 { !3 } else { 0}) }
20201// pub const fn get_size_s(d: u32) -> u32 { ((d >> 22) & 3) | ( if (d & 0x800000) != 0 { !3 } else { 0}) }
20202// pub const fn get_size_s(d: u32) -> u32 { ((d >> 30) & 3) | ( if (d & 0x80000000) != 0 { !3 } else { 0}) }
20203
20204pub const fn get_type_s(d: u32) -> u32 {
20205    ((d >> 22) & 3) | (if (d & 0x800000) != 0 { !3 } else { 0 })
20206}