Expand description
§Arm TrustZone Address Space Controller driver
Driver implementation for the TZC-400 TrustZone Address Space Controller.
The driver is designed to function regardless of whether a Memory Management Unit (MMU) is present.
The primary role of the OwnedMmioPointer
is to manage the lifetime of the peripheral, ensuring
proper resource handling. In a system that includes an MMU, the peripheral’s lifetime is dynamic
because it is mapped into memory rather than having a fixed address. In a system without an MMU, the
OwnedMmioPointer
can be instantiated directly from the physical address of the register block,
providing access to the peripheral without requiring memory mapping.
§Implemented features
- Reading the TZC configuration and status
- Managing regions and setting up secure and/or non-secure access rights
- Non-blocking read/write functions
- Reading, masking and clearing interrupts
- 100% unit test coverage
§Future plans
- Use the
AID_WIDTH
configuration value to manipulate theFailIDRegister
.
§License
The project is MIT and Apache-2.0 dual licensed, see LICENSE-Apache-2.0
and LICENSE-MIT
.
§Maintainers
arm-tzc is a trustedfirmware.org maintained project. All contributions are ultimately merged by the maintainers listed below.
- Bálint Dobszay balint.dobszay@arm.com balint-dobszay-arm
- Imre Kis imre.kis@arm.com imre-kis-arm
- Sandrine Afsa sandrine.afsa@arm.com sandrine-bailleux-arm
§Contributing
Please follow the directions of the Trusted Firmware Processes
Contributions are handled through review.trustedfirmware.org.
§Arm trademark notice
Arm is a registered trademark of Arm Limited (or its subsidiaries or affiliates).
This project uses some of the Arm product, service or technology trademarks, as listed in the Trademark List, in accordance with the Arm Trademark Use Guidelines.
Subsequent uses of these trademarks throughout this repository do not need to be prefixed with the Arm word trademark.
Copyright The arm-tzc Contributors.
Structs§
- Action
Register - Controls the interrupt and bus response signaling behavior of the TZC-400 when region permission failures occur.
- Build
Config Register - Provides information about the configuration of the TZC-400.
- Fail
Control Register - Each filter unit has a fail control register which contains the control status information of
the first access that failed a region permission check in the associated filter unit. This
occurs even if the
ActionRegister
is set to not drive the interrupt signal. - FailID
Register - Each filter unit has a fail id register which contains the master ACE-Lite ARID or AWID of the
first access that failed a region permission check in the associated filter unit. This occurs
even if the
ActionRegister
is set to not drive the interrupt signal. - Gate
Keeper - Provides control and status for the gate keeper in each filter unit implemented.
- Gate
Keeper Mut - Provides control and status for the gate keeper in each filter unit implemented.
- Interrupt
Clear Register - Clears the interrupt.
- Interrupt
Status Register - Contains the status of the interrupt signal, TZCINT, that reports access security violations or region overlap errors.
- Region
Attributes - Each region has a region attributes register which controls the permissions for Region 0 and, for all other regions, the permissions and target filter region enables.
- RegionID
Access - Each region has a region id access register which controls the Non-secure access based on the NSAID inputs.
- Secure
Access - Controls access to a region from the secure world.
- Speculation
Control Register - Controls the read access speculation and write access speculation.
- Tzc
- Interface to manipulate the TZC-400 TrustZone Address Space Controller.
- TzcFail
- Wrapper structure to allow reading registers detailing the last failure of a filter unit. See
also
Tzc::fail
. - TzcRegion
- Wrapper structure to allow reading registers for a region. See also
Tzc::region
. - TzcRegion
Mut - Wrapper structure to allow reading and writing registers for a region. See also
Tzc::region_mut
. - TzcRegisters
- View over the TZC memory.