List of all items
Structs
- intrinsics::aarch64::ISH
- intrinsics::aarch64::ISHLD
- intrinsics::aarch64::ISHST
- intrinsics::aarch64::LD
- intrinsics::aarch64::NSH
- intrinsics::aarch64::NSHLD
- intrinsics::aarch64::NSHST
- intrinsics::aarch64::OSH
- intrinsics::aarch64::OSHLD
- intrinsics::aarch64::OSHST
- intrinsics::aarch64::ST
- intrinsics::aarch64::SY
- intrinsics::aarch64::float16x4_t
- intrinsics::aarch64::float16x4x2_t
- intrinsics::aarch64::float16x4x3_t
- intrinsics::aarch64::float16x4x4_t
- intrinsics::aarch64::float16x8_t
- intrinsics::aarch64::float16x8x2_t
- intrinsics::aarch64::float16x8x3_t
- intrinsics::aarch64::float16x8x4_t
- intrinsics::aarch64::float32x2_t
- intrinsics::aarch64::float32x2x2_t
- intrinsics::aarch64::float32x2x3_t
- intrinsics::aarch64::float32x2x4_t
- intrinsics::aarch64::float32x4_t
- intrinsics::aarch64::float32x4x2_t
- intrinsics::aarch64::float32x4x3_t
- intrinsics::aarch64::float32x4x4_t
- intrinsics::aarch64::float64x1_t
- intrinsics::aarch64::float64x1x2_t
- intrinsics::aarch64::float64x1x3_t
- intrinsics::aarch64::float64x1x4_t
- intrinsics::aarch64::float64x2_t
- intrinsics::aarch64::float64x2x2_t
- intrinsics::aarch64::float64x2x3_t
- intrinsics::aarch64::float64x2x4_t
- intrinsics::aarch64::int16x4_t
- intrinsics::aarch64::int16x4x2_t
- intrinsics::aarch64::int16x4x3_t
- intrinsics::aarch64::int16x4x4_t
- intrinsics::aarch64::int16x8_t
- intrinsics::aarch64::int16x8x2_t
- intrinsics::aarch64::int16x8x3_t
- intrinsics::aarch64::int16x8x4_t
- intrinsics::aarch64::int32x2_t
- intrinsics::aarch64::int32x2x2_t
- intrinsics::aarch64::int32x2x3_t
- intrinsics::aarch64::int32x2x4_t
- intrinsics::aarch64::int32x4_t
- intrinsics::aarch64::int32x4x2_t
- intrinsics::aarch64::int32x4x3_t
- intrinsics::aarch64::int32x4x4_t
- intrinsics::aarch64::int64x1_t
- intrinsics::aarch64::int64x1x2_t
- intrinsics::aarch64::int64x1x3_t
- intrinsics::aarch64::int64x1x4_t
- intrinsics::aarch64::int64x2_t
- intrinsics::aarch64::int64x2x2_t
- intrinsics::aarch64::int64x2x3_t
- intrinsics::aarch64::int64x2x4_t
- intrinsics::aarch64::int8x16_t
- intrinsics::aarch64::int8x16x2_t
- intrinsics::aarch64::int8x16x3_t
- intrinsics::aarch64::int8x16x4_t
- intrinsics::aarch64::int8x8_t
- intrinsics::aarch64::int8x8x2_t
- intrinsics::aarch64::int8x8x3_t
- intrinsics::aarch64::int8x8x4_t
- intrinsics::aarch64::poly16x4_t
- intrinsics::aarch64::poly16x4x2_t
- intrinsics::aarch64::poly16x4x3_t
- intrinsics::aarch64::poly16x4x4_t
- intrinsics::aarch64::poly16x8_t
- intrinsics::aarch64::poly16x8x2_t
- intrinsics::aarch64::poly16x8x3_t
- intrinsics::aarch64::poly16x8x4_t
- intrinsics::aarch64::poly64x1_t
- intrinsics::aarch64::poly64x1x2_t
- intrinsics::aarch64::poly64x1x3_t
- intrinsics::aarch64::poly64x1x4_t
- intrinsics::aarch64::poly64x2_t
- intrinsics::aarch64::poly64x2x2_t
- intrinsics::aarch64::poly64x2x3_t
- intrinsics::aarch64::poly64x2x4_t
- intrinsics::aarch64::poly8x16_t
- intrinsics::aarch64::poly8x16x2_t
- intrinsics::aarch64::poly8x16x3_t
- intrinsics::aarch64::poly8x16x4_t
- intrinsics::aarch64::poly8x8_t
- intrinsics::aarch64::poly8x8x2_t
- intrinsics::aarch64::poly8x8x3_t
- intrinsics::aarch64::poly8x8x4_t
- intrinsics::aarch64::uint16x4_t
- intrinsics::aarch64::uint16x4x2_t
- intrinsics::aarch64::uint16x4x3_t
- intrinsics::aarch64::uint16x4x4_t
- intrinsics::aarch64::uint16x8_t
- intrinsics::aarch64::uint16x8x2_t
- intrinsics::aarch64::uint16x8x3_t
- intrinsics::aarch64::uint16x8x4_t
- intrinsics::aarch64::uint32x2_t
- intrinsics::aarch64::uint32x2x2_t
- intrinsics::aarch64::uint32x2x3_t
- intrinsics::aarch64::uint32x2x4_t
- intrinsics::aarch64::uint32x4_t
- intrinsics::aarch64::uint32x4x2_t
- intrinsics::aarch64::uint32x4x3_t
- intrinsics::aarch64::uint32x4x4_t
- intrinsics::aarch64::uint64x1_t
- intrinsics::aarch64::uint64x1x2_t
- intrinsics::aarch64::uint64x1x3_t
- intrinsics::aarch64::uint64x1x4_t
- intrinsics::aarch64::uint64x2_t
- intrinsics::aarch64::uint64x2x2_t
- intrinsics::aarch64::uint64x2x3_t
- intrinsics::aarch64::uint64x2x4_t
- intrinsics::aarch64::uint8x16_t
- intrinsics::aarch64::uint8x16x2_t
- intrinsics::aarch64::uint8x16x3_t
- intrinsics::aarch64::uint8x16x4_t
- intrinsics::aarch64::uint8x8_t
- intrinsics::aarch64::uint8x8x2_t
- intrinsics::aarch64::uint8x8x3_t
- intrinsics::aarch64::uint8x8x4_t
- prelude::ISH
- prelude::ISHLD
- prelude::ISHST
- prelude::LD
- prelude::NSH
- prelude::NSHLD
- prelude::NSHST
- prelude::OSH
- prelude::OSHLD
- prelude::OSHST
- prelude::ST
- prelude::SY
- prelude::float16x4_t
- prelude::float16x4x2_t
- prelude::float16x4x3_t
- prelude::float16x4x4_t
- prelude::float16x8_t
- prelude::float16x8x2_t
- prelude::float16x8x3_t
- prelude::float16x8x4_t
- prelude::float32x2_t
- prelude::float32x2x2_t
- prelude::float32x2x3_t
- prelude::float32x2x4_t
- prelude::float32x4_t
- prelude::float32x4x2_t
- prelude::float32x4x3_t
- prelude::float32x4x4_t
- prelude::float64x1_t
- prelude::float64x1x2_t
- prelude::float64x1x3_t
- prelude::float64x1x4_t
- prelude::float64x2_t
- prelude::float64x2x2_t
- prelude::float64x2x3_t
- prelude::float64x2x4_t
- prelude::int16x4_t
- prelude::int16x4x2_t
- prelude::int16x4x3_t
- prelude::int16x4x4_t
- prelude::int16x8_t
- prelude::int16x8x2_t
- prelude::int16x8x3_t
- prelude::int16x8x4_t
- prelude::int32x2_t
- prelude::int32x2x2_t
- prelude::int32x2x3_t
- prelude::int32x2x4_t
- prelude::int32x4_t
- prelude::int32x4x2_t
- prelude::int32x4x3_t
- prelude::int32x4x4_t
- prelude::int64x1_t
- prelude::int64x1x2_t
- prelude::int64x1x3_t
- prelude::int64x1x4_t
- prelude::int64x2_t
- prelude::int64x2x2_t
- prelude::int64x2x3_t
- prelude::int64x2x4_t
- prelude::int8x16_t
- prelude::int8x16x2_t
- prelude::int8x16x3_t
- prelude::int8x16x4_t
- prelude::int8x8_t
- prelude::int8x8x2_t
- prelude::int8x8x3_t
- prelude::int8x8x4_t
- prelude::poly16x4_t
- prelude::poly16x4x2_t
- prelude::poly16x4x3_t
- prelude::poly16x4x4_t
- prelude::poly16x8_t
- prelude::poly16x8x2_t
- prelude::poly16x8x3_t
- prelude::poly16x8x4_t
- prelude::poly64x1_t
- prelude::poly64x1x2_t
- prelude::poly64x1x3_t
- prelude::poly64x1x4_t
- prelude::poly64x2_t
- prelude::poly64x2x2_t
- prelude::poly64x2x3_t
- prelude::poly64x2x4_t
- prelude::poly8x16_t
- prelude::poly8x16x2_t
- prelude::poly8x16x3_t
- prelude::poly8x16x4_t
- prelude::poly8x8_t
- prelude::poly8x8x2_t
- prelude::poly8x8x3_t
- prelude::poly8x8x4_t
- prelude::uint16x4_t
- prelude::uint16x4x2_t
- prelude::uint16x4x3_t
- prelude::uint16x4x4_t
- prelude::uint16x8_t
- prelude::uint16x8x2_t
- prelude::uint16x8x3_t
- prelude::uint16x8x4_t
- prelude::uint32x2_t
- prelude::uint32x2x2_t
- prelude::uint32x2x3_t
- prelude::uint32x2x4_t
- prelude::uint32x4_t
- prelude::uint32x4x2_t
- prelude::uint32x4x3_t
- prelude::uint32x4x4_t
- prelude::uint64x1_t
- prelude::uint64x1x2_t
- prelude::uint64x1x3_t
- prelude::uint64x1x4_t
- prelude::uint64x2_t
- prelude::uint64x2x2_t
- prelude::uint64x2x3_t
- prelude::uint64x2x4_t
- prelude::uint8x16_t
- prelude::uint8x16x2_t
- prelude::uint8x16x3_t
- prelude::uint8x16x4_t
- prelude::uint8x8_t
- prelude::uint8x8x2_t
- prelude::uint8x8x3_t
- prelude::uint8x8x4_t
- testing::PermutationReport
- testing::TokenPermutation
- testing::TokenTestGuard
- tokens::Arm64V2Token
- tokens::Arm64V3Token
- tokens::Avx512Fp16Token
- tokens::CompileTimeGuaranteedError
- tokens::DisableAllSimdError
- tokens::NeonAesToken
- tokens::NeonCrcToken
- tokens::NeonSha3Token
- tokens::NeonToken
- tokens::ScalarToken
- tokens::Wasm128RelaxedToken
- tokens::Wasm128Token
- tokens::X64CryptoToken
- tokens::X64V1Token
- tokens::X64V2Token
- tokens::X64V3CryptoToken
- tokens::X64V3Token
- tokens::X64V4Token
- tokens::X64V4xToken
Enums
Traits
- tokens::Has128BitSimd
- tokens::Has256BitSimd
- tokens::Has512BitSimd
- tokens::HasArm64V2
- tokens::HasArm64V3
- tokens::HasNeon
- tokens::HasNeonAes
- tokens::HasNeonSha3
- tokens::HasX64V2
- tokens::HasX64V4
- tokens::IntoConcreteToken
- tokens::Sealed
- tokens::SimdToken
Macros
- dispatch_variant
- incant
- is_aarch64_feature_available
- is_x86_feature_available
- prelude::dispatch_variant
- prelude::incant
- prelude::simd_route
- simd_route
Attribute Macros
- arcane
- autoversion
- magetypes
- prelude::arcane
- prelude::autoversion
- prelude::magetypes
- prelude::rite
- prelude::token_target_features
- prelude::token_target_features_boundary
- rite
- token_target_features
- token_target_features_boundary
Functions
- detect::check_sve2_available
- detect::check_sve_available
- intrinsics::aarch64::__arm_mte_create_random_tag
- intrinsics::aarch64::__arm_mte_exclude_tag
- intrinsics::aarch64::__arm_mte_get_tag
- intrinsics::aarch64::__arm_mte_increment_tag
- intrinsics::aarch64::__arm_mte_ptrdiff
- intrinsics::aarch64::__arm_mte_set_tag
- intrinsics::aarch64::__crc32b
- intrinsics::aarch64::__crc32cb
- intrinsics::aarch64::__crc32cd
- intrinsics::aarch64::__crc32ch
- intrinsics::aarch64::__crc32cw
- intrinsics::aarch64::__crc32d
- intrinsics::aarch64::__crc32h
- intrinsics::aarch64::__crc32w
- intrinsics::aarch64::__dmb
- intrinsics::aarch64::__dsb
- intrinsics::aarch64::__isb
- intrinsics::aarch64::__jcvt
- intrinsics::aarch64::__nop
- intrinsics::aarch64::__rndr
- intrinsics::aarch64::__rndrrs
- intrinsics::aarch64::__sev
- intrinsics::aarch64::__sevl
- intrinsics::aarch64::__wfe
- intrinsics::aarch64::__wfi
- intrinsics::aarch64::__yield
- intrinsics::aarch64::_prefetch
- intrinsics::aarch64::vaba_s16
- intrinsics::aarch64::vaba_s32
- intrinsics::aarch64::vaba_s8
- intrinsics::aarch64::vaba_u16
- intrinsics::aarch64::vaba_u32
- intrinsics::aarch64::vaba_u8
- intrinsics::aarch64::vabal_high_s16
- intrinsics::aarch64::vabal_high_s32
- intrinsics::aarch64::vabal_high_s8
- intrinsics::aarch64::vabal_high_u16
- intrinsics::aarch64::vabal_high_u32
- intrinsics::aarch64::vabal_high_u8
- intrinsics::aarch64::vabal_s16
- intrinsics::aarch64::vabal_s32
- intrinsics::aarch64::vabal_s8
- intrinsics::aarch64::vabal_u16
- intrinsics::aarch64::vabal_u32
- intrinsics::aarch64::vabal_u8
- intrinsics::aarch64::vabaq_s16
- intrinsics::aarch64::vabaq_s32
- intrinsics::aarch64::vabaq_s8
- intrinsics::aarch64::vabaq_u16
- intrinsics::aarch64::vabaq_u32
- intrinsics::aarch64::vabaq_u8
- intrinsics::aarch64::vabd_f16
- intrinsics::aarch64::vabd_f32
- intrinsics::aarch64::vabd_f64
- intrinsics::aarch64::vabd_s16
- intrinsics::aarch64::vabd_s32
- intrinsics::aarch64::vabd_s8
- intrinsics::aarch64::vabd_u16
- intrinsics::aarch64::vabd_u32
- intrinsics::aarch64::vabd_u8
- intrinsics::aarch64::vabdd_f64
- intrinsics::aarch64::vabdh_f16
- intrinsics::aarch64::vabdl_high_s16
- intrinsics::aarch64::vabdl_high_s32
- intrinsics::aarch64::vabdl_high_s8
- intrinsics::aarch64::vabdl_high_u16
- intrinsics::aarch64::vabdl_high_u32
- intrinsics::aarch64::vabdl_high_u8
- intrinsics::aarch64::vabdl_s16
- intrinsics::aarch64::vabdl_s32
- intrinsics::aarch64::vabdl_s8
- intrinsics::aarch64::vabdl_u16
- intrinsics::aarch64::vabdl_u32
- intrinsics::aarch64::vabdl_u8
- intrinsics::aarch64::vabdq_f16
- intrinsics::aarch64::vabdq_f32
- intrinsics::aarch64::vabdq_f64
- intrinsics::aarch64::vabdq_s16
- intrinsics::aarch64::vabdq_s32
- intrinsics::aarch64::vabdq_s8
- intrinsics::aarch64::vabdq_u16
- intrinsics::aarch64::vabdq_u32
- intrinsics::aarch64::vabdq_u8
- intrinsics::aarch64::vabds_f32
- intrinsics::aarch64::vabs_f16
- intrinsics::aarch64::vabs_f32
- intrinsics::aarch64::vabs_f64
- intrinsics::aarch64::vabs_s16
- intrinsics::aarch64::vabs_s32
- intrinsics::aarch64::vabs_s64
- intrinsics::aarch64::vabs_s8
- intrinsics::aarch64::vabsd_s64
- intrinsics::aarch64::vabsh_f16
- intrinsics::aarch64::vabsq_f16
- intrinsics::aarch64::vabsq_f32
- intrinsics::aarch64::vabsq_f64
- intrinsics::aarch64::vabsq_s16
- intrinsics::aarch64::vabsq_s32
- intrinsics::aarch64::vabsq_s64
- intrinsics::aarch64::vabsq_s8
- intrinsics::aarch64::vadd_f16
- intrinsics::aarch64::vadd_f32
- intrinsics::aarch64::vadd_f64
- intrinsics::aarch64::vadd_p16
- intrinsics::aarch64::vadd_p64
- intrinsics::aarch64::vadd_p8
- intrinsics::aarch64::vadd_s16
- intrinsics::aarch64::vadd_s32
- intrinsics::aarch64::vadd_s64
- intrinsics::aarch64::vadd_s8
- intrinsics::aarch64::vadd_u16
- intrinsics::aarch64::vadd_u32
- intrinsics::aarch64::vadd_u64
- intrinsics::aarch64::vadd_u8
- intrinsics::aarch64::vaddd_s64
- intrinsics::aarch64::vaddd_u64
- intrinsics::aarch64::vaddh_f16
- intrinsics::aarch64::vaddhn_high_s16
- intrinsics::aarch64::vaddhn_high_s32
- intrinsics::aarch64::vaddhn_high_s64
- intrinsics::aarch64::vaddhn_high_u16
- intrinsics::aarch64::vaddhn_high_u32
- intrinsics::aarch64::vaddhn_high_u64
- intrinsics::aarch64::vaddhn_s16
- intrinsics::aarch64::vaddhn_s32
- intrinsics::aarch64::vaddhn_s64
- intrinsics::aarch64::vaddhn_u16
- intrinsics::aarch64::vaddhn_u32
- intrinsics::aarch64::vaddhn_u64
- intrinsics::aarch64::vaddl_high_s16
- intrinsics::aarch64::vaddl_high_s32
- intrinsics::aarch64::vaddl_high_s8
- intrinsics::aarch64::vaddl_high_u16
- intrinsics::aarch64::vaddl_high_u32
- intrinsics::aarch64::vaddl_high_u8
- intrinsics::aarch64::vaddl_s16
- intrinsics::aarch64::vaddl_s32
- intrinsics::aarch64::vaddl_s8
- intrinsics::aarch64::vaddl_u16
- intrinsics::aarch64::vaddl_u32
- intrinsics::aarch64::vaddl_u8
- intrinsics::aarch64::vaddlv_s16
- intrinsics::aarch64::vaddlv_s32
- intrinsics::aarch64::vaddlv_s8
- intrinsics::aarch64::vaddlv_u16
- intrinsics::aarch64::vaddlv_u32
- intrinsics::aarch64::vaddlv_u8
- intrinsics::aarch64::vaddlvq_s16
- intrinsics::aarch64::vaddlvq_s32
- intrinsics::aarch64::vaddlvq_s8
- intrinsics::aarch64::vaddlvq_u16
- intrinsics::aarch64::vaddlvq_u32
- intrinsics::aarch64::vaddlvq_u8
- intrinsics::aarch64::vaddq_f16
- intrinsics::aarch64::vaddq_f32
- intrinsics::aarch64::vaddq_f64
- intrinsics::aarch64::vaddq_p128
- intrinsics::aarch64::vaddq_p16
- intrinsics::aarch64::vaddq_p64
- intrinsics::aarch64::vaddq_p8
- intrinsics::aarch64::vaddq_s16
- intrinsics::aarch64::vaddq_s32
- intrinsics::aarch64::vaddq_s64
- intrinsics::aarch64::vaddq_s8
- intrinsics::aarch64::vaddq_u16
- intrinsics::aarch64::vaddq_u32
- intrinsics::aarch64::vaddq_u64
- intrinsics::aarch64::vaddq_u8
- intrinsics::aarch64::vaddv_f32
- intrinsics::aarch64::vaddv_s16
- intrinsics::aarch64::vaddv_s32
- intrinsics::aarch64::vaddv_s8
- intrinsics::aarch64::vaddv_u16
- intrinsics::aarch64::vaddv_u32
- intrinsics::aarch64::vaddv_u8
- intrinsics::aarch64::vaddvq_f32
- intrinsics::aarch64::vaddvq_f64
- intrinsics::aarch64::vaddvq_s16
- intrinsics::aarch64::vaddvq_s32
- intrinsics::aarch64::vaddvq_s64
- intrinsics::aarch64::vaddvq_s8
- intrinsics::aarch64::vaddvq_u16
- intrinsics::aarch64::vaddvq_u32
- intrinsics::aarch64::vaddvq_u64
- intrinsics::aarch64::vaddvq_u8
- intrinsics::aarch64::vaddw_high_s16
- intrinsics::aarch64::vaddw_high_s32
- intrinsics::aarch64::vaddw_high_s8
- intrinsics::aarch64::vaddw_high_u16
- intrinsics::aarch64::vaddw_high_u32
- intrinsics::aarch64::vaddw_high_u8
- intrinsics::aarch64::vaddw_s16
- intrinsics::aarch64::vaddw_s32
- intrinsics::aarch64::vaddw_s8
- intrinsics::aarch64::vaddw_u16
- intrinsics::aarch64::vaddw_u32
- intrinsics::aarch64::vaddw_u8
- intrinsics::aarch64::vaesdq_u8
- intrinsics::aarch64::vaeseq_u8
- intrinsics::aarch64::vaesimcq_u8
- intrinsics::aarch64::vaesmcq_u8
- intrinsics::aarch64::vamax_f16
- intrinsics::aarch64::vamax_f32
- intrinsics::aarch64::vamaxq_f16
- intrinsics::aarch64::vamaxq_f32
- intrinsics::aarch64::vamaxq_f64
- intrinsics::aarch64::vamin_f16
- intrinsics::aarch64::vamin_f32
- intrinsics::aarch64::vaminq_f16
- intrinsics::aarch64::vaminq_f32
- intrinsics::aarch64::vaminq_f64
- intrinsics::aarch64::vand_s16
- intrinsics::aarch64::vand_s32
- intrinsics::aarch64::vand_s64
- intrinsics::aarch64::vand_s8
- intrinsics::aarch64::vand_u16
- intrinsics::aarch64::vand_u32
- intrinsics::aarch64::vand_u64
- intrinsics::aarch64::vand_u8
- intrinsics::aarch64::vandq_s16
- intrinsics::aarch64::vandq_s32
- intrinsics::aarch64::vandq_s64
- intrinsics::aarch64::vandq_s8
- intrinsics::aarch64::vandq_u16
- intrinsics::aarch64::vandq_u32
- intrinsics::aarch64::vandq_u64
- intrinsics::aarch64::vandq_u8
- intrinsics::aarch64::vbcaxq_s16
- intrinsics::aarch64::vbcaxq_s32
- intrinsics::aarch64::vbcaxq_s64
- intrinsics::aarch64::vbcaxq_s8
- intrinsics::aarch64::vbcaxq_u16
- intrinsics::aarch64::vbcaxq_u32
- intrinsics::aarch64::vbcaxq_u64
- intrinsics::aarch64::vbcaxq_u8
- intrinsics::aarch64::vbic_s16
- intrinsics::aarch64::vbic_s32
- intrinsics::aarch64::vbic_s64
- intrinsics::aarch64::vbic_s8
- intrinsics::aarch64::vbic_u16
- intrinsics::aarch64::vbic_u32
- intrinsics::aarch64::vbic_u64
- intrinsics::aarch64::vbic_u8
- intrinsics::aarch64::vbicq_s16
- intrinsics::aarch64::vbicq_s32
- intrinsics::aarch64::vbicq_s64
- intrinsics::aarch64::vbicq_s8
- intrinsics::aarch64::vbicq_u16
- intrinsics::aarch64::vbicq_u32
- intrinsics::aarch64::vbicq_u64
- intrinsics::aarch64::vbicq_u8
- intrinsics::aarch64::vbsl_f16
- intrinsics::aarch64::vbsl_f32
- intrinsics::aarch64::vbsl_f64
- intrinsics::aarch64::vbsl_p16
- intrinsics::aarch64::vbsl_p64
- intrinsics::aarch64::vbsl_p8
- intrinsics::aarch64::vbsl_s16
- intrinsics::aarch64::vbsl_s32
- intrinsics::aarch64::vbsl_s64
- intrinsics::aarch64::vbsl_s8
- intrinsics::aarch64::vbsl_u16
- intrinsics::aarch64::vbsl_u32
- intrinsics::aarch64::vbsl_u64
- intrinsics::aarch64::vbsl_u8
- intrinsics::aarch64::vbslq_f16
- intrinsics::aarch64::vbslq_f32
- intrinsics::aarch64::vbslq_f64
- intrinsics::aarch64::vbslq_p16
- intrinsics::aarch64::vbslq_p64
- intrinsics::aarch64::vbslq_p8
- intrinsics::aarch64::vbslq_s16
- intrinsics::aarch64::vbslq_s32
- intrinsics::aarch64::vbslq_s64
- intrinsics::aarch64::vbslq_s8
- intrinsics::aarch64::vbslq_u16
- intrinsics::aarch64::vbslq_u32
- intrinsics::aarch64::vbslq_u64
- intrinsics::aarch64::vbslq_u8
- intrinsics::aarch64::vcadd_rot270_f16
- intrinsics::aarch64::vcadd_rot270_f32
- intrinsics::aarch64::vcadd_rot90_f16
- intrinsics::aarch64::vcadd_rot90_f32
- intrinsics::aarch64::vcaddq_rot270_f16
- intrinsics::aarch64::vcaddq_rot270_f32
- intrinsics::aarch64::vcaddq_rot270_f64
- intrinsics::aarch64::vcaddq_rot90_f16
- intrinsics::aarch64::vcaddq_rot90_f32
- intrinsics::aarch64::vcaddq_rot90_f64
- intrinsics::aarch64::vcage_f16
- intrinsics::aarch64::vcage_f32
- intrinsics::aarch64::vcage_f64
- intrinsics::aarch64::vcaged_f64
- intrinsics::aarch64::vcageh_f16
- intrinsics::aarch64::vcageq_f16
- intrinsics::aarch64::vcageq_f32
- intrinsics::aarch64::vcageq_f64
- intrinsics::aarch64::vcages_f32
- intrinsics::aarch64::vcagt_f16
- intrinsics::aarch64::vcagt_f32
- intrinsics::aarch64::vcagt_f64
- intrinsics::aarch64::vcagtd_f64
- intrinsics::aarch64::vcagth_f16
- intrinsics::aarch64::vcagtq_f16
- intrinsics::aarch64::vcagtq_f32
- intrinsics::aarch64::vcagtq_f64
- intrinsics::aarch64::vcagts_f32
- intrinsics::aarch64::vcale_f16
- intrinsics::aarch64::vcale_f32
- intrinsics::aarch64::vcale_f64
- intrinsics::aarch64::vcaled_f64
- intrinsics::aarch64::vcaleh_f16
- intrinsics::aarch64::vcaleq_f16
- intrinsics::aarch64::vcaleq_f32
- intrinsics::aarch64::vcaleq_f64
- intrinsics::aarch64::vcales_f32
- intrinsics::aarch64::vcalt_f16
- intrinsics::aarch64::vcalt_f32
- intrinsics::aarch64::vcalt_f64
- intrinsics::aarch64::vcaltd_f64
- intrinsics::aarch64::vcalth_f16
- intrinsics::aarch64::vcaltq_f16
- intrinsics::aarch64::vcaltq_f32
- intrinsics::aarch64::vcaltq_f64
- intrinsics::aarch64::vcalts_f32
- intrinsics::aarch64::vceq_f16
- intrinsics::aarch64::vceq_f32
- intrinsics::aarch64::vceq_f64
- intrinsics::aarch64::vceq_p64
- intrinsics::aarch64::vceq_p8
- intrinsics::aarch64::vceq_s16
- intrinsics::aarch64::vceq_s32
- intrinsics::aarch64::vceq_s64
- intrinsics::aarch64::vceq_s8
- intrinsics::aarch64::vceq_u16
- intrinsics::aarch64::vceq_u32
- intrinsics::aarch64::vceq_u64
- intrinsics::aarch64::vceq_u8
- intrinsics::aarch64::vceqd_f64
- intrinsics::aarch64::vceqd_s64
- intrinsics::aarch64::vceqd_u64
- intrinsics::aarch64::vceqh_f16
- intrinsics::aarch64::vceqq_f16
- intrinsics::aarch64::vceqq_f32
- intrinsics::aarch64::vceqq_f64
- intrinsics::aarch64::vceqq_p64
- intrinsics::aarch64::vceqq_p8
- intrinsics::aarch64::vceqq_s16
- intrinsics::aarch64::vceqq_s32
- intrinsics::aarch64::vceqq_s64
- intrinsics::aarch64::vceqq_s8
- intrinsics::aarch64::vceqq_u16
- intrinsics::aarch64::vceqq_u32
- intrinsics::aarch64::vceqq_u64
- intrinsics::aarch64::vceqq_u8
- intrinsics::aarch64::vceqs_f32
- intrinsics::aarch64::vceqz_f16
- intrinsics::aarch64::vceqz_f32
- intrinsics::aarch64::vceqz_f64
- intrinsics::aarch64::vceqz_p64
- intrinsics::aarch64::vceqz_p8
- intrinsics::aarch64::vceqz_s16
- intrinsics::aarch64::vceqz_s32
- intrinsics::aarch64::vceqz_s64
- intrinsics::aarch64::vceqz_s8
- intrinsics::aarch64::vceqz_u16
- intrinsics::aarch64::vceqz_u32
- intrinsics::aarch64::vceqz_u64
- intrinsics::aarch64::vceqz_u8
- intrinsics::aarch64::vceqzd_f64
- intrinsics::aarch64::vceqzd_s64
- intrinsics::aarch64::vceqzd_u64
- intrinsics::aarch64::vceqzh_f16
- intrinsics::aarch64::vceqzq_f16
- intrinsics::aarch64::vceqzq_f32
- intrinsics::aarch64::vceqzq_f64
- intrinsics::aarch64::vceqzq_p64
- intrinsics::aarch64::vceqzq_p8
- intrinsics::aarch64::vceqzq_s16
- intrinsics::aarch64::vceqzq_s32
- intrinsics::aarch64::vceqzq_s64
- intrinsics::aarch64::vceqzq_s8
- intrinsics::aarch64::vceqzq_u16
- intrinsics::aarch64::vceqzq_u32
- intrinsics::aarch64::vceqzq_u64
- intrinsics::aarch64::vceqzq_u8
- intrinsics::aarch64::vceqzs_f32
- intrinsics::aarch64::vcge_f16
- intrinsics::aarch64::vcge_f32
- intrinsics::aarch64::vcge_f64
- intrinsics::aarch64::vcge_s16
- intrinsics::aarch64::vcge_s32
- intrinsics::aarch64::vcge_s64
- intrinsics::aarch64::vcge_s8
- intrinsics::aarch64::vcge_u16
- intrinsics::aarch64::vcge_u32
- intrinsics::aarch64::vcge_u64
- intrinsics::aarch64::vcge_u8
- intrinsics::aarch64::vcged_f64
- intrinsics::aarch64::vcged_s64
- intrinsics::aarch64::vcged_u64
- intrinsics::aarch64::vcgeh_f16
- intrinsics::aarch64::vcgeq_f16
- intrinsics::aarch64::vcgeq_f32
- intrinsics::aarch64::vcgeq_f64
- intrinsics::aarch64::vcgeq_s16
- intrinsics::aarch64::vcgeq_s32
- intrinsics::aarch64::vcgeq_s64
- intrinsics::aarch64::vcgeq_s8
- intrinsics::aarch64::vcgeq_u16
- intrinsics::aarch64::vcgeq_u32
- intrinsics::aarch64::vcgeq_u64
- intrinsics::aarch64::vcgeq_u8
- intrinsics::aarch64::vcges_f32
- intrinsics::aarch64::vcgez_f16
- intrinsics::aarch64::vcgez_f32
- intrinsics::aarch64::vcgez_f64
- intrinsics::aarch64::vcgez_s16
- intrinsics::aarch64::vcgez_s32
- intrinsics::aarch64::vcgez_s64
- intrinsics::aarch64::vcgez_s8
- intrinsics::aarch64::vcgezd_f64
- intrinsics::aarch64::vcgezd_s64
- intrinsics::aarch64::vcgezh_f16
- intrinsics::aarch64::vcgezq_f16
- intrinsics::aarch64::vcgezq_f32
- intrinsics::aarch64::vcgezq_f64
- intrinsics::aarch64::vcgezq_s16
- intrinsics::aarch64::vcgezq_s32
- intrinsics::aarch64::vcgezq_s64
- intrinsics::aarch64::vcgezq_s8
- intrinsics::aarch64::vcgezs_f32
- intrinsics::aarch64::vcgt_f16
- intrinsics::aarch64::vcgt_f32
- intrinsics::aarch64::vcgt_f64
- intrinsics::aarch64::vcgt_s16
- intrinsics::aarch64::vcgt_s32
- intrinsics::aarch64::vcgt_s64
- intrinsics::aarch64::vcgt_s8
- intrinsics::aarch64::vcgt_u16
- intrinsics::aarch64::vcgt_u32
- intrinsics::aarch64::vcgt_u64
- intrinsics::aarch64::vcgt_u8
- intrinsics::aarch64::vcgtd_f64
- intrinsics::aarch64::vcgtd_s64
- intrinsics::aarch64::vcgtd_u64
- intrinsics::aarch64::vcgth_f16
- intrinsics::aarch64::vcgtq_f16
- intrinsics::aarch64::vcgtq_f32
- intrinsics::aarch64::vcgtq_f64
- intrinsics::aarch64::vcgtq_s16
- intrinsics::aarch64::vcgtq_s32
- intrinsics::aarch64::vcgtq_s64
- intrinsics::aarch64::vcgtq_s8
- intrinsics::aarch64::vcgtq_u16
- intrinsics::aarch64::vcgtq_u32
- intrinsics::aarch64::vcgtq_u64
- intrinsics::aarch64::vcgtq_u8
- intrinsics::aarch64::vcgts_f32
- intrinsics::aarch64::vcgtz_f16
- intrinsics::aarch64::vcgtz_f32
- intrinsics::aarch64::vcgtz_f64
- intrinsics::aarch64::vcgtz_s16
- intrinsics::aarch64::vcgtz_s32
- intrinsics::aarch64::vcgtz_s64
- intrinsics::aarch64::vcgtz_s8
- intrinsics::aarch64::vcgtzd_f64
- intrinsics::aarch64::vcgtzd_s64
- intrinsics::aarch64::vcgtzh_f16
- intrinsics::aarch64::vcgtzq_f16
- intrinsics::aarch64::vcgtzq_f32
- intrinsics::aarch64::vcgtzq_f64
- intrinsics::aarch64::vcgtzq_s16
- intrinsics::aarch64::vcgtzq_s32
- intrinsics::aarch64::vcgtzq_s64
- intrinsics::aarch64::vcgtzq_s8
- intrinsics::aarch64::vcgtzs_f32
- intrinsics::aarch64::vcle_f16
- intrinsics::aarch64::vcle_f32
- intrinsics::aarch64::vcle_f64
- intrinsics::aarch64::vcle_s16
- intrinsics::aarch64::vcle_s32
- intrinsics::aarch64::vcle_s64
- intrinsics::aarch64::vcle_s8
- intrinsics::aarch64::vcle_u16
- intrinsics::aarch64::vcle_u32
- intrinsics::aarch64::vcle_u64
- intrinsics::aarch64::vcle_u8
- intrinsics::aarch64::vcled_f64
- intrinsics::aarch64::vcled_s64
- intrinsics::aarch64::vcled_u64
- intrinsics::aarch64::vcleh_f16
- intrinsics::aarch64::vcleq_f16
- intrinsics::aarch64::vcleq_f32
- intrinsics::aarch64::vcleq_f64
- intrinsics::aarch64::vcleq_s16
- intrinsics::aarch64::vcleq_s32
- intrinsics::aarch64::vcleq_s64
- intrinsics::aarch64::vcleq_s8
- intrinsics::aarch64::vcleq_u16
- intrinsics::aarch64::vcleq_u32
- intrinsics::aarch64::vcleq_u64
- intrinsics::aarch64::vcleq_u8
- intrinsics::aarch64::vcles_f32
- intrinsics::aarch64::vclez_f16
- intrinsics::aarch64::vclez_f32
- intrinsics::aarch64::vclez_f64
- intrinsics::aarch64::vclez_s16
- intrinsics::aarch64::vclez_s32
- intrinsics::aarch64::vclez_s64
- intrinsics::aarch64::vclez_s8
- intrinsics::aarch64::vclezd_f64
- intrinsics::aarch64::vclezd_s64
- intrinsics::aarch64::vclezh_f16
- intrinsics::aarch64::vclezq_f16
- intrinsics::aarch64::vclezq_f32
- intrinsics::aarch64::vclezq_f64
- intrinsics::aarch64::vclezq_s16
- intrinsics::aarch64::vclezq_s32
- intrinsics::aarch64::vclezq_s64
- intrinsics::aarch64::vclezq_s8
- intrinsics::aarch64::vclezs_f32
- intrinsics::aarch64::vcls_s16
- intrinsics::aarch64::vcls_s32
- intrinsics::aarch64::vcls_s8
- intrinsics::aarch64::vcls_u16
- intrinsics::aarch64::vcls_u32
- intrinsics::aarch64::vcls_u8
- intrinsics::aarch64::vclsq_s16
- intrinsics::aarch64::vclsq_s32
- intrinsics::aarch64::vclsq_s8
- intrinsics::aarch64::vclsq_u16
- intrinsics::aarch64::vclsq_u32
- intrinsics::aarch64::vclsq_u8
- intrinsics::aarch64::vclt_f16
- intrinsics::aarch64::vclt_f32
- intrinsics::aarch64::vclt_f64
- intrinsics::aarch64::vclt_s16
- intrinsics::aarch64::vclt_s32
- intrinsics::aarch64::vclt_s64
- intrinsics::aarch64::vclt_s8
- intrinsics::aarch64::vclt_u16
- intrinsics::aarch64::vclt_u32
- intrinsics::aarch64::vclt_u64
- intrinsics::aarch64::vclt_u8
- intrinsics::aarch64::vcltd_f64
- intrinsics::aarch64::vcltd_s64
- intrinsics::aarch64::vcltd_u64
- intrinsics::aarch64::vclth_f16
- intrinsics::aarch64::vcltq_f16
- intrinsics::aarch64::vcltq_f32
- intrinsics::aarch64::vcltq_f64
- intrinsics::aarch64::vcltq_s16
- intrinsics::aarch64::vcltq_s32
- intrinsics::aarch64::vcltq_s64
- intrinsics::aarch64::vcltq_s8
- intrinsics::aarch64::vcltq_u16
- intrinsics::aarch64::vcltq_u32
- intrinsics::aarch64::vcltq_u64
- intrinsics::aarch64::vcltq_u8
- intrinsics::aarch64::vclts_f32
- intrinsics::aarch64::vcltz_f16
- intrinsics::aarch64::vcltz_f32
- intrinsics::aarch64::vcltz_f64
- intrinsics::aarch64::vcltz_s16
- intrinsics::aarch64::vcltz_s32
- intrinsics::aarch64::vcltz_s64
- intrinsics::aarch64::vcltz_s8
- intrinsics::aarch64::vcltzd_f64
- intrinsics::aarch64::vcltzd_s64
- intrinsics::aarch64::vcltzh_f16
- intrinsics::aarch64::vcltzq_f16
- intrinsics::aarch64::vcltzq_f32
- intrinsics::aarch64::vcltzq_f64
- intrinsics::aarch64::vcltzq_s16
- intrinsics::aarch64::vcltzq_s32
- intrinsics::aarch64::vcltzq_s64
- intrinsics::aarch64::vcltzq_s8
- intrinsics::aarch64::vcltzs_f32
- intrinsics::aarch64::vclz_s16
- intrinsics::aarch64::vclz_s32
- intrinsics::aarch64::vclz_s8
- intrinsics::aarch64::vclz_u16
- intrinsics::aarch64::vclz_u32
- intrinsics::aarch64::vclz_u8
- intrinsics::aarch64::vclzq_s16
- intrinsics::aarch64::vclzq_s32
- intrinsics::aarch64::vclzq_s8
- intrinsics::aarch64::vclzq_u16
- intrinsics::aarch64::vclzq_u32
- intrinsics::aarch64::vclzq_u8
- intrinsics::aarch64::vcmla_f16
- intrinsics::aarch64::vcmla_f32
- intrinsics::aarch64::vcmla_lane_f16
- intrinsics::aarch64::vcmla_lane_f32
- intrinsics::aarch64::vcmla_laneq_f16
- intrinsics::aarch64::vcmla_laneq_f32
- intrinsics::aarch64::vcmla_rot180_f16
- intrinsics::aarch64::vcmla_rot180_f32
- intrinsics::aarch64::vcmla_rot180_lane_f16
- intrinsics::aarch64::vcmla_rot180_lane_f32
- intrinsics::aarch64::vcmla_rot180_laneq_f16
- intrinsics::aarch64::vcmla_rot180_laneq_f32
- intrinsics::aarch64::vcmla_rot270_f16
- intrinsics::aarch64::vcmla_rot270_f32
- intrinsics::aarch64::vcmla_rot270_lane_f16
- intrinsics::aarch64::vcmla_rot270_lane_f32
- intrinsics::aarch64::vcmla_rot270_laneq_f16
- intrinsics::aarch64::vcmla_rot270_laneq_f32
- intrinsics::aarch64::vcmla_rot90_f16
- intrinsics::aarch64::vcmla_rot90_f32
- intrinsics::aarch64::vcmla_rot90_lane_f16
- intrinsics::aarch64::vcmla_rot90_lane_f32
- intrinsics::aarch64::vcmla_rot90_laneq_f16
- intrinsics::aarch64::vcmla_rot90_laneq_f32
- intrinsics::aarch64::vcmlaq_f16
- intrinsics::aarch64::vcmlaq_f32
- intrinsics::aarch64::vcmlaq_f64
- intrinsics::aarch64::vcmlaq_lane_f16
- intrinsics::aarch64::vcmlaq_lane_f32
- intrinsics::aarch64::vcmlaq_laneq_f16
- intrinsics::aarch64::vcmlaq_laneq_f32
- intrinsics::aarch64::vcmlaq_rot180_f16
- intrinsics::aarch64::vcmlaq_rot180_f32
- intrinsics::aarch64::vcmlaq_rot180_f64
- intrinsics::aarch64::vcmlaq_rot180_lane_f16
- intrinsics::aarch64::vcmlaq_rot180_lane_f32
- intrinsics::aarch64::vcmlaq_rot180_laneq_f16
- intrinsics::aarch64::vcmlaq_rot180_laneq_f32
- intrinsics::aarch64::vcmlaq_rot270_f16
- intrinsics::aarch64::vcmlaq_rot270_f32
- intrinsics::aarch64::vcmlaq_rot270_f64
- intrinsics::aarch64::vcmlaq_rot270_lane_f16
- intrinsics::aarch64::vcmlaq_rot270_lane_f32
- intrinsics::aarch64::vcmlaq_rot270_laneq_f16
- intrinsics::aarch64::vcmlaq_rot270_laneq_f32
- intrinsics::aarch64::vcmlaq_rot90_f16
- intrinsics::aarch64::vcmlaq_rot90_f32
- intrinsics::aarch64::vcmlaq_rot90_f64
- intrinsics::aarch64::vcmlaq_rot90_lane_f16
- intrinsics::aarch64::vcmlaq_rot90_lane_f32
- intrinsics::aarch64::vcmlaq_rot90_laneq_f16
- intrinsics::aarch64::vcmlaq_rot90_laneq_f32
- intrinsics::aarch64::vcnt_p8
- intrinsics::aarch64::vcnt_s8
- intrinsics::aarch64::vcnt_u8
- intrinsics::aarch64::vcntq_p8
- intrinsics::aarch64::vcntq_s8
- intrinsics::aarch64::vcntq_u8
- intrinsics::aarch64::vcombine_f16
- intrinsics::aarch64::vcombine_f32
- intrinsics::aarch64::vcombine_f64
- intrinsics::aarch64::vcombine_p16
- intrinsics::aarch64::vcombine_p64
- intrinsics::aarch64::vcombine_p8
- intrinsics::aarch64::vcombine_s16
- intrinsics::aarch64::vcombine_s32
- intrinsics::aarch64::vcombine_s64
- intrinsics::aarch64::vcombine_s8
- intrinsics::aarch64::vcombine_u16
- intrinsics::aarch64::vcombine_u32
- intrinsics::aarch64::vcombine_u64
- intrinsics::aarch64::vcombine_u8
- intrinsics::aarch64::vcopy_lane_f32
- intrinsics::aarch64::vcopy_lane_f64
- intrinsics::aarch64::vcopy_lane_p16
- intrinsics::aarch64::vcopy_lane_p64
- intrinsics::aarch64::vcopy_lane_p8
- intrinsics::aarch64::vcopy_lane_s16
- intrinsics::aarch64::vcopy_lane_s32
- intrinsics::aarch64::vcopy_lane_s64
- intrinsics::aarch64::vcopy_lane_s8
- intrinsics::aarch64::vcopy_lane_u16
- intrinsics::aarch64::vcopy_lane_u32
- intrinsics::aarch64::vcopy_lane_u64
- intrinsics::aarch64::vcopy_lane_u8
- intrinsics::aarch64::vcopy_laneq_f32
- intrinsics::aarch64::vcopy_laneq_f64
- intrinsics::aarch64::vcopy_laneq_p16
- intrinsics::aarch64::vcopy_laneq_p64
- intrinsics::aarch64::vcopy_laneq_p8
- intrinsics::aarch64::vcopy_laneq_s16
- intrinsics::aarch64::vcopy_laneq_s32
- intrinsics::aarch64::vcopy_laneq_s64
- intrinsics::aarch64::vcopy_laneq_s8
- intrinsics::aarch64::vcopy_laneq_u16
- intrinsics::aarch64::vcopy_laneq_u32
- intrinsics::aarch64::vcopy_laneq_u64
- intrinsics::aarch64::vcopy_laneq_u8
- intrinsics::aarch64::vcopyq_lane_f32
- intrinsics::aarch64::vcopyq_lane_f64
- intrinsics::aarch64::vcopyq_lane_p16
- intrinsics::aarch64::vcopyq_lane_p64
- intrinsics::aarch64::vcopyq_lane_p8
- intrinsics::aarch64::vcopyq_lane_s16
- intrinsics::aarch64::vcopyq_lane_s32
- intrinsics::aarch64::vcopyq_lane_s64
- intrinsics::aarch64::vcopyq_lane_s8
- intrinsics::aarch64::vcopyq_lane_u16
- intrinsics::aarch64::vcopyq_lane_u32
- intrinsics::aarch64::vcopyq_lane_u64
- intrinsics::aarch64::vcopyq_lane_u8
- intrinsics::aarch64::vcopyq_laneq_f32
- intrinsics::aarch64::vcopyq_laneq_f64
- intrinsics::aarch64::vcopyq_laneq_p16
- intrinsics::aarch64::vcopyq_laneq_p64
- intrinsics::aarch64::vcopyq_laneq_p8
- intrinsics::aarch64::vcopyq_laneq_s16
- intrinsics::aarch64::vcopyq_laneq_s32
- intrinsics::aarch64::vcopyq_laneq_s64
- intrinsics::aarch64::vcopyq_laneq_s8
- intrinsics::aarch64::vcopyq_laneq_u16
- intrinsics::aarch64::vcopyq_laneq_u32
- intrinsics::aarch64::vcopyq_laneq_u64
- intrinsics::aarch64::vcopyq_laneq_u8
- intrinsics::aarch64::vcreate_f16
- intrinsics::aarch64::vcreate_f32
- intrinsics::aarch64::vcreate_f64
- intrinsics::aarch64::vcreate_p16
- intrinsics::aarch64::vcreate_p64
- intrinsics::aarch64::vcreate_p8
- intrinsics::aarch64::vcreate_s16
- intrinsics::aarch64::vcreate_s32
- intrinsics::aarch64::vcreate_s64
- intrinsics::aarch64::vcreate_s8
- intrinsics::aarch64::vcreate_u16
- intrinsics::aarch64::vcreate_u32
- intrinsics::aarch64::vcreate_u64
- intrinsics::aarch64::vcreate_u8
- intrinsics::aarch64::vcvt_f16_f32
- intrinsics::aarch64::vcvt_f16_s16
- intrinsics::aarch64::vcvt_f16_u16
- intrinsics::aarch64::vcvt_f32_f16
- intrinsics::aarch64::vcvt_f32_f64
- intrinsics::aarch64::vcvt_f32_s32
- intrinsics::aarch64::vcvt_f32_u32
- intrinsics::aarch64::vcvt_f64_f32
- intrinsics::aarch64::vcvt_f64_s64
- intrinsics::aarch64::vcvt_f64_u64
- intrinsics::aarch64::vcvt_high_f16_f32
- intrinsics::aarch64::vcvt_high_f32_f16
- intrinsics::aarch64::vcvt_high_f32_f64
- intrinsics::aarch64::vcvt_high_f64_f32
- intrinsics::aarch64::vcvt_n_f16_s16
- intrinsics::aarch64::vcvt_n_f16_u16
- intrinsics::aarch64::vcvt_n_f32_s32
- intrinsics::aarch64::vcvt_n_f32_u32
- intrinsics::aarch64::vcvt_n_f64_s64
- intrinsics::aarch64::vcvt_n_f64_u64
- intrinsics::aarch64::vcvt_n_s16_f16
- intrinsics::aarch64::vcvt_n_s32_f32
- intrinsics::aarch64::vcvt_n_s64_f64
- intrinsics::aarch64::vcvt_n_u16_f16
- intrinsics::aarch64::vcvt_n_u32_f32
- intrinsics::aarch64::vcvt_n_u64_f64
- intrinsics::aarch64::vcvt_s16_f16
- intrinsics::aarch64::vcvt_s32_f32
- intrinsics::aarch64::vcvt_s64_f64
- intrinsics::aarch64::vcvt_u16_f16
- intrinsics::aarch64::vcvt_u32_f32
- intrinsics::aarch64::vcvt_u64_f64
- intrinsics::aarch64::vcvta_s16_f16
- intrinsics::aarch64::vcvta_s32_f32
- intrinsics::aarch64::vcvta_s64_f64
- intrinsics::aarch64::vcvta_u16_f16
- intrinsics::aarch64::vcvta_u32_f32
- intrinsics::aarch64::vcvta_u64_f64
- intrinsics::aarch64::vcvtad_s64_f64
- intrinsics::aarch64::vcvtad_u64_f64
- intrinsics::aarch64::vcvtah_s16_f16
- intrinsics::aarch64::vcvtah_s32_f16
- intrinsics::aarch64::vcvtah_s64_f16
- intrinsics::aarch64::vcvtah_u16_f16
- intrinsics::aarch64::vcvtah_u32_f16
- intrinsics::aarch64::vcvtah_u64_f16
- intrinsics::aarch64::vcvtaq_s16_f16
- intrinsics::aarch64::vcvtaq_s32_f32
- intrinsics::aarch64::vcvtaq_s64_f64
- intrinsics::aarch64::vcvtaq_u16_f16
- intrinsics::aarch64::vcvtaq_u32_f32
- intrinsics::aarch64::vcvtaq_u64_f64
- intrinsics::aarch64::vcvtas_s32_f32
- intrinsics::aarch64::vcvtas_u32_f32
- intrinsics::aarch64::vcvtd_f64_s64
- intrinsics::aarch64::vcvtd_f64_u64
- intrinsics::aarch64::vcvtd_n_f64_s64
- intrinsics::aarch64::vcvtd_n_f64_u64
- intrinsics::aarch64::vcvtd_n_s64_f64
- intrinsics::aarch64::vcvtd_n_u64_f64
- intrinsics::aarch64::vcvtd_s64_f64
- intrinsics::aarch64::vcvtd_u64_f64
- intrinsics::aarch64::vcvth_f16_s16
- intrinsics::aarch64::vcvth_f16_s32
- intrinsics::aarch64::vcvth_f16_s64
- intrinsics::aarch64::vcvth_f16_u16
- intrinsics::aarch64::vcvth_f16_u32
- intrinsics::aarch64::vcvth_f16_u64
- intrinsics::aarch64::vcvth_n_f16_s16
- intrinsics::aarch64::vcvth_n_f16_s32
- intrinsics::aarch64::vcvth_n_f16_s64
- intrinsics::aarch64::vcvth_n_f16_u16
- intrinsics::aarch64::vcvth_n_f16_u32
- intrinsics::aarch64::vcvth_n_f16_u64
- intrinsics::aarch64::vcvth_n_s16_f16
- intrinsics::aarch64::vcvth_n_s32_f16
- intrinsics::aarch64::vcvth_n_s64_f16
- intrinsics::aarch64::vcvth_n_u16_f16
- intrinsics::aarch64::vcvth_n_u32_f16
- intrinsics::aarch64::vcvth_n_u64_f16
- intrinsics::aarch64::vcvth_s16_f16
- intrinsics::aarch64::vcvth_s32_f16
- intrinsics::aarch64::vcvth_s64_f16
- intrinsics::aarch64::vcvth_u16_f16
- intrinsics::aarch64::vcvth_u32_f16
- intrinsics::aarch64::vcvth_u64_f16
- intrinsics::aarch64::vcvtm_s16_f16
- intrinsics::aarch64::vcvtm_s32_f32
- intrinsics::aarch64::vcvtm_s64_f64
- intrinsics::aarch64::vcvtm_u16_f16
- intrinsics::aarch64::vcvtm_u32_f32
- intrinsics::aarch64::vcvtm_u64_f64
- intrinsics::aarch64::vcvtmd_s64_f64
- intrinsics::aarch64::vcvtmd_u64_f64
- intrinsics::aarch64::vcvtmh_s16_f16
- intrinsics::aarch64::vcvtmh_s32_f16
- intrinsics::aarch64::vcvtmh_s64_f16
- intrinsics::aarch64::vcvtmh_u16_f16
- intrinsics::aarch64::vcvtmh_u32_f16
- intrinsics::aarch64::vcvtmh_u64_f16
- intrinsics::aarch64::vcvtmq_s16_f16
- intrinsics::aarch64::vcvtmq_s32_f32
- intrinsics::aarch64::vcvtmq_s64_f64
- intrinsics::aarch64::vcvtmq_u16_f16
- intrinsics::aarch64::vcvtmq_u32_f32
- intrinsics::aarch64::vcvtmq_u64_f64
- intrinsics::aarch64::vcvtms_s32_f32
- intrinsics::aarch64::vcvtms_u32_f32
- intrinsics::aarch64::vcvtn_s16_f16
- intrinsics::aarch64::vcvtn_s32_f32
- intrinsics::aarch64::vcvtn_s64_f64
- intrinsics::aarch64::vcvtn_u16_f16
- intrinsics::aarch64::vcvtn_u32_f32
- intrinsics::aarch64::vcvtn_u64_f64
- intrinsics::aarch64::vcvtnd_s64_f64
- intrinsics::aarch64::vcvtnd_u64_f64
- intrinsics::aarch64::vcvtnh_s16_f16
- intrinsics::aarch64::vcvtnh_s32_f16
- intrinsics::aarch64::vcvtnh_s64_f16
- intrinsics::aarch64::vcvtnh_u16_f16
- intrinsics::aarch64::vcvtnh_u32_f16
- intrinsics::aarch64::vcvtnh_u64_f16
- intrinsics::aarch64::vcvtnq_s16_f16
- intrinsics::aarch64::vcvtnq_s32_f32
- intrinsics::aarch64::vcvtnq_s64_f64
- intrinsics::aarch64::vcvtnq_u16_f16
- intrinsics::aarch64::vcvtnq_u32_f32
- intrinsics::aarch64::vcvtnq_u64_f64
- intrinsics::aarch64::vcvtns_s32_f32
- intrinsics::aarch64::vcvtns_u32_f32
- intrinsics::aarch64::vcvtp_s16_f16
- intrinsics::aarch64::vcvtp_s32_f32
- intrinsics::aarch64::vcvtp_s64_f64
- intrinsics::aarch64::vcvtp_u16_f16
- intrinsics::aarch64::vcvtp_u32_f32
- intrinsics::aarch64::vcvtp_u64_f64
- intrinsics::aarch64::vcvtpd_s64_f64
- intrinsics::aarch64::vcvtpd_u64_f64
- intrinsics::aarch64::vcvtph_s16_f16
- intrinsics::aarch64::vcvtph_s32_f16
- intrinsics::aarch64::vcvtph_s64_f16
- intrinsics::aarch64::vcvtph_u16_f16
- intrinsics::aarch64::vcvtph_u32_f16
- intrinsics::aarch64::vcvtph_u64_f16
- intrinsics::aarch64::vcvtpq_s16_f16
- intrinsics::aarch64::vcvtpq_s32_f32
- intrinsics::aarch64::vcvtpq_s64_f64
- intrinsics::aarch64::vcvtpq_u16_f16
- intrinsics::aarch64::vcvtpq_u32_f32
- intrinsics::aarch64::vcvtpq_u64_f64
- intrinsics::aarch64::vcvtps_s32_f32
- intrinsics::aarch64::vcvtps_u32_f32
- intrinsics::aarch64::vcvtq_f16_s16
- intrinsics::aarch64::vcvtq_f16_u16
- intrinsics::aarch64::vcvtq_f32_s32
- intrinsics::aarch64::vcvtq_f32_u32
- intrinsics::aarch64::vcvtq_f64_s64
- intrinsics::aarch64::vcvtq_f64_u64
- intrinsics::aarch64::vcvtq_n_f16_s16
- intrinsics::aarch64::vcvtq_n_f16_u16
- intrinsics::aarch64::vcvtq_n_f32_s32
- intrinsics::aarch64::vcvtq_n_f32_u32
- intrinsics::aarch64::vcvtq_n_f64_s64
- intrinsics::aarch64::vcvtq_n_f64_u64
- intrinsics::aarch64::vcvtq_n_s16_f16
- intrinsics::aarch64::vcvtq_n_s32_f32
- intrinsics::aarch64::vcvtq_n_s64_f64
- intrinsics::aarch64::vcvtq_n_u16_f16
- intrinsics::aarch64::vcvtq_n_u32_f32
- intrinsics::aarch64::vcvtq_n_u64_f64
- intrinsics::aarch64::vcvtq_s16_f16
- intrinsics::aarch64::vcvtq_s32_f32
- intrinsics::aarch64::vcvtq_s64_f64
- intrinsics::aarch64::vcvtq_u16_f16
- intrinsics::aarch64::vcvtq_u32_f32
- intrinsics::aarch64::vcvtq_u64_f64
- intrinsics::aarch64::vcvts_f32_s32
- intrinsics::aarch64::vcvts_f32_u32
- intrinsics::aarch64::vcvts_n_f32_s32
- intrinsics::aarch64::vcvts_n_f32_u32
- intrinsics::aarch64::vcvts_n_s32_f32
- intrinsics::aarch64::vcvts_n_u32_f32
- intrinsics::aarch64::vcvts_s32_f32
- intrinsics::aarch64::vcvts_u32_f32
- intrinsics::aarch64::vcvtx_f32_f64
- intrinsics::aarch64::vcvtx_high_f32_f64
- intrinsics::aarch64::vcvtxd_f32_f64
- intrinsics::aarch64::vdiv_f16
- intrinsics::aarch64::vdiv_f32
- intrinsics::aarch64::vdiv_f64
- intrinsics::aarch64::vdivh_f16
- intrinsics::aarch64::vdivq_f16
- intrinsics::aarch64::vdivq_f32
- intrinsics::aarch64::vdivq_f64
- intrinsics::aarch64::vdot_lane_s32
- intrinsics::aarch64::vdot_lane_u32
- intrinsics::aarch64::vdot_laneq_s32
- intrinsics::aarch64::vdot_laneq_u32
- intrinsics::aarch64::vdot_s32
- intrinsics::aarch64::vdot_u32
- intrinsics::aarch64::vdotq_lane_s32
- intrinsics::aarch64::vdotq_lane_u32
- intrinsics::aarch64::vdotq_laneq_s32
- intrinsics::aarch64::vdotq_laneq_u32
- intrinsics::aarch64::vdotq_s32
- intrinsics::aarch64::vdotq_u32
- intrinsics::aarch64::vdup_lane_f16
- intrinsics::aarch64::vdup_lane_f32
- intrinsics::aarch64::vdup_lane_f64
- intrinsics::aarch64::vdup_lane_p16
- intrinsics::aarch64::vdup_lane_p64
- intrinsics::aarch64::vdup_lane_p8
- intrinsics::aarch64::vdup_lane_s16
- intrinsics::aarch64::vdup_lane_s32
- intrinsics::aarch64::vdup_lane_s64
- intrinsics::aarch64::vdup_lane_s8
- intrinsics::aarch64::vdup_lane_u16
- intrinsics::aarch64::vdup_lane_u32
- intrinsics::aarch64::vdup_lane_u64
- intrinsics::aarch64::vdup_lane_u8
- intrinsics::aarch64::vdup_laneq_f16
- intrinsics::aarch64::vdup_laneq_f32
- intrinsics::aarch64::vdup_laneq_f64
- intrinsics::aarch64::vdup_laneq_p16
- intrinsics::aarch64::vdup_laneq_p64
- intrinsics::aarch64::vdup_laneq_p8
- intrinsics::aarch64::vdup_laneq_s16
- intrinsics::aarch64::vdup_laneq_s32
- intrinsics::aarch64::vdup_laneq_s64
- intrinsics::aarch64::vdup_laneq_s8
- intrinsics::aarch64::vdup_laneq_u16
- intrinsics::aarch64::vdup_laneq_u32
- intrinsics::aarch64::vdup_laneq_u64
- intrinsics::aarch64::vdup_laneq_u8
- intrinsics::aarch64::vdup_n_f16
- intrinsics::aarch64::vdup_n_f32
- intrinsics::aarch64::vdup_n_f64
- intrinsics::aarch64::vdup_n_p16
- intrinsics::aarch64::vdup_n_p64
- intrinsics::aarch64::vdup_n_p8
- intrinsics::aarch64::vdup_n_s16
- intrinsics::aarch64::vdup_n_s32
- intrinsics::aarch64::vdup_n_s64
- intrinsics::aarch64::vdup_n_s8
- intrinsics::aarch64::vdup_n_u16
- intrinsics::aarch64::vdup_n_u32
- intrinsics::aarch64::vdup_n_u64
- intrinsics::aarch64::vdup_n_u8
- intrinsics::aarch64::vdupb_lane_p8
- intrinsics::aarch64::vdupb_lane_s8
- intrinsics::aarch64::vdupb_lane_u8
- intrinsics::aarch64::vdupb_laneq_p8
- intrinsics::aarch64::vdupb_laneq_s8
- intrinsics::aarch64::vdupb_laneq_u8
- intrinsics::aarch64::vdupd_lane_f64
- intrinsics::aarch64::vdupd_lane_s64
- intrinsics::aarch64::vdupd_lane_u64
- intrinsics::aarch64::vdupd_laneq_f64
- intrinsics::aarch64::vdupd_laneq_s64
- intrinsics::aarch64::vdupd_laneq_u64
- intrinsics::aarch64::vduph_lane_f16
- intrinsics::aarch64::vduph_lane_p16
- intrinsics::aarch64::vduph_lane_s16
- intrinsics::aarch64::vduph_lane_u16
- intrinsics::aarch64::vduph_laneq_f16
- intrinsics::aarch64::vduph_laneq_p16
- intrinsics::aarch64::vduph_laneq_s16
- intrinsics::aarch64::vduph_laneq_u16
- intrinsics::aarch64::vdupq_lane_f16
- intrinsics::aarch64::vdupq_lane_f32
- intrinsics::aarch64::vdupq_lane_f64
- intrinsics::aarch64::vdupq_lane_p16
- intrinsics::aarch64::vdupq_lane_p64
- intrinsics::aarch64::vdupq_lane_p8
- intrinsics::aarch64::vdupq_lane_s16
- intrinsics::aarch64::vdupq_lane_s32
- intrinsics::aarch64::vdupq_lane_s64
- intrinsics::aarch64::vdupq_lane_s8
- intrinsics::aarch64::vdupq_lane_u16
- intrinsics::aarch64::vdupq_lane_u32
- intrinsics::aarch64::vdupq_lane_u64
- intrinsics::aarch64::vdupq_lane_u8
- intrinsics::aarch64::vdupq_laneq_f16
- intrinsics::aarch64::vdupq_laneq_f32
- intrinsics::aarch64::vdupq_laneq_f64
- intrinsics::aarch64::vdupq_laneq_p16
- intrinsics::aarch64::vdupq_laneq_p64
- intrinsics::aarch64::vdupq_laneq_p8
- intrinsics::aarch64::vdupq_laneq_s16
- intrinsics::aarch64::vdupq_laneq_s32
- intrinsics::aarch64::vdupq_laneq_s64
- intrinsics::aarch64::vdupq_laneq_s8
- intrinsics::aarch64::vdupq_laneq_u16
- intrinsics::aarch64::vdupq_laneq_u32
- intrinsics::aarch64::vdupq_laneq_u64
- intrinsics::aarch64::vdupq_laneq_u8
- intrinsics::aarch64::vdupq_n_f16
- intrinsics::aarch64::vdupq_n_f32
- intrinsics::aarch64::vdupq_n_f64
- intrinsics::aarch64::vdupq_n_p16
- intrinsics::aarch64::vdupq_n_p64
- intrinsics::aarch64::vdupq_n_p8
- intrinsics::aarch64::vdupq_n_s16
- intrinsics::aarch64::vdupq_n_s32
- intrinsics::aarch64::vdupq_n_s64
- intrinsics::aarch64::vdupq_n_s8
- intrinsics::aarch64::vdupq_n_u16
- intrinsics::aarch64::vdupq_n_u32
- intrinsics::aarch64::vdupq_n_u64
- intrinsics::aarch64::vdupq_n_u8
- intrinsics::aarch64::vdups_lane_f32
- intrinsics::aarch64::vdups_lane_s32
- intrinsics::aarch64::vdups_lane_u32
- intrinsics::aarch64::vdups_laneq_f32
- intrinsics::aarch64::vdups_laneq_s32
- intrinsics::aarch64::vdups_laneq_u32
- intrinsics::aarch64::veor3q_s16
- intrinsics::aarch64::veor3q_s32
- intrinsics::aarch64::veor3q_s64
- intrinsics::aarch64::veor3q_s8
- intrinsics::aarch64::veor3q_u16
- intrinsics::aarch64::veor3q_u32
- intrinsics::aarch64::veor3q_u64
- intrinsics::aarch64::veor3q_u8
- intrinsics::aarch64::veor_s16
- intrinsics::aarch64::veor_s32
- intrinsics::aarch64::veor_s64
- intrinsics::aarch64::veor_s8
- intrinsics::aarch64::veor_u16
- intrinsics::aarch64::veor_u32
- intrinsics::aarch64::veor_u64
- intrinsics::aarch64::veor_u8
- intrinsics::aarch64::veorq_s16
- intrinsics::aarch64::veorq_s32
- intrinsics::aarch64::veorq_s64
- intrinsics::aarch64::veorq_s8
- intrinsics::aarch64::veorq_u16
- intrinsics::aarch64::veorq_u32
- intrinsics::aarch64::veorq_u64
- intrinsics::aarch64::veorq_u8
- intrinsics::aarch64::vext_f16
- intrinsics::aarch64::vext_f32
- intrinsics::aarch64::vext_f64
- intrinsics::aarch64::vext_p16
- intrinsics::aarch64::vext_p64
- intrinsics::aarch64::vext_p8
- intrinsics::aarch64::vext_s16
- intrinsics::aarch64::vext_s32
- intrinsics::aarch64::vext_s64
- intrinsics::aarch64::vext_s8
- intrinsics::aarch64::vext_u16
- intrinsics::aarch64::vext_u32
- intrinsics::aarch64::vext_u64
- intrinsics::aarch64::vext_u8
- intrinsics::aarch64::vextq_f16
- intrinsics::aarch64::vextq_f32
- intrinsics::aarch64::vextq_f64
- intrinsics::aarch64::vextq_p16
- intrinsics::aarch64::vextq_p64
- intrinsics::aarch64::vextq_p8
- intrinsics::aarch64::vextq_s16
- intrinsics::aarch64::vextq_s32
- intrinsics::aarch64::vextq_s64
- intrinsics::aarch64::vextq_s8
- intrinsics::aarch64::vextq_u16
- intrinsics::aarch64::vextq_u32
- intrinsics::aarch64::vextq_u64
- intrinsics::aarch64::vextq_u8
- intrinsics::aarch64::vfma_f16
- intrinsics::aarch64::vfma_f32
- intrinsics::aarch64::vfma_f64
- intrinsics::aarch64::vfma_lane_f16
- intrinsics::aarch64::vfma_lane_f32
- intrinsics::aarch64::vfma_lane_f64
- intrinsics::aarch64::vfma_laneq_f16
- intrinsics::aarch64::vfma_laneq_f32
- intrinsics::aarch64::vfma_laneq_f64
- intrinsics::aarch64::vfma_n_f16
- intrinsics::aarch64::vfma_n_f32
- intrinsics::aarch64::vfma_n_f64
- intrinsics::aarch64::vfmad_lane_f64
- intrinsics::aarch64::vfmad_laneq_f64
- intrinsics::aarch64::vfmah_f16
- intrinsics::aarch64::vfmah_lane_f16
- intrinsics::aarch64::vfmah_laneq_f16
- intrinsics::aarch64::vfmaq_f16
- intrinsics::aarch64::vfmaq_f32
- intrinsics::aarch64::vfmaq_f64
- intrinsics::aarch64::vfmaq_lane_f16
- intrinsics::aarch64::vfmaq_lane_f32
- intrinsics::aarch64::vfmaq_lane_f64
- intrinsics::aarch64::vfmaq_laneq_f16
- intrinsics::aarch64::vfmaq_laneq_f32
- intrinsics::aarch64::vfmaq_laneq_f64
- intrinsics::aarch64::vfmaq_n_f16
- intrinsics::aarch64::vfmaq_n_f32
- intrinsics::aarch64::vfmaq_n_f64
- intrinsics::aarch64::vfmas_lane_f32
- intrinsics::aarch64::vfmas_laneq_f32
- intrinsics::aarch64::vfmlal_high_f16
- intrinsics::aarch64::vfmlal_lane_high_f16
- intrinsics::aarch64::vfmlal_lane_low_f16
- intrinsics::aarch64::vfmlal_laneq_high_f16
- intrinsics::aarch64::vfmlal_laneq_low_f16
- intrinsics::aarch64::vfmlal_low_f16
- intrinsics::aarch64::vfmlalq_high_f16
- intrinsics::aarch64::vfmlalq_lane_high_f16
- intrinsics::aarch64::vfmlalq_lane_low_f16
- intrinsics::aarch64::vfmlalq_laneq_high_f16
- intrinsics::aarch64::vfmlalq_laneq_low_f16
- intrinsics::aarch64::vfmlalq_low_f16
- intrinsics::aarch64::vfmlsl_high_f16
- intrinsics::aarch64::vfmlsl_lane_high_f16
- intrinsics::aarch64::vfmlsl_lane_low_f16
- intrinsics::aarch64::vfmlsl_laneq_high_f16
- intrinsics::aarch64::vfmlsl_laneq_low_f16
- intrinsics::aarch64::vfmlsl_low_f16
- intrinsics::aarch64::vfmlslq_high_f16
- intrinsics::aarch64::vfmlslq_lane_high_f16
- intrinsics::aarch64::vfmlslq_lane_low_f16
- intrinsics::aarch64::vfmlslq_laneq_high_f16
- intrinsics::aarch64::vfmlslq_laneq_low_f16
- intrinsics::aarch64::vfmlslq_low_f16
- intrinsics::aarch64::vfms_f16
- intrinsics::aarch64::vfms_f32
- intrinsics::aarch64::vfms_f64
- intrinsics::aarch64::vfms_lane_f16
- intrinsics::aarch64::vfms_lane_f32
- intrinsics::aarch64::vfms_lane_f64
- intrinsics::aarch64::vfms_laneq_f16
- intrinsics::aarch64::vfms_laneq_f32
- intrinsics::aarch64::vfms_laneq_f64
- intrinsics::aarch64::vfms_n_f16
- intrinsics::aarch64::vfms_n_f32
- intrinsics::aarch64::vfms_n_f64
- intrinsics::aarch64::vfmsd_lane_f64
- intrinsics::aarch64::vfmsd_laneq_f64
- intrinsics::aarch64::vfmsh_f16
- intrinsics::aarch64::vfmsh_lane_f16
- intrinsics::aarch64::vfmsh_laneq_f16
- intrinsics::aarch64::vfmsq_f16
- intrinsics::aarch64::vfmsq_f32
- intrinsics::aarch64::vfmsq_f64
- intrinsics::aarch64::vfmsq_lane_f16
- intrinsics::aarch64::vfmsq_lane_f32
- intrinsics::aarch64::vfmsq_lane_f64
- intrinsics::aarch64::vfmsq_laneq_f16
- intrinsics::aarch64::vfmsq_laneq_f32
- intrinsics::aarch64::vfmsq_laneq_f64
- intrinsics::aarch64::vfmsq_n_f16
- intrinsics::aarch64::vfmsq_n_f32
- intrinsics::aarch64::vfmsq_n_f64
- intrinsics::aarch64::vfmss_lane_f32
- intrinsics::aarch64::vfmss_laneq_f32
- intrinsics::aarch64::vget_high_f16
- intrinsics::aarch64::vget_high_f32
- intrinsics::aarch64::vget_high_f64
- intrinsics::aarch64::vget_high_p16
- intrinsics::aarch64::vget_high_p64
- intrinsics::aarch64::vget_high_p8
- intrinsics::aarch64::vget_high_s16
- intrinsics::aarch64::vget_high_s32
- intrinsics::aarch64::vget_high_s64
- intrinsics::aarch64::vget_high_s8
- intrinsics::aarch64::vget_high_u16
- intrinsics::aarch64::vget_high_u32
- intrinsics::aarch64::vget_high_u64
- intrinsics::aarch64::vget_high_u8
- intrinsics::aarch64::vget_lane_f16
- intrinsics::aarch64::vget_lane_f32
- intrinsics::aarch64::vget_lane_f64
- intrinsics::aarch64::vget_lane_p16
- intrinsics::aarch64::vget_lane_p64
- intrinsics::aarch64::vget_lane_p8
- intrinsics::aarch64::vget_lane_s16
- intrinsics::aarch64::vget_lane_s32
- intrinsics::aarch64::vget_lane_s64
- intrinsics::aarch64::vget_lane_s8
- intrinsics::aarch64::vget_lane_u16
- intrinsics::aarch64::vget_lane_u32
- intrinsics::aarch64::vget_lane_u64
- intrinsics::aarch64::vget_lane_u8
- intrinsics::aarch64::vget_low_f16
- intrinsics::aarch64::vget_low_f32
- intrinsics::aarch64::vget_low_f64
- intrinsics::aarch64::vget_low_p16
- intrinsics::aarch64::vget_low_p64
- intrinsics::aarch64::vget_low_p8
- intrinsics::aarch64::vget_low_s16
- intrinsics::aarch64::vget_low_s32
- intrinsics::aarch64::vget_low_s64
- intrinsics::aarch64::vget_low_s8
- intrinsics::aarch64::vget_low_u16
- intrinsics::aarch64::vget_low_u32
- intrinsics::aarch64::vget_low_u64
- intrinsics::aarch64::vget_low_u8
- intrinsics::aarch64::vgetq_lane_f16
- intrinsics::aarch64::vgetq_lane_f32
- intrinsics::aarch64::vgetq_lane_f64
- intrinsics::aarch64::vgetq_lane_p16
- intrinsics::aarch64::vgetq_lane_p64
- intrinsics::aarch64::vgetq_lane_p8
- intrinsics::aarch64::vgetq_lane_s16
- intrinsics::aarch64::vgetq_lane_s32
- intrinsics::aarch64::vgetq_lane_s64
- intrinsics::aarch64::vgetq_lane_s8
- intrinsics::aarch64::vgetq_lane_u16
- intrinsics::aarch64::vgetq_lane_u32
- intrinsics::aarch64::vgetq_lane_u64
- intrinsics::aarch64::vgetq_lane_u8
- intrinsics::aarch64::vhadd_s16
- intrinsics::aarch64::vhadd_s32
- intrinsics::aarch64::vhadd_s8
- intrinsics::aarch64::vhadd_u16
- intrinsics::aarch64::vhadd_u32
- intrinsics::aarch64::vhadd_u8
- intrinsics::aarch64::vhaddq_s16
- intrinsics::aarch64::vhaddq_s32
- intrinsics::aarch64::vhaddq_s8
- intrinsics::aarch64::vhaddq_u16
- intrinsics::aarch64::vhaddq_u32
- intrinsics::aarch64::vhaddq_u8
- intrinsics::aarch64::vhsub_s16
- intrinsics::aarch64::vhsub_s32
- intrinsics::aarch64::vhsub_s8
- intrinsics::aarch64::vhsub_u16
- intrinsics::aarch64::vhsub_u32
- intrinsics::aarch64::vhsub_u8
- intrinsics::aarch64::vhsubq_s16
- intrinsics::aarch64::vhsubq_s32
- intrinsics::aarch64::vhsubq_s8
- intrinsics::aarch64::vhsubq_u16
- intrinsics::aarch64::vhsubq_u32
- intrinsics::aarch64::vhsubq_u8
- intrinsics::aarch64::vld1_dup_f16
- intrinsics::aarch64::vld1_dup_f32
- intrinsics::aarch64::vld1_dup_f64
- intrinsics::aarch64::vld1_dup_p16
- intrinsics::aarch64::vld1_dup_p64
- intrinsics::aarch64::vld1_dup_p8
- intrinsics::aarch64::vld1_dup_s16
- intrinsics::aarch64::vld1_dup_s32
- intrinsics::aarch64::vld1_dup_s64
- intrinsics::aarch64::vld1_dup_s8
- intrinsics::aarch64::vld1_dup_u16
- intrinsics::aarch64::vld1_dup_u32
- intrinsics::aarch64::vld1_dup_u64
- intrinsics::aarch64::vld1_dup_u8
- intrinsics::aarch64::vld1_f16
- intrinsics::aarch64::vld1_f16_x2
- intrinsics::aarch64::vld1_f16_x3
- intrinsics::aarch64::vld1_f16_x4
- intrinsics::aarch64::vld1_f32
- intrinsics::aarch64::vld1_f32_x2
- intrinsics::aarch64::vld1_f32_x3
- intrinsics::aarch64::vld1_f32_x4
- intrinsics::aarch64::vld1_f64
- intrinsics::aarch64::vld1_f64_x2
- intrinsics::aarch64::vld1_f64_x3
- intrinsics::aarch64::vld1_f64_x4
- intrinsics::aarch64::vld1_lane_f16
- intrinsics::aarch64::vld1_lane_f32
- intrinsics::aarch64::vld1_lane_f64
- intrinsics::aarch64::vld1_lane_p16
- intrinsics::aarch64::vld1_lane_p64
- intrinsics::aarch64::vld1_lane_p8
- intrinsics::aarch64::vld1_lane_s16
- intrinsics::aarch64::vld1_lane_s32
- intrinsics::aarch64::vld1_lane_s64
- intrinsics::aarch64::vld1_lane_s8
- intrinsics::aarch64::vld1_lane_u16
- intrinsics::aarch64::vld1_lane_u32
- intrinsics::aarch64::vld1_lane_u64
- intrinsics::aarch64::vld1_lane_u8
- intrinsics::aarch64::vld1_p16
- intrinsics::aarch64::vld1_p16_x2
- intrinsics::aarch64::vld1_p16_x3
- intrinsics::aarch64::vld1_p16_x4
- intrinsics::aarch64::vld1_p64
- intrinsics::aarch64::vld1_p64_x2
- intrinsics::aarch64::vld1_p64_x3
- intrinsics::aarch64::vld1_p64_x4
- intrinsics::aarch64::vld1_p8
- intrinsics::aarch64::vld1_p8_x2
- intrinsics::aarch64::vld1_p8_x3
- intrinsics::aarch64::vld1_p8_x4
- intrinsics::aarch64::vld1_s16
- intrinsics::aarch64::vld1_s16_x2
- intrinsics::aarch64::vld1_s16_x3
- intrinsics::aarch64::vld1_s16_x4
- intrinsics::aarch64::vld1_s32
- intrinsics::aarch64::vld1_s32_x2
- intrinsics::aarch64::vld1_s32_x3
- intrinsics::aarch64::vld1_s32_x4
- intrinsics::aarch64::vld1_s64
- intrinsics::aarch64::vld1_s64_x2
- intrinsics::aarch64::vld1_s64_x3
- intrinsics::aarch64::vld1_s64_x4
- intrinsics::aarch64::vld1_s8
- intrinsics::aarch64::vld1_s8_x2
- intrinsics::aarch64::vld1_s8_x3
- intrinsics::aarch64::vld1_s8_x4
- intrinsics::aarch64::vld1_u16
- intrinsics::aarch64::vld1_u16_x2
- intrinsics::aarch64::vld1_u16_x3
- intrinsics::aarch64::vld1_u16_x4
- intrinsics::aarch64::vld1_u32
- intrinsics::aarch64::vld1_u32_x2
- intrinsics::aarch64::vld1_u32_x3
- intrinsics::aarch64::vld1_u32_x4
- intrinsics::aarch64::vld1_u64
- intrinsics::aarch64::vld1_u64_x2
- intrinsics::aarch64::vld1_u64_x3
- intrinsics::aarch64::vld1_u64_x4
- intrinsics::aarch64::vld1_u8
- intrinsics::aarch64::vld1_u8_x2
- intrinsics::aarch64::vld1_u8_x3
- intrinsics::aarch64::vld1_u8_x4
- intrinsics::aarch64::vld1q_dup_f16
- intrinsics::aarch64::vld1q_dup_f32
- intrinsics::aarch64::vld1q_dup_f64
- intrinsics::aarch64::vld1q_dup_p16
- intrinsics::aarch64::vld1q_dup_p64
- intrinsics::aarch64::vld1q_dup_p8
- intrinsics::aarch64::vld1q_dup_s16
- intrinsics::aarch64::vld1q_dup_s32
- intrinsics::aarch64::vld1q_dup_s64
- intrinsics::aarch64::vld1q_dup_s8
- intrinsics::aarch64::vld1q_dup_u16
- intrinsics::aarch64::vld1q_dup_u32
- intrinsics::aarch64::vld1q_dup_u64
- intrinsics::aarch64::vld1q_dup_u8
- intrinsics::aarch64::vld1q_f16
- intrinsics::aarch64::vld1q_f16_x2
- intrinsics::aarch64::vld1q_f16_x3
- intrinsics::aarch64::vld1q_f16_x4
- intrinsics::aarch64::vld1q_f32
- intrinsics::aarch64::vld1q_f32_x2
- intrinsics::aarch64::vld1q_f32_x3
- intrinsics::aarch64::vld1q_f32_x4
- intrinsics::aarch64::vld1q_f64
- intrinsics::aarch64::vld1q_f64_x2
- intrinsics::aarch64::vld1q_f64_x3
- intrinsics::aarch64::vld1q_f64_x4
- intrinsics::aarch64::vld1q_lane_f16
- intrinsics::aarch64::vld1q_lane_f32
- intrinsics::aarch64::vld1q_lane_f64
- intrinsics::aarch64::vld1q_lane_p16
- intrinsics::aarch64::vld1q_lane_p64
- intrinsics::aarch64::vld1q_lane_p8
- intrinsics::aarch64::vld1q_lane_s16
- intrinsics::aarch64::vld1q_lane_s32
- intrinsics::aarch64::vld1q_lane_s64
- intrinsics::aarch64::vld1q_lane_s8
- intrinsics::aarch64::vld1q_lane_u16
- intrinsics::aarch64::vld1q_lane_u32
- intrinsics::aarch64::vld1q_lane_u64
- intrinsics::aarch64::vld1q_lane_u8
- intrinsics::aarch64::vld1q_p16
- intrinsics::aarch64::vld1q_p16_x2
- intrinsics::aarch64::vld1q_p16_x3
- intrinsics::aarch64::vld1q_p16_x4
- intrinsics::aarch64::vld1q_p64
- intrinsics::aarch64::vld1q_p64_x2
- intrinsics::aarch64::vld1q_p64_x3
- intrinsics::aarch64::vld1q_p64_x4
- intrinsics::aarch64::vld1q_p8
- intrinsics::aarch64::vld1q_p8_x2
- intrinsics::aarch64::vld1q_p8_x3
- intrinsics::aarch64::vld1q_p8_x4
- intrinsics::aarch64::vld1q_s16
- intrinsics::aarch64::vld1q_s16_x2
- intrinsics::aarch64::vld1q_s16_x3
- intrinsics::aarch64::vld1q_s16_x4
- intrinsics::aarch64::vld1q_s32
- intrinsics::aarch64::vld1q_s32_x2
- intrinsics::aarch64::vld1q_s32_x3
- intrinsics::aarch64::vld1q_s32_x4
- intrinsics::aarch64::vld1q_s64
- intrinsics::aarch64::vld1q_s64_x2
- intrinsics::aarch64::vld1q_s64_x3
- intrinsics::aarch64::vld1q_s64_x4
- intrinsics::aarch64::vld1q_s8
- intrinsics::aarch64::vld1q_s8_x2
- intrinsics::aarch64::vld1q_s8_x3
- intrinsics::aarch64::vld1q_s8_x4
- intrinsics::aarch64::vld1q_u16
- intrinsics::aarch64::vld1q_u16_x2
- intrinsics::aarch64::vld1q_u16_x3
- intrinsics::aarch64::vld1q_u16_x4
- intrinsics::aarch64::vld1q_u32
- intrinsics::aarch64::vld1q_u32_x2
- intrinsics::aarch64::vld1q_u32_x3
- intrinsics::aarch64::vld1q_u32_x4
- intrinsics::aarch64::vld1q_u64
- intrinsics::aarch64::vld1q_u64_x2
- intrinsics::aarch64::vld1q_u64_x3
- intrinsics::aarch64::vld1q_u64_x4
- intrinsics::aarch64::vld1q_u8
- intrinsics::aarch64::vld1q_u8_x2
- intrinsics::aarch64::vld1q_u8_x3
- intrinsics::aarch64::vld1q_u8_x4
- intrinsics::aarch64::vld2_dup_f16
- intrinsics::aarch64::vld2_dup_f32
- intrinsics::aarch64::vld2_dup_f64
- intrinsics::aarch64::vld2_dup_p16
- intrinsics::aarch64::vld2_dup_p64
- intrinsics::aarch64::vld2_dup_p8
- intrinsics::aarch64::vld2_dup_s16
- intrinsics::aarch64::vld2_dup_s32
- intrinsics::aarch64::vld2_dup_s64
- intrinsics::aarch64::vld2_dup_s8
- intrinsics::aarch64::vld2_dup_u16
- intrinsics::aarch64::vld2_dup_u32
- intrinsics::aarch64::vld2_dup_u64
- intrinsics::aarch64::vld2_dup_u8
- intrinsics::aarch64::vld2_f16
- intrinsics::aarch64::vld2_f32
- intrinsics::aarch64::vld2_f64
- intrinsics::aarch64::vld2_lane_f16
- intrinsics::aarch64::vld2_lane_f32
- intrinsics::aarch64::vld2_lane_f64
- intrinsics::aarch64::vld2_lane_p16
- intrinsics::aarch64::vld2_lane_p64
- intrinsics::aarch64::vld2_lane_p8
- intrinsics::aarch64::vld2_lane_s16
- intrinsics::aarch64::vld2_lane_s32
- intrinsics::aarch64::vld2_lane_s64
- intrinsics::aarch64::vld2_lane_s8
- intrinsics::aarch64::vld2_lane_u16
- intrinsics::aarch64::vld2_lane_u32
- intrinsics::aarch64::vld2_lane_u64
- intrinsics::aarch64::vld2_lane_u8
- intrinsics::aarch64::vld2_p16
- intrinsics::aarch64::vld2_p64
- intrinsics::aarch64::vld2_p8
- intrinsics::aarch64::vld2_s16
- intrinsics::aarch64::vld2_s32
- intrinsics::aarch64::vld2_s64
- intrinsics::aarch64::vld2_s8
- intrinsics::aarch64::vld2_u16
- intrinsics::aarch64::vld2_u32
- intrinsics::aarch64::vld2_u64
- intrinsics::aarch64::vld2_u8
- intrinsics::aarch64::vld2q_dup_f16
- intrinsics::aarch64::vld2q_dup_f32
- intrinsics::aarch64::vld2q_dup_f64
- intrinsics::aarch64::vld2q_dup_p16
- intrinsics::aarch64::vld2q_dup_p64
- intrinsics::aarch64::vld2q_dup_p8
- intrinsics::aarch64::vld2q_dup_s16
- intrinsics::aarch64::vld2q_dup_s32
- intrinsics::aarch64::vld2q_dup_s64
- intrinsics::aarch64::vld2q_dup_s8
- intrinsics::aarch64::vld2q_dup_u16
- intrinsics::aarch64::vld2q_dup_u32
- intrinsics::aarch64::vld2q_dup_u64
- intrinsics::aarch64::vld2q_dup_u8
- intrinsics::aarch64::vld2q_f16
- intrinsics::aarch64::vld2q_f32
- intrinsics::aarch64::vld2q_f64
- intrinsics::aarch64::vld2q_lane_f16
- intrinsics::aarch64::vld2q_lane_f32
- intrinsics::aarch64::vld2q_lane_f64
- intrinsics::aarch64::vld2q_lane_p16
- intrinsics::aarch64::vld2q_lane_p64
- intrinsics::aarch64::vld2q_lane_p8
- intrinsics::aarch64::vld2q_lane_s16
- intrinsics::aarch64::vld2q_lane_s32
- intrinsics::aarch64::vld2q_lane_s64
- intrinsics::aarch64::vld2q_lane_s8
- intrinsics::aarch64::vld2q_lane_u16
- intrinsics::aarch64::vld2q_lane_u32
- intrinsics::aarch64::vld2q_lane_u64
- intrinsics::aarch64::vld2q_lane_u8
- intrinsics::aarch64::vld2q_p16
- intrinsics::aarch64::vld2q_p64
- intrinsics::aarch64::vld2q_p8
- intrinsics::aarch64::vld2q_s16
- intrinsics::aarch64::vld2q_s32
- intrinsics::aarch64::vld2q_s64
- intrinsics::aarch64::vld2q_s8
- intrinsics::aarch64::vld2q_u16
- intrinsics::aarch64::vld2q_u32
- intrinsics::aarch64::vld2q_u64
- intrinsics::aarch64::vld2q_u8
- intrinsics::aarch64::vld3_dup_f16
- intrinsics::aarch64::vld3_dup_f32
- intrinsics::aarch64::vld3_dup_f64
- intrinsics::aarch64::vld3_dup_p16
- intrinsics::aarch64::vld3_dup_p64
- intrinsics::aarch64::vld3_dup_p8
- intrinsics::aarch64::vld3_dup_s16
- intrinsics::aarch64::vld3_dup_s32
- intrinsics::aarch64::vld3_dup_s64
- intrinsics::aarch64::vld3_dup_s8
- intrinsics::aarch64::vld3_dup_u16
- intrinsics::aarch64::vld3_dup_u32
- intrinsics::aarch64::vld3_dup_u64
- intrinsics::aarch64::vld3_dup_u8
- intrinsics::aarch64::vld3_f16
- intrinsics::aarch64::vld3_f32
- intrinsics::aarch64::vld3_f64
- intrinsics::aarch64::vld3_lane_f16
- intrinsics::aarch64::vld3_lane_f32
- intrinsics::aarch64::vld3_lane_f64
- intrinsics::aarch64::vld3_lane_p16
- intrinsics::aarch64::vld3_lane_p64
- intrinsics::aarch64::vld3_lane_p8
- intrinsics::aarch64::vld3_lane_s16
- intrinsics::aarch64::vld3_lane_s32
- intrinsics::aarch64::vld3_lane_s64
- intrinsics::aarch64::vld3_lane_s8
- intrinsics::aarch64::vld3_lane_u16
- intrinsics::aarch64::vld3_lane_u32
- intrinsics::aarch64::vld3_lane_u64
- intrinsics::aarch64::vld3_lane_u8
- intrinsics::aarch64::vld3_p16
- intrinsics::aarch64::vld3_p64
- intrinsics::aarch64::vld3_p8
- intrinsics::aarch64::vld3_s16
- intrinsics::aarch64::vld3_s32
- intrinsics::aarch64::vld3_s64
- intrinsics::aarch64::vld3_s8
- intrinsics::aarch64::vld3_u16
- intrinsics::aarch64::vld3_u32
- intrinsics::aarch64::vld3_u64
- intrinsics::aarch64::vld3_u8
- intrinsics::aarch64::vld3q_dup_f16
- intrinsics::aarch64::vld3q_dup_f32
- intrinsics::aarch64::vld3q_dup_f64
- intrinsics::aarch64::vld3q_dup_p16
- intrinsics::aarch64::vld3q_dup_p64
- intrinsics::aarch64::vld3q_dup_p8
- intrinsics::aarch64::vld3q_dup_s16
- intrinsics::aarch64::vld3q_dup_s32
- intrinsics::aarch64::vld3q_dup_s64
- intrinsics::aarch64::vld3q_dup_s8
- intrinsics::aarch64::vld3q_dup_u16
- intrinsics::aarch64::vld3q_dup_u32
- intrinsics::aarch64::vld3q_dup_u64
- intrinsics::aarch64::vld3q_dup_u8
- intrinsics::aarch64::vld3q_f16
- intrinsics::aarch64::vld3q_f32
- intrinsics::aarch64::vld3q_f64
- intrinsics::aarch64::vld3q_lane_f16
- intrinsics::aarch64::vld3q_lane_f32
- intrinsics::aarch64::vld3q_lane_f64
- intrinsics::aarch64::vld3q_lane_p16
- intrinsics::aarch64::vld3q_lane_p64
- intrinsics::aarch64::vld3q_lane_p8
- intrinsics::aarch64::vld3q_lane_s16
- intrinsics::aarch64::vld3q_lane_s32
- intrinsics::aarch64::vld3q_lane_s64
- intrinsics::aarch64::vld3q_lane_s8
- intrinsics::aarch64::vld3q_lane_u16
- intrinsics::aarch64::vld3q_lane_u32
- intrinsics::aarch64::vld3q_lane_u64
- intrinsics::aarch64::vld3q_lane_u8
- intrinsics::aarch64::vld3q_p16
- intrinsics::aarch64::vld3q_p64
- intrinsics::aarch64::vld3q_p8
- intrinsics::aarch64::vld3q_s16
- intrinsics::aarch64::vld3q_s32
- intrinsics::aarch64::vld3q_s64
- intrinsics::aarch64::vld3q_s8
- intrinsics::aarch64::vld3q_u16
- intrinsics::aarch64::vld3q_u32
- intrinsics::aarch64::vld3q_u64
- intrinsics::aarch64::vld3q_u8
- intrinsics::aarch64::vld4_dup_f16
- intrinsics::aarch64::vld4_dup_f32
- intrinsics::aarch64::vld4_dup_f64
- intrinsics::aarch64::vld4_dup_p16
- intrinsics::aarch64::vld4_dup_p64
- intrinsics::aarch64::vld4_dup_p8
- intrinsics::aarch64::vld4_dup_s16
- intrinsics::aarch64::vld4_dup_s32
- intrinsics::aarch64::vld4_dup_s64
- intrinsics::aarch64::vld4_dup_s8
- intrinsics::aarch64::vld4_dup_u16
- intrinsics::aarch64::vld4_dup_u32
- intrinsics::aarch64::vld4_dup_u64
- intrinsics::aarch64::vld4_dup_u8
- intrinsics::aarch64::vld4_f16
- intrinsics::aarch64::vld4_f32
- intrinsics::aarch64::vld4_f64
- intrinsics::aarch64::vld4_lane_f16
- intrinsics::aarch64::vld4_lane_f32
- intrinsics::aarch64::vld4_lane_f64
- intrinsics::aarch64::vld4_lane_p16
- intrinsics::aarch64::vld4_lane_p64
- intrinsics::aarch64::vld4_lane_p8
- intrinsics::aarch64::vld4_lane_s16
- intrinsics::aarch64::vld4_lane_s32
- intrinsics::aarch64::vld4_lane_s64
- intrinsics::aarch64::vld4_lane_s8
- intrinsics::aarch64::vld4_lane_u16
- intrinsics::aarch64::vld4_lane_u32
- intrinsics::aarch64::vld4_lane_u64
- intrinsics::aarch64::vld4_lane_u8
- intrinsics::aarch64::vld4_p16
- intrinsics::aarch64::vld4_p64
- intrinsics::aarch64::vld4_p8
- intrinsics::aarch64::vld4_s16
- intrinsics::aarch64::vld4_s32
- intrinsics::aarch64::vld4_s64
- intrinsics::aarch64::vld4_s8
- intrinsics::aarch64::vld4_u16
- intrinsics::aarch64::vld4_u32
- intrinsics::aarch64::vld4_u64
- intrinsics::aarch64::vld4_u8
- intrinsics::aarch64::vld4q_dup_f16
- intrinsics::aarch64::vld4q_dup_f32
- intrinsics::aarch64::vld4q_dup_f64
- intrinsics::aarch64::vld4q_dup_p16
- intrinsics::aarch64::vld4q_dup_p64
- intrinsics::aarch64::vld4q_dup_p8
- intrinsics::aarch64::vld4q_dup_s16
- intrinsics::aarch64::vld4q_dup_s32
- intrinsics::aarch64::vld4q_dup_s64
- intrinsics::aarch64::vld4q_dup_s8
- intrinsics::aarch64::vld4q_dup_u16
- intrinsics::aarch64::vld4q_dup_u32
- intrinsics::aarch64::vld4q_dup_u64
- intrinsics::aarch64::vld4q_dup_u8
- intrinsics::aarch64::vld4q_f16
- intrinsics::aarch64::vld4q_f32
- intrinsics::aarch64::vld4q_f64
- intrinsics::aarch64::vld4q_lane_f16
- intrinsics::aarch64::vld4q_lane_f32
- intrinsics::aarch64::vld4q_lane_f64
- intrinsics::aarch64::vld4q_lane_p16
- intrinsics::aarch64::vld4q_lane_p64
- intrinsics::aarch64::vld4q_lane_p8
- intrinsics::aarch64::vld4q_lane_s16
- intrinsics::aarch64::vld4q_lane_s32
- intrinsics::aarch64::vld4q_lane_s64
- intrinsics::aarch64::vld4q_lane_s8
- intrinsics::aarch64::vld4q_lane_u16
- intrinsics::aarch64::vld4q_lane_u32
- intrinsics::aarch64::vld4q_lane_u64
- intrinsics::aarch64::vld4q_lane_u8
- intrinsics::aarch64::vld4q_p16
- intrinsics::aarch64::vld4q_p64
- intrinsics::aarch64::vld4q_p8
- intrinsics::aarch64::vld4q_s16
- intrinsics::aarch64::vld4q_s32
- intrinsics::aarch64::vld4q_s64
- intrinsics::aarch64::vld4q_s8
- intrinsics::aarch64::vld4q_u16
- intrinsics::aarch64::vld4q_u32
- intrinsics::aarch64::vld4q_u64
- intrinsics::aarch64::vld4q_u8
- intrinsics::aarch64::vldap1_lane_p64
- intrinsics::aarch64::vldap1_lane_s64
- intrinsics::aarch64::vldap1_lane_u64
- intrinsics::aarch64::vldap1q_lane_f64
- intrinsics::aarch64::vldap1q_lane_p64
- intrinsics::aarch64::vldap1q_lane_s64
- intrinsics::aarch64::vldap1q_lane_u64
- intrinsics::aarch64::vldrq_p128
- intrinsics::aarch64::vluti2_lane_f16
- intrinsics::aarch64::vluti2_lane_p16
- intrinsics::aarch64::vluti2_lane_p8
- intrinsics::aarch64::vluti2_lane_s16
- intrinsics::aarch64::vluti2_lane_s8
- intrinsics::aarch64::vluti2_lane_u16
- intrinsics::aarch64::vluti2_lane_u8
- intrinsics::aarch64::vluti2_laneq_f16
- intrinsics::aarch64::vluti2_laneq_p16
- intrinsics::aarch64::vluti2_laneq_p8
- intrinsics::aarch64::vluti2_laneq_s16
- intrinsics::aarch64::vluti2_laneq_s8
- intrinsics::aarch64::vluti2_laneq_u16
- intrinsics::aarch64::vluti2_laneq_u8
- intrinsics::aarch64::vluti2q_lane_f16
- intrinsics::aarch64::vluti2q_lane_p16
- intrinsics::aarch64::vluti2q_lane_p8
- intrinsics::aarch64::vluti2q_lane_s16
- intrinsics::aarch64::vluti2q_lane_s8
- intrinsics::aarch64::vluti2q_lane_u16
- intrinsics::aarch64::vluti2q_lane_u8
- intrinsics::aarch64::vluti2q_laneq_f16
- intrinsics::aarch64::vluti2q_laneq_p16
- intrinsics::aarch64::vluti2q_laneq_p8
- intrinsics::aarch64::vluti2q_laneq_s16
- intrinsics::aarch64::vluti2q_laneq_s8
- intrinsics::aarch64::vluti2q_laneq_u16
- intrinsics::aarch64::vluti2q_laneq_u8
- intrinsics::aarch64::vluti4q_lane_f16_x2
- intrinsics::aarch64::vluti4q_lane_p16_x2
- intrinsics::aarch64::vluti4q_lane_p8
- intrinsics::aarch64::vluti4q_lane_s16_x2
- intrinsics::aarch64::vluti4q_lane_s8
- intrinsics::aarch64::vluti4q_lane_u16_x2
- intrinsics::aarch64::vluti4q_lane_u8
- intrinsics::aarch64::vluti4q_laneq_f16_x2
- intrinsics::aarch64::vluti4q_laneq_p16_x2
- intrinsics::aarch64::vluti4q_laneq_p8
- intrinsics::aarch64::vluti4q_laneq_s16_x2
- intrinsics::aarch64::vluti4q_laneq_s8
- intrinsics::aarch64::vluti4q_laneq_u16_x2
- intrinsics::aarch64::vluti4q_laneq_u8
- intrinsics::aarch64::vmax_f16
- intrinsics::aarch64::vmax_f32
- intrinsics::aarch64::vmax_f64
- intrinsics::aarch64::vmax_s16
- intrinsics::aarch64::vmax_s32
- intrinsics::aarch64::vmax_s8
- intrinsics::aarch64::vmax_u16
- intrinsics::aarch64::vmax_u32
- intrinsics::aarch64::vmax_u8
- intrinsics::aarch64::vmaxh_f16
- intrinsics::aarch64::vmaxnm_f16
- intrinsics::aarch64::vmaxnm_f32
- intrinsics::aarch64::vmaxnm_f64
- intrinsics::aarch64::vmaxnmh_f16
- intrinsics::aarch64::vmaxnmq_f16
- intrinsics::aarch64::vmaxnmq_f32
- intrinsics::aarch64::vmaxnmq_f64
- intrinsics::aarch64::vmaxnmv_f16
- intrinsics::aarch64::vmaxnmv_f32
- intrinsics::aarch64::vmaxnmvq_f16
- intrinsics::aarch64::vmaxnmvq_f32
- intrinsics::aarch64::vmaxnmvq_f64
- intrinsics::aarch64::vmaxq_f16
- intrinsics::aarch64::vmaxq_f32
- intrinsics::aarch64::vmaxq_f64
- intrinsics::aarch64::vmaxq_s16
- intrinsics::aarch64::vmaxq_s32
- intrinsics::aarch64::vmaxq_s8
- intrinsics::aarch64::vmaxq_u16
- intrinsics::aarch64::vmaxq_u32
- intrinsics::aarch64::vmaxq_u8
- intrinsics::aarch64::vmaxv_f16
- intrinsics::aarch64::vmaxv_f32
- intrinsics::aarch64::vmaxv_s16
- intrinsics::aarch64::vmaxv_s32
- intrinsics::aarch64::vmaxv_s8
- intrinsics::aarch64::vmaxv_u16
- intrinsics::aarch64::vmaxv_u32
- intrinsics::aarch64::vmaxv_u8
- intrinsics::aarch64::vmaxvq_f16
- intrinsics::aarch64::vmaxvq_f32
- intrinsics::aarch64::vmaxvq_f64
- intrinsics::aarch64::vmaxvq_s16
- intrinsics::aarch64::vmaxvq_s32
- intrinsics::aarch64::vmaxvq_s8
- intrinsics::aarch64::vmaxvq_u16
- intrinsics::aarch64::vmaxvq_u32
- intrinsics::aarch64::vmaxvq_u8
- intrinsics::aarch64::vmin_f16
- intrinsics::aarch64::vmin_f32
- intrinsics::aarch64::vmin_f64
- intrinsics::aarch64::vmin_s16
- intrinsics::aarch64::vmin_s32
- intrinsics::aarch64::vmin_s8
- intrinsics::aarch64::vmin_u16
- intrinsics::aarch64::vmin_u32
- intrinsics::aarch64::vmin_u8
- intrinsics::aarch64::vminh_f16
- intrinsics::aarch64::vminnm_f16
- intrinsics::aarch64::vminnm_f32
- intrinsics::aarch64::vminnm_f64
- intrinsics::aarch64::vminnmh_f16
- intrinsics::aarch64::vminnmq_f16
- intrinsics::aarch64::vminnmq_f32
- intrinsics::aarch64::vminnmq_f64
- intrinsics::aarch64::vminnmv_f16
- intrinsics::aarch64::vminnmv_f32
- intrinsics::aarch64::vminnmvq_f16
- intrinsics::aarch64::vminnmvq_f32
- intrinsics::aarch64::vminnmvq_f64
- intrinsics::aarch64::vminq_f16
- intrinsics::aarch64::vminq_f32
- intrinsics::aarch64::vminq_f64
- intrinsics::aarch64::vminq_s16
- intrinsics::aarch64::vminq_s32
- intrinsics::aarch64::vminq_s8
- intrinsics::aarch64::vminq_u16
- intrinsics::aarch64::vminq_u32
- intrinsics::aarch64::vminq_u8
- intrinsics::aarch64::vminv_f16
- intrinsics::aarch64::vminv_f32
- intrinsics::aarch64::vminv_s16
- intrinsics::aarch64::vminv_s32
- intrinsics::aarch64::vminv_s8
- intrinsics::aarch64::vminv_u16
- intrinsics::aarch64::vminv_u32
- intrinsics::aarch64::vminv_u8
- intrinsics::aarch64::vminvq_f16
- intrinsics::aarch64::vminvq_f32
- intrinsics::aarch64::vminvq_f64
- intrinsics::aarch64::vminvq_s16
- intrinsics::aarch64::vminvq_s32
- intrinsics::aarch64::vminvq_s8
- intrinsics::aarch64::vminvq_u16
- intrinsics::aarch64::vminvq_u32
- intrinsics::aarch64::vminvq_u8
- intrinsics::aarch64::vmla_f32
- intrinsics::aarch64::vmla_f64
- intrinsics::aarch64::vmla_lane_f32
- intrinsics::aarch64::vmla_lane_s16
- intrinsics::aarch64::vmla_lane_s32
- intrinsics::aarch64::vmla_lane_u16
- intrinsics::aarch64::vmla_lane_u32
- intrinsics::aarch64::vmla_laneq_f32
- intrinsics::aarch64::vmla_laneq_s16
- intrinsics::aarch64::vmla_laneq_s32
- intrinsics::aarch64::vmla_laneq_u16
- intrinsics::aarch64::vmla_laneq_u32
- intrinsics::aarch64::vmla_n_f32
- intrinsics::aarch64::vmla_n_s16
- intrinsics::aarch64::vmla_n_s32
- intrinsics::aarch64::vmla_n_u16
- intrinsics::aarch64::vmla_n_u32
- intrinsics::aarch64::vmla_s16
- intrinsics::aarch64::vmla_s32
- intrinsics::aarch64::vmla_s8
- intrinsics::aarch64::vmla_u16
- intrinsics::aarch64::vmla_u32
- intrinsics::aarch64::vmla_u8
- intrinsics::aarch64::vmlal_high_lane_s16
- intrinsics::aarch64::vmlal_high_lane_s32
- intrinsics::aarch64::vmlal_high_lane_u16
- intrinsics::aarch64::vmlal_high_lane_u32
- intrinsics::aarch64::vmlal_high_laneq_s16
- intrinsics::aarch64::vmlal_high_laneq_s32
- intrinsics::aarch64::vmlal_high_laneq_u16
- intrinsics::aarch64::vmlal_high_laneq_u32
- intrinsics::aarch64::vmlal_high_n_s16
- intrinsics::aarch64::vmlal_high_n_s32
- intrinsics::aarch64::vmlal_high_n_u16
- intrinsics::aarch64::vmlal_high_n_u32
- intrinsics::aarch64::vmlal_high_s16
- intrinsics::aarch64::vmlal_high_s32
- intrinsics::aarch64::vmlal_high_s8
- intrinsics::aarch64::vmlal_high_u16
- intrinsics::aarch64::vmlal_high_u32
- intrinsics::aarch64::vmlal_high_u8
- intrinsics::aarch64::vmlal_lane_s16
- intrinsics::aarch64::vmlal_lane_s32
- intrinsics::aarch64::vmlal_lane_u16
- intrinsics::aarch64::vmlal_lane_u32
- intrinsics::aarch64::vmlal_laneq_s16
- intrinsics::aarch64::vmlal_laneq_s32
- intrinsics::aarch64::vmlal_laneq_u16
- intrinsics::aarch64::vmlal_laneq_u32
- intrinsics::aarch64::vmlal_n_s16
- intrinsics::aarch64::vmlal_n_s32
- intrinsics::aarch64::vmlal_n_u16
- intrinsics::aarch64::vmlal_n_u32
- intrinsics::aarch64::vmlal_s16
- intrinsics::aarch64::vmlal_s32
- intrinsics::aarch64::vmlal_s8
- intrinsics::aarch64::vmlal_u16
- intrinsics::aarch64::vmlal_u32
- intrinsics::aarch64::vmlal_u8
- intrinsics::aarch64::vmlaq_f32
- intrinsics::aarch64::vmlaq_f64
- intrinsics::aarch64::vmlaq_lane_f32
- intrinsics::aarch64::vmlaq_lane_s16
- intrinsics::aarch64::vmlaq_lane_s32
- intrinsics::aarch64::vmlaq_lane_u16
- intrinsics::aarch64::vmlaq_lane_u32
- intrinsics::aarch64::vmlaq_laneq_f32
- intrinsics::aarch64::vmlaq_laneq_s16
- intrinsics::aarch64::vmlaq_laneq_s32
- intrinsics::aarch64::vmlaq_laneq_u16
- intrinsics::aarch64::vmlaq_laneq_u32
- intrinsics::aarch64::vmlaq_n_f32
- intrinsics::aarch64::vmlaq_n_s16
- intrinsics::aarch64::vmlaq_n_s32
- intrinsics::aarch64::vmlaq_n_u16
- intrinsics::aarch64::vmlaq_n_u32
- intrinsics::aarch64::vmlaq_s16
- intrinsics::aarch64::vmlaq_s32
- intrinsics::aarch64::vmlaq_s8
- intrinsics::aarch64::vmlaq_u16
- intrinsics::aarch64::vmlaq_u32
- intrinsics::aarch64::vmlaq_u8
- intrinsics::aarch64::vmls_f32
- intrinsics::aarch64::vmls_f64
- intrinsics::aarch64::vmls_lane_f32
- intrinsics::aarch64::vmls_lane_s16
- intrinsics::aarch64::vmls_lane_s32
- intrinsics::aarch64::vmls_lane_u16
- intrinsics::aarch64::vmls_lane_u32
- intrinsics::aarch64::vmls_laneq_f32
- intrinsics::aarch64::vmls_laneq_s16
- intrinsics::aarch64::vmls_laneq_s32
- intrinsics::aarch64::vmls_laneq_u16
- intrinsics::aarch64::vmls_laneq_u32
- intrinsics::aarch64::vmls_n_f32
- intrinsics::aarch64::vmls_n_s16
- intrinsics::aarch64::vmls_n_s32
- intrinsics::aarch64::vmls_n_u16
- intrinsics::aarch64::vmls_n_u32
- intrinsics::aarch64::vmls_s16
- intrinsics::aarch64::vmls_s32
- intrinsics::aarch64::vmls_s8
- intrinsics::aarch64::vmls_u16
- intrinsics::aarch64::vmls_u32
- intrinsics::aarch64::vmls_u8
- intrinsics::aarch64::vmlsl_high_lane_s16
- intrinsics::aarch64::vmlsl_high_lane_s32
- intrinsics::aarch64::vmlsl_high_lane_u16
- intrinsics::aarch64::vmlsl_high_lane_u32
- intrinsics::aarch64::vmlsl_high_laneq_s16
- intrinsics::aarch64::vmlsl_high_laneq_s32
- intrinsics::aarch64::vmlsl_high_laneq_u16
- intrinsics::aarch64::vmlsl_high_laneq_u32
- intrinsics::aarch64::vmlsl_high_n_s16
- intrinsics::aarch64::vmlsl_high_n_s32
- intrinsics::aarch64::vmlsl_high_n_u16
- intrinsics::aarch64::vmlsl_high_n_u32
- intrinsics::aarch64::vmlsl_high_s16
- intrinsics::aarch64::vmlsl_high_s32
- intrinsics::aarch64::vmlsl_high_s8
- intrinsics::aarch64::vmlsl_high_u16
- intrinsics::aarch64::vmlsl_high_u32
- intrinsics::aarch64::vmlsl_high_u8
- intrinsics::aarch64::vmlsl_lane_s16
- intrinsics::aarch64::vmlsl_lane_s32
- intrinsics::aarch64::vmlsl_lane_u16
- intrinsics::aarch64::vmlsl_lane_u32
- intrinsics::aarch64::vmlsl_laneq_s16
- intrinsics::aarch64::vmlsl_laneq_s32
- intrinsics::aarch64::vmlsl_laneq_u16
- intrinsics::aarch64::vmlsl_laneq_u32
- intrinsics::aarch64::vmlsl_n_s16
- intrinsics::aarch64::vmlsl_n_s32
- intrinsics::aarch64::vmlsl_n_u16
- intrinsics::aarch64::vmlsl_n_u32
- intrinsics::aarch64::vmlsl_s16
- intrinsics::aarch64::vmlsl_s32
- intrinsics::aarch64::vmlsl_s8
- intrinsics::aarch64::vmlsl_u16
- intrinsics::aarch64::vmlsl_u32
- intrinsics::aarch64::vmlsl_u8
- intrinsics::aarch64::vmlsq_f32
- intrinsics::aarch64::vmlsq_f64
- intrinsics::aarch64::vmlsq_lane_f32
- intrinsics::aarch64::vmlsq_lane_s16
- intrinsics::aarch64::vmlsq_lane_s32
- intrinsics::aarch64::vmlsq_lane_u16
- intrinsics::aarch64::vmlsq_lane_u32
- intrinsics::aarch64::vmlsq_laneq_f32
- intrinsics::aarch64::vmlsq_laneq_s16
- intrinsics::aarch64::vmlsq_laneq_s32
- intrinsics::aarch64::vmlsq_laneq_u16
- intrinsics::aarch64::vmlsq_laneq_u32
- intrinsics::aarch64::vmlsq_n_f32
- intrinsics::aarch64::vmlsq_n_s16
- intrinsics::aarch64::vmlsq_n_s32
- intrinsics::aarch64::vmlsq_n_u16
- intrinsics::aarch64::vmlsq_n_u32
- intrinsics::aarch64::vmlsq_s16
- intrinsics::aarch64::vmlsq_s32
- intrinsics::aarch64::vmlsq_s8
- intrinsics::aarch64::vmlsq_u16
- intrinsics::aarch64::vmlsq_u32
- intrinsics::aarch64::vmlsq_u8
- intrinsics::aarch64::vmmlaq_s32
- intrinsics::aarch64::vmmlaq_u32
- intrinsics::aarch64::vmov_n_f16
- intrinsics::aarch64::vmov_n_f32
- intrinsics::aarch64::vmov_n_f64
- intrinsics::aarch64::vmov_n_p16
- intrinsics::aarch64::vmov_n_p64
- intrinsics::aarch64::vmov_n_p8
- intrinsics::aarch64::vmov_n_s16
- intrinsics::aarch64::vmov_n_s32
- intrinsics::aarch64::vmov_n_s64
- intrinsics::aarch64::vmov_n_s8
- intrinsics::aarch64::vmov_n_u16
- intrinsics::aarch64::vmov_n_u32
- intrinsics::aarch64::vmov_n_u64
- intrinsics::aarch64::vmov_n_u8
- intrinsics::aarch64::vmovl_high_s16
- intrinsics::aarch64::vmovl_high_s32
- intrinsics::aarch64::vmovl_high_s8
- intrinsics::aarch64::vmovl_high_u16
- intrinsics::aarch64::vmovl_high_u32
- intrinsics::aarch64::vmovl_high_u8
- intrinsics::aarch64::vmovl_s16
- intrinsics::aarch64::vmovl_s32
- intrinsics::aarch64::vmovl_s8
- intrinsics::aarch64::vmovl_u16
- intrinsics::aarch64::vmovl_u32
- intrinsics::aarch64::vmovl_u8
- intrinsics::aarch64::vmovn_high_s16
- intrinsics::aarch64::vmovn_high_s32
- intrinsics::aarch64::vmovn_high_s64
- intrinsics::aarch64::vmovn_high_u16
- intrinsics::aarch64::vmovn_high_u32
- intrinsics::aarch64::vmovn_high_u64
- intrinsics::aarch64::vmovn_s16
- intrinsics::aarch64::vmovn_s32
- intrinsics::aarch64::vmovn_s64
- intrinsics::aarch64::vmovn_u16
- intrinsics::aarch64::vmovn_u32
- intrinsics::aarch64::vmovn_u64
- intrinsics::aarch64::vmovq_n_f16
- intrinsics::aarch64::vmovq_n_f32
- intrinsics::aarch64::vmovq_n_f64
- intrinsics::aarch64::vmovq_n_p16
- intrinsics::aarch64::vmovq_n_p64
- intrinsics::aarch64::vmovq_n_p8
- intrinsics::aarch64::vmovq_n_s16
- intrinsics::aarch64::vmovq_n_s32
- intrinsics::aarch64::vmovq_n_s64
- intrinsics::aarch64::vmovq_n_s8
- intrinsics::aarch64::vmovq_n_u16
- intrinsics::aarch64::vmovq_n_u32
- intrinsics::aarch64::vmovq_n_u64
- intrinsics::aarch64::vmovq_n_u8
- intrinsics::aarch64::vmul_f16
- intrinsics::aarch64::vmul_f32
- intrinsics::aarch64::vmul_f64
- intrinsics::aarch64::vmul_lane_f16
- intrinsics::aarch64::vmul_lane_f32
- intrinsics::aarch64::vmul_lane_f64
- intrinsics::aarch64::vmul_lane_s16
- intrinsics::aarch64::vmul_lane_s32
- intrinsics::aarch64::vmul_lane_u16
- intrinsics::aarch64::vmul_lane_u32
- intrinsics::aarch64::vmul_laneq_f16
- intrinsics::aarch64::vmul_laneq_f32
- intrinsics::aarch64::vmul_laneq_f64
- intrinsics::aarch64::vmul_laneq_s16
- intrinsics::aarch64::vmul_laneq_s32
- intrinsics::aarch64::vmul_laneq_u16
- intrinsics::aarch64::vmul_laneq_u32
- intrinsics::aarch64::vmul_n_f16
- intrinsics::aarch64::vmul_n_f32
- intrinsics::aarch64::vmul_n_f64
- intrinsics::aarch64::vmul_n_s16
- intrinsics::aarch64::vmul_n_s32
- intrinsics::aarch64::vmul_n_u16
- intrinsics::aarch64::vmul_n_u32
- intrinsics::aarch64::vmul_p8
- intrinsics::aarch64::vmul_s16
- intrinsics::aarch64::vmul_s32
- intrinsics::aarch64::vmul_s8
- intrinsics::aarch64::vmul_u16
- intrinsics::aarch64::vmul_u32
- intrinsics::aarch64::vmul_u8
- intrinsics::aarch64::vmuld_lane_f64
- intrinsics::aarch64::vmuld_laneq_f64
- intrinsics::aarch64::vmulh_f16
- intrinsics::aarch64::vmulh_lane_f16
- intrinsics::aarch64::vmulh_laneq_f16
- intrinsics::aarch64::vmull_high_lane_s16
- intrinsics::aarch64::vmull_high_lane_s32
- intrinsics::aarch64::vmull_high_lane_u16
- intrinsics::aarch64::vmull_high_lane_u32
- intrinsics::aarch64::vmull_high_laneq_s16
- intrinsics::aarch64::vmull_high_laneq_s32
- intrinsics::aarch64::vmull_high_laneq_u16
- intrinsics::aarch64::vmull_high_laneq_u32
- intrinsics::aarch64::vmull_high_n_s16
- intrinsics::aarch64::vmull_high_n_s32
- intrinsics::aarch64::vmull_high_n_u16
- intrinsics::aarch64::vmull_high_n_u32
- intrinsics::aarch64::vmull_high_p64
- intrinsics::aarch64::vmull_high_p8
- intrinsics::aarch64::vmull_high_s16
- intrinsics::aarch64::vmull_high_s32
- intrinsics::aarch64::vmull_high_s8
- intrinsics::aarch64::vmull_high_u16
- intrinsics::aarch64::vmull_high_u32
- intrinsics::aarch64::vmull_high_u8
- intrinsics::aarch64::vmull_lane_s16
- intrinsics::aarch64::vmull_lane_s32
- intrinsics::aarch64::vmull_lane_u16
- intrinsics::aarch64::vmull_lane_u32
- intrinsics::aarch64::vmull_laneq_s16
- intrinsics::aarch64::vmull_laneq_s32
- intrinsics::aarch64::vmull_laneq_u16
- intrinsics::aarch64::vmull_laneq_u32
- intrinsics::aarch64::vmull_n_s16
- intrinsics::aarch64::vmull_n_s32
- intrinsics::aarch64::vmull_n_u16
- intrinsics::aarch64::vmull_n_u32
- intrinsics::aarch64::vmull_p64
- intrinsics::aarch64::vmull_p8
- intrinsics::aarch64::vmull_s16
- intrinsics::aarch64::vmull_s32
- intrinsics::aarch64::vmull_s8
- intrinsics::aarch64::vmull_u16
- intrinsics::aarch64::vmull_u32
- intrinsics::aarch64::vmull_u8
- intrinsics::aarch64::vmulq_f16
- intrinsics::aarch64::vmulq_f32
- intrinsics::aarch64::vmulq_f64
- intrinsics::aarch64::vmulq_lane_f16
- intrinsics::aarch64::vmulq_lane_f32
- intrinsics::aarch64::vmulq_lane_f64
- intrinsics::aarch64::vmulq_lane_s16
- intrinsics::aarch64::vmulq_lane_s32
- intrinsics::aarch64::vmulq_lane_u16
- intrinsics::aarch64::vmulq_lane_u32
- intrinsics::aarch64::vmulq_laneq_f16
- intrinsics::aarch64::vmulq_laneq_f32
- intrinsics::aarch64::vmulq_laneq_f64
- intrinsics::aarch64::vmulq_laneq_s16
- intrinsics::aarch64::vmulq_laneq_s32
- intrinsics::aarch64::vmulq_laneq_u16
- intrinsics::aarch64::vmulq_laneq_u32
- intrinsics::aarch64::vmulq_n_f16
- intrinsics::aarch64::vmulq_n_f32
- intrinsics::aarch64::vmulq_n_f64
- intrinsics::aarch64::vmulq_n_s16
- intrinsics::aarch64::vmulq_n_s32
- intrinsics::aarch64::vmulq_n_u16
- intrinsics::aarch64::vmulq_n_u32
- intrinsics::aarch64::vmulq_p8
- intrinsics::aarch64::vmulq_s16
- intrinsics::aarch64::vmulq_s32
- intrinsics::aarch64::vmulq_s8
- intrinsics::aarch64::vmulq_u16
- intrinsics::aarch64::vmulq_u32
- intrinsics::aarch64::vmulq_u8
- intrinsics::aarch64::vmuls_lane_f32
- intrinsics::aarch64::vmuls_laneq_f32
- intrinsics::aarch64::vmulx_f16
- intrinsics::aarch64::vmulx_f32
- intrinsics::aarch64::vmulx_f64
- intrinsics::aarch64::vmulx_lane_f16
- intrinsics::aarch64::vmulx_lane_f32
- intrinsics::aarch64::vmulx_lane_f64
- intrinsics::aarch64::vmulx_laneq_f16
- intrinsics::aarch64::vmulx_laneq_f32
- intrinsics::aarch64::vmulx_laneq_f64
- intrinsics::aarch64::vmulx_n_f16
- intrinsics::aarch64::vmulxd_f64
- intrinsics::aarch64::vmulxd_lane_f64
- intrinsics::aarch64::vmulxd_laneq_f64
- intrinsics::aarch64::vmulxh_f16
- intrinsics::aarch64::vmulxh_lane_f16
- intrinsics::aarch64::vmulxh_laneq_f16
- intrinsics::aarch64::vmulxq_f16
- intrinsics::aarch64::vmulxq_f32
- intrinsics::aarch64::vmulxq_f64
- intrinsics::aarch64::vmulxq_lane_f16
- intrinsics::aarch64::vmulxq_lane_f32
- intrinsics::aarch64::vmulxq_lane_f64
- intrinsics::aarch64::vmulxq_laneq_f16
- intrinsics::aarch64::vmulxq_laneq_f32
- intrinsics::aarch64::vmulxq_laneq_f64
- intrinsics::aarch64::vmulxq_n_f16
- intrinsics::aarch64::vmulxs_f32
- intrinsics::aarch64::vmulxs_lane_f32
- intrinsics::aarch64::vmulxs_laneq_f32
- intrinsics::aarch64::vmvn_p8
- intrinsics::aarch64::vmvn_s16
- intrinsics::aarch64::vmvn_s32
- intrinsics::aarch64::vmvn_s8
- intrinsics::aarch64::vmvn_u16
- intrinsics::aarch64::vmvn_u32
- intrinsics::aarch64::vmvn_u8
- intrinsics::aarch64::vmvnq_p8
- intrinsics::aarch64::vmvnq_s16
- intrinsics::aarch64::vmvnq_s32
- intrinsics::aarch64::vmvnq_s8
- intrinsics::aarch64::vmvnq_u16
- intrinsics::aarch64::vmvnq_u32
- intrinsics::aarch64::vmvnq_u8
- intrinsics::aarch64::vneg_f16
- intrinsics::aarch64::vneg_f32
- intrinsics::aarch64::vneg_f64
- intrinsics::aarch64::vneg_s16
- intrinsics::aarch64::vneg_s32
- intrinsics::aarch64::vneg_s64
- intrinsics::aarch64::vneg_s8
- intrinsics::aarch64::vnegd_s64
- intrinsics::aarch64::vnegh_f16
- intrinsics::aarch64::vnegq_f16
- intrinsics::aarch64::vnegq_f32
- intrinsics::aarch64::vnegq_f64
- intrinsics::aarch64::vnegq_s16
- intrinsics::aarch64::vnegq_s32
- intrinsics::aarch64::vnegq_s64
- intrinsics::aarch64::vnegq_s8
- intrinsics::aarch64::vorn_s16
- intrinsics::aarch64::vorn_s32
- intrinsics::aarch64::vorn_s64
- intrinsics::aarch64::vorn_s8
- intrinsics::aarch64::vorn_u16
- intrinsics::aarch64::vorn_u32
- intrinsics::aarch64::vorn_u64
- intrinsics::aarch64::vorn_u8
- intrinsics::aarch64::vornq_s16
- intrinsics::aarch64::vornq_s32
- intrinsics::aarch64::vornq_s64
- intrinsics::aarch64::vornq_s8
- intrinsics::aarch64::vornq_u16
- intrinsics::aarch64::vornq_u32
- intrinsics::aarch64::vornq_u64
- intrinsics::aarch64::vornq_u8
- intrinsics::aarch64::vorr_s16
- intrinsics::aarch64::vorr_s32
- intrinsics::aarch64::vorr_s64
- intrinsics::aarch64::vorr_s8
- intrinsics::aarch64::vorr_u16
- intrinsics::aarch64::vorr_u32
- intrinsics::aarch64::vorr_u64
- intrinsics::aarch64::vorr_u8
- intrinsics::aarch64::vorrq_s16
- intrinsics::aarch64::vorrq_s32
- intrinsics::aarch64::vorrq_s64
- intrinsics::aarch64::vorrq_s8
- intrinsics::aarch64::vorrq_u16
- intrinsics::aarch64::vorrq_u32
- intrinsics::aarch64::vorrq_u64
- intrinsics::aarch64::vorrq_u8
- intrinsics::aarch64::vpadal_s16
- intrinsics::aarch64::vpadal_s32
- intrinsics::aarch64::vpadal_s8
- intrinsics::aarch64::vpadal_u16
- intrinsics::aarch64::vpadal_u32
- intrinsics::aarch64::vpadal_u8
- intrinsics::aarch64::vpadalq_s16
- intrinsics::aarch64::vpadalq_s32
- intrinsics::aarch64::vpadalq_s8
- intrinsics::aarch64::vpadalq_u16
- intrinsics::aarch64::vpadalq_u32
- intrinsics::aarch64::vpadalq_u8
- intrinsics::aarch64::vpadd_f16
- intrinsics::aarch64::vpadd_f32
- intrinsics::aarch64::vpadd_s16
- intrinsics::aarch64::vpadd_s32
- intrinsics::aarch64::vpadd_s8
- intrinsics::aarch64::vpadd_u16
- intrinsics::aarch64::vpadd_u32
- intrinsics::aarch64::vpadd_u8
- intrinsics::aarch64::vpaddd_f64
- intrinsics::aarch64::vpaddd_s64
- intrinsics::aarch64::vpaddd_u64
- intrinsics::aarch64::vpaddl_s16
- intrinsics::aarch64::vpaddl_s32
- intrinsics::aarch64::vpaddl_s8
- intrinsics::aarch64::vpaddl_u16
- intrinsics::aarch64::vpaddl_u32
- intrinsics::aarch64::vpaddl_u8
- intrinsics::aarch64::vpaddlq_s16
- intrinsics::aarch64::vpaddlq_s32
- intrinsics::aarch64::vpaddlq_s8
- intrinsics::aarch64::vpaddlq_u16
- intrinsics::aarch64::vpaddlq_u32
- intrinsics::aarch64::vpaddlq_u8
- intrinsics::aarch64::vpaddq_f16
- intrinsics::aarch64::vpaddq_f32
- intrinsics::aarch64::vpaddq_f64
- intrinsics::aarch64::vpaddq_s16
- intrinsics::aarch64::vpaddq_s32
- intrinsics::aarch64::vpaddq_s64
- intrinsics::aarch64::vpaddq_s8
- intrinsics::aarch64::vpaddq_u16
- intrinsics::aarch64::vpaddq_u32
- intrinsics::aarch64::vpaddq_u64
- intrinsics::aarch64::vpaddq_u8
- intrinsics::aarch64::vpadds_f32
- intrinsics::aarch64::vpmax_f16
- intrinsics::aarch64::vpmax_f32
- intrinsics::aarch64::vpmax_s16
- intrinsics::aarch64::vpmax_s32
- intrinsics::aarch64::vpmax_s8
- intrinsics::aarch64::vpmax_u16
- intrinsics::aarch64::vpmax_u32
- intrinsics::aarch64::vpmax_u8
- intrinsics::aarch64::vpmaxnm_f16
- intrinsics::aarch64::vpmaxnm_f32
- intrinsics::aarch64::vpmaxnmq_f16
- intrinsics::aarch64::vpmaxnmq_f32
- intrinsics::aarch64::vpmaxnmq_f64
- intrinsics::aarch64::vpmaxnmqd_f64
- intrinsics::aarch64::vpmaxnms_f32
- intrinsics::aarch64::vpmaxq_f16
- intrinsics::aarch64::vpmaxq_f32
- intrinsics::aarch64::vpmaxq_f64
- intrinsics::aarch64::vpmaxq_s16
- intrinsics::aarch64::vpmaxq_s32
- intrinsics::aarch64::vpmaxq_s8
- intrinsics::aarch64::vpmaxq_u16
- intrinsics::aarch64::vpmaxq_u32
- intrinsics::aarch64::vpmaxq_u8
- intrinsics::aarch64::vpmaxqd_f64
- intrinsics::aarch64::vpmaxs_f32
- intrinsics::aarch64::vpmin_f16
- intrinsics::aarch64::vpmin_f32
- intrinsics::aarch64::vpmin_s16
- intrinsics::aarch64::vpmin_s32
- intrinsics::aarch64::vpmin_s8
- intrinsics::aarch64::vpmin_u16
- intrinsics::aarch64::vpmin_u32
- intrinsics::aarch64::vpmin_u8
- intrinsics::aarch64::vpminnm_f16
- intrinsics::aarch64::vpminnm_f32
- intrinsics::aarch64::vpminnmq_f16
- intrinsics::aarch64::vpminnmq_f32
- intrinsics::aarch64::vpminnmq_f64
- intrinsics::aarch64::vpminnmqd_f64
- intrinsics::aarch64::vpminnms_f32
- intrinsics::aarch64::vpminq_f16
- intrinsics::aarch64::vpminq_f32
- intrinsics::aarch64::vpminq_f64
- intrinsics::aarch64::vpminq_s16
- intrinsics::aarch64::vpminq_s32
- intrinsics::aarch64::vpminq_s8
- intrinsics::aarch64::vpminq_u16
- intrinsics::aarch64::vpminq_u32
- intrinsics::aarch64::vpminq_u8
- intrinsics::aarch64::vpminqd_f64
- intrinsics::aarch64::vpmins_f32
- intrinsics::aarch64::vqabs_s16
- intrinsics::aarch64::vqabs_s32
- intrinsics::aarch64::vqabs_s64
- intrinsics::aarch64::vqabs_s8
- intrinsics::aarch64::vqabsb_s8
- intrinsics::aarch64::vqabsd_s64
- intrinsics::aarch64::vqabsh_s16
- intrinsics::aarch64::vqabsq_s16
- intrinsics::aarch64::vqabsq_s32
- intrinsics::aarch64::vqabsq_s64
- intrinsics::aarch64::vqabsq_s8
- intrinsics::aarch64::vqabss_s32
- intrinsics::aarch64::vqadd_s16
- intrinsics::aarch64::vqadd_s32
- intrinsics::aarch64::vqadd_s64
- intrinsics::aarch64::vqadd_s8
- intrinsics::aarch64::vqadd_u16
- intrinsics::aarch64::vqadd_u32
- intrinsics::aarch64::vqadd_u64
- intrinsics::aarch64::vqadd_u8
- intrinsics::aarch64::vqaddb_s8
- intrinsics::aarch64::vqaddb_u8
- intrinsics::aarch64::vqaddd_s64
- intrinsics::aarch64::vqaddd_u64
- intrinsics::aarch64::vqaddh_s16
- intrinsics::aarch64::vqaddh_u16
- intrinsics::aarch64::vqaddq_s16
- intrinsics::aarch64::vqaddq_s32
- intrinsics::aarch64::vqaddq_s64
- intrinsics::aarch64::vqaddq_s8
- intrinsics::aarch64::vqaddq_u16
- intrinsics::aarch64::vqaddq_u32
- intrinsics::aarch64::vqaddq_u64
- intrinsics::aarch64::vqaddq_u8
- intrinsics::aarch64::vqadds_s32
- intrinsics::aarch64::vqadds_u32
- intrinsics::aarch64::vqdmlal_high_lane_s16
- intrinsics::aarch64::vqdmlal_high_lane_s32
- intrinsics::aarch64::vqdmlal_high_laneq_s16
- intrinsics::aarch64::vqdmlal_high_laneq_s32
- intrinsics::aarch64::vqdmlal_high_n_s16
- intrinsics::aarch64::vqdmlal_high_n_s32
- intrinsics::aarch64::vqdmlal_high_s16
- intrinsics::aarch64::vqdmlal_high_s32
- intrinsics::aarch64::vqdmlal_lane_s16
- intrinsics::aarch64::vqdmlal_lane_s32
- intrinsics::aarch64::vqdmlal_laneq_s16
- intrinsics::aarch64::vqdmlal_laneq_s32
- intrinsics::aarch64::vqdmlal_n_s16
- intrinsics::aarch64::vqdmlal_n_s32
- intrinsics::aarch64::vqdmlal_s16
- intrinsics::aarch64::vqdmlal_s32
- intrinsics::aarch64::vqdmlalh_lane_s16
- intrinsics::aarch64::vqdmlalh_laneq_s16
- intrinsics::aarch64::vqdmlalh_s16
- intrinsics::aarch64::vqdmlals_lane_s32
- intrinsics::aarch64::vqdmlals_laneq_s32
- intrinsics::aarch64::vqdmlals_s32
- intrinsics::aarch64::vqdmlsl_high_lane_s16
- intrinsics::aarch64::vqdmlsl_high_lane_s32
- intrinsics::aarch64::vqdmlsl_high_laneq_s16
- intrinsics::aarch64::vqdmlsl_high_laneq_s32
- intrinsics::aarch64::vqdmlsl_high_n_s16
- intrinsics::aarch64::vqdmlsl_high_n_s32
- intrinsics::aarch64::vqdmlsl_high_s16
- intrinsics::aarch64::vqdmlsl_high_s32
- intrinsics::aarch64::vqdmlsl_lane_s16
- intrinsics::aarch64::vqdmlsl_lane_s32
- intrinsics::aarch64::vqdmlsl_laneq_s16
- intrinsics::aarch64::vqdmlsl_laneq_s32
- intrinsics::aarch64::vqdmlsl_n_s16
- intrinsics::aarch64::vqdmlsl_n_s32
- intrinsics::aarch64::vqdmlsl_s16
- intrinsics::aarch64::vqdmlsl_s32
- intrinsics::aarch64::vqdmlslh_lane_s16
- intrinsics::aarch64::vqdmlslh_laneq_s16
- intrinsics::aarch64::vqdmlslh_s16
- intrinsics::aarch64::vqdmlsls_lane_s32
- intrinsics::aarch64::vqdmlsls_laneq_s32
- intrinsics::aarch64::vqdmlsls_s32
- intrinsics::aarch64::vqdmulh_lane_s16
- intrinsics::aarch64::vqdmulh_lane_s32
- intrinsics::aarch64::vqdmulh_laneq_s16
- intrinsics::aarch64::vqdmulh_laneq_s32
- intrinsics::aarch64::vqdmulh_n_s16
- intrinsics::aarch64::vqdmulh_n_s32
- intrinsics::aarch64::vqdmulh_s16
- intrinsics::aarch64::vqdmulh_s32
- intrinsics::aarch64::vqdmulhh_lane_s16
- intrinsics::aarch64::vqdmulhh_laneq_s16
- intrinsics::aarch64::vqdmulhh_s16
- intrinsics::aarch64::vqdmulhq_lane_s16
- intrinsics::aarch64::vqdmulhq_lane_s32
- intrinsics::aarch64::vqdmulhq_laneq_s16
- intrinsics::aarch64::vqdmulhq_laneq_s32
- intrinsics::aarch64::vqdmulhq_n_s16
- intrinsics::aarch64::vqdmulhq_n_s32
- intrinsics::aarch64::vqdmulhq_s16
- intrinsics::aarch64::vqdmulhq_s32
- intrinsics::aarch64::vqdmulhs_lane_s32
- intrinsics::aarch64::vqdmulhs_laneq_s32
- intrinsics::aarch64::vqdmulhs_s32
- intrinsics::aarch64::vqdmull_high_lane_s16
- intrinsics::aarch64::vqdmull_high_lane_s32
- intrinsics::aarch64::vqdmull_high_laneq_s16
- intrinsics::aarch64::vqdmull_high_laneq_s32
- intrinsics::aarch64::vqdmull_high_n_s16
- intrinsics::aarch64::vqdmull_high_n_s32
- intrinsics::aarch64::vqdmull_high_s16
- intrinsics::aarch64::vqdmull_high_s32
- intrinsics::aarch64::vqdmull_lane_s16
- intrinsics::aarch64::vqdmull_lane_s32
- intrinsics::aarch64::vqdmull_laneq_s16
- intrinsics::aarch64::vqdmull_laneq_s32
- intrinsics::aarch64::vqdmull_n_s16
- intrinsics::aarch64::vqdmull_n_s32
- intrinsics::aarch64::vqdmull_s16
- intrinsics::aarch64::vqdmull_s32
- intrinsics::aarch64::vqdmullh_lane_s16
- intrinsics::aarch64::vqdmullh_laneq_s16
- intrinsics::aarch64::vqdmullh_s16
- intrinsics::aarch64::vqdmulls_lane_s32
- intrinsics::aarch64::vqdmulls_laneq_s32
- intrinsics::aarch64::vqdmulls_s32
- intrinsics::aarch64::vqmovn_high_s16
- intrinsics::aarch64::vqmovn_high_s32
- intrinsics::aarch64::vqmovn_high_s64
- intrinsics::aarch64::vqmovn_high_u16
- intrinsics::aarch64::vqmovn_high_u32
- intrinsics::aarch64::vqmovn_high_u64
- intrinsics::aarch64::vqmovn_s16
- intrinsics::aarch64::vqmovn_s32
- intrinsics::aarch64::vqmovn_s64
- intrinsics::aarch64::vqmovn_u16
- intrinsics::aarch64::vqmovn_u32
- intrinsics::aarch64::vqmovn_u64
- intrinsics::aarch64::vqmovnd_s64
- intrinsics::aarch64::vqmovnd_u64
- intrinsics::aarch64::vqmovnh_s16
- intrinsics::aarch64::vqmovnh_u16
- intrinsics::aarch64::vqmovns_s32
- intrinsics::aarch64::vqmovns_u32
- intrinsics::aarch64::vqmovun_high_s16
- intrinsics::aarch64::vqmovun_high_s32
- intrinsics::aarch64::vqmovun_high_s64
- intrinsics::aarch64::vqmovun_s16
- intrinsics::aarch64::vqmovun_s32
- intrinsics::aarch64::vqmovun_s64
- intrinsics::aarch64::vqmovund_s64
- intrinsics::aarch64::vqmovunh_s16
- intrinsics::aarch64::vqmovuns_s32
- intrinsics::aarch64::vqneg_s16
- intrinsics::aarch64::vqneg_s32
- intrinsics::aarch64::vqneg_s64
- intrinsics::aarch64::vqneg_s8
- intrinsics::aarch64::vqnegb_s8
- intrinsics::aarch64::vqnegd_s64
- intrinsics::aarch64::vqnegh_s16
- intrinsics::aarch64::vqnegq_s16
- intrinsics::aarch64::vqnegq_s32
- intrinsics::aarch64::vqnegq_s64
- intrinsics::aarch64::vqnegq_s8
- intrinsics::aarch64::vqnegs_s32
- intrinsics::aarch64::vqrdmlah_lane_s16
- intrinsics::aarch64::vqrdmlah_lane_s32
- intrinsics::aarch64::vqrdmlah_laneq_s16
- intrinsics::aarch64::vqrdmlah_laneq_s32
- intrinsics::aarch64::vqrdmlah_s16
- intrinsics::aarch64::vqrdmlah_s32
- intrinsics::aarch64::vqrdmlahh_lane_s16
- intrinsics::aarch64::vqrdmlahh_laneq_s16
- intrinsics::aarch64::vqrdmlahh_s16
- intrinsics::aarch64::vqrdmlahq_lane_s16
- intrinsics::aarch64::vqrdmlahq_lane_s32
- intrinsics::aarch64::vqrdmlahq_laneq_s16
- intrinsics::aarch64::vqrdmlahq_laneq_s32
- intrinsics::aarch64::vqrdmlahq_s16
- intrinsics::aarch64::vqrdmlahq_s32
- intrinsics::aarch64::vqrdmlahs_lane_s32
- intrinsics::aarch64::vqrdmlahs_laneq_s32
- intrinsics::aarch64::vqrdmlahs_s32
- intrinsics::aarch64::vqrdmlsh_lane_s16
- intrinsics::aarch64::vqrdmlsh_lane_s32
- intrinsics::aarch64::vqrdmlsh_laneq_s16
- intrinsics::aarch64::vqrdmlsh_laneq_s32
- intrinsics::aarch64::vqrdmlsh_s16
- intrinsics::aarch64::vqrdmlsh_s32
- intrinsics::aarch64::vqrdmlshh_lane_s16
- intrinsics::aarch64::vqrdmlshh_laneq_s16
- intrinsics::aarch64::vqrdmlshh_s16
- intrinsics::aarch64::vqrdmlshq_lane_s16
- intrinsics::aarch64::vqrdmlshq_lane_s32
- intrinsics::aarch64::vqrdmlshq_laneq_s16
- intrinsics::aarch64::vqrdmlshq_laneq_s32
- intrinsics::aarch64::vqrdmlshq_s16
- intrinsics::aarch64::vqrdmlshq_s32
- intrinsics::aarch64::vqrdmlshs_lane_s32
- intrinsics::aarch64::vqrdmlshs_laneq_s32
- intrinsics::aarch64::vqrdmlshs_s32
- intrinsics::aarch64::vqrdmulh_lane_s16
- intrinsics::aarch64::vqrdmulh_lane_s32
- intrinsics::aarch64::vqrdmulh_laneq_s16
- intrinsics::aarch64::vqrdmulh_laneq_s32
- intrinsics::aarch64::vqrdmulh_n_s16
- intrinsics::aarch64::vqrdmulh_n_s32
- intrinsics::aarch64::vqrdmulh_s16
- intrinsics::aarch64::vqrdmulh_s32
- intrinsics::aarch64::vqrdmulhh_lane_s16
- intrinsics::aarch64::vqrdmulhh_laneq_s16
- intrinsics::aarch64::vqrdmulhh_s16
- intrinsics::aarch64::vqrdmulhq_lane_s16
- intrinsics::aarch64::vqrdmulhq_lane_s32
- intrinsics::aarch64::vqrdmulhq_laneq_s16
- intrinsics::aarch64::vqrdmulhq_laneq_s32
- intrinsics::aarch64::vqrdmulhq_n_s16
- intrinsics::aarch64::vqrdmulhq_n_s32
- intrinsics::aarch64::vqrdmulhq_s16
- intrinsics::aarch64::vqrdmulhq_s32
- intrinsics::aarch64::vqrdmulhs_lane_s32
- intrinsics::aarch64::vqrdmulhs_laneq_s32
- intrinsics::aarch64::vqrdmulhs_s32
- intrinsics::aarch64::vqrshl_s16
- intrinsics::aarch64::vqrshl_s32
- intrinsics::aarch64::vqrshl_s64
- intrinsics::aarch64::vqrshl_s8
- intrinsics::aarch64::vqrshl_u16
- intrinsics::aarch64::vqrshl_u32
- intrinsics::aarch64::vqrshl_u64
- intrinsics::aarch64::vqrshl_u8
- intrinsics::aarch64::vqrshlb_s8
- intrinsics::aarch64::vqrshlb_u8
- intrinsics::aarch64::vqrshld_s64
- intrinsics::aarch64::vqrshld_u64
- intrinsics::aarch64::vqrshlh_s16
- intrinsics::aarch64::vqrshlh_u16
- intrinsics::aarch64::vqrshlq_s16
- intrinsics::aarch64::vqrshlq_s32
- intrinsics::aarch64::vqrshlq_s64
- intrinsics::aarch64::vqrshlq_s8
- intrinsics::aarch64::vqrshlq_u16
- intrinsics::aarch64::vqrshlq_u32
- intrinsics::aarch64::vqrshlq_u64
- intrinsics::aarch64::vqrshlq_u8
- intrinsics::aarch64::vqrshls_s32
- intrinsics::aarch64::vqrshls_u32
- intrinsics::aarch64::vqrshrn_high_n_s16
- intrinsics::aarch64::vqrshrn_high_n_s32
- intrinsics::aarch64::vqrshrn_high_n_s64
- intrinsics::aarch64::vqrshrn_high_n_u16
- intrinsics::aarch64::vqrshrn_high_n_u32
- intrinsics::aarch64::vqrshrn_high_n_u64
- intrinsics::aarch64::vqrshrn_n_s16
- intrinsics::aarch64::vqrshrn_n_s32
- intrinsics::aarch64::vqrshrn_n_s64
- intrinsics::aarch64::vqrshrn_n_u16
- intrinsics::aarch64::vqrshrn_n_u32
- intrinsics::aarch64::vqrshrn_n_u64
- intrinsics::aarch64::vqrshrnd_n_s64
- intrinsics::aarch64::vqrshrnd_n_u64
- intrinsics::aarch64::vqrshrnh_n_s16
- intrinsics::aarch64::vqrshrnh_n_u16
- intrinsics::aarch64::vqrshrns_n_s32
- intrinsics::aarch64::vqrshrns_n_u32
- intrinsics::aarch64::vqrshrun_high_n_s16
- intrinsics::aarch64::vqrshrun_high_n_s32
- intrinsics::aarch64::vqrshrun_high_n_s64
- intrinsics::aarch64::vqrshrun_n_s16
- intrinsics::aarch64::vqrshrun_n_s32
- intrinsics::aarch64::vqrshrun_n_s64
- intrinsics::aarch64::vqrshrund_n_s64
- intrinsics::aarch64::vqrshrunh_n_s16
- intrinsics::aarch64::vqrshruns_n_s32
- intrinsics::aarch64::vqshl_n_s16
- intrinsics::aarch64::vqshl_n_s32
- intrinsics::aarch64::vqshl_n_s64
- intrinsics::aarch64::vqshl_n_s8
- intrinsics::aarch64::vqshl_n_u16
- intrinsics::aarch64::vqshl_n_u32
- intrinsics::aarch64::vqshl_n_u64
- intrinsics::aarch64::vqshl_n_u8
- intrinsics::aarch64::vqshl_s16
- intrinsics::aarch64::vqshl_s32
- intrinsics::aarch64::vqshl_s64
- intrinsics::aarch64::vqshl_s8
- intrinsics::aarch64::vqshl_u16
- intrinsics::aarch64::vqshl_u32
- intrinsics::aarch64::vqshl_u64
- intrinsics::aarch64::vqshl_u8
- intrinsics::aarch64::vqshlb_n_s8
- intrinsics::aarch64::vqshlb_n_u8
- intrinsics::aarch64::vqshlb_s8
- intrinsics::aarch64::vqshlb_u8
- intrinsics::aarch64::vqshld_n_s64
- intrinsics::aarch64::vqshld_n_u64
- intrinsics::aarch64::vqshld_s64
- intrinsics::aarch64::vqshld_u64
- intrinsics::aarch64::vqshlh_n_s16
- intrinsics::aarch64::vqshlh_n_u16
- intrinsics::aarch64::vqshlh_s16
- intrinsics::aarch64::vqshlh_u16
- intrinsics::aarch64::vqshlq_n_s16
- intrinsics::aarch64::vqshlq_n_s32
- intrinsics::aarch64::vqshlq_n_s64
- intrinsics::aarch64::vqshlq_n_s8
- intrinsics::aarch64::vqshlq_n_u16
- intrinsics::aarch64::vqshlq_n_u32
- intrinsics::aarch64::vqshlq_n_u64
- intrinsics::aarch64::vqshlq_n_u8
- intrinsics::aarch64::vqshlq_s16
- intrinsics::aarch64::vqshlq_s32
- intrinsics::aarch64::vqshlq_s64
- intrinsics::aarch64::vqshlq_s8
- intrinsics::aarch64::vqshlq_u16
- intrinsics::aarch64::vqshlq_u32
- intrinsics::aarch64::vqshlq_u64
- intrinsics::aarch64::vqshlq_u8
- intrinsics::aarch64::vqshls_n_s32
- intrinsics::aarch64::vqshls_n_u32
- intrinsics::aarch64::vqshls_s32
- intrinsics::aarch64::vqshls_u32
- intrinsics::aarch64::vqshlu_n_s16
- intrinsics::aarch64::vqshlu_n_s32
- intrinsics::aarch64::vqshlu_n_s64
- intrinsics::aarch64::vqshlu_n_s8
- intrinsics::aarch64::vqshlub_n_s8
- intrinsics::aarch64::vqshlud_n_s64
- intrinsics::aarch64::vqshluh_n_s16
- intrinsics::aarch64::vqshluq_n_s16
- intrinsics::aarch64::vqshluq_n_s32
- intrinsics::aarch64::vqshluq_n_s64
- intrinsics::aarch64::vqshluq_n_s8
- intrinsics::aarch64::vqshlus_n_s32
- intrinsics::aarch64::vqshrn_high_n_s16
- intrinsics::aarch64::vqshrn_high_n_s32
- intrinsics::aarch64::vqshrn_high_n_s64
- intrinsics::aarch64::vqshrn_high_n_u16
- intrinsics::aarch64::vqshrn_high_n_u32
- intrinsics::aarch64::vqshrn_high_n_u64
- intrinsics::aarch64::vqshrn_n_s16
- intrinsics::aarch64::vqshrn_n_s32
- intrinsics::aarch64::vqshrn_n_s64
- intrinsics::aarch64::vqshrn_n_u16
- intrinsics::aarch64::vqshrn_n_u32
- intrinsics::aarch64::vqshrn_n_u64
- intrinsics::aarch64::vqshrnd_n_s64
- intrinsics::aarch64::vqshrnd_n_u64
- intrinsics::aarch64::vqshrnh_n_s16
- intrinsics::aarch64::vqshrnh_n_u16
- intrinsics::aarch64::vqshrns_n_s32
- intrinsics::aarch64::vqshrns_n_u32
- intrinsics::aarch64::vqshrun_high_n_s16
- intrinsics::aarch64::vqshrun_high_n_s32
- intrinsics::aarch64::vqshrun_high_n_s64
- intrinsics::aarch64::vqshrun_n_s16
- intrinsics::aarch64::vqshrun_n_s32
- intrinsics::aarch64::vqshrun_n_s64
- intrinsics::aarch64::vqshrund_n_s64
- intrinsics::aarch64::vqshrunh_n_s16
- intrinsics::aarch64::vqshruns_n_s32
- intrinsics::aarch64::vqsub_s16
- intrinsics::aarch64::vqsub_s32
- intrinsics::aarch64::vqsub_s64
- intrinsics::aarch64::vqsub_s8
- intrinsics::aarch64::vqsub_u16
- intrinsics::aarch64::vqsub_u32
- intrinsics::aarch64::vqsub_u64
- intrinsics::aarch64::vqsub_u8
- intrinsics::aarch64::vqsubb_s8
- intrinsics::aarch64::vqsubb_u8
- intrinsics::aarch64::vqsubd_s64
- intrinsics::aarch64::vqsubd_u64
- intrinsics::aarch64::vqsubh_s16
- intrinsics::aarch64::vqsubh_u16
- intrinsics::aarch64::vqsubq_s16
- intrinsics::aarch64::vqsubq_s32
- intrinsics::aarch64::vqsubq_s64
- intrinsics::aarch64::vqsubq_s8
- intrinsics::aarch64::vqsubq_u16
- intrinsics::aarch64::vqsubq_u32
- intrinsics::aarch64::vqsubq_u64
- intrinsics::aarch64::vqsubq_u8
- intrinsics::aarch64::vqsubs_s32
- intrinsics::aarch64::vqsubs_u32
- intrinsics::aarch64::vqtbl1_p8
- intrinsics::aarch64::vqtbl1_s8
- intrinsics::aarch64::vqtbl1_u8
- intrinsics::aarch64::vqtbl1q_p8
- intrinsics::aarch64::vqtbl1q_s8
- intrinsics::aarch64::vqtbl1q_u8
- intrinsics::aarch64::vqtbl2_p8
- intrinsics::aarch64::vqtbl2_s8
- intrinsics::aarch64::vqtbl2_u8
- intrinsics::aarch64::vqtbl2q_p8
- intrinsics::aarch64::vqtbl2q_s8
- intrinsics::aarch64::vqtbl2q_u8
- intrinsics::aarch64::vqtbl3_p8
- intrinsics::aarch64::vqtbl3_s8
- intrinsics::aarch64::vqtbl3_u8
- intrinsics::aarch64::vqtbl3q_p8
- intrinsics::aarch64::vqtbl3q_s8
- intrinsics::aarch64::vqtbl3q_u8
- intrinsics::aarch64::vqtbl4_p8
- intrinsics::aarch64::vqtbl4_s8
- intrinsics::aarch64::vqtbl4_u8
- intrinsics::aarch64::vqtbl4q_p8
- intrinsics::aarch64::vqtbl4q_s8
- intrinsics::aarch64::vqtbl4q_u8
- intrinsics::aarch64::vqtbx1_p8
- intrinsics::aarch64::vqtbx1_s8
- intrinsics::aarch64::vqtbx1_u8
- intrinsics::aarch64::vqtbx1q_p8
- intrinsics::aarch64::vqtbx1q_s8
- intrinsics::aarch64::vqtbx1q_u8
- intrinsics::aarch64::vqtbx2_p8
- intrinsics::aarch64::vqtbx2_s8
- intrinsics::aarch64::vqtbx2_u8
- intrinsics::aarch64::vqtbx2q_p8
- intrinsics::aarch64::vqtbx2q_s8
- intrinsics::aarch64::vqtbx2q_u8
- intrinsics::aarch64::vqtbx3_p8
- intrinsics::aarch64::vqtbx3_s8
- intrinsics::aarch64::vqtbx3_u8
- intrinsics::aarch64::vqtbx3q_p8
- intrinsics::aarch64::vqtbx3q_s8
- intrinsics::aarch64::vqtbx3q_u8
- intrinsics::aarch64::vqtbx4_p8
- intrinsics::aarch64::vqtbx4_s8
- intrinsics::aarch64::vqtbx4_u8
- intrinsics::aarch64::vqtbx4q_p8
- intrinsics::aarch64::vqtbx4q_s8
- intrinsics::aarch64::vqtbx4q_u8
- intrinsics::aarch64::vraddhn_high_s16
- intrinsics::aarch64::vraddhn_high_s32
- intrinsics::aarch64::vraddhn_high_s64
- intrinsics::aarch64::vraddhn_high_u16
- intrinsics::aarch64::vraddhn_high_u32
- intrinsics::aarch64::vraddhn_high_u64
- intrinsics::aarch64::vraddhn_s16
- intrinsics::aarch64::vraddhn_s32
- intrinsics::aarch64::vraddhn_s64
- intrinsics::aarch64::vraddhn_u16
- intrinsics::aarch64::vraddhn_u32
- intrinsics::aarch64::vraddhn_u64
- intrinsics::aarch64::vrax1q_u64
- intrinsics::aarch64::vrbit_p8
- intrinsics::aarch64::vrbit_s8
- intrinsics::aarch64::vrbit_u8
- intrinsics::aarch64::vrbitq_p8
- intrinsics::aarch64::vrbitq_s8
- intrinsics::aarch64::vrbitq_u8
- intrinsics::aarch64::vrecpe_f16
- intrinsics::aarch64::vrecpe_f32
- intrinsics::aarch64::vrecpe_f64
- intrinsics::aarch64::vrecpe_u32
- intrinsics::aarch64::vrecped_f64
- intrinsics::aarch64::vrecpeh_f16
- intrinsics::aarch64::vrecpeq_f16
- intrinsics::aarch64::vrecpeq_f32
- intrinsics::aarch64::vrecpeq_f64
- intrinsics::aarch64::vrecpeq_u32
- intrinsics::aarch64::vrecpes_f32
- intrinsics::aarch64::vrecps_f16
- intrinsics::aarch64::vrecps_f32
- intrinsics::aarch64::vrecps_f64
- intrinsics::aarch64::vrecpsd_f64
- intrinsics::aarch64::vrecpsh_f16
- intrinsics::aarch64::vrecpsq_f16
- intrinsics::aarch64::vrecpsq_f32
- intrinsics::aarch64::vrecpsq_f64
- intrinsics::aarch64::vrecpss_f32
- intrinsics::aarch64::vrecpxd_f64
- intrinsics::aarch64::vrecpxh_f16
- intrinsics::aarch64::vrecpxs_f32
- intrinsics::aarch64::vreinterpret_f16_f32
- intrinsics::aarch64::vreinterpret_f16_f64
- intrinsics::aarch64::vreinterpret_f16_p16
- intrinsics::aarch64::vreinterpret_f16_p64
- intrinsics::aarch64::vreinterpret_f16_p8
- intrinsics::aarch64::vreinterpret_f16_s16
- intrinsics::aarch64::vreinterpret_f16_s32
- intrinsics::aarch64::vreinterpret_f16_s64
- intrinsics::aarch64::vreinterpret_f16_s8
- intrinsics::aarch64::vreinterpret_f16_u16
- intrinsics::aarch64::vreinterpret_f16_u32
- intrinsics::aarch64::vreinterpret_f16_u64
- intrinsics::aarch64::vreinterpret_f16_u8
- intrinsics::aarch64::vreinterpret_f32_f16
- intrinsics::aarch64::vreinterpret_f32_f64
- intrinsics::aarch64::vreinterpret_f32_p16
- intrinsics::aarch64::vreinterpret_f32_p64
- intrinsics::aarch64::vreinterpret_f32_p8
- intrinsics::aarch64::vreinterpret_f32_s16
- intrinsics::aarch64::vreinterpret_f32_s32
- intrinsics::aarch64::vreinterpret_f32_s64
- intrinsics::aarch64::vreinterpret_f32_s8
- intrinsics::aarch64::vreinterpret_f32_u16
- intrinsics::aarch64::vreinterpret_f32_u32
- intrinsics::aarch64::vreinterpret_f32_u64
- intrinsics::aarch64::vreinterpret_f32_u8
- intrinsics::aarch64::vreinterpret_f64_f16
- intrinsics::aarch64::vreinterpret_f64_f32
- intrinsics::aarch64::vreinterpret_f64_p16
- intrinsics::aarch64::vreinterpret_f64_p64
- intrinsics::aarch64::vreinterpret_f64_p8
- intrinsics::aarch64::vreinterpret_f64_s16
- intrinsics::aarch64::vreinterpret_f64_s32
- intrinsics::aarch64::vreinterpret_f64_s64
- intrinsics::aarch64::vreinterpret_f64_s8
- intrinsics::aarch64::vreinterpret_f64_u16
- intrinsics::aarch64::vreinterpret_f64_u32
- intrinsics::aarch64::vreinterpret_f64_u64
- intrinsics::aarch64::vreinterpret_f64_u8
- intrinsics::aarch64::vreinterpret_p16_f16
- intrinsics::aarch64::vreinterpret_p16_f32
- intrinsics::aarch64::vreinterpret_p16_f64
- intrinsics::aarch64::vreinterpret_p16_p64
- intrinsics::aarch64::vreinterpret_p16_p8
- intrinsics::aarch64::vreinterpret_p16_s16
- intrinsics::aarch64::vreinterpret_p16_s32
- intrinsics::aarch64::vreinterpret_p16_s64
- intrinsics::aarch64::vreinterpret_p16_s8
- intrinsics::aarch64::vreinterpret_p16_u16
- intrinsics::aarch64::vreinterpret_p16_u32
- intrinsics::aarch64::vreinterpret_p16_u64
- intrinsics::aarch64::vreinterpret_p16_u8
- intrinsics::aarch64::vreinterpret_p64_f16
- intrinsics::aarch64::vreinterpret_p64_f32
- intrinsics::aarch64::vreinterpret_p64_f64
- intrinsics::aarch64::vreinterpret_p64_p16
- intrinsics::aarch64::vreinterpret_p64_p8
- intrinsics::aarch64::vreinterpret_p64_s16
- intrinsics::aarch64::vreinterpret_p64_s32
- intrinsics::aarch64::vreinterpret_p64_s64
- intrinsics::aarch64::vreinterpret_p64_s8
- intrinsics::aarch64::vreinterpret_p64_u16
- intrinsics::aarch64::vreinterpret_p64_u32
- intrinsics::aarch64::vreinterpret_p64_u64
- intrinsics::aarch64::vreinterpret_p64_u8
- intrinsics::aarch64::vreinterpret_p8_f16
- intrinsics::aarch64::vreinterpret_p8_f32
- intrinsics::aarch64::vreinterpret_p8_f64
- intrinsics::aarch64::vreinterpret_p8_p16
- intrinsics::aarch64::vreinterpret_p8_p64
- intrinsics::aarch64::vreinterpret_p8_s16
- intrinsics::aarch64::vreinterpret_p8_s32
- intrinsics::aarch64::vreinterpret_p8_s64
- intrinsics::aarch64::vreinterpret_p8_s8
- intrinsics::aarch64::vreinterpret_p8_u16
- intrinsics::aarch64::vreinterpret_p8_u32
- intrinsics::aarch64::vreinterpret_p8_u64
- intrinsics::aarch64::vreinterpret_p8_u8
- intrinsics::aarch64::vreinterpret_s16_f16
- intrinsics::aarch64::vreinterpret_s16_f32
- intrinsics::aarch64::vreinterpret_s16_f64
- intrinsics::aarch64::vreinterpret_s16_p16
- intrinsics::aarch64::vreinterpret_s16_p64
- intrinsics::aarch64::vreinterpret_s16_p8
- intrinsics::aarch64::vreinterpret_s16_s32
- intrinsics::aarch64::vreinterpret_s16_s64
- intrinsics::aarch64::vreinterpret_s16_s8
- intrinsics::aarch64::vreinterpret_s16_u16
- intrinsics::aarch64::vreinterpret_s16_u32
- intrinsics::aarch64::vreinterpret_s16_u64
- intrinsics::aarch64::vreinterpret_s16_u8
- intrinsics::aarch64::vreinterpret_s32_f16
- intrinsics::aarch64::vreinterpret_s32_f32
- intrinsics::aarch64::vreinterpret_s32_f64
- intrinsics::aarch64::vreinterpret_s32_p16
- intrinsics::aarch64::vreinterpret_s32_p64
- intrinsics::aarch64::vreinterpret_s32_p8
- intrinsics::aarch64::vreinterpret_s32_s16
- intrinsics::aarch64::vreinterpret_s32_s64
- intrinsics::aarch64::vreinterpret_s32_s8
- intrinsics::aarch64::vreinterpret_s32_u16
- intrinsics::aarch64::vreinterpret_s32_u32
- intrinsics::aarch64::vreinterpret_s32_u64
- intrinsics::aarch64::vreinterpret_s32_u8
- intrinsics::aarch64::vreinterpret_s64_f16
- intrinsics::aarch64::vreinterpret_s64_f32
- intrinsics::aarch64::vreinterpret_s64_f64
- intrinsics::aarch64::vreinterpret_s64_p16
- intrinsics::aarch64::vreinterpret_s64_p64
- intrinsics::aarch64::vreinterpret_s64_p8
- intrinsics::aarch64::vreinterpret_s64_s16
- intrinsics::aarch64::vreinterpret_s64_s32
- intrinsics::aarch64::vreinterpret_s64_s8
- intrinsics::aarch64::vreinterpret_s64_u16
- intrinsics::aarch64::vreinterpret_s64_u32
- intrinsics::aarch64::vreinterpret_s64_u64
- intrinsics::aarch64::vreinterpret_s64_u8
- intrinsics::aarch64::vreinterpret_s8_f16
- intrinsics::aarch64::vreinterpret_s8_f32
- intrinsics::aarch64::vreinterpret_s8_f64
- intrinsics::aarch64::vreinterpret_s8_p16
- intrinsics::aarch64::vreinterpret_s8_p64
- intrinsics::aarch64::vreinterpret_s8_p8
- intrinsics::aarch64::vreinterpret_s8_s16
- intrinsics::aarch64::vreinterpret_s8_s32
- intrinsics::aarch64::vreinterpret_s8_s64
- intrinsics::aarch64::vreinterpret_s8_u16
- intrinsics::aarch64::vreinterpret_s8_u32
- intrinsics::aarch64::vreinterpret_s8_u64
- intrinsics::aarch64::vreinterpret_s8_u8
- intrinsics::aarch64::vreinterpret_u16_f16
- intrinsics::aarch64::vreinterpret_u16_f32
- intrinsics::aarch64::vreinterpret_u16_f64
- intrinsics::aarch64::vreinterpret_u16_p16
- intrinsics::aarch64::vreinterpret_u16_p64
- intrinsics::aarch64::vreinterpret_u16_p8
- intrinsics::aarch64::vreinterpret_u16_s16
- intrinsics::aarch64::vreinterpret_u16_s32
- intrinsics::aarch64::vreinterpret_u16_s64
- intrinsics::aarch64::vreinterpret_u16_s8
- intrinsics::aarch64::vreinterpret_u16_u32
- intrinsics::aarch64::vreinterpret_u16_u64
- intrinsics::aarch64::vreinterpret_u16_u8
- intrinsics::aarch64::vreinterpret_u32_f16
- intrinsics::aarch64::vreinterpret_u32_f32
- intrinsics::aarch64::vreinterpret_u32_f64
- intrinsics::aarch64::vreinterpret_u32_p16
- intrinsics::aarch64::vreinterpret_u32_p64
- intrinsics::aarch64::vreinterpret_u32_p8
- intrinsics::aarch64::vreinterpret_u32_s16
- intrinsics::aarch64::vreinterpret_u32_s32
- intrinsics::aarch64::vreinterpret_u32_s64
- intrinsics::aarch64::vreinterpret_u32_s8
- intrinsics::aarch64::vreinterpret_u32_u16
- intrinsics::aarch64::vreinterpret_u32_u64
- intrinsics::aarch64::vreinterpret_u32_u8
- intrinsics::aarch64::vreinterpret_u64_f16
- intrinsics::aarch64::vreinterpret_u64_f32
- intrinsics::aarch64::vreinterpret_u64_f64
- intrinsics::aarch64::vreinterpret_u64_p16
- intrinsics::aarch64::vreinterpret_u64_p64
- intrinsics::aarch64::vreinterpret_u64_p8
- intrinsics::aarch64::vreinterpret_u64_s16
- intrinsics::aarch64::vreinterpret_u64_s32
- intrinsics::aarch64::vreinterpret_u64_s64
- intrinsics::aarch64::vreinterpret_u64_s8
- intrinsics::aarch64::vreinterpret_u64_u16
- intrinsics::aarch64::vreinterpret_u64_u32
- intrinsics::aarch64::vreinterpret_u64_u8
- intrinsics::aarch64::vreinterpret_u8_f16
- intrinsics::aarch64::vreinterpret_u8_f32
- intrinsics::aarch64::vreinterpret_u8_f64
- intrinsics::aarch64::vreinterpret_u8_p16
- intrinsics::aarch64::vreinterpret_u8_p64
- intrinsics::aarch64::vreinterpret_u8_p8
- intrinsics::aarch64::vreinterpret_u8_s16
- intrinsics::aarch64::vreinterpret_u8_s32
- intrinsics::aarch64::vreinterpret_u8_s64
- intrinsics::aarch64::vreinterpret_u8_s8
- intrinsics::aarch64::vreinterpret_u8_u16
- intrinsics::aarch64::vreinterpret_u8_u32
- intrinsics::aarch64::vreinterpret_u8_u64
- intrinsics::aarch64::vreinterpretq_f16_f32
- intrinsics::aarch64::vreinterpretq_f16_f64
- intrinsics::aarch64::vreinterpretq_f16_p128
- intrinsics::aarch64::vreinterpretq_f16_p16
- intrinsics::aarch64::vreinterpretq_f16_p64
- intrinsics::aarch64::vreinterpretq_f16_p8
- intrinsics::aarch64::vreinterpretq_f16_s16
- intrinsics::aarch64::vreinterpretq_f16_s32
- intrinsics::aarch64::vreinterpretq_f16_s64
- intrinsics::aarch64::vreinterpretq_f16_s8
- intrinsics::aarch64::vreinterpretq_f16_u16
- intrinsics::aarch64::vreinterpretq_f16_u32
- intrinsics::aarch64::vreinterpretq_f16_u64
- intrinsics::aarch64::vreinterpretq_f16_u8
- intrinsics::aarch64::vreinterpretq_f32_f16
- intrinsics::aarch64::vreinterpretq_f32_f64
- intrinsics::aarch64::vreinterpretq_f32_p128
- intrinsics::aarch64::vreinterpretq_f32_p16
- intrinsics::aarch64::vreinterpretq_f32_p64
- intrinsics::aarch64::vreinterpretq_f32_p8
- intrinsics::aarch64::vreinterpretq_f32_s16
- intrinsics::aarch64::vreinterpretq_f32_s32
- intrinsics::aarch64::vreinterpretq_f32_s64
- intrinsics::aarch64::vreinterpretq_f32_s8
- intrinsics::aarch64::vreinterpretq_f32_u16
- intrinsics::aarch64::vreinterpretq_f32_u32
- intrinsics::aarch64::vreinterpretq_f32_u64
- intrinsics::aarch64::vreinterpretq_f32_u8
- intrinsics::aarch64::vreinterpretq_f64_f16
- intrinsics::aarch64::vreinterpretq_f64_f32
- intrinsics::aarch64::vreinterpretq_f64_p128
- intrinsics::aarch64::vreinterpretq_f64_p16
- intrinsics::aarch64::vreinterpretq_f64_p64
- intrinsics::aarch64::vreinterpretq_f64_p8
- intrinsics::aarch64::vreinterpretq_f64_s16
- intrinsics::aarch64::vreinterpretq_f64_s32
- intrinsics::aarch64::vreinterpretq_f64_s64
- intrinsics::aarch64::vreinterpretq_f64_s8
- intrinsics::aarch64::vreinterpretq_f64_u16
- intrinsics::aarch64::vreinterpretq_f64_u32
- intrinsics::aarch64::vreinterpretq_f64_u64
- intrinsics::aarch64::vreinterpretq_f64_u8
- intrinsics::aarch64::vreinterpretq_p128_f16
- intrinsics::aarch64::vreinterpretq_p128_f32
- intrinsics::aarch64::vreinterpretq_p128_f64
- intrinsics::aarch64::vreinterpretq_p128_p16
- intrinsics::aarch64::vreinterpretq_p128_p64
- intrinsics::aarch64::vreinterpretq_p128_p8
- intrinsics::aarch64::vreinterpretq_p128_s16
- intrinsics::aarch64::vreinterpretq_p128_s32
- intrinsics::aarch64::vreinterpretq_p128_s64
- intrinsics::aarch64::vreinterpretq_p128_s8
- intrinsics::aarch64::vreinterpretq_p128_u16
- intrinsics::aarch64::vreinterpretq_p128_u32
- intrinsics::aarch64::vreinterpretq_p128_u64
- intrinsics::aarch64::vreinterpretq_p128_u8
- intrinsics::aarch64::vreinterpretq_p16_f16
- intrinsics::aarch64::vreinterpretq_p16_f32
- intrinsics::aarch64::vreinterpretq_p16_f64
- intrinsics::aarch64::vreinterpretq_p16_p128
- intrinsics::aarch64::vreinterpretq_p16_p64
- intrinsics::aarch64::vreinterpretq_p16_p8
- intrinsics::aarch64::vreinterpretq_p16_s16
- intrinsics::aarch64::vreinterpretq_p16_s32
- intrinsics::aarch64::vreinterpretq_p16_s64
- intrinsics::aarch64::vreinterpretq_p16_s8
- intrinsics::aarch64::vreinterpretq_p16_u16
- intrinsics::aarch64::vreinterpretq_p16_u32
- intrinsics::aarch64::vreinterpretq_p16_u64
- intrinsics::aarch64::vreinterpretq_p16_u8
- intrinsics::aarch64::vreinterpretq_p64_f16
- intrinsics::aarch64::vreinterpretq_p64_f32
- intrinsics::aarch64::vreinterpretq_p64_f64
- intrinsics::aarch64::vreinterpretq_p64_p128
- intrinsics::aarch64::vreinterpretq_p64_p16
- intrinsics::aarch64::vreinterpretq_p64_p8
- intrinsics::aarch64::vreinterpretq_p64_s16
- intrinsics::aarch64::vreinterpretq_p64_s32
- intrinsics::aarch64::vreinterpretq_p64_s64
- intrinsics::aarch64::vreinterpretq_p64_s8
- intrinsics::aarch64::vreinterpretq_p64_u16
- intrinsics::aarch64::vreinterpretq_p64_u32
- intrinsics::aarch64::vreinterpretq_p64_u64
- intrinsics::aarch64::vreinterpretq_p64_u8
- intrinsics::aarch64::vreinterpretq_p8_f16
- intrinsics::aarch64::vreinterpretq_p8_f32
- intrinsics::aarch64::vreinterpretq_p8_f64
- intrinsics::aarch64::vreinterpretq_p8_p128
- intrinsics::aarch64::vreinterpretq_p8_p16
- intrinsics::aarch64::vreinterpretq_p8_p64
- intrinsics::aarch64::vreinterpretq_p8_s16
- intrinsics::aarch64::vreinterpretq_p8_s32
- intrinsics::aarch64::vreinterpretq_p8_s64
- intrinsics::aarch64::vreinterpretq_p8_s8
- intrinsics::aarch64::vreinterpretq_p8_u16
- intrinsics::aarch64::vreinterpretq_p8_u32
- intrinsics::aarch64::vreinterpretq_p8_u64
- intrinsics::aarch64::vreinterpretq_p8_u8
- intrinsics::aarch64::vreinterpretq_s16_f16
- intrinsics::aarch64::vreinterpretq_s16_f32
- intrinsics::aarch64::vreinterpretq_s16_f64
- intrinsics::aarch64::vreinterpretq_s16_p128
- intrinsics::aarch64::vreinterpretq_s16_p16
- intrinsics::aarch64::vreinterpretq_s16_p64
- intrinsics::aarch64::vreinterpretq_s16_p8
- intrinsics::aarch64::vreinterpretq_s16_s32
- intrinsics::aarch64::vreinterpretq_s16_s64
- intrinsics::aarch64::vreinterpretq_s16_s8
- intrinsics::aarch64::vreinterpretq_s16_u16
- intrinsics::aarch64::vreinterpretq_s16_u32
- intrinsics::aarch64::vreinterpretq_s16_u64
- intrinsics::aarch64::vreinterpretq_s16_u8
- intrinsics::aarch64::vreinterpretq_s32_f16
- intrinsics::aarch64::vreinterpretq_s32_f32
- intrinsics::aarch64::vreinterpretq_s32_f64
- intrinsics::aarch64::vreinterpretq_s32_p128
- intrinsics::aarch64::vreinterpretq_s32_p16
- intrinsics::aarch64::vreinterpretq_s32_p64
- intrinsics::aarch64::vreinterpretq_s32_p8
- intrinsics::aarch64::vreinterpretq_s32_s16
- intrinsics::aarch64::vreinterpretq_s32_s64
- intrinsics::aarch64::vreinterpretq_s32_s8
- intrinsics::aarch64::vreinterpretq_s32_u16
- intrinsics::aarch64::vreinterpretq_s32_u32
- intrinsics::aarch64::vreinterpretq_s32_u64
- intrinsics::aarch64::vreinterpretq_s32_u8
- intrinsics::aarch64::vreinterpretq_s64_f16
- intrinsics::aarch64::vreinterpretq_s64_f32
- intrinsics::aarch64::vreinterpretq_s64_f64
- intrinsics::aarch64::vreinterpretq_s64_p128
- intrinsics::aarch64::vreinterpretq_s64_p16
- intrinsics::aarch64::vreinterpretq_s64_p64
- intrinsics::aarch64::vreinterpretq_s64_p8
- intrinsics::aarch64::vreinterpretq_s64_s16
- intrinsics::aarch64::vreinterpretq_s64_s32
- intrinsics::aarch64::vreinterpretq_s64_s8
- intrinsics::aarch64::vreinterpretq_s64_u16
- intrinsics::aarch64::vreinterpretq_s64_u32
- intrinsics::aarch64::vreinterpretq_s64_u64
- intrinsics::aarch64::vreinterpretq_s64_u8
- intrinsics::aarch64::vreinterpretq_s8_f16
- intrinsics::aarch64::vreinterpretq_s8_f32
- intrinsics::aarch64::vreinterpretq_s8_f64
- intrinsics::aarch64::vreinterpretq_s8_p128
- intrinsics::aarch64::vreinterpretq_s8_p16
- intrinsics::aarch64::vreinterpretq_s8_p64
- intrinsics::aarch64::vreinterpretq_s8_p8
- intrinsics::aarch64::vreinterpretq_s8_s16
- intrinsics::aarch64::vreinterpretq_s8_s32
- intrinsics::aarch64::vreinterpretq_s8_s64
- intrinsics::aarch64::vreinterpretq_s8_u16
- intrinsics::aarch64::vreinterpretq_s8_u32
- intrinsics::aarch64::vreinterpretq_s8_u64
- intrinsics::aarch64::vreinterpretq_s8_u8
- intrinsics::aarch64::vreinterpretq_u16_f16
- intrinsics::aarch64::vreinterpretq_u16_f32
- intrinsics::aarch64::vreinterpretq_u16_f64
- intrinsics::aarch64::vreinterpretq_u16_p128
- intrinsics::aarch64::vreinterpretq_u16_p16
- intrinsics::aarch64::vreinterpretq_u16_p64
- intrinsics::aarch64::vreinterpretq_u16_p8
- intrinsics::aarch64::vreinterpretq_u16_s16
- intrinsics::aarch64::vreinterpretq_u16_s32
- intrinsics::aarch64::vreinterpretq_u16_s64
- intrinsics::aarch64::vreinterpretq_u16_s8
- intrinsics::aarch64::vreinterpretq_u16_u32
- intrinsics::aarch64::vreinterpretq_u16_u64
- intrinsics::aarch64::vreinterpretq_u16_u8
- intrinsics::aarch64::vreinterpretq_u32_f16
- intrinsics::aarch64::vreinterpretq_u32_f32
- intrinsics::aarch64::vreinterpretq_u32_f64
- intrinsics::aarch64::vreinterpretq_u32_p128
- intrinsics::aarch64::vreinterpretq_u32_p16
- intrinsics::aarch64::vreinterpretq_u32_p64
- intrinsics::aarch64::vreinterpretq_u32_p8
- intrinsics::aarch64::vreinterpretq_u32_s16
- intrinsics::aarch64::vreinterpretq_u32_s32
- intrinsics::aarch64::vreinterpretq_u32_s64
- intrinsics::aarch64::vreinterpretq_u32_s8
- intrinsics::aarch64::vreinterpretq_u32_u16
- intrinsics::aarch64::vreinterpretq_u32_u64
- intrinsics::aarch64::vreinterpretq_u32_u8
- intrinsics::aarch64::vreinterpretq_u64_f16
- intrinsics::aarch64::vreinterpretq_u64_f32
- intrinsics::aarch64::vreinterpretq_u64_f64
- intrinsics::aarch64::vreinterpretq_u64_p128
- intrinsics::aarch64::vreinterpretq_u64_p16
- intrinsics::aarch64::vreinterpretq_u64_p64
- intrinsics::aarch64::vreinterpretq_u64_p8
- intrinsics::aarch64::vreinterpretq_u64_s16
- intrinsics::aarch64::vreinterpretq_u64_s32
- intrinsics::aarch64::vreinterpretq_u64_s64
- intrinsics::aarch64::vreinterpretq_u64_s8
- intrinsics::aarch64::vreinterpretq_u64_u16
- intrinsics::aarch64::vreinterpretq_u64_u32
- intrinsics::aarch64::vreinterpretq_u64_u8
- intrinsics::aarch64::vreinterpretq_u8_f16
- intrinsics::aarch64::vreinterpretq_u8_f32
- intrinsics::aarch64::vreinterpretq_u8_f64
- intrinsics::aarch64::vreinterpretq_u8_p128
- intrinsics::aarch64::vreinterpretq_u8_p16
- intrinsics::aarch64::vreinterpretq_u8_p64
- intrinsics::aarch64::vreinterpretq_u8_p8
- intrinsics::aarch64::vreinterpretq_u8_s16
- intrinsics::aarch64::vreinterpretq_u8_s32
- intrinsics::aarch64::vreinterpretq_u8_s64
- intrinsics::aarch64::vreinterpretq_u8_s8
- intrinsics::aarch64::vreinterpretq_u8_u16
- intrinsics::aarch64::vreinterpretq_u8_u32
- intrinsics::aarch64::vreinterpretq_u8_u64
- intrinsics::aarch64::vrev16_p8
- intrinsics::aarch64::vrev16_s8
- intrinsics::aarch64::vrev16_u8
- intrinsics::aarch64::vrev16q_p8
- intrinsics::aarch64::vrev16q_s8
- intrinsics::aarch64::vrev16q_u8
- intrinsics::aarch64::vrev32_p16
- intrinsics::aarch64::vrev32_p8
- intrinsics::aarch64::vrev32_s16
- intrinsics::aarch64::vrev32_s8
- intrinsics::aarch64::vrev32_u16
- intrinsics::aarch64::vrev32_u8
- intrinsics::aarch64::vrev32q_p16
- intrinsics::aarch64::vrev32q_p8
- intrinsics::aarch64::vrev32q_s16
- intrinsics::aarch64::vrev32q_s8
- intrinsics::aarch64::vrev32q_u16
- intrinsics::aarch64::vrev32q_u8
- intrinsics::aarch64::vrev64_f16
- intrinsics::aarch64::vrev64_f32
- intrinsics::aarch64::vrev64_p16
- intrinsics::aarch64::vrev64_p8
- intrinsics::aarch64::vrev64_s16
- intrinsics::aarch64::vrev64_s32
- intrinsics::aarch64::vrev64_s8
- intrinsics::aarch64::vrev64_u16
- intrinsics::aarch64::vrev64_u32
- intrinsics::aarch64::vrev64_u8
- intrinsics::aarch64::vrev64q_f16
- intrinsics::aarch64::vrev64q_f32
- intrinsics::aarch64::vrev64q_p16
- intrinsics::aarch64::vrev64q_p8
- intrinsics::aarch64::vrev64q_s16
- intrinsics::aarch64::vrev64q_s32
- intrinsics::aarch64::vrev64q_s8
- intrinsics::aarch64::vrev64q_u16
- intrinsics::aarch64::vrev64q_u32
- intrinsics::aarch64::vrev64q_u8
- intrinsics::aarch64::vrhadd_s16
- intrinsics::aarch64::vrhadd_s32
- intrinsics::aarch64::vrhadd_s8
- intrinsics::aarch64::vrhadd_u16
- intrinsics::aarch64::vrhadd_u32
- intrinsics::aarch64::vrhadd_u8
- intrinsics::aarch64::vrhaddq_s16
- intrinsics::aarch64::vrhaddq_s32
- intrinsics::aarch64::vrhaddq_s8
- intrinsics::aarch64::vrhaddq_u16
- intrinsics::aarch64::vrhaddq_u32
- intrinsics::aarch64::vrhaddq_u8
- intrinsics::aarch64::vrnd32x_f32
- intrinsics::aarch64::vrnd32x_f64
- intrinsics::aarch64::vrnd32xq_f32
- intrinsics::aarch64::vrnd32xq_f64
- intrinsics::aarch64::vrnd32z_f32
- intrinsics::aarch64::vrnd32z_f64
- intrinsics::aarch64::vrnd32zq_f32
- intrinsics::aarch64::vrnd32zq_f64
- intrinsics::aarch64::vrnd64x_f32
- intrinsics::aarch64::vrnd64x_f64
- intrinsics::aarch64::vrnd64xq_f32
- intrinsics::aarch64::vrnd64xq_f64
- intrinsics::aarch64::vrnd64z_f32
- intrinsics::aarch64::vrnd64z_f64
- intrinsics::aarch64::vrnd64zq_f32
- intrinsics::aarch64::vrnd64zq_f64
- intrinsics::aarch64::vrnd_f16
- intrinsics::aarch64::vrnd_f32
- intrinsics::aarch64::vrnd_f64
- intrinsics::aarch64::vrnda_f16
- intrinsics::aarch64::vrnda_f32
- intrinsics::aarch64::vrnda_f64
- intrinsics::aarch64::vrndah_f16
- intrinsics::aarch64::vrndaq_f16
- intrinsics::aarch64::vrndaq_f32
- intrinsics::aarch64::vrndaq_f64
- intrinsics::aarch64::vrndh_f16
- intrinsics::aarch64::vrndi_f16
- intrinsics::aarch64::vrndi_f32
- intrinsics::aarch64::vrndi_f64
- intrinsics::aarch64::vrndih_f16
- intrinsics::aarch64::vrndiq_f16
- intrinsics::aarch64::vrndiq_f32
- intrinsics::aarch64::vrndiq_f64
- intrinsics::aarch64::vrndm_f16
- intrinsics::aarch64::vrndm_f32
- intrinsics::aarch64::vrndm_f64
- intrinsics::aarch64::vrndmh_f16
- intrinsics::aarch64::vrndmq_f16
- intrinsics::aarch64::vrndmq_f32
- intrinsics::aarch64::vrndmq_f64
- intrinsics::aarch64::vrndn_f16
- intrinsics::aarch64::vrndn_f32
- intrinsics::aarch64::vrndn_f64
- intrinsics::aarch64::vrndnh_f16
- intrinsics::aarch64::vrndnq_f16
- intrinsics::aarch64::vrndnq_f32
- intrinsics::aarch64::vrndnq_f64
- intrinsics::aarch64::vrndns_f32
- intrinsics::aarch64::vrndp_f16
- intrinsics::aarch64::vrndp_f32
- intrinsics::aarch64::vrndp_f64
- intrinsics::aarch64::vrndph_f16
- intrinsics::aarch64::vrndpq_f16
- intrinsics::aarch64::vrndpq_f32
- intrinsics::aarch64::vrndpq_f64
- intrinsics::aarch64::vrndq_f16
- intrinsics::aarch64::vrndq_f32
- intrinsics::aarch64::vrndq_f64
- intrinsics::aarch64::vrndx_f16
- intrinsics::aarch64::vrndx_f32
- intrinsics::aarch64::vrndx_f64
- intrinsics::aarch64::vrndxh_f16
- intrinsics::aarch64::vrndxq_f16
- intrinsics::aarch64::vrndxq_f32
- intrinsics::aarch64::vrndxq_f64
- intrinsics::aarch64::vrshl_s16
- intrinsics::aarch64::vrshl_s32
- intrinsics::aarch64::vrshl_s64
- intrinsics::aarch64::vrshl_s8
- intrinsics::aarch64::vrshl_u16
- intrinsics::aarch64::vrshl_u32
- intrinsics::aarch64::vrshl_u64
- intrinsics::aarch64::vrshl_u8
- intrinsics::aarch64::vrshld_s64
- intrinsics::aarch64::vrshld_u64
- intrinsics::aarch64::vrshlq_s16
- intrinsics::aarch64::vrshlq_s32
- intrinsics::aarch64::vrshlq_s64
- intrinsics::aarch64::vrshlq_s8
- intrinsics::aarch64::vrshlq_u16
- intrinsics::aarch64::vrshlq_u32
- intrinsics::aarch64::vrshlq_u64
- intrinsics::aarch64::vrshlq_u8
- intrinsics::aarch64::vrshr_n_s16
- intrinsics::aarch64::vrshr_n_s32
- intrinsics::aarch64::vrshr_n_s64
- intrinsics::aarch64::vrshr_n_s8
- intrinsics::aarch64::vrshr_n_u16
- intrinsics::aarch64::vrshr_n_u32
- intrinsics::aarch64::vrshr_n_u64
- intrinsics::aarch64::vrshr_n_u8
- intrinsics::aarch64::vrshrd_n_s64
- intrinsics::aarch64::vrshrd_n_u64
- intrinsics::aarch64::vrshrn_high_n_s16
- intrinsics::aarch64::vrshrn_high_n_s32
- intrinsics::aarch64::vrshrn_high_n_s64
- intrinsics::aarch64::vrshrn_high_n_u16
- intrinsics::aarch64::vrshrn_high_n_u32
- intrinsics::aarch64::vrshrn_high_n_u64
- intrinsics::aarch64::vrshrn_n_s16
- intrinsics::aarch64::vrshrn_n_s32
- intrinsics::aarch64::vrshrn_n_s64
- intrinsics::aarch64::vrshrn_n_u16
- intrinsics::aarch64::vrshrn_n_u32
- intrinsics::aarch64::vrshrn_n_u64
- intrinsics::aarch64::vrshrq_n_s16
- intrinsics::aarch64::vrshrq_n_s32
- intrinsics::aarch64::vrshrq_n_s64
- intrinsics::aarch64::vrshrq_n_s8
- intrinsics::aarch64::vrshrq_n_u16
- intrinsics::aarch64::vrshrq_n_u32
- intrinsics::aarch64::vrshrq_n_u64
- intrinsics::aarch64::vrshrq_n_u8
- intrinsics::aarch64::vrsqrte_f16
- intrinsics::aarch64::vrsqrte_f32
- intrinsics::aarch64::vrsqrte_f64
- intrinsics::aarch64::vrsqrte_u32
- intrinsics::aarch64::vrsqrted_f64
- intrinsics::aarch64::vrsqrteh_f16
- intrinsics::aarch64::vrsqrteq_f16
- intrinsics::aarch64::vrsqrteq_f32
- intrinsics::aarch64::vrsqrteq_f64
- intrinsics::aarch64::vrsqrteq_u32
- intrinsics::aarch64::vrsqrtes_f32
- intrinsics::aarch64::vrsqrts_f16
- intrinsics::aarch64::vrsqrts_f32
- intrinsics::aarch64::vrsqrts_f64
- intrinsics::aarch64::vrsqrtsd_f64
- intrinsics::aarch64::vrsqrtsh_f16
- intrinsics::aarch64::vrsqrtsq_f16
- intrinsics::aarch64::vrsqrtsq_f32
- intrinsics::aarch64::vrsqrtsq_f64
- intrinsics::aarch64::vrsqrtss_f32
- intrinsics::aarch64::vrsra_n_s16
- intrinsics::aarch64::vrsra_n_s32
- intrinsics::aarch64::vrsra_n_s64
- intrinsics::aarch64::vrsra_n_s8
- intrinsics::aarch64::vrsra_n_u16
- intrinsics::aarch64::vrsra_n_u32
- intrinsics::aarch64::vrsra_n_u64
- intrinsics::aarch64::vrsra_n_u8
- intrinsics::aarch64::vrsrad_n_s64
- intrinsics::aarch64::vrsrad_n_u64
- intrinsics::aarch64::vrsraq_n_s16
- intrinsics::aarch64::vrsraq_n_s32
- intrinsics::aarch64::vrsraq_n_s64
- intrinsics::aarch64::vrsraq_n_s8
- intrinsics::aarch64::vrsraq_n_u16
- intrinsics::aarch64::vrsraq_n_u32
- intrinsics::aarch64::vrsraq_n_u64
- intrinsics::aarch64::vrsraq_n_u8
- intrinsics::aarch64::vrsubhn_high_s16
- intrinsics::aarch64::vrsubhn_high_s32
- intrinsics::aarch64::vrsubhn_high_s64
- intrinsics::aarch64::vrsubhn_high_u16
- intrinsics::aarch64::vrsubhn_high_u32
- intrinsics::aarch64::vrsubhn_high_u64
- intrinsics::aarch64::vrsubhn_s16
- intrinsics::aarch64::vrsubhn_s32
- intrinsics::aarch64::vrsubhn_s64
- intrinsics::aarch64::vrsubhn_u16
- intrinsics::aarch64::vrsubhn_u32
- intrinsics::aarch64::vrsubhn_u64
- intrinsics::aarch64::vscale_f16
- intrinsics::aarch64::vscale_f32
- intrinsics::aarch64::vscaleq_f16
- intrinsics::aarch64::vscaleq_f32
- intrinsics::aarch64::vscaleq_f64
- intrinsics::aarch64::vset_lane_f16
- intrinsics::aarch64::vset_lane_f32
- intrinsics::aarch64::vset_lane_f64
- intrinsics::aarch64::vset_lane_p16
- intrinsics::aarch64::vset_lane_p64
- intrinsics::aarch64::vset_lane_p8
- intrinsics::aarch64::vset_lane_s16
- intrinsics::aarch64::vset_lane_s32
- intrinsics::aarch64::vset_lane_s64
- intrinsics::aarch64::vset_lane_s8
- intrinsics::aarch64::vset_lane_u16
- intrinsics::aarch64::vset_lane_u32
- intrinsics::aarch64::vset_lane_u64
- intrinsics::aarch64::vset_lane_u8
- intrinsics::aarch64::vsetq_lane_f16
- intrinsics::aarch64::vsetq_lane_f32
- intrinsics::aarch64::vsetq_lane_f64
- intrinsics::aarch64::vsetq_lane_p16
- intrinsics::aarch64::vsetq_lane_p64
- intrinsics::aarch64::vsetq_lane_p8
- intrinsics::aarch64::vsetq_lane_s16
- intrinsics::aarch64::vsetq_lane_s32
- intrinsics::aarch64::vsetq_lane_s64
- intrinsics::aarch64::vsetq_lane_s8
- intrinsics::aarch64::vsetq_lane_u16
- intrinsics::aarch64::vsetq_lane_u32
- intrinsics::aarch64::vsetq_lane_u64
- intrinsics::aarch64::vsetq_lane_u8
- intrinsics::aarch64::vsha1cq_u32
- intrinsics::aarch64::vsha1h_u32
- intrinsics::aarch64::vsha1mq_u32
- intrinsics::aarch64::vsha1pq_u32
- intrinsics::aarch64::vsha1su0q_u32
- intrinsics::aarch64::vsha1su1q_u32
- intrinsics::aarch64::vsha256h2q_u32
- intrinsics::aarch64::vsha256hq_u32
- intrinsics::aarch64::vsha256su0q_u32
- intrinsics::aarch64::vsha256su1q_u32
- intrinsics::aarch64::vsha512h2q_u64
- intrinsics::aarch64::vsha512hq_u64
- intrinsics::aarch64::vsha512su0q_u64
- intrinsics::aarch64::vsha512su1q_u64
- intrinsics::aarch64::vshl_n_s16
- intrinsics::aarch64::vshl_n_s32
- intrinsics::aarch64::vshl_n_s64
- intrinsics::aarch64::vshl_n_s8
- intrinsics::aarch64::vshl_n_u16
- intrinsics::aarch64::vshl_n_u32
- intrinsics::aarch64::vshl_n_u64
- intrinsics::aarch64::vshl_n_u8
- intrinsics::aarch64::vshl_s16
- intrinsics::aarch64::vshl_s32
- intrinsics::aarch64::vshl_s64
- intrinsics::aarch64::vshl_s8
- intrinsics::aarch64::vshl_u16
- intrinsics::aarch64::vshl_u32
- intrinsics::aarch64::vshl_u64
- intrinsics::aarch64::vshl_u8
- intrinsics::aarch64::vshld_n_s64
- intrinsics::aarch64::vshld_n_u64
- intrinsics::aarch64::vshld_s64
- intrinsics::aarch64::vshld_u64
- intrinsics::aarch64::vshll_high_n_s16
- intrinsics::aarch64::vshll_high_n_s32
- intrinsics::aarch64::vshll_high_n_s8
- intrinsics::aarch64::vshll_high_n_u16
- intrinsics::aarch64::vshll_high_n_u32
- intrinsics::aarch64::vshll_high_n_u8
- intrinsics::aarch64::vshll_n_s16
- intrinsics::aarch64::vshll_n_s32
- intrinsics::aarch64::vshll_n_s8
- intrinsics::aarch64::vshll_n_u16
- intrinsics::aarch64::vshll_n_u32
- intrinsics::aarch64::vshll_n_u8
- intrinsics::aarch64::vshlq_n_s16
- intrinsics::aarch64::vshlq_n_s32
- intrinsics::aarch64::vshlq_n_s64
- intrinsics::aarch64::vshlq_n_s8
- intrinsics::aarch64::vshlq_n_u16
- intrinsics::aarch64::vshlq_n_u32
- intrinsics::aarch64::vshlq_n_u64
- intrinsics::aarch64::vshlq_n_u8
- intrinsics::aarch64::vshlq_s16
- intrinsics::aarch64::vshlq_s32
- intrinsics::aarch64::vshlq_s64
- intrinsics::aarch64::vshlq_s8
- intrinsics::aarch64::vshlq_u16
- intrinsics::aarch64::vshlq_u32
- intrinsics::aarch64::vshlq_u64
- intrinsics::aarch64::vshlq_u8
- intrinsics::aarch64::vshr_n_s16
- intrinsics::aarch64::vshr_n_s32
- intrinsics::aarch64::vshr_n_s64
- intrinsics::aarch64::vshr_n_s8
- intrinsics::aarch64::vshr_n_u16
- intrinsics::aarch64::vshr_n_u32
- intrinsics::aarch64::vshr_n_u64
- intrinsics::aarch64::vshr_n_u8
- intrinsics::aarch64::vshrd_n_s64
- intrinsics::aarch64::vshrd_n_u64
- intrinsics::aarch64::vshrn_high_n_s16
- intrinsics::aarch64::vshrn_high_n_s32
- intrinsics::aarch64::vshrn_high_n_s64
- intrinsics::aarch64::vshrn_high_n_u16
- intrinsics::aarch64::vshrn_high_n_u32
- intrinsics::aarch64::vshrn_high_n_u64
- intrinsics::aarch64::vshrn_n_s16
- intrinsics::aarch64::vshrn_n_s32
- intrinsics::aarch64::vshrn_n_s64
- intrinsics::aarch64::vshrn_n_u16
- intrinsics::aarch64::vshrn_n_u32
- intrinsics::aarch64::vshrn_n_u64
- intrinsics::aarch64::vshrq_n_s16
- intrinsics::aarch64::vshrq_n_s32
- intrinsics::aarch64::vshrq_n_s64
- intrinsics::aarch64::vshrq_n_s8
- intrinsics::aarch64::vshrq_n_u16
- intrinsics::aarch64::vshrq_n_u32
- intrinsics::aarch64::vshrq_n_u64
- intrinsics::aarch64::vshrq_n_u8
- intrinsics::aarch64::vsli_n_p16
- intrinsics::aarch64::vsli_n_p64
- intrinsics::aarch64::vsli_n_p8
- intrinsics::aarch64::vsli_n_s16
- intrinsics::aarch64::vsli_n_s32
- intrinsics::aarch64::vsli_n_s64
- intrinsics::aarch64::vsli_n_s8
- intrinsics::aarch64::vsli_n_u16
- intrinsics::aarch64::vsli_n_u32
- intrinsics::aarch64::vsli_n_u64
- intrinsics::aarch64::vsli_n_u8
- intrinsics::aarch64::vslid_n_s64
- intrinsics::aarch64::vslid_n_u64
- intrinsics::aarch64::vsliq_n_p16
- intrinsics::aarch64::vsliq_n_p64
- intrinsics::aarch64::vsliq_n_p8
- intrinsics::aarch64::vsliq_n_s16
- intrinsics::aarch64::vsliq_n_s32
- intrinsics::aarch64::vsliq_n_s64
- intrinsics::aarch64::vsliq_n_s8
- intrinsics::aarch64::vsliq_n_u16
- intrinsics::aarch64::vsliq_n_u32
- intrinsics::aarch64::vsliq_n_u64
- intrinsics::aarch64::vsliq_n_u8
- intrinsics::aarch64::vsm3partw1q_u32
- intrinsics::aarch64::vsm3partw2q_u32
- intrinsics::aarch64::vsm3ss1q_u32
- intrinsics::aarch64::vsm3tt1aq_u32
- intrinsics::aarch64::vsm3tt1bq_u32
- intrinsics::aarch64::vsm3tt2aq_u32
- intrinsics::aarch64::vsm3tt2bq_u32
- intrinsics::aarch64::vsm4ekeyq_u32
- intrinsics::aarch64::vsm4eq_u32
- intrinsics::aarch64::vsqadd_u16
- intrinsics::aarch64::vsqadd_u32
- intrinsics::aarch64::vsqadd_u64
- intrinsics::aarch64::vsqadd_u8
- intrinsics::aarch64::vsqaddb_u8
- intrinsics::aarch64::vsqaddd_u64
- intrinsics::aarch64::vsqaddh_u16
- intrinsics::aarch64::vsqaddq_u16
- intrinsics::aarch64::vsqaddq_u32
- intrinsics::aarch64::vsqaddq_u64
- intrinsics::aarch64::vsqaddq_u8
- intrinsics::aarch64::vsqadds_u32
- intrinsics::aarch64::vsqrt_f16
- intrinsics::aarch64::vsqrt_f32
- intrinsics::aarch64::vsqrt_f64
- intrinsics::aarch64::vsqrth_f16
- intrinsics::aarch64::vsqrtq_f16
- intrinsics::aarch64::vsqrtq_f32
- intrinsics::aarch64::vsqrtq_f64
- intrinsics::aarch64::vsra_n_s16
- intrinsics::aarch64::vsra_n_s32
- intrinsics::aarch64::vsra_n_s64
- intrinsics::aarch64::vsra_n_s8
- intrinsics::aarch64::vsra_n_u16
- intrinsics::aarch64::vsra_n_u32
- intrinsics::aarch64::vsra_n_u64
- intrinsics::aarch64::vsra_n_u8
- intrinsics::aarch64::vsrad_n_s64
- intrinsics::aarch64::vsrad_n_u64
- intrinsics::aarch64::vsraq_n_s16
- intrinsics::aarch64::vsraq_n_s32
- intrinsics::aarch64::vsraq_n_s64
- intrinsics::aarch64::vsraq_n_s8
- intrinsics::aarch64::vsraq_n_u16
- intrinsics::aarch64::vsraq_n_u32
- intrinsics::aarch64::vsraq_n_u64
- intrinsics::aarch64::vsraq_n_u8
- intrinsics::aarch64::vsri_n_p16
- intrinsics::aarch64::vsri_n_p64
- intrinsics::aarch64::vsri_n_p8
- intrinsics::aarch64::vsri_n_s16
- intrinsics::aarch64::vsri_n_s32
- intrinsics::aarch64::vsri_n_s64
- intrinsics::aarch64::vsri_n_s8
- intrinsics::aarch64::vsri_n_u16
- intrinsics::aarch64::vsri_n_u32
- intrinsics::aarch64::vsri_n_u64
- intrinsics::aarch64::vsri_n_u8
- intrinsics::aarch64::vsrid_n_s64
- intrinsics::aarch64::vsrid_n_u64
- intrinsics::aarch64::vsriq_n_p16
- intrinsics::aarch64::vsriq_n_p64
- intrinsics::aarch64::vsriq_n_p8
- intrinsics::aarch64::vsriq_n_s16
- intrinsics::aarch64::vsriq_n_s32
- intrinsics::aarch64::vsriq_n_s64
- intrinsics::aarch64::vsriq_n_s8
- intrinsics::aarch64::vsriq_n_u16
- intrinsics::aarch64::vsriq_n_u32
- intrinsics::aarch64::vsriq_n_u64
- intrinsics::aarch64::vsriq_n_u8
- intrinsics::aarch64::vst1_f16
- intrinsics::aarch64::vst1_f16_x2
- intrinsics::aarch64::vst1_f16_x3
- intrinsics::aarch64::vst1_f16_x4
- intrinsics::aarch64::vst1_f32
- intrinsics::aarch64::vst1_f32_x2
- intrinsics::aarch64::vst1_f32_x3
- intrinsics::aarch64::vst1_f32_x4
- intrinsics::aarch64::vst1_f64
- intrinsics::aarch64::vst1_f64_x2
- intrinsics::aarch64::vst1_f64_x3
- intrinsics::aarch64::vst1_f64_x4
- intrinsics::aarch64::vst1_lane_f16
- intrinsics::aarch64::vst1_lane_f32
- intrinsics::aarch64::vst1_lane_f64
- intrinsics::aarch64::vst1_lane_p16
- intrinsics::aarch64::vst1_lane_p64
- intrinsics::aarch64::vst1_lane_p8
- intrinsics::aarch64::vst1_lane_s16
- intrinsics::aarch64::vst1_lane_s32
- intrinsics::aarch64::vst1_lane_s64
- intrinsics::aarch64::vst1_lane_s8
- intrinsics::aarch64::vst1_lane_u16
- intrinsics::aarch64::vst1_lane_u32
- intrinsics::aarch64::vst1_lane_u64
- intrinsics::aarch64::vst1_lane_u8
- intrinsics::aarch64::vst1_p16
- intrinsics::aarch64::vst1_p16_x2
- intrinsics::aarch64::vst1_p16_x3
- intrinsics::aarch64::vst1_p16_x4
- intrinsics::aarch64::vst1_p64
- intrinsics::aarch64::vst1_p64_x2
- intrinsics::aarch64::vst1_p64_x3
- intrinsics::aarch64::vst1_p64_x4
- intrinsics::aarch64::vst1_p8
- intrinsics::aarch64::vst1_p8_x2
- intrinsics::aarch64::vst1_p8_x3
- intrinsics::aarch64::vst1_p8_x4
- intrinsics::aarch64::vst1_s16
- intrinsics::aarch64::vst1_s16_x2
- intrinsics::aarch64::vst1_s16_x3
- intrinsics::aarch64::vst1_s16_x4
- intrinsics::aarch64::vst1_s32
- intrinsics::aarch64::vst1_s32_x2
- intrinsics::aarch64::vst1_s32_x3
- intrinsics::aarch64::vst1_s32_x4
- intrinsics::aarch64::vst1_s64
- intrinsics::aarch64::vst1_s64_x2
- intrinsics::aarch64::vst1_s64_x3
- intrinsics::aarch64::vst1_s64_x4
- intrinsics::aarch64::vst1_s8
- intrinsics::aarch64::vst1_s8_x2
- intrinsics::aarch64::vst1_s8_x3
- intrinsics::aarch64::vst1_s8_x4
- intrinsics::aarch64::vst1_u16
- intrinsics::aarch64::vst1_u16_x2
- intrinsics::aarch64::vst1_u16_x3
- intrinsics::aarch64::vst1_u16_x4
- intrinsics::aarch64::vst1_u32
- intrinsics::aarch64::vst1_u32_x2
- intrinsics::aarch64::vst1_u32_x3
- intrinsics::aarch64::vst1_u32_x4
- intrinsics::aarch64::vst1_u64
- intrinsics::aarch64::vst1_u64_x2
- intrinsics::aarch64::vst1_u64_x3
- intrinsics::aarch64::vst1_u64_x4
- intrinsics::aarch64::vst1_u8
- intrinsics::aarch64::vst1_u8_x2
- intrinsics::aarch64::vst1_u8_x3
- intrinsics::aarch64::vst1_u8_x4
- intrinsics::aarch64::vst1q_f16
- intrinsics::aarch64::vst1q_f16_x2
- intrinsics::aarch64::vst1q_f16_x3
- intrinsics::aarch64::vst1q_f16_x4
- intrinsics::aarch64::vst1q_f32
- intrinsics::aarch64::vst1q_f32_x2
- intrinsics::aarch64::vst1q_f32_x3
- intrinsics::aarch64::vst1q_f32_x4
- intrinsics::aarch64::vst1q_f64
- intrinsics::aarch64::vst1q_f64_x2
- intrinsics::aarch64::vst1q_f64_x3
- intrinsics::aarch64::vst1q_f64_x4
- intrinsics::aarch64::vst1q_lane_f16
- intrinsics::aarch64::vst1q_lane_f32
- intrinsics::aarch64::vst1q_lane_f64
- intrinsics::aarch64::vst1q_lane_p16
- intrinsics::aarch64::vst1q_lane_p64
- intrinsics::aarch64::vst1q_lane_p8
- intrinsics::aarch64::vst1q_lane_s16
- intrinsics::aarch64::vst1q_lane_s32
- intrinsics::aarch64::vst1q_lane_s64
- intrinsics::aarch64::vst1q_lane_s8
- intrinsics::aarch64::vst1q_lane_u16
- intrinsics::aarch64::vst1q_lane_u32
- intrinsics::aarch64::vst1q_lane_u64
- intrinsics::aarch64::vst1q_lane_u8
- intrinsics::aarch64::vst1q_p16
- intrinsics::aarch64::vst1q_p16_x2
- intrinsics::aarch64::vst1q_p16_x3
- intrinsics::aarch64::vst1q_p16_x4
- intrinsics::aarch64::vst1q_p64
- intrinsics::aarch64::vst1q_p64_x2
- intrinsics::aarch64::vst1q_p64_x3
- intrinsics::aarch64::vst1q_p64_x4
- intrinsics::aarch64::vst1q_p8
- intrinsics::aarch64::vst1q_p8_x2
- intrinsics::aarch64::vst1q_p8_x3
- intrinsics::aarch64::vst1q_p8_x4
- intrinsics::aarch64::vst1q_s16
- intrinsics::aarch64::vst1q_s16_x2
- intrinsics::aarch64::vst1q_s16_x3
- intrinsics::aarch64::vst1q_s16_x4
- intrinsics::aarch64::vst1q_s32
- intrinsics::aarch64::vst1q_s32_x2
- intrinsics::aarch64::vst1q_s32_x3
- intrinsics::aarch64::vst1q_s32_x4
- intrinsics::aarch64::vst1q_s64
- intrinsics::aarch64::vst1q_s64_x2
- intrinsics::aarch64::vst1q_s64_x3
- intrinsics::aarch64::vst1q_s64_x4
- intrinsics::aarch64::vst1q_s8
- intrinsics::aarch64::vst1q_s8_x2
- intrinsics::aarch64::vst1q_s8_x3
- intrinsics::aarch64::vst1q_s8_x4
- intrinsics::aarch64::vst1q_u16
- intrinsics::aarch64::vst1q_u16_x2
- intrinsics::aarch64::vst1q_u16_x3
- intrinsics::aarch64::vst1q_u16_x4
- intrinsics::aarch64::vst1q_u32
- intrinsics::aarch64::vst1q_u32_x2
- intrinsics::aarch64::vst1q_u32_x3
- intrinsics::aarch64::vst1q_u32_x4
- intrinsics::aarch64::vst1q_u64
- intrinsics::aarch64::vst1q_u64_x2
- intrinsics::aarch64::vst1q_u64_x3
- intrinsics::aarch64::vst1q_u64_x4
- intrinsics::aarch64::vst1q_u8
- intrinsics::aarch64::vst1q_u8_x2
- intrinsics::aarch64::vst1q_u8_x3
- intrinsics::aarch64::vst1q_u8_x4
- intrinsics::aarch64::vst2_f16
- intrinsics::aarch64::vst2_f32
- intrinsics::aarch64::vst2_f64
- intrinsics::aarch64::vst2_lane_f16
- intrinsics::aarch64::vst2_lane_f32
- intrinsics::aarch64::vst2_lane_f64
- intrinsics::aarch64::vst2_lane_p16
- intrinsics::aarch64::vst2_lane_p64
- intrinsics::aarch64::vst2_lane_p8
- intrinsics::aarch64::vst2_lane_s16
- intrinsics::aarch64::vst2_lane_s32
- intrinsics::aarch64::vst2_lane_s64
- intrinsics::aarch64::vst2_lane_s8
- intrinsics::aarch64::vst2_lane_u16
- intrinsics::aarch64::vst2_lane_u32
- intrinsics::aarch64::vst2_lane_u64
- intrinsics::aarch64::vst2_lane_u8
- intrinsics::aarch64::vst2_p16
- intrinsics::aarch64::vst2_p64
- intrinsics::aarch64::vst2_p8
- intrinsics::aarch64::vst2_s16
- intrinsics::aarch64::vst2_s32
- intrinsics::aarch64::vst2_s64
- intrinsics::aarch64::vst2_s8
- intrinsics::aarch64::vst2_u16
- intrinsics::aarch64::vst2_u32
- intrinsics::aarch64::vst2_u64
- intrinsics::aarch64::vst2_u8
- intrinsics::aarch64::vst2q_f16
- intrinsics::aarch64::vst2q_f32
- intrinsics::aarch64::vst2q_f64
- intrinsics::aarch64::vst2q_lane_f16
- intrinsics::aarch64::vst2q_lane_f32
- intrinsics::aarch64::vst2q_lane_f64
- intrinsics::aarch64::vst2q_lane_p16
- intrinsics::aarch64::vst2q_lane_p64
- intrinsics::aarch64::vst2q_lane_p8
- intrinsics::aarch64::vst2q_lane_s16
- intrinsics::aarch64::vst2q_lane_s32
- intrinsics::aarch64::vst2q_lane_s64
- intrinsics::aarch64::vst2q_lane_s8
- intrinsics::aarch64::vst2q_lane_u16
- intrinsics::aarch64::vst2q_lane_u32
- intrinsics::aarch64::vst2q_lane_u64
- intrinsics::aarch64::vst2q_lane_u8
- intrinsics::aarch64::vst2q_p16
- intrinsics::aarch64::vst2q_p64
- intrinsics::aarch64::vst2q_p8
- intrinsics::aarch64::vst2q_s16
- intrinsics::aarch64::vst2q_s32
- intrinsics::aarch64::vst2q_s64
- intrinsics::aarch64::vst2q_s8
- intrinsics::aarch64::vst2q_u16
- intrinsics::aarch64::vst2q_u32
- intrinsics::aarch64::vst2q_u64
- intrinsics::aarch64::vst2q_u8
- intrinsics::aarch64::vst3_f16
- intrinsics::aarch64::vst3_f32
- intrinsics::aarch64::vst3_f64
- intrinsics::aarch64::vst3_lane_f16
- intrinsics::aarch64::vst3_lane_f32
- intrinsics::aarch64::vst3_lane_f64
- intrinsics::aarch64::vst3_lane_p16
- intrinsics::aarch64::vst3_lane_p64
- intrinsics::aarch64::vst3_lane_p8
- intrinsics::aarch64::vst3_lane_s16
- intrinsics::aarch64::vst3_lane_s32
- intrinsics::aarch64::vst3_lane_s64
- intrinsics::aarch64::vst3_lane_s8
- intrinsics::aarch64::vst3_lane_u16
- intrinsics::aarch64::vst3_lane_u32
- intrinsics::aarch64::vst3_lane_u64
- intrinsics::aarch64::vst3_lane_u8
- intrinsics::aarch64::vst3_p16
- intrinsics::aarch64::vst3_p64
- intrinsics::aarch64::vst3_p8
- intrinsics::aarch64::vst3_s16
- intrinsics::aarch64::vst3_s32
- intrinsics::aarch64::vst3_s64
- intrinsics::aarch64::vst3_s8
- intrinsics::aarch64::vst3_u16
- intrinsics::aarch64::vst3_u32
- intrinsics::aarch64::vst3_u64
- intrinsics::aarch64::vst3_u8
- intrinsics::aarch64::vst3q_f16
- intrinsics::aarch64::vst3q_f32
- intrinsics::aarch64::vst3q_f64
- intrinsics::aarch64::vst3q_lane_f16
- intrinsics::aarch64::vst3q_lane_f32
- intrinsics::aarch64::vst3q_lane_f64
- intrinsics::aarch64::vst3q_lane_p16
- intrinsics::aarch64::vst3q_lane_p64
- intrinsics::aarch64::vst3q_lane_p8
- intrinsics::aarch64::vst3q_lane_s16
- intrinsics::aarch64::vst3q_lane_s32
- intrinsics::aarch64::vst3q_lane_s64
- intrinsics::aarch64::vst3q_lane_s8
- intrinsics::aarch64::vst3q_lane_u16
- intrinsics::aarch64::vst3q_lane_u32
- intrinsics::aarch64::vst3q_lane_u64
- intrinsics::aarch64::vst3q_lane_u8
- intrinsics::aarch64::vst3q_p16
- intrinsics::aarch64::vst3q_p64
- intrinsics::aarch64::vst3q_p8
- intrinsics::aarch64::vst3q_s16
- intrinsics::aarch64::vst3q_s32
- intrinsics::aarch64::vst3q_s64
- intrinsics::aarch64::vst3q_s8
- intrinsics::aarch64::vst3q_u16
- intrinsics::aarch64::vst3q_u32
- intrinsics::aarch64::vst3q_u64
- intrinsics::aarch64::vst3q_u8
- intrinsics::aarch64::vst4_f16
- intrinsics::aarch64::vst4_f32
- intrinsics::aarch64::vst4_f64
- intrinsics::aarch64::vst4_lane_f16
- intrinsics::aarch64::vst4_lane_f32
- intrinsics::aarch64::vst4_lane_f64
- intrinsics::aarch64::vst4_lane_p16
- intrinsics::aarch64::vst4_lane_p64
- intrinsics::aarch64::vst4_lane_p8
- intrinsics::aarch64::vst4_lane_s16
- intrinsics::aarch64::vst4_lane_s32
- intrinsics::aarch64::vst4_lane_s64
- intrinsics::aarch64::vst4_lane_s8
- intrinsics::aarch64::vst4_lane_u16
- intrinsics::aarch64::vst4_lane_u32
- intrinsics::aarch64::vst4_lane_u64
- intrinsics::aarch64::vst4_lane_u8
- intrinsics::aarch64::vst4_p16
- intrinsics::aarch64::vst4_p64
- intrinsics::aarch64::vst4_p8
- intrinsics::aarch64::vst4_s16
- intrinsics::aarch64::vst4_s32
- intrinsics::aarch64::vst4_s64
- intrinsics::aarch64::vst4_s8
- intrinsics::aarch64::vst4_u16
- intrinsics::aarch64::vst4_u32
- intrinsics::aarch64::vst4_u64
- intrinsics::aarch64::vst4_u8
- intrinsics::aarch64::vst4q_f16
- intrinsics::aarch64::vst4q_f32
- intrinsics::aarch64::vst4q_f64
- intrinsics::aarch64::vst4q_lane_f16
- intrinsics::aarch64::vst4q_lane_f32
- intrinsics::aarch64::vst4q_lane_f64
- intrinsics::aarch64::vst4q_lane_p16
- intrinsics::aarch64::vst4q_lane_p64
- intrinsics::aarch64::vst4q_lane_p8
- intrinsics::aarch64::vst4q_lane_s16
- intrinsics::aarch64::vst4q_lane_s32
- intrinsics::aarch64::vst4q_lane_s64
- intrinsics::aarch64::vst4q_lane_s8
- intrinsics::aarch64::vst4q_lane_u16
- intrinsics::aarch64::vst4q_lane_u32
- intrinsics::aarch64::vst4q_lane_u64
- intrinsics::aarch64::vst4q_lane_u8
- intrinsics::aarch64::vst4q_p16
- intrinsics::aarch64::vst4q_p64
- intrinsics::aarch64::vst4q_p8
- intrinsics::aarch64::vst4q_s16
- intrinsics::aarch64::vst4q_s32
- intrinsics::aarch64::vst4q_s64
- intrinsics::aarch64::vst4q_s8
- intrinsics::aarch64::vst4q_u16
- intrinsics::aarch64::vst4q_u32
- intrinsics::aarch64::vst4q_u64
- intrinsics::aarch64::vst4q_u8
- intrinsics::aarch64::vstl1_lane_f64
- intrinsics::aarch64::vstl1_lane_p64
- intrinsics::aarch64::vstl1_lane_s64
- intrinsics::aarch64::vstl1_lane_u64
- intrinsics::aarch64::vstl1q_lane_f64
- intrinsics::aarch64::vstl1q_lane_p64
- intrinsics::aarch64::vstl1q_lane_s64
- intrinsics::aarch64::vstl1q_lane_u64
- intrinsics::aarch64::vstrq_p128
- intrinsics::aarch64::vsub_f16
- intrinsics::aarch64::vsub_f32
- intrinsics::aarch64::vsub_f64
- intrinsics::aarch64::vsub_s16
- intrinsics::aarch64::vsub_s32
- intrinsics::aarch64::vsub_s64
- intrinsics::aarch64::vsub_s8
- intrinsics::aarch64::vsub_u16
- intrinsics::aarch64::vsub_u32
- intrinsics::aarch64::vsub_u64
- intrinsics::aarch64::vsub_u8
- intrinsics::aarch64::vsubd_s64
- intrinsics::aarch64::vsubd_u64
- intrinsics::aarch64::vsubh_f16
- intrinsics::aarch64::vsubhn_high_s16
- intrinsics::aarch64::vsubhn_high_s32
- intrinsics::aarch64::vsubhn_high_s64
- intrinsics::aarch64::vsubhn_high_u16
- intrinsics::aarch64::vsubhn_high_u32
- intrinsics::aarch64::vsubhn_high_u64
- intrinsics::aarch64::vsubhn_s16
- intrinsics::aarch64::vsubhn_s32
- intrinsics::aarch64::vsubhn_s64
- intrinsics::aarch64::vsubhn_u16
- intrinsics::aarch64::vsubhn_u32
- intrinsics::aarch64::vsubhn_u64
- intrinsics::aarch64::vsubl_high_s16
- intrinsics::aarch64::vsubl_high_s32
- intrinsics::aarch64::vsubl_high_s8
- intrinsics::aarch64::vsubl_high_u16
- intrinsics::aarch64::vsubl_high_u32
- intrinsics::aarch64::vsubl_high_u8
- intrinsics::aarch64::vsubl_s16
- intrinsics::aarch64::vsubl_s32
- intrinsics::aarch64::vsubl_s8
- intrinsics::aarch64::vsubl_u16
- intrinsics::aarch64::vsubl_u32
- intrinsics::aarch64::vsubl_u8
- intrinsics::aarch64::vsubq_f16
- intrinsics::aarch64::vsubq_f32
- intrinsics::aarch64::vsubq_f64
- intrinsics::aarch64::vsubq_s16
- intrinsics::aarch64::vsubq_s32
- intrinsics::aarch64::vsubq_s64
- intrinsics::aarch64::vsubq_s8
- intrinsics::aarch64::vsubq_u16
- intrinsics::aarch64::vsubq_u32
- intrinsics::aarch64::vsubq_u64
- intrinsics::aarch64::vsubq_u8
- intrinsics::aarch64::vsubw_high_s16
- intrinsics::aarch64::vsubw_high_s32
- intrinsics::aarch64::vsubw_high_s8
- intrinsics::aarch64::vsubw_high_u16
- intrinsics::aarch64::vsubw_high_u32
- intrinsics::aarch64::vsubw_high_u8
- intrinsics::aarch64::vsubw_s16
- intrinsics::aarch64::vsubw_s32
- intrinsics::aarch64::vsubw_s8
- intrinsics::aarch64::vsubw_u16
- intrinsics::aarch64::vsubw_u32
- intrinsics::aarch64::vsubw_u8
- intrinsics::aarch64::vsudot_lane_s32
- intrinsics::aarch64::vsudot_laneq_s32
- intrinsics::aarch64::vsudotq_lane_s32
- intrinsics::aarch64::vsudotq_laneq_s32
- intrinsics::aarch64::vtbl1_p8
- intrinsics::aarch64::vtbl1_s8
- intrinsics::aarch64::vtbl1_u8
- intrinsics::aarch64::vtbl2_p8
- intrinsics::aarch64::vtbl2_s8
- intrinsics::aarch64::vtbl2_u8
- intrinsics::aarch64::vtbl3_p8
- intrinsics::aarch64::vtbl3_s8
- intrinsics::aarch64::vtbl3_u8
- intrinsics::aarch64::vtbl4_p8
- intrinsics::aarch64::vtbl4_s8
- intrinsics::aarch64::vtbl4_u8
- intrinsics::aarch64::vtbx1_p8
- intrinsics::aarch64::vtbx1_s8
- intrinsics::aarch64::vtbx1_u8
- intrinsics::aarch64::vtbx2_p8
- intrinsics::aarch64::vtbx2_s8
- intrinsics::aarch64::vtbx2_u8
- intrinsics::aarch64::vtbx3_p8
- intrinsics::aarch64::vtbx3_s8
- intrinsics::aarch64::vtbx3_u8
- intrinsics::aarch64::vtbx4_p8
- intrinsics::aarch64::vtbx4_s8
- intrinsics::aarch64::vtbx4_u8
- intrinsics::aarch64::vtrn1_f16
- intrinsics::aarch64::vtrn1_f32
- intrinsics::aarch64::vtrn1_p16
- intrinsics::aarch64::vtrn1_p8
- intrinsics::aarch64::vtrn1_s16
- intrinsics::aarch64::vtrn1_s32
- intrinsics::aarch64::vtrn1_s8
- intrinsics::aarch64::vtrn1_u16
- intrinsics::aarch64::vtrn1_u32
- intrinsics::aarch64::vtrn1_u8
- intrinsics::aarch64::vtrn1q_f16
- intrinsics::aarch64::vtrn1q_f32
- intrinsics::aarch64::vtrn1q_f64
- intrinsics::aarch64::vtrn1q_p16
- intrinsics::aarch64::vtrn1q_p64
- intrinsics::aarch64::vtrn1q_p8
- intrinsics::aarch64::vtrn1q_s16
- intrinsics::aarch64::vtrn1q_s32
- intrinsics::aarch64::vtrn1q_s64
- intrinsics::aarch64::vtrn1q_s8
- intrinsics::aarch64::vtrn1q_u16
- intrinsics::aarch64::vtrn1q_u32
- intrinsics::aarch64::vtrn1q_u64
- intrinsics::aarch64::vtrn1q_u8
- intrinsics::aarch64::vtrn2_f16
- intrinsics::aarch64::vtrn2_f32
- intrinsics::aarch64::vtrn2_p16
- intrinsics::aarch64::vtrn2_p8
- intrinsics::aarch64::vtrn2_s16
- intrinsics::aarch64::vtrn2_s32
- intrinsics::aarch64::vtrn2_s8
- intrinsics::aarch64::vtrn2_u16
- intrinsics::aarch64::vtrn2_u32
- intrinsics::aarch64::vtrn2_u8
- intrinsics::aarch64::vtrn2q_f16
- intrinsics::aarch64::vtrn2q_f32
- intrinsics::aarch64::vtrn2q_f64
- intrinsics::aarch64::vtrn2q_p16
- intrinsics::aarch64::vtrn2q_p64
- intrinsics::aarch64::vtrn2q_p8
- intrinsics::aarch64::vtrn2q_s16
- intrinsics::aarch64::vtrn2q_s32
- intrinsics::aarch64::vtrn2q_s64
- intrinsics::aarch64::vtrn2q_s8
- intrinsics::aarch64::vtrn2q_u16
- intrinsics::aarch64::vtrn2q_u32
- intrinsics::aarch64::vtrn2q_u64
- intrinsics::aarch64::vtrn2q_u8
- intrinsics::aarch64::vtrn_f16
- intrinsics::aarch64::vtrn_f32
- intrinsics::aarch64::vtrn_p16
- intrinsics::aarch64::vtrn_p8
- intrinsics::aarch64::vtrn_s16
- intrinsics::aarch64::vtrn_s32
- intrinsics::aarch64::vtrn_s8
- intrinsics::aarch64::vtrn_u16
- intrinsics::aarch64::vtrn_u32
- intrinsics::aarch64::vtrn_u8
- intrinsics::aarch64::vtrnq_f16
- intrinsics::aarch64::vtrnq_f32
- intrinsics::aarch64::vtrnq_p16
- intrinsics::aarch64::vtrnq_p8
- intrinsics::aarch64::vtrnq_s16
- intrinsics::aarch64::vtrnq_s32
- intrinsics::aarch64::vtrnq_s8
- intrinsics::aarch64::vtrnq_u16
- intrinsics::aarch64::vtrnq_u32
- intrinsics::aarch64::vtrnq_u8
- intrinsics::aarch64::vtst_p16
- intrinsics::aarch64::vtst_p64
- intrinsics::aarch64::vtst_p8
- intrinsics::aarch64::vtst_s16
- intrinsics::aarch64::vtst_s32
- intrinsics::aarch64::vtst_s64
- intrinsics::aarch64::vtst_s8
- intrinsics::aarch64::vtst_u16
- intrinsics::aarch64::vtst_u32
- intrinsics::aarch64::vtst_u64
- intrinsics::aarch64::vtst_u8
- intrinsics::aarch64::vtstd_s64
- intrinsics::aarch64::vtstd_u64
- intrinsics::aarch64::vtstq_p16
- intrinsics::aarch64::vtstq_p64
- intrinsics::aarch64::vtstq_p8
- intrinsics::aarch64::vtstq_s16
- intrinsics::aarch64::vtstq_s32
- intrinsics::aarch64::vtstq_s64
- intrinsics::aarch64::vtstq_s8
- intrinsics::aarch64::vtstq_u16
- intrinsics::aarch64::vtstq_u32
- intrinsics::aarch64::vtstq_u64
- intrinsics::aarch64::vtstq_u8
- intrinsics::aarch64::vuqadd_s16
- intrinsics::aarch64::vuqadd_s32
- intrinsics::aarch64::vuqadd_s64
- intrinsics::aarch64::vuqadd_s8
- intrinsics::aarch64::vuqaddb_s8
- intrinsics::aarch64::vuqaddd_s64
- intrinsics::aarch64::vuqaddh_s16
- intrinsics::aarch64::vuqaddq_s16
- intrinsics::aarch64::vuqaddq_s32
- intrinsics::aarch64::vuqaddq_s64
- intrinsics::aarch64::vuqaddq_s8
- intrinsics::aarch64::vuqadds_s32
- intrinsics::aarch64::vusdot_lane_s32
- intrinsics::aarch64::vusdot_laneq_s32
- intrinsics::aarch64::vusdot_s32
- intrinsics::aarch64::vusdotq_lane_s32
- intrinsics::aarch64::vusdotq_laneq_s32
- intrinsics::aarch64::vusdotq_s32
- intrinsics::aarch64::vusmmlaq_s32
- intrinsics::aarch64::vuzp1_f16
- intrinsics::aarch64::vuzp1_f32
- intrinsics::aarch64::vuzp1_p16
- intrinsics::aarch64::vuzp1_p8
- intrinsics::aarch64::vuzp1_s16
- intrinsics::aarch64::vuzp1_s32
- intrinsics::aarch64::vuzp1_s8
- intrinsics::aarch64::vuzp1_u16
- intrinsics::aarch64::vuzp1_u32
- intrinsics::aarch64::vuzp1_u8
- intrinsics::aarch64::vuzp1q_f16
- intrinsics::aarch64::vuzp1q_f32
- intrinsics::aarch64::vuzp1q_f64
- intrinsics::aarch64::vuzp1q_p16
- intrinsics::aarch64::vuzp1q_p64
- intrinsics::aarch64::vuzp1q_p8
- intrinsics::aarch64::vuzp1q_s16
- intrinsics::aarch64::vuzp1q_s32
- intrinsics::aarch64::vuzp1q_s64
- intrinsics::aarch64::vuzp1q_s8
- intrinsics::aarch64::vuzp1q_u16
- intrinsics::aarch64::vuzp1q_u32
- intrinsics::aarch64::vuzp1q_u64
- intrinsics::aarch64::vuzp1q_u8
- intrinsics::aarch64::vuzp2_f16
- intrinsics::aarch64::vuzp2_f32
- intrinsics::aarch64::vuzp2_p16
- intrinsics::aarch64::vuzp2_p8
- intrinsics::aarch64::vuzp2_s16
- intrinsics::aarch64::vuzp2_s32
- intrinsics::aarch64::vuzp2_s8
- intrinsics::aarch64::vuzp2_u16
- intrinsics::aarch64::vuzp2_u32
- intrinsics::aarch64::vuzp2_u8
- intrinsics::aarch64::vuzp2q_f16
- intrinsics::aarch64::vuzp2q_f32
- intrinsics::aarch64::vuzp2q_f64
- intrinsics::aarch64::vuzp2q_p16
- intrinsics::aarch64::vuzp2q_p64
- intrinsics::aarch64::vuzp2q_p8
- intrinsics::aarch64::vuzp2q_s16
- intrinsics::aarch64::vuzp2q_s32
- intrinsics::aarch64::vuzp2q_s64
- intrinsics::aarch64::vuzp2q_s8
- intrinsics::aarch64::vuzp2q_u16
- intrinsics::aarch64::vuzp2q_u32
- intrinsics::aarch64::vuzp2q_u64
- intrinsics::aarch64::vuzp2q_u8
- intrinsics::aarch64::vuzp_f16
- intrinsics::aarch64::vuzp_f32
- intrinsics::aarch64::vuzp_p16
- intrinsics::aarch64::vuzp_p8
- intrinsics::aarch64::vuzp_s16
- intrinsics::aarch64::vuzp_s32
- intrinsics::aarch64::vuzp_s8
- intrinsics::aarch64::vuzp_u16
- intrinsics::aarch64::vuzp_u32
- intrinsics::aarch64::vuzp_u8
- intrinsics::aarch64::vuzpq_f16
- intrinsics::aarch64::vuzpq_f32
- intrinsics::aarch64::vuzpq_p16
- intrinsics::aarch64::vuzpq_p8
- intrinsics::aarch64::vuzpq_s16
- intrinsics::aarch64::vuzpq_s32
- intrinsics::aarch64::vuzpq_s8
- intrinsics::aarch64::vuzpq_u16
- intrinsics::aarch64::vuzpq_u32
- intrinsics::aarch64::vuzpq_u8
- intrinsics::aarch64::vxarq_u64
- intrinsics::aarch64::vzip1_f16
- intrinsics::aarch64::vzip1_f32
- intrinsics::aarch64::vzip1_p16
- intrinsics::aarch64::vzip1_p8
- intrinsics::aarch64::vzip1_s16
- intrinsics::aarch64::vzip1_s32
- intrinsics::aarch64::vzip1_s8
- intrinsics::aarch64::vzip1_u16
- intrinsics::aarch64::vzip1_u32
- intrinsics::aarch64::vzip1_u8
- intrinsics::aarch64::vzip1q_f16
- intrinsics::aarch64::vzip1q_f32
- intrinsics::aarch64::vzip1q_f64
- intrinsics::aarch64::vzip1q_p16
- intrinsics::aarch64::vzip1q_p64
- intrinsics::aarch64::vzip1q_p8
- intrinsics::aarch64::vzip1q_s16
- intrinsics::aarch64::vzip1q_s32
- intrinsics::aarch64::vzip1q_s64
- intrinsics::aarch64::vzip1q_s8
- intrinsics::aarch64::vzip1q_u16
- intrinsics::aarch64::vzip1q_u32
- intrinsics::aarch64::vzip1q_u64
- intrinsics::aarch64::vzip1q_u8
- intrinsics::aarch64::vzip2_f16
- intrinsics::aarch64::vzip2_f32
- intrinsics::aarch64::vzip2_p16
- intrinsics::aarch64::vzip2_p8
- intrinsics::aarch64::vzip2_s16
- intrinsics::aarch64::vzip2_s32
- intrinsics::aarch64::vzip2_s8
- intrinsics::aarch64::vzip2_u16
- intrinsics::aarch64::vzip2_u32
- intrinsics::aarch64::vzip2_u8
- intrinsics::aarch64::vzip2q_f16
- intrinsics::aarch64::vzip2q_f32
- intrinsics::aarch64::vzip2q_f64
- intrinsics::aarch64::vzip2q_p16
- intrinsics::aarch64::vzip2q_p64
- intrinsics::aarch64::vzip2q_p8
- intrinsics::aarch64::vzip2q_s16
- intrinsics::aarch64::vzip2q_s32
- intrinsics::aarch64::vzip2q_s64
- intrinsics::aarch64::vzip2q_s8
- intrinsics::aarch64::vzip2q_u16
- intrinsics::aarch64::vzip2q_u32
- intrinsics::aarch64::vzip2q_u64
- intrinsics::aarch64::vzip2q_u8
- intrinsics::aarch64::vzip_f16
- intrinsics::aarch64::vzip_f32
- intrinsics::aarch64::vzip_p16
- intrinsics::aarch64::vzip_p8
- intrinsics::aarch64::vzip_s16
- intrinsics::aarch64::vzip_s32
- intrinsics::aarch64::vzip_s8
- intrinsics::aarch64::vzip_u16
- intrinsics::aarch64::vzip_u32
- intrinsics::aarch64::vzip_u8
- intrinsics::aarch64::vzipq_f16
- intrinsics::aarch64::vzipq_f32
- intrinsics::aarch64::vzipq_p16
- intrinsics::aarch64::vzipq_p8
- intrinsics::aarch64::vzipq_s16
- intrinsics::aarch64::vzipq_s32
- intrinsics::aarch64::vzipq_s8
- intrinsics::aarch64::vzipq_u16
- intrinsics::aarch64::vzipq_u32
- intrinsics::aarch64::vzipq_u8
- prelude::__arm_mte_create_random_tag
- prelude::__arm_mte_exclude_tag
- prelude::__arm_mte_get_tag
- prelude::__arm_mte_increment_tag
- prelude::__arm_mte_ptrdiff
- prelude::__arm_mte_set_tag
- prelude::__crc32b
- prelude::__crc32cb
- prelude::__crc32cd
- prelude::__crc32ch
- prelude::__crc32cw
- prelude::__crc32d
- prelude::__crc32h
- prelude::__crc32w
- prelude::__dmb
- prelude::__dsb
- prelude::__isb
- prelude::__jcvt
- prelude::__nop
- prelude::__rndr
- prelude::__rndrrs
- prelude::__sev
- prelude::__sevl
- prelude::__wfe
- prelude::__wfi
- prelude::__yield
- prelude::_prefetch
- prelude::vaba_s16
- prelude::vaba_s32
- prelude::vaba_s8
- prelude::vaba_u16
- prelude::vaba_u32
- prelude::vaba_u8
- prelude::vabal_high_s16
- prelude::vabal_high_s32
- prelude::vabal_high_s8
- prelude::vabal_high_u16
- prelude::vabal_high_u32
- prelude::vabal_high_u8
- prelude::vabal_s16
- prelude::vabal_s32
- prelude::vabal_s8
- prelude::vabal_u16
- prelude::vabal_u32
- prelude::vabal_u8
- prelude::vabaq_s16
- prelude::vabaq_s32
- prelude::vabaq_s8
- prelude::vabaq_u16
- prelude::vabaq_u32
- prelude::vabaq_u8
- prelude::vabd_f16
- prelude::vabd_f32
- prelude::vabd_f64
- prelude::vabd_s16
- prelude::vabd_s32
- prelude::vabd_s8
- prelude::vabd_u16
- prelude::vabd_u32
- prelude::vabd_u8
- prelude::vabdd_f64
- prelude::vabdh_f16
- prelude::vabdl_high_s16
- prelude::vabdl_high_s32
- prelude::vabdl_high_s8
- prelude::vabdl_high_u16
- prelude::vabdl_high_u32
- prelude::vabdl_high_u8
- prelude::vabdl_s16
- prelude::vabdl_s32
- prelude::vabdl_s8
- prelude::vabdl_u16
- prelude::vabdl_u32
- prelude::vabdl_u8
- prelude::vabdq_f16
- prelude::vabdq_f32
- prelude::vabdq_f64
- prelude::vabdq_s16
- prelude::vabdq_s32
- prelude::vabdq_s8
- prelude::vabdq_u16
- prelude::vabdq_u32
- prelude::vabdq_u8
- prelude::vabds_f32
- prelude::vabs_f16
- prelude::vabs_f32
- prelude::vabs_f64
- prelude::vabs_s16
- prelude::vabs_s32
- prelude::vabs_s64
- prelude::vabs_s8
- prelude::vabsd_s64
- prelude::vabsh_f16
- prelude::vabsq_f16
- prelude::vabsq_f32
- prelude::vabsq_f64
- prelude::vabsq_s16
- prelude::vabsq_s32
- prelude::vabsq_s64
- prelude::vabsq_s8
- prelude::vadd_f16
- prelude::vadd_f32
- prelude::vadd_f64
- prelude::vadd_p16
- prelude::vadd_p64
- prelude::vadd_p8
- prelude::vadd_s16
- prelude::vadd_s32
- prelude::vadd_s64
- prelude::vadd_s8
- prelude::vadd_u16
- prelude::vadd_u32
- prelude::vadd_u64
- prelude::vadd_u8
- prelude::vaddd_s64
- prelude::vaddd_u64
- prelude::vaddh_f16
- prelude::vaddhn_high_s16
- prelude::vaddhn_high_s32
- prelude::vaddhn_high_s64
- prelude::vaddhn_high_u16
- prelude::vaddhn_high_u32
- prelude::vaddhn_high_u64
- prelude::vaddhn_s16
- prelude::vaddhn_s32
- prelude::vaddhn_s64
- prelude::vaddhn_u16
- prelude::vaddhn_u32
- prelude::vaddhn_u64
- prelude::vaddl_high_s16
- prelude::vaddl_high_s32
- prelude::vaddl_high_s8
- prelude::vaddl_high_u16
- prelude::vaddl_high_u32
- prelude::vaddl_high_u8
- prelude::vaddl_s16
- prelude::vaddl_s32
- prelude::vaddl_s8
- prelude::vaddl_u16
- prelude::vaddl_u32
- prelude::vaddl_u8
- prelude::vaddlv_s16
- prelude::vaddlv_s32
- prelude::vaddlv_s8
- prelude::vaddlv_u16
- prelude::vaddlv_u32
- prelude::vaddlv_u8
- prelude::vaddlvq_s16
- prelude::vaddlvq_s32
- prelude::vaddlvq_s8
- prelude::vaddlvq_u16
- prelude::vaddlvq_u32
- prelude::vaddlvq_u8
- prelude::vaddq_f16
- prelude::vaddq_f32
- prelude::vaddq_f64
- prelude::vaddq_p128
- prelude::vaddq_p16
- prelude::vaddq_p64
- prelude::vaddq_p8
- prelude::vaddq_s16
- prelude::vaddq_s32
- prelude::vaddq_s64
- prelude::vaddq_s8
- prelude::vaddq_u16
- prelude::vaddq_u32
- prelude::vaddq_u64
- prelude::vaddq_u8
- prelude::vaddv_f32
- prelude::vaddv_s16
- prelude::vaddv_s32
- prelude::vaddv_s8
- prelude::vaddv_u16
- prelude::vaddv_u32
- prelude::vaddv_u8
- prelude::vaddvq_f32
- prelude::vaddvq_f64
- prelude::vaddvq_s16
- prelude::vaddvq_s32
- prelude::vaddvq_s64
- prelude::vaddvq_s8
- prelude::vaddvq_u16
- prelude::vaddvq_u32
- prelude::vaddvq_u64
- prelude::vaddvq_u8
- prelude::vaddw_high_s16
- prelude::vaddw_high_s32
- prelude::vaddw_high_s8
- prelude::vaddw_high_u16
- prelude::vaddw_high_u32
- prelude::vaddw_high_u8
- prelude::vaddw_s16
- prelude::vaddw_s32
- prelude::vaddw_s8
- prelude::vaddw_u16
- prelude::vaddw_u32
- prelude::vaddw_u8
- prelude::vaesdq_u8
- prelude::vaeseq_u8
- prelude::vaesimcq_u8
- prelude::vaesmcq_u8
- prelude::vamax_f16
- prelude::vamax_f32
- prelude::vamaxq_f16
- prelude::vamaxq_f32
- prelude::vamaxq_f64
- prelude::vamin_f16
- prelude::vamin_f32
- prelude::vaminq_f16
- prelude::vaminq_f32
- prelude::vaminq_f64
- prelude::vand_s16
- prelude::vand_s32
- prelude::vand_s64
- prelude::vand_s8
- prelude::vand_u16
- prelude::vand_u32
- prelude::vand_u64
- prelude::vand_u8
- prelude::vandq_s16
- prelude::vandq_s32
- prelude::vandq_s64
- prelude::vandq_s8
- prelude::vandq_u16
- prelude::vandq_u32
- prelude::vandq_u64
- prelude::vandq_u8
- prelude::vbcaxq_s16
- prelude::vbcaxq_s32
- prelude::vbcaxq_s64
- prelude::vbcaxq_s8
- prelude::vbcaxq_u16
- prelude::vbcaxq_u32
- prelude::vbcaxq_u64
- prelude::vbcaxq_u8
- prelude::vbic_s16
- prelude::vbic_s32
- prelude::vbic_s64
- prelude::vbic_s8
- prelude::vbic_u16
- prelude::vbic_u32
- prelude::vbic_u64
- prelude::vbic_u8
- prelude::vbicq_s16
- prelude::vbicq_s32
- prelude::vbicq_s64
- prelude::vbicq_s8
- prelude::vbicq_u16
- prelude::vbicq_u32
- prelude::vbicq_u64
- prelude::vbicq_u8
- prelude::vbsl_f16
- prelude::vbsl_f32
- prelude::vbsl_f64
- prelude::vbsl_p16
- prelude::vbsl_p64
- prelude::vbsl_p8
- prelude::vbsl_s16
- prelude::vbsl_s32
- prelude::vbsl_s64
- prelude::vbsl_s8
- prelude::vbsl_u16
- prelude::vbsl_u32
- prelude::vbsl_u64
- prelude::vbsl_u8
- prelude::vbslq_f16
- prelude::vbslq_f32
- prelude::vbslq_f64
- prelude::vbslq_p16
- prelude::vbslq_p64
- prelude::vbslq_p8
- prelude::vbslq_s16
- prelude::vbslq_s32
- prelude::vbslq_s64
- prelude::vbslq_s8
- prelude::vbslq_u16
- prelude::vbslq_u32
- prelude::vbslq_u64
- prelude::vbslq_u8
- prelude::vcadd_rot270_f16
- prelude::vcadd_rot270_f32
- prelude::vcadd_rot90_f16
- prelude::vcadd_rot90_f32
- prelude::vcaddq_rot270_f16
- prelude::vcaddq_rot270_f32
- prelude::vcaddq_rot270_f64
- prelude::vcaddq_rot90_f16
- prelude::vcaddq_rot90_f32
- prelude::vcaddq_rot90_f64
- prelude::vcage_f16
- prelude::vcage_f32
- prelude::vcage_f64
- prelude::vcaged_f64
- prelude::vcageh_f16
- prelude::vcageq_f16
- prelude::vcageq_f32
- prelude::vcageq_f64
- prelude::vcages_f32
- prelude::vcagt_f16
- prelude::vcagt_f32
- prelude::vcagt_f64
- prelude::vcagtd_f64
- prelude::vcagth_f16
- prelude::vcagtq_f16
- prelude::vcagtq_f32
- prelude::vcagtq_f64
- prelude::vcagts_f32
- prelude::vcale_f16
- prelude::vcale_f32
- prelude::vcale_f64
- prelude::vcaled_f64
- prelude::vcaleh_f16
- prelude::vcaleq_f16
- prelude::vcaleq_f32
- prelude::vcaleq_f64
- prelude::vcales_f32
- prelude::vcalt_f16
- prelude::vcalt_f32
- prelude::vcalt_f64
- prelude::vcaltd_f64
- prelude::vcalth_f16
- prelude::vcaltq_f16
- prelude::vcaltq_f32
- prelude::vcaltq_f64
- prelude::vcalts_f32
- prelude::vceq_f16
- prelude::vceq_f32
- prelude::vceq_f64
- prelude::vceq_p64
- prelude::vceq_p8
- prelude::vceq_s16
- prelude::vceq_s32
- prelude::vceq_s64
- prelude::vceq_s8
- prelude::vceq_u16
- prelude::vceq_u32
- prelude::vceq_u64
- prelude::vceq_u8
- prelude::vceqd_f64
- prelude::vceqd_s64
- prelude::vceqd_u64
- prelude::vceqh_f16
- prelude::vceqq_f16
- prelude::vceqq_f32
- prelude::vceqq_f64
- prelude::vceqq_p64
- prelude::vceqq_p8
- prelude::vceqq_s16
- prelude::vceqq_s32
- prelude::vceqq_s64
- prelude::vceqq_s8
- prelude::vceqq_u16
- prelude::vceqq_u32
- prelude::vceqq_u64
- prelude::vceqq_u8
- prelude::vceqs_f32
- prelude::vceqz_f16
- prelude::vceqz_f32
- prelude::vceqz_f64
- prelude::vceqz_p64
- prelude::vceqz_p8
- prelude::vceqz_s16
- prelude::vceqz_s32
- prelude::vceqz_s64
- prelude::vceqz_s8
- prelude::vceqz_u16
- prelude::vceqz_u32
- prelude::vceqz_u64
- prelude::vceqz_u8
- prelude::vceqzd_f64
- prelude::vceqzd_s64
- prelude::vceqzd_u64
- prelude::vceqzh_f16
- prelude::vceqzq_f16
- prelude::vceqzq_f32
- prelude::vceqzq_f64
- prelude::vceqzq_p64
- prelude::vceqzq_p8
- prelude::vceqzq_s16
- prelude::vceqzq_s32
- prelude::vceqzq_s64
- prelude::vceqzq_s8
- prelude::vceqzq_u16
- prelude::vceqzq_u32
- prelude::vceqzq_u64
- prelude::vceqzq_u8
- prelude::vceqzs_f32
- prelude::vcge_f16
- prelude::vcge_f32
- prelude::vcge_f64
- prelude::vcge_s16
- prelude::vcge_s32
- prelude::vcge_s64
- prelude::vcge_s8
- prelude::vcge_u16
- prelude::vcge_u32
- prelude::vcge_u64
- prelude::vcge_u8
- prelude::vcged_f64
- prelude::vcged_s64
- prelude::vcged_u64
- prelude::vcgeh_f16
- prelude::vcgeq_f16
- prelude::vcgeq_f32
- prelude::vcgeq_f64
- prelude::vcgeq_s16
- prelude::vcgeq_s32
- prelude::vcgeq_s64
- prelude::vcgeq_s8
- prelude::vcgeq_u16
- prelude::vcgeq_u32
- prelude::vcgeq_u64
- prelude::vcgeq_u8
- prelude::vcges_f32
- prelude::vcgez_f16
- prelude::vcgez_f32
- prelude::vcgez_f64
- prelude::vcgez_s16
- prelude::vcgez_s32
- prelude::vcgez_s64
- prelude::vcgez_s8
- prelude::vcgezd_f64
- prelude::vcgezd_s64
- prelude::vcgezh_f16
- prelude::vcgezq_f16
- prelude::vcgezq_f32
- prelude::vcgezq_f64
- prelude::vcgezq_s16
- prelude::vcgezq_s32
- prelude::vcgezq_s64
- prelude::vcgezq_s8
- prelude::vcgezs_f32
- prelude::vcgt_f16
- prelude::vcgt_f32
- prelude::vcgt_f64
- prelude::vcgt_s16
- prelude::vcgt_s32
- prelude::vcgt_s64
- prelude::vcgt_s8
- prelude::vcgt_u16
- prelude::vcgt_u32
- prelude::vcgt_u64
- prelude::vcgt_u8
- prelude::vcgtd_f64
- prelude::vcgtd_s64
- prelude::vcgtd_u64
- prelude::vcgth_f16
- prelude::vcgtq_f16
- prelude::vcgtq_f32
- prelude::vcgtq_f64
- prelude::vcgtq_s16
- prelude::vcgtq_s32
- prelude::vcgtq_s64
- prelude::vcgtq_s8
- prelude::vcgtq_u16
- prelude::vcgtq_u32
- prelude::vcgtq_u64
- prelude::vcgtq_u8
- prelude::vcgts_f32
- prelude::vcgtz_f16
- prelude::vcgtz_f32
- prelude::vcgtz_f64
- prelude::vcgtz_s16
- prelude::vcgtz_s32
- prelude::vcgtz_s64
- prelude::vcgtz_s8
- prelude::vcgtzd_f64
- prelude::vcgtzd_s64
- prelude::vcgtzh_f16
- prelude::vcgtzq_f16
- prelude::vcgtzq_f32
- prelude::vcgtzq_f64
- prelude::vcgtzq_s16
- prelude::vcgtzq_s32
- prelude::vcgtzq_s64
- prelude::vcgtzq_s8
- prelude::vcgtzs_f32
- prelude::vcle_f16
- prelude::vcle_f32
- prelude::vcle_f64
- prelude::vcle_s16
- prelude::vcle_s32
- prelude::vcle_s64
- prelude::vcle_s8
- prelude::vcle_u16
- prelude::vcle_u32
- prelude::vcle_u64
- prelude::vcle_u8
- prelude::vcled_f64
- prelude::vcled_s64
- prelude::vcled_u64
- prelude::vcleh_f16
- prelude::vcleq_f16
- prelude::vcleq_f32
- prelude::vcleq_f64
- prelude::vcleq_s16
- prelude::vcleq_s32
- prelude::vcleq_s64
- prelude::vcleq_s8
- prelude::vcleq_u16
- prelude::vcleq_u32
- prelude::vcleq_u64
- prelude::vcleq_u8
- prelude::vcles_f32
- prelude::vclez_f16
- prelude::vclez_f32
- prelude::vclez_f64
- prelude::vclez_s16
- prelude::vclez_s32
- prelude::vclez_s64
- prelude::vclez_s8
- prelude::vclezd_f64
- prelude::vclezd_s64
- prelude::vclezh_f16
- prelude::vclezq_f16
- prelude::vclezq_f32
- prelude::vclezq_f64
- prelude::vclezq_s16
- prelude::vclezq_s32
- prelude::vclezq_s64
- prelude::vclezq_s8
- prelude::vclezs_f32
- prelude::vcls_s16
- prelude::vcls_s32
- prelude::vcls_s8
- prelude::vcls_u16
- prelude::vcls_u32
- prelude::vcls_u8
- prelude::vclsq_s16
- prelude::vclsq_s32
- prelude::vclsq_s8
- prelude::vclsq_u16
- prelude::vclsq_u32
- prelude::vclsq_u8
- prelude::vclt_f16
- prelude::vclt_f32
- prelude::vclt_f64
- prelude::vclt_s16
- prelude::vclt_s32
- prelude::vclt_s64
- prelude::vclt_s8
- prelude::vclt_u16
- prelude::vclt_u32
- prelude::vclt_u64
- prelude::vclt_u8
- prelude::vcltd_f64
- prelude::vcltd_s64
- prelude::vcltd_u64
- prelude::vclth_f16
- prelude::vcltq_f16
- prelude::vcltq_f32
- prelude::vcltq_f64
- prelude::vcltq_s16
- prelude::vcltq_s32
- prelude::vcltq_s64
- prelude::vcltq_s8
- prelude::vcltq_u16
- prelude::vcltq_u32
- prelude::vcltq_u64
- prelude::vcltq_u8
- prelude::vclts_f32
- prelude::vcltz_f16
- prelude::vcltz_f32
- prelude::vcltz_f64
- prelude::vcltz_s16
- prelude::vcltz_s32
- prelude::vcltz_s64
- prelude::vcltz_s8
- prelude::vcltzd_f64
- prelude::vcltzd_s64
- prelude::vcltzh_f16
- prelude::vcltzq_f16
- prelude::vcltzq_f32
- prelude::vcltzq_f64
- prelude::vcltzq_s16
- prelude::vcltzq_s32
- prelude::vcltzq_s64
- prelude::vcltzq_s8
- prelude::vcltzs_f32
- prelude::vclz_s16
- prelude::vclz_s32
- prelude::vclz_s8
- prelude::vclz_u16
- prelude::vclz_u32
- prelude::vclz_u8
- prelude::vclzq_s16
- prelude::vclzq_s32
- prelude::vclzq_s8
- prelude::vclzq_u16
- prelude::vclzq_u32
- prelude::vclzq_u8
- prelude::vcmla_f16
- prelude::vcmla_f32
- prelude::vcmla_lane_f16
- prelude::vcmla_lane_f32
- prelude::vcmla_laneq_f16
- prelude::vcmla_laneq_f32
- prelude::vcmla_rot180_f16
- prelude::vcmla_rot180_f32
- prelude::vcmla_rot180_lane_f16
- prelude::vcmla_rot180_lane_f32
- prelude::vcmla_rot180_laneq_f16
- prelude::vcmla_rot180_laneq_f32
- prelude::vcmla_rot270_f16
- prelude::vcmla_rot270_f32
- prelude::vcmla_rot270_lane_f16
- prelude::vcmla_rot270_lane_f32
- prelude::vcmla_rot270_laneq_f16
- prelude::vcmla_rot270_laneq_f32
- prelude::vcmla_rot90_f16
- prelude::vcmla_rot90_f32
- prelude::vcmla_rot90_lane_f16
- prelude::vcmla_rot90_lane_f32
- prelude::vcmla_rot90_laneq_f16
- prelude::vcmla_rot90_laneq_f32
- prelude::vcmlaq_f16
- prelude::vcmlaq_f32
- prelude::vcmlaq_f64
- prelude::vcmlaq_lane_f16
- prelude::vcmlaq_lane_f32
- prelude::vcmlaq_laneq_f16
- prelude::vcmlaq_laneq_f32
- prelude::vcmlaq_rot180_f16
- prelude::vcmlaq_rot180_f32
- prelude::vcmlaq_rot180_f64
- prelude::vcmlaq_rot180_lane_f16
- prelude::vcmlaq_rot180_lane_f32
- prelude::vcmlaq_rot180_laneq_f16
- prelude::vcmlaq_rot180_laneq_f32
- prelude::vcmlaq_rot270_f16
- prelude::vcmlaq_rot270_f32
- prelude::vcmlaq_rot270_f64
- prelude::vcmlaq_rot270_lane_f16
- prelude::vcmlaq_rot270_lane_f32
- prelude::vcmlaq_rot270_laneq_f16
- prelude::vcmlaq_rot270_laneq_f32
- prelude::vcmlaq_rot90_f16
- prelude::vcmlaq_rot90_f32
- prelude::vcmlaq_rot90_f64
- prelude::vcmlaq_rot90_lane_f16
- prelude::vcmlaq_rot90_lane_f32
- prelude::vcmlaq_rot90_laneq_f16
- prelude::vcmlaq_rot90_laneq_f32
- prelude::vcnt_p8
- prelude::vcnt_s8
- prelude::vcnt_u8
- prelude::vcntq_p8
- prelude::vcntq_s8
- prelude::vcntq_u8
- prelude::vcombine_f16
- prelude::vcombine_f32
- prelude::vcombine_f64
- prelude::vcombine_p16
- prelude::vcombine_p64
- prelude::vcombine_p8
- prelude::vcombine_s16
- prelude::vcombine_s32
- prelude::vcombine_s64
- prelude::vcombine_s8
- prelude::vcombine_u16
- prelude::vcombine_u32
- prelude::vcombine_u64
- prelude::vcombine_u8
- prelude::vcopy_lane_f32
- prelude::vcopy_lane_f64
- prelude::vcopy_lane_p16
- prelude::vcopy_lane_p64
- prelude::vcopy_lane_p8
- prelude::vcopy_lane_s16
- prelude::vcopy_lane_s32
- prelude::vcopy_lane_s64
- prelude::vcopy_lane_s8
- prelude::vcopy_lane_u16
- prelude::vcopy_lane_u32
- prelude::vcopy_lane_u64
- prelude::vcopy_lane_u8
- prelude::vcopy_laneq_f32
- prelude::vcopy_laneq_f64
- prelude::vcopy_laneq_p16
- prelude::vcopy_laneq_p64
- prelude::vcopy_laneq_p8
- prelude::vcopy_laneq_s16
- prelude::vcopy_laneq_s32
- prelude::vcopy_laneq_s64
- prelude::vcopy_laneq_s8
- prelude::vcopy_laneq_u16
- prelude::vcopy_laneq_u32
- prelude::vcopy_laneq_u64
- prelude::vcopy_laneq_u8
- prelude::vcopyq_lane_f32
- prelude::vcopyq_lane_f64
- prelude::vcopyq_lane_p16
- prelude::vcopyq_lane_p64
- prelude::vcopyq_lane_p8
- prelude::vcopyq_lane_s16
- prelude::vcopyq_lane_s32
- prelude::vcopyq_lane_s64
- prelude::vcopyq_lane_s8
- prelude::vcopyq_lane_u16
- prelude::vcopyq_lane_u32
- prelude::vcopyq_lane_u64
- prelude::vcopyq_lane_u8
- prelude::vcopyq_laneq_f32
- prelude::vcopyq_laneq_f64
- prelude::vcopyq_laneq_p16
- prelude::vcopyq_laneq_p64
- prelude::vcopyq_laneq_p8
- prelude::vcopyq_laneq_s16
- prelude::vcopyq_laneq_s32
- prelude::vcopyq_laneq_s64
- prelude::vcopyq_laneq_s8
- prelude::vcopyq_laneq_u16
- prelude::vcopyq_laneq_u32
- prelude::vcopyq_laneq_u64
- prelude::vcopyq_laneq_u8
- prelude::vcreate_f16
- prelude::vcreate_f32
- prelude::vcreate_f64
- prelude::vcreate_p16
- prelude::vcreate_p64
- prelude::vcreate_p8
- prelude::vcreate_s16
- prelude::vcreate_s32
- prelude::vcreate_s64
- prelude::vcreate_s8
- prelude::vcreate_u16
- prelude::vcreate_u32
- prelude::vcreate_u64
- prelude::vcreate_u8
- prelude::vcvt_f16_f32
- prelude::vcvt_f16_s16
- prelude::vcvt_f16_u16
- prelude::vcvt_f32_f16
- prelude::vcvt_f32_f64
- prelude::vcvt_f32_s32
- prelude::vcvt_f32_u32
- prelude::vcvt_f64_f32
- prelude::vcvt_f64_s64
- prelude::vcvt_f64_u64
- prelude::vcvt_high_f16_f32
- prelude::vcvt_high_f32_f16
- prelude::vcvt_high_f32_f64
- prelude::vcvt_high_f64_f32
- prelude::vcvt_n_f16_s16
- prelude::vcvt_n_f16_u16
- prelude::vcvt_n_f32_s32
- prelude::vcvt_n_f32_u32
- prelude::vcvt_n_f64_s64
- prelude::vcvt_n_f64_u64
- prelude::vcvt_n_s16_f16
- prelude::vcvt_n_s32_f32
- prelude::vcvt_n_s64_f64
- prelude::vcvt_n_u16_f16
- prelude::vcvt_n_u32_f32
- prelude::vcvt_n_u64_f64
- prelude::vcvt_s16_f16
- prelude::vcvt_s32_f32
- prelude::vcvt_s64_f64
- prelude::vcvt_u16_f16
- prelude::vcvt_u32_f32
- prelude::vcvt_u64_f64
- prelude::vcvta_s16_f16
- prelude::vcvta_s32_f32
- prelude::vcvta_s64_f64
- prelude::vcvta_u16_f16
- prelude::vcvta_u32_f32
- prelude::vcvta_u64_f64
- prelude::vcvtad_s64_f64
- prelude::vcvtad_u64_f64
- prelude::vcvtah_s16_f16
- prelude::vcvtah_s32_f16
- prelude::vcvtah_s64_f16
- prelude::vcvtah_u16_f16
- prelude::vcvtah_u32_f16
- prelude::vcvtah_u64_f16
- prelude::vcvtaq_s16_f16
- prelude::vcvtaq_s32_f32
- prelude::vcvtaq_s64_f64
- prelude::vcvtaq_u16_f16
- prelude::vcvtaq_u32_f32
- prelude::vcvtaq_u64_f64
- prelude::vcvtas_s32_f32
- prelude::vcvtas_u32_f32
- prelude::vcvtd_f64_s64
- prelude::vcvtd_f64_u64
- prelude::vcvtd_n_f64_s64
- prelude::vcvtd_n_f64_u64
- prelude::vcvtd_n_s64_f64
- prelude::vcvtd_n_u64_f64
- prelude::vcvtd_s64_f64
- prelude::vcvtd_u64_f64
- prelude::vcvth_f16_s16
- prelude::vcvth_f16_s32
- prelude::vcvth_f16_s64
- prelude::vcvth_f16_u16
- prelude::vcvth_f16_u32
- prelude::vcvth_f16_u64
- prelude::vcvth_n_f16_s16
- prelude::vcvth_n_f16_s32
- prelude::vcvth_n_f16_s64
- prelude::vcvth_n_f16_u16
- prelude::vcvth_n_f16_u32
- prelude::vcvth_n_f16_u64
- prelude::vcvth_n_s16_f16
- prelude::vcvth_n_s32_f16
- prelude::vcvth_n_s64_f16
- prelude::vcvth_n_u16_f16
- prelude::vcvth_n_u32_f16
- prelude::vcvth_n_u64_f16
- prelude::vcvth_s16_f16
- prelude::vcvth_s32_f16
- prelude::vcvth_s64_f16
- prelude::vcvth_u16_f16
- prelude::vcvth_u32_f16
- prelude::vcvth_u64_f16
- prelude::vcvtm_s16_f16
- prelude::vcvtm_s32_f32
- prelude::vcvtm_s64_f64
- prelude::vcvtm_u16_f16
- prelude::vcvtm_u32_f32
- prelude::vcvtm_u64_f64
- prelude::vcvtmd_s64_f64
- prelude::vcvtmd_u64_f64
- prelude::vcvtmh_s16_f16
- prelude::vcvtmh_s32_f16
- prelude::vcvtmh_s64_f16
- prelude::vcvtmh_u16_f16
- prelude::vcvtmh_u32_f16
- prelude::vcvtmh_u64_f16
- prelude::vcvtmq_s16_f16
- prelude::vcvtmq_s32_f32
- prelude::vcvtmq_s64_f64
- prelude::vcvtmq_u16_f16
- prelude::vcvtmq_u32_f32
- prelude::vcvtmq_u64_f64
- prelude::vcvtms_s32_f32
- prelude::vcvtms_u32_f32
- prelude::vcvtn_s16_f16
- prelude::vcvtn_s32_f32
- prelude::vcvtn_s64_f64
- prelude::vcvtn_u16_f16
- prelude::vcvtn_u32_f32
- prelude::vcvtn_u64_f64
- prelude::vcvtnd_s64_f64
- prelude::vcvtnd_u64_f64
- prelude::vcvtnh_s16_f16
- prelude::vcvtnh_s32_f16
- prelude::vcvtnh_s64_f16
- prelude::vcvtnh_u16_f16
- prelude::vcvtnh_u32_f16
- prelude::vcvtnh_u64_f16
- prelude::vcvtnq_s16_f16
- prelude::vcvtnq_s32_f32
- prelude::vcvtnq_s64_f64
- prelude::vcvtnq_u16_f16
- prelude::vcvtnq_u32_f32
- prelude::vcvtnq_u64_f64
- prelude::vcvtns_s32_f32
- prelude::vcvtns_u32_f32
- prelude::vcvtp_s16_f16
- prelude::vcvtp_s32_f32
- prelude::vcvtp_s64_f64
- prelude::vcvtp_u16_f16
- prelude::vcvtp_u32_f32
- prelude::vcvtp_u64_f64
- prelude::vcvtpd_s64_f64
- prelude::vcvtpd_u64_f64
- prelude::vcvtph_s16_f16
- prelude::vcvtph_s32_f16
- prelude::vcvtph_s64_f16
- prelude::vcvtph_u16_f16
- prelude::vcvtph_u32_f16
- prelude::vcvtph_u64_f16
- prelude::vcvtpq_s16_f16
- prelude::vcvtpq_s32_f32
- prelude::vcvtpq_s64_f64
- prelude::vcvtpq_u16_f16
- prelude::vcvtpq_u32_f32
- prelude::vcvtpq_u64_f64
- prelude::vcvtps_s32_f32
- prelude::vcvtps_u32_f32
- prelude::vcvtq_f16_s16
- prelude::vcvtq_f16_u16
- prelude::vcvtq_f32_s32
- prelude::vcvtq_f32_u32
- prelude::vcvtq_f64_s64
- prelude::vcvtq_f64_u64
- prelude::vcvtq_n_f16_s16
- prelude::vcvtq_n_f16_u16
- prelude::vcvtq_n_f32_s32
- prelude::vcvtq_n_f32_u32
- prelude::vcvtq_n_f64_s64
- prelude::vcvtq_n_f64_u64
- prelude::vcvtq_n_s16_f16
- prelude::vcvtq_n_s32_f32
- prelude::vcvtq_n_s64_f64
- prelude::vcvtq_n_u16_f16
- prelude::vcvtq_n_u32_f32
- prelude::vcvtq_n_u64_f64
- prelude::vcvtq_s16_f16
- prelude::vcvtq_s32_f32
- prelude::vcvtq_s64_f64
- prelude::vcvtq_u16_f16
- prelude::vcvtq_u32_f32
- prelude::vcvtq_u64_f64
- prelude::vcvts_f32_s32
- prelude::vcvts_f32_u32
- prelude::vcvts_n_f32_s32
- prelude::vcvts_n_f32_u32
- prelude::vcvts_n_s32_f32
- prelude::vcvts_n_u32_f32
- prelude::vcvts_s32_f32
- prelude::vcvts_u32_f32
- prelude::vcvtx_f32_f64
- prelude::vcvtx_high_f32_f64
- prelude::vcvtxd_f32_f64
- prelude::vdiv_f16
- prelude::vdiv_f32
- prelude::vdiv_f64
- prelude::vdivh_f16
- prelude::vdivq_f16
- prelude::vdivq_f32
- prelude::vdivq_f64
- prelude::vdot_lane_s32
- prelude::vdot_lane_u32
- prelude::vdot_laneq_s32
- prelude::vdot_laneq_u32
- prelude::vdot_s32
- prelude::vdot_u32
- prelude::vdotq_lane_s32
- prelude::vdotq_lane_u32
- prelude::vdotq_laneq_s32
- prelude::vdotq_laneq_u32
- prelude::vdotq_s32
- prelude::vdotq_u32
- prelude::vdup_lane_f16
- prelude::vdup_lane_f32
- prelude::vdup_lane_f64
- prelude::vdup_lane_p16
- prelude::vdup_lane_p64
- prelude::vdup_lane_p8
- prelude::vdup_lane_s16
- prelude::vdup_lane_s32
- prelude::vdup_lane_s64
- prelude::vdup_lane_s8
- prelude::vdup_lane_u16
- prelude::vdup_lane_u32
- prelude::vdup_lane_u64
- prelude::vdup_lane_u8
- prelude::vdup_laneq_f16
- prelude::vdup_laneq_f32
- prelude::vdup_laneq_f64
- prelude::vdup_laneq_p16
- prelude::vdup_laneq_p64
- prelude::vdup_laneq_p8
- prelude::vdup_laneq_s16
- prelude::vdup_laneq_s32
- prelude::vdup_laneq_s64
- prelude::vdup_laneq_s8
- prelude::vdup_laneq_u16
- prelude::vdup_laneq_u32
- prelude::vdup_laneq_u64
- prelude::vdup_laneq_u8
- prelude::vdup_n_f16
- prelude::vdup_n_f32
- prelude::vdup_n_f64
- prelude::vdup_n_p16
- prelude::vdup_n_p64
- prelude::vdup_n_p8
- prelude::vdup_n_s16
- prelude::vdup_n_s32
- prelude::vdup_n_s64
- prelude::vdup_n_s8
- prelude::vdup_n_u16
- prelude::vdup_n_u32
- prelude::vdup_n_u64
- prelude::vdup_n_u8
- prelude::vdupb_lane_p8
- prelude::vdupb_lane_s8
- prelude::vdupb_lane_u8
- prelude::vdupb_laneq_p8
- prelude::vdupb_laneq_s8
- prelude::vdupb_laneq_u8
- prelude::vdupd_lane_f64
- prelude::vdupd_lane_s64
- prelude::vdupd_lane_u64
- prelude::vdupd_laneq_f64
- prelude::vdupd_laneq_s64
- prelude::vdupd_laneq_u64
- prelude::vduph_lane_f16
- prelude::vduph_lane_p16
- prelude::vduph_lane_s16
- prelude::vduph_lane_u16
- prelude::vduph_laneq_f16
- prelude::vduph_laneq_p16
- prelude::vduph_laneq_s16
- prelude::vduph_laneq_u16
- prelude::vdupq_lane_f16
- prelude::vdupq_lane_f32
- prelude::vdupq_lane_f64
- prelude::vdupq_lane_p16
- prelude::vdupq_lane_p64
- prelude::vdupq_lane_p8
- prelude::vdupq_lane_s16
- prelude::vdupq_lane_s32
- prelude::vdupq_lane_s64
- prelude::vdupq_lane_s8
- prelude::vdupq_lane_u16
- prelude::vdupq_lane_u32
- prelude::vdupq_lane_u64
- prelude::vdupq_lane_u8
- prelude::vdupq_laneq_f16
- prelude::vdupq_laneq_f32
- prelude::vdupq_laneq_f64
- prelude::vdupq_laneq_p16
- prelude::vdupq_laneq_p64
- prelude::vdupq_laneq_p8
- prelude::vdupq_laneq_s16
- prelude::vdupq_laneq_s32
- prelude::vdupq_laneq_s64
- prelude::vdupq_laneq_s8
- prelude::vdupq_laneq_u16
- prelude::vdupq_laneq_u32
- prelude::vdupq_laneq_u64
- prelude::vdupq_laneq_u8
- prelude::vdupq_n_f16
- prelude::vdupq_n_f32
- prelude::vdupq_n_f64
- prelude::vdupq_n_p16
- prelude::vdupq_n_p64
- prelude::vdupq_n_p8
- prelude::vdupq_n_s16
- prelude::vdupq_n_s32
- prelude::vdupq_n_s64
- prelude::vdupq_n_s8
- prelude::vdupq_n_u16
- prelude::vdupq_n_u32
- prelude::vdupq_n_u64
- prelude::vdupq_n_u8
- prelude::vdups_lane_f32
- prelude::vdups_lane_s32
- prelude::vdups_lane_u32
- prelude::vdups_laneq_f32
- prelude::vdups_laneq_s32
- prelude::vdups_laneq_u32
- prelude::veor3q_s16
- prelude::veor3q_s32
- prelude::veor3q_s64
- prelude::veor3q_s8
- prelude::veor3q_u16
- prelude::veor3q_u32
- prelude::veor3q_u64
- prelude::veor3q_u8
- prelude::veor_s16
- prelude::veor_s32
- prelude::veor_s64
- prelude::veor_s8
- prelude::veor_u16
- prelude::veor_u32
- prelude::veor_u64
- prelude::veor_u8
- prelude::veorq_s16
- prelude::veorq_s32
- prelude::veorq_s64
- prelude::veorq_s8
- prelude::veorq_u16
- prelude::veorq_u32
- prelude::veorq_u64
- prelude::veorq_u8
- prelude::vext_f16
- prelude::vext_f32
- prelude::vext_f64
- prelude::vext_p16
- prelude::vext_p64
- prelude::vext_p8
- prelude::vext_s16
- prelude::vext_s32
- prelude::vext_s64
- prelude::vext_s8
- prelude::vext_u16
- prelude::vext_u32
- prelude::vext_u64
- prelude::vext_u8
- prelude::vextq_f16
- prelude::vextq_f32
- prelude::vextq_f64
- prelude::vextq_p16
- prelude::vextq_p64
- prelude::vextq_p8
- prelude::vextq_s16
- prelude::vextq_s32
- prelude::vextq_s64
- prelude::vextq_s8
- prelude::vextq_u16
- prelude::vextq_u32
- prelude::vextq_u64
- prelude::vextq_u8
- prelude::vfma_f16
- prelude::vfma_f32
- prelude::vfma_f64
- prelude::vfma_lane_f16
- prelude::vfma_lane_f32
- prelude::vfma_lane_f64
- prelude::vfma_laneq_f16
- prelude::vfma_laneq_f32
- prelude::vfma_laneq_f64
- prelude::vfma_n_f16
- prelude::vfma_n_f32
- prelude::vfma_n_f64
- prelude::vfmad_lane_f64
- prelude::vfmad_laneq_f64
- prelude::vfmah_f16
- prelude::vfmah_lane_f16
- prelude::vfmah_laneq_f16
- prelude::vfmaq_f16
- prelude::vfmaq_f32
- prelude::vfmaq_f64
- prelude::vfmaq_lane_f16
- prelude::vfmaq_lane_f32
- prelude::vfmaq_lane_f64
- prelude::vfmaq_laneq_f16
- prelude::vfmaq_laneq_f32
- prelude::vfmaq_laneq_f64
- prelude::vfmaq_n_f16
- prelude::vfmaq_n_f32
- prelude::vfmaq_n_f64
- prelude::vfmas_lane_f32
- prelude::vfmas_laneq_f32
- prelude::vfmlal_high_f16
- prelude::vfmlal_lane_high_f16
- prelude::vfmlal_lane_low_f16
- prelude::vfmlal_laneq_high_f16
- prelude::vfmlal_laneq_low_f16
- prelude::vfmlal_low_f16
- prelude::vfmlalq_high_f16
- prelude::vfmlalq_lane_high_f16
- prelude::vfmlalq_lane_low_f16
- prelude::vfmlalq_laneq_high_f16
- prelude::vfmlalq_laneq_low_f16
- prelude::vfmlalq_low_f16
- prelude::vfmlsl_high_f16
- prelude::vfmlsl_lane_high_f16
- prelude::vfmlsl_lane_low_f16
- prelude::vfmlsl_laneq_high_f16
- prelude::vfmlsl_laneq_low_f16
- prelude::vfmlsl_low_f16
- prelude::vfmlslq_high_f16
- prelude::vfmlslq_lane_high_f16
- prelude::vfmlslq_lane_low_f16
- prelude::vfmlslq_laneq_high_f16
- prelude::vfmlslq_laneq_low_f16
- prelude::vfmlslq_low_f16
- prelude::vfms_f16
- prelude::vfms_f32
- prelude::vfms_f64
- prelude::vfms_lane_f16
- prelude::vfms_lane_f32
- prelude::vfms_lane_f64
- prelude::vfms_laneq_f16
- prelude::vfms_laneq_f32
- prelude::vfms_laneq_f64
- prelude::vfms_n_f16
- prelude::vfms_n_f32
- prelude::vfms_n_f64
- prelude::vfmsd_lane_f64
- prelude::vfmsd_laneq_f64
- prelude::vfmsh_f16
- prelude::vfmsh_lane_f16
- prelude::vfmsh_laneq_f16
- prelude::vfmsq_f16
- prelude::vfmsq_f32
- prelude::vfmsq_f64
- prelude::vfmsq_lane_f16
- prelude::vfmsq_lane_f32
- prelude::vfmsq_lane_f64
- prelude::vfmsq_laneq_f16
- prelude::vfmsq_laneq_f32
- prelude::vfmsq_laneq_f64
- prelude::vfmsq_n_f16
- prelude::vfmsq_n_f32
- prelude::vfmsq_n_f64
- prelude::vfmss_lane_f32
- prelude::vfmss_laneq_f32
- prelude::vget_high_f16
- prelude::vget_high_f32
- prelude::vget_high_f64
- prelude::vget_high_p16
- prelude::vget_high_p64
- prelude::vget_high_p8
- prelude::vget_high_s16
- prelude::vget_high_s32
- prelude::vget_high_s64
- prelude::vget_high_s8
- prelude::vget_high_u16
- prelude::vget_high_u32
- prelude::vget_high_u64
- prelude::vget_high_u8
- prelude::vget_lane_f16
- prelude::vget_lane_f32
- prelude::vget_lane_f64
- prelude::vget_lane_p16
- prelude::vget_lane_p64
- prelude::vget_lane_p8
- prelude::vget_lane_s16
- prelude::vget_lane_s32
- prelude::vget_lane_s64
- prelude::vget_lane_s8
- prelude::vget_lane_u16
- prelude::vget_lane_u32
- prelude::vget_lane_u64
- prelude::vget_lane_u8
- prelude::vget_low_f16
- prelude::vget_low_f32
- prelude::vget_low_f64
- prelude::vget_low_p16
- prelude::vget_low_p64
- prelude::vget_low_p8
- prelude::vget_low_s16
- prelude::vget_low_s32
- prelude::vget_low_s64
- prelude::vget_low_s8
- prelude::vget_low_u16
- prelude::vget_low_u32
- prelude::vget_low_u64
- prelude::vget_low_u8
- prelude::vgetq_lane_f16
- prelude::vgetq_lane_f32
- prelude::vgetq_lane_f64
- prelude::vgetq_lane_p16
- prelude::vgetq_lane_p64
- prelude::vgetq_lane_p8
- prelude::vgetq_lane_s16
- prelude::vgetq_lane_s32
- prelude::vgetq_lane_s64
- prelude::vgetq_lane_s8
- prelude::vgetq_lane_u16
- prelude::vgetq_lane_u32
- prelude::vgetq_lane_u64
- prelude::vgetq_lane_u8
- prelude::vhadd_s16
- prelude::vhadd_s32
- prelude::vhadd_s8
- prelude::vhadd_u16
- prelude::vhadd_u32
- prelude::vhadd_u8
- prelude::vhaddq_s16
- prelude::vhaddq_s32
- prelude::vhaddq_s8
- prelude::vhaddq_u16
- prelude::vhaddq_u32
- prelude::vhaddq_u8
- prelude::vhsub_s16
- prelude::vhsub_s32
- prelude::vhsub_s8
- prelude::vhsub_u16
- prelude::vhsub_u32
- prelude::vhsub_u8
- prelude::vhsubq_s16
- prelude::vhsubq_s32
- prelude::vhsubq_s8
- prelude::vhsubq_u16
- prelude::vhsubq_u32
- prelude::vhsubq_u8
- prelude::vld1_dup_f16
- prelude::vld1_dup_f32
- prelude::vld1_dup_f64
- prelude::vld1_dup_p16
- prelude::vld1_dup_p64
- prelude::vld1_dup_p8
- prelude::vld1_dup_s16
- prelude::vld1_dup_s32
- prelude::vld1_dup_s64
- prelude::vld1_dup_s8
- prelude::vld1_dup_u16
- prelude::vld1_dup_u32
- prelude::vld1_dup_u64
- prelude::vld1_dup_u8
- prelude::vld1_f16
- prelude::vld1_f16_x2
- prelude::vld1_f16_x3
- prelude::vld1_f16_x4
- prelude::vld1_f32
- prelude::vld1_f32_x2
- prelude::vld1_f32_x3
- prelude::vld1_f32_x4
- prelude::vld1_f64
- prelude::vld1_f64_x2
- prelude::vld1_f64_x3
- prelude::vld1_f64_x4
- prelude::vld1_lane_f16
- prelude::vld1_lane_f32
- prelude::vld1_lane_f64
- prelude::vld1_lane_p16
- prelude::vld1_lane_p64
- prelude::vld1_lane_p8
- prelude::vld1_lane_s16
- prelude::vld1_lane_s32
- prelude::vld1_lane_s64
- prelude::vld1_lane_s8
- prelude::vld1_lane_u16
- prelude::vld1_lane_u32
- prelude::vld1_lane_u64
- prelude::vld1_lane_u8
- prelude::vld1_p16
- prelude::vld1_p16_x2
- prelude::vld1_p16_x3
- prelude::vld1_p16_x4
- prelude::vld1_p64
- prelude::vld1_p64_x2
- prelude::vld1_p64_x3
- prelude::vld1_p64_x4
- prelude::vld1_p8
- prelude::vld1_p8_x2
- prelude::vld1_p8_x3
- prelude::vld1_p8_x4
- prelude::vld1_s16
- prelude::vld1_s16_x2
- prelude::vld1_s16_x3
- prelude::vld1_s16_x4
- prelude::vld1_s32
- prelude::vld1_s32_x2
- prelude::vld1_s32_x3
- prelude::vld1_s32_x4
- prelude::vld1_s64
- prelude::vld1_s64_x2
- prelude::vld1_s64_x3
- prelude::vld1_s64_x4
- prelude::vld1_s8
- prelude::vld1_s8_x2
- prelude::vld1_s8_x3
- prelude::vld1_s8_x4
- prelude::vld1_u16
- prelude::vld1_u16_x2
- prelude::vld1_u16_x3
- prelude::vld1_u16_x4
- prelude::vld1_u32
- prelude::vld1_u32_x2
- prelude::vld1_u32_x3
- prelude::vld1_u32_x4
- prelude::vld1_u64
- prelude::vld1_u64_x2
- prelude::vld1_u64_x3
- prelude::vld1_u64_x4
- prelude::vld1_u8
- prelude::vld1_u8_x2
- prelude::vld1_u8_x3
- prelude::vld1_u8_x4
- prelude::vld1q_dup_f16
- prelude::vld1q_dup_f32
- prelude::vld1q_dup_f64
- prelude::vld1q_dup_p16
- prelude::vld1q_dup_p64
- prelude::vld1q_dup_p8
- prelude::vld1q_dup_s16
- prelude::vld1q_dup_s32
- prelude::vld1q_dup_s64
- prelude::vld1q_dup_s8
- prelude::vld1q_dup_u16
- prelude::vld1q_dup_u32
- prelude::vld1q_dup_u64
- prelude::vld1q_dup_u8
- prelude::vld1q_f16
- prelude::vld1q_f16_x2
- prelude::vld1q_f16_x3
- prelude::vld1q_f16_x4
- prelude::vld1q_f32
- prelude::vld1q_f32_x2
- prelude::vld1q_f32_x3
- prelude::vld1q_f32_x4
- prelude::vld1q_f64
- prelude::vld1q_f64_x2
- prelude::vld1q_f64_x3
- prelude::vld1q_f64_x4
- prelude::vld1q_lane_f16
- prelude::vld1q_lane_f32
- prelude::vld1q_lane_f64
- prelude::vld1q_lane_p16
- prelude::vld1q_lane_p64
- prelude::vld1q_lane_p8
- prelude::vld1q_lane_s16
- prelude::vld1q_lane_s32
- prelude::vld1q_lane_s64
- prelude::vld1q_lane_s8
- prelude::vld1q_lane_u16
- prelude::vld1q_lane_u32
- prelude::vld1q_lane_u64
- prelude::vld1q_lane_u8
- prelude::vld1q_p16
- prelude::vld1q_p16_x2
- prelude::vld1q_p16_x3
- prelude::vld1q_p16_x4
- prelude::vld1q_p64
- prelude::vld1q_p64_x2
- prelude::vld1q_p64_x3
- prelude::vld1q_p64_x4
- prelude::vld1q_p8
- prelude::vld1q_p8_x2
- prelude::vld1q_p8_x3
- prelude::vld1q_p8_x4
- prelude::vld1q_s16
- prelude::vld1q_s16_x2
- prelude::vld1q_s16_x3
- prelude::vld1q_s16_x4
- prelude::vld1q_s32
- prelude::vld1q_s32_x2
- prelude::vld1q_s32_x3
- prelude::vld1q_s32_x4
- prelude::vld1q_s64
- prelude::vld1q_s64_x2
- prelude::vld1q_s64_x3
- prelude::vld1q_s64_x4
- prelude::vld1q_s8
- prelude::vld1q_s8_x2
- prelude::vld1q_s8_x3
- prelude::vld1q_s8_x4
- prelude::vld1q_u16
- prelude::vld1q_u16_x2
- prelude::vld1q_u16_x3
- prelude::vld1q_u16_x4
- prelude::vld1q_u32
- prelude::vld1q_u32_x2
- prelude::vld1q_u32_x3
- prelude::vld1q_u32_x4
- prelude::vld1q_u64
- prelude::vld1q_u64_x2
- prelude::vld1q_u64_x3
- prelude::vld1q_u64_x4
- prelude::vld1q_u8
- prelude::vld1q_u8_x2
- prelude::vld1q_u8_x3
- prelude::vld1q_u8_x4
- prelude::vld2_dup_f16
- prelude::vld2_dup_f32
- prelude::vld2_dup_f64
- prelude::vld2_dup_p16
- prelude::vld2_dup_p64
- prelude::vld2_dup_p8
- prelude::vld2_dup_s16
- prelude::vld2_dup_s32
- prelude::vld2_dup_s64
- prelude::vld2_dup_s8
- prelude::vld2_dup_u16
- prelude::vld2_dup_u32
- prelude::vld2_dup_u64
- prelude::vld2_dup_u8
- prelude::vld2_f16
- prelude::vld2_f32
- prelude::vld2_f64
- prelude::vld2_lane_f16
- prelude::vld2_lane_f32
- prelude::vld2_lane_f64
- prelude::vld2_lane_p16
- prelude::vld2_lane_p64
- prelude::vld2_lane_p8
- prelude::vld2_lane_s16
- prelude::vld2_lane_s32
- prelude::vld2_lane_s64
- prelude::vld2_lane_s8
- prelude::vld2_lane_u16
- prelude::vld2_lane_u32
- prelude::vld2_lane_u64
- prelude::vld2_lane_u8
- prelude::vld2_p16
- prelude::vld2_p64
- prelude::vld2_p8
- prelude::vld2_s16
- prelude::vld2_s32
- prelude::vld2_s64
- prelude::vld2_s8
- prelude::vld2_u16
- prelude::vld2_u32
- prelude::vld2_u64
- prelude::vld2_u8
- prelude::vld2q_dup_f16
- prelude::vld2q_dup_f32
- prelude::vld2q_dup_f64
- prelude::vld2q_dup_p16
- prelude::vld2q_dup_p64
- prelude::vld2q_dup_p8
- prelude::vld2q_dup_s16
- prelude::vld2q_dup_s32
- prelude::vld2q_dup_s64
- prelude::vld2q_dup_s8
- prelude::vld2q_dup_u16
- prelude::vld2q_dup_u32
- prelude::vld2q_dup_u64
- prelude::vld2q_dup_u8
- prelude::vld2q_f16
- prelude::vld2q_f32
- prelude::vld2q_f64
- prelude::vld2q_lane_f16
- prelude::vld2q_lane_f32
- prelude::vld2q_lane_f64
- prelude::vld2q_lane_p16
- prelude::vld2q_lane_p64
- prelude::vld2q_lane_p8
- prelude::vld2q_lane_s16
- prelude::vld2q_lane_s32
- prelude::vld2q_lane_s64
- prelude::vld2q_lane_s8
- prelude::vld2q_lane_u16
- prelude::vld2q_lane_u32
- prelude::vld2q_lane_u64
- prelude::vld2q_lane_u8
- prelude::vld2q_p16
- prelude::vld2q_p64
- prelude::vld2q_p8
- prelude::vld2q_s16
- prelude::vld2q_s32
- prelude::vld2q_s64
- prelude::vld2q_s8
- prelude::vld2q_u16
- prelude::vld2q_u32
- prelude::vld2q_u64
- prelude::vld2q_u8
- prelude::vld3_dup_f16
- prelude::vld3_dup_f32
- prelude::vld3_dup_f64
- prelude::vld3_dup_p16
- prelude::vld3_dup_p64
- prelude::vld3_dup_p8
- prelude::vld3_dup_s16
- prelude::vld3_dup_s32
- prelude::vld3_dup_s64
- prelude::vld3_dup_s8
- prelude::vld3_dup_u16
- prelude::vld3_dup_u32
- prelude::vld3_dup_u64
- prelude::vld3_dup_u8
- prelude::vld3_f16
- prelude::vld3_f32
- prelude::vld3_f64
- prelude::vld3_lane_f16
- prelude::vld3_lane_f32
- prelude::vld3_lane_f64
- prelude::vld3_lane_p16
- prelude::vld3_lane_p64
- prelude::vld3_lane_p8
- prelude::vld3_lane_s16
- prelude::vld3_lane_s32
- prelude::vld3_lane_s64
- prelude::vld3_lane_s8
- prelude::vld3_lane_u16
- prelude::vld3_lane_u32
- prelude::vld3_lane_u64
- prelude::vld3_lane_u8
- prelude::vld3_p16
- prelude::vld3_p64
- prelude::vld3_p8
- prelude::vld3_s16
- prelude::vld3_s32
- prelude::vld3_s64
- prelude::vld3_s8
- prelude::vld3_u16
- prelude::vld3_u32
- prelude::vld3_u64
- prelude::vld3_u8
- prelude::vld3q_dup_f16
- prelude::vld3q_dup_f32
- prelude::vld3q_dup_f64
- prelude::vld3q_dup_p16
- prelude::vld3q_dup_p64
- prelude::vld3q_dup_p8
- prelude::vld3q_dup_s16
- prelude::vld3q_dup_s32
- prelude::vld3q_dup_s64
- prelude::vld3q_dup_s8
- prelude::vld3q_dup_u16
- prelude::vld3q_dup_u32
- prelude::vld3q_dup_u64
- prelude::vld3q_dup_u8
- prelude::vld3q_f16
- prelude::vld3q_f32
- prelude::vld3q_f64
- prelude::vld3q_lane_f16
- prelude::vld3q_lane_f32
- prelude::vld3q_lane_f64
- prelude::vld3q_lane_p16
- prelude::vld3q_lane_p64
- prelude::vld3q_lane_p8
- prelude::vld3q_lane_s16
- prelude::vld3q_lane_s32
- prelude::vld3q_lane_s64
- prelude::vld3q_lane_s8
- prelude::vld3q_lane_u16
- prelude::vld3q_lane_u32
- prelude::vld3q_lane_u64
- prelude::vld3q_lane_u8
- prelude::vld3q_p16
- prelude::vld3q_p64
- prelude::vld3q_p8
- prelude::vld3q_s16
- prelude::vld3q_s32
- prelude::vld3q_s64
- prelude::vld3q_s8
- prelude::vld3q_u16
- prelude::vld3q_u32
- prelude::vld3q_u64
- prelude::vld3q_u8
- prelude::vld4_dup_f16
- prelude::vld4_dup_f32
- prelude::vld4_dup_f64
- prelude::vld4_dup_p16
- prelude::vld4_dup_p64
- prelude::vld4_dup_p8
- prelude::vld4_dup_s16
- prelude::vld4_dup_s32
- prelude::vld4_dup_s64
- prelude::vld4_dup_s8
- prelude::vld4_dup_u16
- prelude::vld4_dup_u32
- prelude::vld4_dup_u64
- prelude::vld4_dup_u8
- prelude::vld4_f16
- prelude::vld4_f32
- prelude::vld4_f64
- prelude::vld4_lane_f16
- prelude::vld4_lane_f32
- prelude::vld4_lane_f64
- prelude::vld4_lane_p16
- prelude::vld4_lane_p64
- prelude::vld4_lane_p8
- prelude::vld4_lane_s16
- prelude::vld4_lane_s32
- prelude::vld4_lane_s64
- prelude::vld4_lane_s8
- prelude::vld4_lane_u16
- prelude::vld4_lane_u32
- prelude::vld4_lane_u64
- prelude::vld4_lane_u8
- prelude::vld4_p16
- prelude::vld4_p64
- prelude::vld4_p8
- prelude::vld4_s16
- prelude::vld4_s32
- prelude::vld4_s64
- prelude::vld4_s8
- prelude::vld4_u16
- prelude::vld4_u32
- prelude::vld4_u64
- prelude::vld4_u8
- prelude::vld4q_dup_f16
- prelude::vld4q_dup_f32
- prelude::vld4q_dup_f64
- prelude::vld4q_dup_p16
- prelude::vld4q_dup_p64
- prelude::vld4q_dup_p8
- prelude::vld4q_dup_s16
- prelude::vld4q_dup_s32
- prelude::vld4q_dup_s64
- prelude::vld4q_dup_s8
- prelude::vld4q_dup_u16
- prelude::vld4q_dup_u32
- prelude::vld4q_dup_u64
- prelude::vld4q_dup_u8
- prelude::vld4q_f16
- prelude::vld4q_f32
- prelude::vld4q_f64
- prelude::vld4q_lane_f16
- prelude::vld4q_lane_f32
- prelude::vld4q_lane_f64
- prelude::vld4q_lane_p16
- prelude::vld4q_lane_p64
- prelude::vld4q_lane_p8
- prelude::vld4q_lane_s16
- prelude::vld4q_lane_s32
- prelude::vld4q_lane_s64
- prelude::vld4q_lane_s8
- prelude::vld4q_lane_u16
- prelude::vld4q_lane_u32
- prelude::vld4q_lane_u64
- prelude::vld4q_lane_u8
- prelude::vld4q_p16
- prelude::vld4q_p64
- prelude::vld4q_p8
- prelude::vld4q_s16
- prelude::vld4q_s32
- prelude::vld4q_s64
- prelude::vld4q_s8
- prelude::vld4q_u16
- prelude::vld4q_u32
- prelude::vld4q_u64
- prelude::vld4q_u8
- prelude::vldap1_lane_p64
- prelude::vldap1_lane_s64
- prelude::vldap1_lane_u64
- prelude::vldap1q_lane_f64
- prelude::vldap1q_lane_p64
- prelude::vldap1q_lane_s64
- prelude::vldap1q_lane_u64
- prelude::vldrq_p128
- prelude::vluti2_lane_f16
- prelude::vluti2_lane_p16
- prelude::vluti2_lane_p8
- prelude::vluti2_lane_s16
- prelude::vluti2_lane_s8
- prelude::vluti2_lane_u16
- prelude::vluti2_lane_u8
- prelude::vluti2_laneq_f16
- prelude::vluti2_laneq_p16
- prelude::vluti2_laneq_p8
- prelude::vluti2_laneq_s16
- prelude::vluti2_laneq_s8
- prelude::vluti2_laneq_u16
- prelude::vluti2_laneq_u8
- prelude::vluti2q_lane_f16
- prelude::vluti2q_lane_p16
- prelude::vluti2q_lane_p8
- prelude::vluti2q_lane_s16
- prelude::vluti2q_lane_s8
- prelude::vluti2q_lane_u16
- prelude::vluti2q_lane_u8
- prelude::vluti2q_laneq_f16
- prelude::vluti2q_laneq_p16
- prelude::vluti2q_laneq_p8
- prelude::vluti2q_laneq_s16
- prelude::vluti2q_laneq_s8
- prelude::vluti2q_laneq_u16
- prelude::vluti2q_laneq_u8
- prelude::vluti4q_lane_f16_x2
- prelude::vluti4q_lane_p16_x2
- prelude::vluti4q_lane_p8
- prelude::vluti4q_lane_s16_x2
- prelude::vluti4q_lane_s8
- prelude::vluti4q_lane_u16_x2
- prelude::vluti4q_lane_u8
- prelude::vluti4q_laneq_f16_x2
- prelude::vluti4q_laneq_p16_x2
- prelude::vluti4q_laneq_p8
- prelude::vluti4q_laneq_s16_x2
- prelude::vluti4q_laneq_s8
- prelude::vluti4q_laneq_u16_x2
- prelude::vluti4q_laneq_u8
- prelude::vmax_f16
- prelude::vmax_f32
- prelude::vmax_f64
- prelude::vmax_s16
- prelude::vmax_s32
- prelude::vmax_s8
- prelude::vmax_u16
- prelude::vmax_u32
- prelude::vmax_u8
- prelude::vmaxh_f16
- prelude::vmaxnm_f16
- prelude::vmaxnm_f32
- prelude::vmaxnm_f64
- prelude::vmaxnmh_f16
- prelude::vmaxnmq_f16
- prelude::vmaxnmq_f32
- prelude::vmaxnmq_f64
- prelude::vmaxnmv_f16
- prelude::vmaxnmv_f32
- prelude::vmaxnmvq_f16
- prelude::vmaxnmvq_f32
- prelude::vmaxnmvq_f64
- prelude::vmaxq_f16
- prelude::vmaxq_f32
- prelude::vmaxq_f64
- prelude::vmaxq_s16
- prelude::vmaxq_s32
- prelude::vmaxq_s8
- prelude::vmaxq_u16
- prelude::vmaxq_u32
- prelude::vmaxq_u8
- prelude::vmaxv_f16
- prelude::vmaxv_f32
- prelude::vmaxv_s16
- prelude::vmaxv_s32
- prelude::vmaxv_s8
- prelude::vmaxv_u16
- prelude::vmaxv_u32
- prelude::vmaxv_u8
- prelude::vmaxvq_f16
- prelude::vmaxvq_f32
- prelude::vmaxvq_f64
- prelude::vmaxvq_s16
- prelude::vmaxvq_s32
- prelude::vmaxvq_s8
- prelude::vmaxvq_u16
- prelude::vmaxvq_u32
- prelude::vmaxvq_u8
- prelude::vmin_f16
- prelude::vmin_f32
- prelude::vmin_f64
- prelude::vmin_s16
- prelude::vmin_s32
- prelude::vmin_s8
- prelude::vmin_u16
- prelude::vmin_u32
- prelude::vmin_u8
- prelude::vminh_f16
- prelude::vminnm_f16
- prelude::vminnm_f32
- prelude::vminnm_f64
- prelude::vminnmh_f16
- prelude::vminnmq_f16
- prelude::vminnmq_f32
- prelude::vminnmq_f64
- prelude::vminnmv_f16
- prelude::vminnmv_f32
- prelude::vminnmvq_f16
- prelude::vminnmvq_f32
- prelude::vminnmvq_f64
- prelude::vminq_f16
- prelude::vminq_f32
- prelude::vminq_f64
- prelude::vminq_s16
- prelude::vminq_s32
- prelude::vminq_s8
- prelude::vminq_u16
- prelude::vminq_u32
- prelude::vminq_u8
- prelude::vminv_f16
- prelude::vminv_f32
- prelude::vminv_s16
- prelude::vminv_s32
- prelude::vminv_s8
- prelude::vminv_u16
- prelude::vminv_u32
- prelude::vminv_u8
- prelude::vminvq_f16
- prelude::vminvq_f32
- prelude::vminvq_f64
- prelude::vminvq_s16
- prelude::vminvq_s32
- prelude::vminvq_s8
- prelude::vminvq_u16
- prelude::vminvq_u32
- prelude::vminvq_u8
- prelude::vmla_f32
- prelude::vmla_f64
- prelude::vmla_lane_f32
- prelude::vmla_lane_s16
- prelude::vmla_lane_s32
- prelude::vmla_lane_u16
- prelude::vmla_lane_u32
- prelude::vmla_laneq_f32
- prelude::vmla_laneq_s16
- prelude::vmla_laneq_s32
- prelude::vmla_laneq_u16
- prelude::vmla_laneq_u32
- prelude::vmla_n_f32
- prelude::vmla_n_s16
- prelude::vmla_n_s32
- prelude::vmla_n_u16
- prelude::vmla_n_u32
- prelude::vmla_s16
- prelude::vmla_s32
- prelude::vmla_s8
- prelude::vmla_u16
- prelude::vmla_u32
- prelude::vmla_u8
- prelude::vmlal_high_lane_s16
- prelude::vmlal_high_lane_s32
- prelude::vmlal_high_lane_u16
- prelude::vmlal_high_lane_u32
- prelude::vmlal_high_laneq_s16
- prelude::vmlal_high_laneq_s32
- prelude::vmlal_high_laneq_u16
- prelude::vmlal_high_laneq_u32
- prelude::vmlal_high_n_s16
- prelude::vmlal_high_n_s32
- prelude::vmlal_high_n_u16
- prelude::vmlal_high_n_u32
- prelude::vmlal_high_s16
- prelude::vmlal_high_s32
- prelude::vmlal_high_s8
- prelude::vmlal_high_u16
- prelude::vmlal_high_u32
- prelude::vmlal_high_u8
- prelude::vmlal_lane_s16
- prelude::vmlal_lane_s32
- prelude::vmlal_lane_u16
- prelude::vmlal_lane_u32
- prelude::vmlal_laneq_s16
- prelude::vmlal_laneq_s32
- prelude::vmlal_laneq_u16
- prelude::vmlal_laneq_u32
- prelude::vmlal_n_s16
- prelude::vmlal_n_s32
- prelude::vmlal_n_u16
- prelude::vmlal_n_u32
- prelude::vmlal_s16
- prelude::vmlal_s32
- prelude::vmlal_s8
- prelude::vmlal_u16
- prelude::vmlal_u32
- prelude::vmlal_u8
- prelude::vmlaq_f32
- prelude::vmlaq_f64
- prelude::vmlaq_lane_f32
- prelude::vmlaq_lane_s16
- prelude::vmlaq_lane_s32
- prelude::vmlaq_lane_u16
- prelude::vmlaq_lane_u32
- prelude::vmlaq_laneq_f32
- prelude::vmlaq_laneq_s16
- prelude::vmlaq_laneq_s32
- prelude::vmlaq_laneq_u16
- prelude::vmlaq_laneq_u32
- prelude::vmlaq_n_f32
- prelude::vmlaq_n_s16
- prelude::vmlaq_n_s32
- prelude::vmlaq_n_u16
- prelude::vmlaq_n_u32
- prelude::vmlaq_s16
- prelude::vmlaq_s32
- prelude::vmlaq_s8
- prelude::vmlaq_u16
- prelude::vmlaq_u32
- prelude::vmlaq_u8
- prelude::vmls_f32
- prelude::vmls_f64
- prelude::vmls_lane_f32
- prelude::vmls_lane_s16
- prelude::vmls_lane_s32
- prelude::vmls_lane_u16
- prelude::vmls_lane_u32
- prelude::vmls_laneq_f32
- prelude::vmls_laneq_s16
- prelude::vmls_laneq_s32
- prelude::vmls_laneq_u16
- prelude::vmls_laneq_u32
- prelude::vmls_n_f32
- prelude::vmls_n_s16
- prelude::vmls_n_s32
- prelude::vmls_n_u16
- prelude::vmls_n_u32
- prelude::vmls_s16
- prelude::vmls_s32
- prelude::vmls_s8
- prelude::vmls_u16
- prelude::vmls_u32
- prelude::vmls_u8
- prelude::vmlsl_high_lane_s16
- prelude::vmlsl_high_lane_s32
- prelude::vmlsl_high_lane_u16
- prelude::vmlsl_high_lane_u32
- prelude::vmlsl_high_laneq_s16
- prelude::vmlsl_high_laneq_s32
- prelude::vmlsl_high_laneq_u16
- prelude::vmlsl_high_laneq_u32
- prelude::vmlsl_high_n_s16
- prelude::vmlsl_high_n_s32
- prelude::vmlsl_high_n_u16
- prelude::vmlsl_high_n_u32
- prelude::vmlsl_high_s16
- prelude::vmlsl_high_s32
- prelude::vmlsl_high_s8
- prelude::vmlsl_high_u16
- prelude::vmlsl_high_u32
- prelude::vmlsl_high_u8
- prelude::vmlsl_lane_s16
- prelude::vmlsl_lane_s32
- prelude::vmlsl_lane_u16
- prelude::vmlsl_lane_u32
- prelude::vmlsl_laneq_s16
- prelude::vmlsl_laneq_s32
- prelude::vmlsl_laneq_u16
- prelude::vmlsl_laneq_u32
- prelude::vmlsl_n_s16
- prelude::vmlsl_n_s32
- prelude::vmlsl_n_u16
- prelude::vmlsl_n_u32
- prelude::vmlsl_s16
- prelude::vmlsl_s32
- prelude::vmlsl_s8
- prelude::vmlsl_u16
- prelude::vmlsl_u32
- prelude::vmlsl_u8
- prelude::vmlsq_f32
- prelude::vmlsq_f64
- prelude::vmlsq_lane_f32
- prelude::vmlsq_lane_s16
- prelude::vmlsq_lane_s32
- prelude::vmlsq_lane_u16
- prelude::vmlsq_lane_u32
- prelude::vmlsq_laneq_f32
- prelude::vmlsq_laneq_s16
- prelude::vmlsq_laneq_s32
- prelude::vmlsq_laneq_u16
- prelude::vmlsq_laneq_u32
- prelude::vmlsq_n_f32
- prelude::vmlsq_n_s16
- prelude::vmlsq_n_s32
- prelude::vmlsq_n_u16
- prelude::vmlsq_n_u32
- prelude::vmlsq_s16
- prelude::vmlsq_s32
- prelude::vmlsq_s8
- prelude::vmlsq_u16
- prelude::vmlsq_u32
- prelude::vmlsq_u8
- prelude::vmmlaq_s32
- prelude::vmmlaq_u32
- prelude::vmov_n_f16
- prelude::vmov_n_f32
- prelude::vmov_n_f64
- prelude::vmov_n_p16
- prelude::vmov_n_p64
- prelude::vmov_n_p8
- prelude::vmov_n_s16
- prelude::vmov_n_s32
- prelude::vmov_n_s64
- prelude::vmov_n_s8
- prelude::vmov_n_u16
- prelude::vmov_n_u32
- prelude::vmov_n_u64
- prelude::vmov_n_u8
- prelude::vmovl_high_s16
- prelude::vmovl_high_s32
- prelude::vmovl_high_s8
- prelude::vmovl_high_u16
- prelude::vmovl_high_u32
- prelude::vmovl_high_u8
- prelude::vmovl_s16
- prelude::vmovl_s32
- prelude::vmovl_s8
- prelude::vmovl_u16
- prelude::vmovl_u32
- prelude::vmovl_u8
- prelude::vmovn_high_s16
- prelude::vmovn_high_s32
- prelude::vmovn_high_s64
- prelude::vmovn_high_u16
- prelude::vmovn_high_u32
- prelude::vmovn_high_u64
- prelude::vmovn_s16
- prelude::vmovn_s32
- prelude::vmovn_s64
- prelude::vmovn_u16
- prelude::vmovn_u32
- prelude::vmovn_u64
- prelude::vmovq_n_f16
- prelude::vmovq_n_f32
- prelude::vmovq_n_f64
- prelude::vmovq_n_p16
- prelude::vmovq_n_p64
- prelude::vmovq_n_p8
- prelude::vmovq_n_s16
- prelude::vmovq_n_s32
- prelude::vmovq_n_s64
- prelude::vmovq_n_s8
- prelude::vmovq_n_u16
- prelude::vmovq_n_u32
- prelude::vmovq_n_u64
- prelude::vmovq_n_u8
- prelude::vmul_f16
- prelude::vmul_f32
- prelude::vmul_f64
- prelude::vmul_lane_f16
- prelude::vmul_lane_f32
- prelude::vmul_lane_f64
- prelude::vmul_lane_s16
- prelude::vmul_lane_s32
- prelude::vmul_lane_u16
- prelude::vmul_lane_u32
- prelude::vmul_laneq_f16
- prelude::vmul_laneq_f32
- prelude::vmul_laneq_f64
- prelude::vmul_laneq_s16
- prelude::vmul_laneq_s32
- prelude::vmul_laneq_u16
- prelude::vmul_laneq_u32
- prelude::vmul_n_f16
- prelude::vmul_n_f32
- prelude::vmul_n_f64
- prelude::vmul_n_s16
- prelude::vmul_n_s32
- prelude::vmul_n_u16
- prelude::vmul_n_u32
- prelude::vmul_p8
- prelude::vmul_s16
- prelude::vmul_s32
- prelude::vmul_s8
- prelude::vmul_u16
- prelude::vmul_u32
- prelude::vmul_u8
- prelude::vmuld_lane_f64
- prelude::vmuld_laneq_f64
- prelude::vmulh_f16
- prelude::vmulh_lane_f16
- prelude::vmulh_laneq_f16
- prelude::vmull_high_lane_s16
- prelude::vmull_high_lane_s32
- prelude::vmull_high_lane_u16
- prelude::vmull_high_lane_u32
- prelude::vmull_high_laneq_s16
- prelude::vmull_high_laneq_s32
- prelude::vmull_high_laneq_u16
- prelude::vmull_high_laneq_u32
- prelude::vmull_high_n_s16
- prelude::vmull_high_n_s32
- prelude::vmull_high_n_u16
- prelude::vmull_high_n_u32
- prelude::vmull_high_p64
- prelude::vmull_high_p8
- prelude::vmull_high_s16
- prelude::vmull_high_s32
- prelude::vmull_high_s8
- prelude::vmull_high_u16
- prelude::vmull_high_u32
- prelude::vmull_high_u8
- prelude::vmull_lane_s16
- prelude::vmull_lane_s32
- prelude::vmull_lane_u16
- prelude::vmull_lane_u32
- prelude::vmull_laneq_s16
- prelude::vmull_laneq_s32
- prelude::vmull_laneq_u16
- prelude::vmull_laneq_u32
- prelude::vmull_n_s16
- prelude::vmull_n_s32
- prelude::vmull_n_u16
- prelude::vmull_n_u32
- prelude::vmull_p64
- prelude::vmull_p8
- prelude::vmull_s16
- prelude::vmull_s32
- prelude::vmull_s8
- prelude::vmull_u16
- prelude::vmull_u32
- prelude::vmull_u8
- prelude::vmulq_f16
- prelude::vmulq_f32
- prelude::vmulq_f64
- prelude::vmulq_lane_f16
- prelude::vmulq_lane_f32
- prelude::vmulq_lane_f64
- prelude::vmulq_lane_s16
- prelude::vmulq_lane_s32
- prelude::vmulq_lane_u16
- prelude::vmulq_lane_u32
- prelude::vmulq_laneq_f16
- prelude::vmulq_laneq_f32
- prelude::vmulq_laneq_f64
- prelude::vmulq_laneq_s16
- prelude::vmulq_laneq_s32
- prelude::vmulq_laneq_u16
- prelude::vmulq_laneq_u32
- prelude::vmulq_n_f16
- prelude::vmulq_n_f32
- prelude::vmulq_n_f64
- prelude::vmulq_n_s16
- prelude::vmulq_n_s32
- prelude::vmulq_n_u16
- prelude::vmulq_n_u32
- prelude::vmulq_p8
- prelude::vmulq_s16
- prelude::vmulq_s32
- prelude::vmulq_s8
- prelude::vmulq_u16
- prelude::vmulq_u32
- prelude::vmulq_u8
- prelude::vmuls_lane_f32
- prelude::vmuls_laneq_f32
- prelude::vmulx_f16
- prelude::vmulx_f32
- prelude::vmulx_f64
- prelude::vmulx_lane_f16
- prelude::vmulx_lane_f32
- prelude::vmulx_lane_f64
- prelude::vmulx_laneq_f16
- prelude::vmulx_laneq_f32
- prelude::vmulx_laneq_f64
- prelude::vmulx_n_f16
- prelude::vmulxd_f64
- prelude::vmulxd_lane_f64
- prelude::vmulxd_laneq_f64
- prelude::vmulxh_f16
- prelude::vmulxh_lane_f16
- prelude::vmulxh_laneq_f16
- prelude::vmulxq_f16
- prelude::vmulxq_f32
- prelude::vmulxq_f64
- prelude::vmulxq_lane_f16
- prelude::vmulxq_lane_f32
- prelude::vmulxq_lane_f64
- prelude::vmulxq_laneq_f16
- prelude::vmulxq_laneq_f32
- prelude::vmulxq_laneq_f64
- prelude::vmulxq_n_f16
- prelude::vmulxs_f32
- prelude::vmulxs_lane_f32
- prelude::vmulxs_laneq_f32
- prelude::vmvn_p8
- prelude::vmvn_s16
- prelude::vmvn_s32
- prelude::vmvn_s8
- prelude::vmvn_u16
- prelude::vmvn_u32
- prelude::vmvn_u8
- prelude::vmvnq_p8
- prelude::vmvnq_s16
- prelude::vmvnq_s32
- prelude::vmvnq_s8
- prelude::vmvnq_u16
- prelude::vmvnq_u32
- prelude::vmvnq_u8
- prelude::vneg_f16
- prelude::vneg_f32
- prelude::vneg_f64
- prelude::vneg_s16
- prelude::vneg_s32
- prelude::vneg_s64
- prelude::vneg_s8
- prelude::vnegd_s64
- prelude::vnegh_f16
- prelude::vnegq_f16
- prelude::vnegq_f32
- prelude::vnegq_f64
- prelude::vnegq_s16
- prelude::vnegq_s32
- prelude::vnegq_s64
- prelude::vnegq_s8
- prelude::vorn_s16
- prelude::vorn_s32
- prelude::vorn_s64
- prelude::vorn_s8
- prelude::vorn_u16
- prelude::vorn_u32
- prelude::vorn_u64
- prelude::vorn_u8
- prelude::vornq_s16
- prelude::vornq_s32
- prelude::vornq_s64
- prelude::vornq_s8
- prelude::vornq_u16
- prelude::vornq_u32
- prelude::vornq_u64
- prelude::vornq_u8
- prelude::vorr_s16
- prelude::vorr_s32
- prelude::vorr_s64
- prelude::vorr_s8
- prelude::vorr_u16
- prelude::vorr_u32
- prelude::vorr_u64
- prelude::vorr_u8
- prelude::vorrq_s16
- prelude::vorrq_s32
- prelude::vorrq_s64
- prelude::vorrq_s8
- prelude::vorrq_u16
- prelude::vorrq_u32
- prelude::vorrq_u64
- prelude::vorrq_u8
- prelude::vpadal_s16
- prelude::vpadal_s32
- prelude::vpadal_s8
- prelude::vpadal_u16
- prelude::vpadal_u32
- prelude::vpadal_u8
- prelude::vpadalq_s16
- prelude::vpadalq_s32
- prelude::vpadalq_s8
- prelude::vpadalq_u16
- prelude::vpadalq_u32
- prelude::vpadalq_u8
- prelude::vpadd_f16
- prelude::vpadd_f32
- prelude::vpadd_s16
- prelude::vpadd_s32
- prelude::vpadd_s8
- prelude::vpadd_u16
- prelude::vpadd_u32
- prelude::vpadd_u8
- prelude::vpaddd_f64
- prelude::vpaddd_s64
- prelude::vpaddd_u64
- prelude::vpaddl_s16
- prelude::vpaddl_s32
- prelude::vpaddl_s8
- prelude::vpaddl_u16
- prelude::vpaddl_u32
- prelude::vpaddl_u8
- prelude::vpaddlq_s16
- prelude::vpaddlq_s32
- prelude::vpaddlq_s8
- prelude::vpaddlq_u16
- prelude::vpaddlq_u32
- prelude::vpaddlq_u8
- prelude::vpaddq_f16
- prelude::vpaddq_f32
- prelude::vpaddq_f64
- prelude::vpaddq_s16
- prelude::vpaddq_s32
- prelude::vpaddq_s64
- prelude::vpaddq_s8
- prelude::vpaddq_u16
- prelude::vpaddq_u32
- prelude::vpaddq_u64
- prelude::vpaddq_u8
- prelude::vpadds_f32
- prelude::vpmax_f16
- prelude::vpmax_f32
- prelude::vpmax_s16
- prelude::vpmax_s32
- prelude::vpmax_s8
- prelude::vpmax_u16
- prelude::vpmax_u32
- prelude::vpmax_u8
- prelude::vpmaxnm_f16
- prelude::vpmaxnm_f32
- prelude::vpmaxnmq_f16
- prelude::vpmaxnmq_f32
- prelude::vpmaxnmq_f64
- prelude::vpmaxnmqd_f64
- prelude::vpmaxnms_f32
- prelude::vpmaxq_f16
- prelude::vpmaxq_f32
- prelude::vpmaxq_f64
- prelude::vpmaxq_s16
- prelude::vpmaxq_s32
- prelude::vpmaxq_s8
- prelude::vpmaxq_u16
- prelude::vpmaxq_u32
- prelude::vpmaxq_u8
- prelude::vpmaxqd_f64
- prelude::vpmaxs_f32
- prelude::vpmin_f16
- prelude::vpmin_f32
- prelude::vpmin_s16
- prelude::vpmin_s32
- prelude::vpmin_s8
- prelude::vpmin_u16
- prelude::vpmin_u32
- prelude::vpmin_u8
- prelude::vpminnm_f16
- prelude::vpminnm_f32
- prelude::vpminnmq_f16
- prelude::vpminnmq_f32
- prelude::vpminnmq_f64
- prelude::vpminnmqd_f64
- prelude::vpminnms_f32
- prelude::vpminq_f16
- prelude::vpminq_f32
- prelude::vpminq_f64
- prelude::vpminq_s16
- prelude::vpminq_s32
- prelude::vpminq_s8
- prelude::vpminq_u16
- prelude::vpminq_u32
- prelude::vpminq_u8
- prelude::vpminqd_f64
- prelude::vpmins_f32
- prelude::vqabs_s16
- prelude::vqabs_s32
- prelude::vqabs_s64
- prelude::vqabs_s8
- prelude::vqabsb_s8
- prelude::vqabsd_s64
- prelude::vqabsh_s16
- prelude::vqabsq_s16
- prelude::vqabsq_s32
- prelude::vqabsq_s64
- prelude::vqabsq_s8
- prelude::vqabss_s32
- prelude::vqadd_s16
- prelude::vqadd_s32
- prelude::vqadd_s64
- prelude::vqadd_s8
- prelude::vqadd_u16
- prelude::vqadd_u32
- prelude::vqadd_u64
- prelude::vqadd_u8
- prelude::vqaddb_s8
- prelude::vqaddb_u8
- prelude::vqaddd_s64
- prelude::vqaddd_u64
- prelude::vqaddh_s16
- prelude::vqaddh_u16
- prelude::vqaddq_s16
- prelude::vqaddq_s32
- prelude::vqaddq_s64
- prelude::vqaddq_s8
- prelude::vqaddq_u16
- prelude::vqaddq_u32
- prelude::vqaddq_u64
- prelude::vqaddq_u8
- prelude::vqadds_s32
- prelude::vqadds_u32
- prelude::vqdmlal_high_lane_s16
- prelude::vqdmlal_high_lane_s32
- prelude::vqdmlal_high_laneq_s16
- prelude::vqdmlal_high_laneq_s32
- prelude::vqdmlal_high_n_s16
- prelude::vqdmlal_high_n_s32
- prelude::vqdmlal_high_s16
- prelude::vqdmlal_high_s32
- prelude::vqdmlal_lane_s16
- prelude::vqdmlal_lane_s32
- prelude::vqdmlal_laneq_s16
- prelude::vqdmlal_laneq_s32
- prelude::vqdmlal_n_s16
- prelude::vqdmlal_n_s32
- prelude::vqdmlal_s16
- prelude::vqdmlal_s32
- prelude::vqdmlalh_lane_s16
- prelude::vqdmlalh_laneq_s16
- prelude::vqdmlalh_s16
- prelude::vqdmlals_lane_s32
- prelude::vqdmlals_laneq_s32
- prelude::vqdmlals_s32
- prelude::vqdmlsl_high_lane_s16
- prelude::vqdmlsl_high_lane_s32
- prelude::vqdmlsl_high_laneq_s16
- prelude::vqdmlsl_high_laneq_s32
- prelude::vqdmlsl_high_n_s16
- prelude::vqdmlsl_high_n_s32
- prelude::vqdmlsl_high_s16
- prelude::vqdmlsl_high_s32
- prelude::vqdmlsl_lane_s16
- prelude::vqdmlsl_lane_s32
- prelude::vqdmlsl_laneq_s16
- prelude::vqdmlsl_laneq_s32
- prelude::vqdmlsl_n_s16
- prelude::vqdmlsl_n_s32
- prelude::vqdmlsl_s16
- prelude::vqdmlsl_s32
- prelude::vqdmlslh_lane_s16
- prelude::vqdmlslh_laneq_s16
- prelude::vqdmlslh_s16
- prelude::vqdmlsls_lane_s32
- prelude::vqdmlsls_laneq_s32
- prelude::vqdmlsls_s32
- prelude::vqdmulh_lane_s16
- prelude::vqdmulh_lane_s32
- prelude::vqdmulh_laneq_s16
- prelude::vqdmulh_laneq_s32
- prelude::vqdmulh_n_s16
- prelude::vqdmulh_n_s32
- prelude::vqdmulh_s16
- prelude::vqdmulh_s32
- prelude::vqdmulhh_lane_s16
- prelude::vqdmulhh_laneq_s16
- prelude::vqdmulhh_s16
- prelude::vqdmulhq_lane_s16
- prelude::vqdmulhq_lane_s32
- prelude::vqdmulhq_laneq_s16
- prelude::vqdmulhq_laneq_s32
- prelude::vqdmulhq_n_s16
- prelude::vqdmulhq_n_s32
- prelude::vqdmulhq_s16
- prelude::vqdmulhq_s32
- prelude::vqdmulhs_lane_s32
- prelude::vqdmulhs_laneq_s32
- prelude::vqdmulhs_s32
- prelude::vqdmull_high_lane_s16
- prelude::vqdmull_high_lane_s32
- prelude::vqdmull_high_laneq_s16
- prelude::vqdmull_high_laneq_s32
- prelude::vqdmull_high_n_s16
- prelude::vqdmull_high_n_s32
- prelude::vqdmull_high_s16
- prelude::vqdmull_high_s32
- prelude::vqdmull_lane_s16
- prelude::vqdmull_lane_s32
- prelude::vqdmull_laneq_s16
- prelude::vqdmull_laneq_s32
- prelude::vqdmull_n_s16
- prelude::vqdmull_n_s32
- prelude::vqdmull_s16
- prelude::vqdmull_s32
- prelude::vqdmullh_lane_s16
- prelude::vqdmullh_laneq_s16
- prelude::vqdmullh_s16
- prelude::vqdmulls_lane_s32
- prelude::vqdmulls_laneq_s32
- prelude::vqdmulls_s32
- prelude::vqmovn_high_s16
- prelude::vqmovn_high_s32
- prelude::vqmovn_high_s64
- prelude::vqmovn_high_u16
- prelude::vqmovn_high_u32
- prelude::vqmovn_high_u64
- prelude::vqmovn_s16
- prelude::vqmovn_s32
- prelude::vqmovn_s64
- prelude::vqmovn_u16
- prelude::vqmovn_u32
- prelude::vqmovn_u64
- prelude::vqmovnd_s64
- prelude::vqmovnd_u64
- prelude::vqmovnh_s16
- prelude::vqmovnh_u16
- prelude::vqmovns_s32
- prelude::vqmovns_u32
- prelude::vqmovun_high_s16
- prelude::vqmovun_high_s32
- prelude::vqmovun_high_s64
- prelude::vqmovun_s16
- prelude::vqmovun_s32
- prelude::vqmovun_s64
- prelude::vqmovund_s64
- prelude::vqmovunh_s16
- prelude::vqmovuns_s32
- prelude::vqneg_s16
- prelude::vqneg_s32
- prelude::vqneg_s64
- prelude::vqneg_s8
- prelude::vqnegb_s8
- prelude::vqnegd_s64
- prelude::vqnegh_s16
- prelude::vqnegq_s16
- prelude::vqnegq_s32
- prelude::vqnegq_s64
- prelude::vqnegq_s8
- prelude::vqnegs_s32
- prelude::vqrdmlah_lane_s16
- prelude::vqrdmlah_lane_s32
- prelude::vqrdmlah_laneq_s16
- prelude::vqrdmlah_laneq_s32
- prelude::vqrdmlah_s16
- prelude::vqrdmlah_s32
- prelude::vqrdmlahh_lane_s16
- prelude::vqrdmlahh_laneq_s16
- prelude::vqrdmlahh_s16
- prelude::vqrdmlahq_lane_s16
- prelude::vqrdmlahq_lane_s32
- prelude::vqrdmlahq_laneq_s16
- prelude::vqrdmlahq_laneq_s32
- prelude::vqrdmlahq_s16
- prelude::vqrdmlahq_s32
- prelude::vqrdmlahs_lane_s32
- prelude::vqrdmlahs_laneq_s32
- prelude::vqrdmlahs_s32
- prelude::vqrdmlsh_lane_s16
- prelude::vqrdmlsh_lane_s32
- prelude::vqrdmlsh_laneq_s16
- prelude::vqrdmlsh_laneq_s32
- prelude::vqrdmlsh_s16
- prelude::vqrdmlsh_s32
- prelude::vqrdmlshh_lane_s16
- prelude::vqrdmlshh_laneq_s16
- prelude::vqrdmlshh_s16
- prelude::vqrdmlshq_lane_s16
- prelude::vqrdmlshq_lane_s32
- prelude::vqrdmlshq_laneq_s16
- prelude::vqrdmlshq_laneq_s32
- prelude::vqrdmlshq_s16
- prelude::vqrdmlshq_s32
- prelude::vqrdmlshs_lane_s32
- prelude::vqrdmlshs_laneq_s32
- prelude::vqrdmlshs_s32
- prelude::vqrdmulh_lane_s16
- prelude::vqrdmulh_lane_s32
- prelude::vqrdmulh_laneq_s16
- prelude::vqrdmulh_laneq_s32
- prelude::vqrdmulh_n_s16
- prelude::vqrdmulh_n_s32
- prelude::vqrdmulh_s16
- prelude::vqrdmulh_s32
- prelude::vqrdmulhh_lane_s16
- prelude::vqrdmulhh_laneq_s16
- prelude::vqrdmulhh_s16
- prelude::vqrdmulhq_lane_s16
- prelude::vqrdmulhq_lane_s32
- prelude::vqrdmulhq_laneq_s16
- prelude::vqrdmulhq_laneq_s32
- prelude::vqrdmulhq_n_s16
- prelude::vqrdmulhq_n_s32
- prelude::vqrdmulhq_s16
- prelude::vqrdmulhq_s32
- prelude::vqrdmulhs_lane_s32
- prelude::vqrdmulhs_laneq_s32
- prelude::vqrdmulhs_s32
- prelude::vqrshl_s16
- prelude::vqrshl_s32
- prelude::vqrshl_s64
- prelude::vqrshl_s8
- prelude::vqrshl_u16
- prelude::vqrshl_u32
- prelude::vqrshl_u64
- prelude::vqrshl_u8
- prelude::vqrshlb_s8
- prelude::vqrshlb_u8
- prelude::vqrshld_s64
- prelude::vqrshld_u64
- prelude::vqrshlh_s16
- prelude::vqrshlh_u16
- prelude::vqrshlq_s16
- prelude::vqrshlq_s32
- prelude::vqrshlq_s64
- prelude::vqrshlq_s8
- prelude::vqrshlq_u16
- prelude::vqrshlq_u32
- prelude::vqrshlq_u64
- prelude::vqrshlq_u8
- prelude::vqrshls_s32
- prelude::vqrshls_u32
- prelude::vqrshrn_high_n_s16
- prelude::vqrshrn_high_n_s32
- prelude::vqrshrn_high_n_s64
- prelude::vqrshrn_high_n_u16
- prelude::vqrshrn_high_n_u32
- prelude::vqrshrn_high_n_u64
- prelude::vqrshrn_n_s16
- prelude::vqrshrn_n_s32
- prelude::vqrshrn_n_s64
- prelude::vqrshrn_n_u16
- prelude::vqrshrn_n_u32
- prelude::vqrshrn_n_u64
- prelude::vqrshrnd_n_s64
- prelude::vqrshrnd_n_u64
- prelude::vqrshrnh_n_s16
- prelude::vqrshrnh_n_u16
- prelude::vqrshrns_n_s32
- prelude::vqrshrns_n_u32
- prelude::vqrshrun_high_n_s16
- prelude::vqrshrun_high_n_s32
- prelude::vqrshrun_high_n_s64
- prelude::vqrshrun_n_s16
- prelude::vqrshrun_n_s32
- prelude::vqrshrun_n_s64
- prelude::vqrshrund_n_s64
- prelude::vqrshrunh_n_s16
- prelude::vqrshruns_n_s32
- prelude::vqshl_n_s16
- prelude::vqshl_n_s32
- prelude::vqshl_n_s64
- prelude::vqshl_n_s8
- prelude::vqshl_n_u16
- prelude::vqshl_n_u32
- prelude::vqshl_n_u64
- prelude::vqshl_n_u8
- prelude::vqshl_s16
- prelude::vqshl_s32
- prelude::vqshl_s64
- prelude::vqshl_s8
- prelude::vqshl_u16
- prelude::vqshl_u32
- prelude::vqshl_u64
- prelude::vqshl_u8
- prelude::vqshlb_n_s8
- prelude::vqshlb_n_u8
- prelude::vqshlb_s8
- prelude::vqshlb_u8
- prelude::vqshld_n_s64
- prelude::vqshld_n_u64
- prelude::vqshld_s64
- prelude::vqshld_u64
- prelude::vqshlh_n_s16
- prelude::vqshlh_n_u16
- prelude::vqshlh_s16
- prelude::vqshlh_u16
- prelude::vqshlq_n_s16
- prelude::vqshlq_n_s32
- prelude::vqshlq_n_s64
- prelude::vqshlq_n_s8
- prelude::vqshlq_n_u16
- prelude::vqshlq_n_u32
- prelude::vqshlq_n_u64
- prelude::vqshlq_n_u8
- prelude::vqshlq_s16
- prelude::vqshlq_s32
- prelude::vqshlq_s64
- prelude::vqshlq_s8
- prelude::vqshlq_u16
- prelude::vqshlq_u32
- prelude::vqshlq_u64
- prelude::vqshlq_u8
- prelude::vqshls_n_s32
- prelude::vqshls_n_u32
- prelude::vqshls_s32
- prelude::vqshls_u32
- prelude::vqshlu_n_s16
- prelude::vqshlu_n_s32
- prelude::vqshlu_n_s64
- prelude::vqshlu_n_s8
- prelude::vqshlub_n_s8
- prelude::vqshlud_n_s64
- prelude::vqshluh_n_s16
- prelude::vqshluq_n_s16
- prelude::vqshluq_n_s32
- prelude::vqshluq_n_s64
- prelude::vqshluq_n_s8
- prelude::vqshlus_n_s32
- prelude::vqshrn_high_n_s16
- prelude::vqshrn_high_n_s32
- prelude::vqshrn_high_n_s64
- prelude::vqshrn_high_n_u16
- prelude::vqshrn_high_n_u32
- prelude::vqshrn_high_n_u64
- prelude::vqshrn_n_s16
- prelude::vqshrn_n_s32
- prelude::vqshrn_n_s64
- prelude::vqshrn_n_u16
- prelude::vqshrn_n_u32
- prelude::vqshrn_n_u64
- prelude::vqshrnd_n_s64
- prelude::vqshrnd_n_u64
- prelude::vqshrnh_n_s16
- prelude::vqshrnh_n_u16
- prelude::vqshrns_n_s32
- prelude::vqshrns_n_u32
- prelude::vqshrun_high_n_s16
- prelude::vqshrun_high_n_s32
- prelude::vqshrun_high_n_s64
- prelude::vqshrun_n_s16
- prelude::vqshrun_n_s32
- prelude::vqshrun_n_s64
- prelude::vqshrund_n_s64
- prelude::vqshrunh_n_s16
- prelude::vqshruns_n_s32
- prelude::vqsub_s16
- prelude::vqsub_s32
- prelude::vqsub_s64
- prelude::vqsub_s8
- prelude::vqsub_u16
- prelude::vqsub_u32
- prelude::vqsub_u64
- prelude::vqsub_u8
- prelude::vqsubb_s8
- prelude::vqsubb_u8
- prelude::vqsubd_s64
- prelude::vqsubd_u64
- prelude::vqsubh_s16
- prelude::vqsubh_u16
- prelude::vqsubq_s16
- prelude::vqsubq_s32
- prelude::vqsubq_s64
- prelude::vqsubq_s8
- prelude::vqsubq_u16
- prelude::vqsubq_u32
- prelude::vqsubq_u64
- prelude::vqsubq_u8
- prelude::vqsubs_s32
- prelude::vqsubs_u32
- prelude::vqtbl1_p8
- prelude::vqtbl1_s8
- prelude::vqtbl1_u8
- prelude::vqtbl1q_p8
- prelude::vqtbl1q_s8
- prelude::vqtbl1q_u8
- prelude::vqtbl2_p8
- prelude::vqtbl2_s8
- prelude::vqtbl2_u8
- prelude::vqtbl2q_p8
- prelude::vqtbl2q_s8
- prelude::vqtbl2q_u8
- prelude::vqtbl3_p8
- prelude::vqtbl3_s8
- prelude::vqtbl3_u8
- prelude::vqtbl3q_p8
- prelude::vqtbl3q_s8
- prelude::vqtbl3q_u8
- prelude::vqtbl4_p8
- prelude::vqtbl4_s8
- prelude::vqtbl4_u8
- prelude::vqtbl4q_p8
- prelude::vqtbl4q_s8
- prelude::vqtbl4q_u8
- prelude::vqtbx1_p8
- prelude::vqtbx1_s8
- prelude::vqtbx1_u8
- prelude::vqtbx1q_p8
- prelude::vqtbx1q_s8
- prelude::vqtbx1q_u8
- prelude::vqtbx2_p8
- prelude::vqtbx2_s8
- prelude::vqtbx2_u8
- prelude::vqtbx2q_p8
- prelude::vqtbx2q_s8
- prelude::vqtbx2q_u8
- prelude::vqtbx3_p8
- prelude::vqtbx3_s8
- prelude::vqtbx3_u8
- prelude::vqtbx3q_p8
- prelude::vqtbx3q_s8
- prelude::vqtbx3q_u8
- prelude::vqtbx4_p8
- prelude::vqtbx4_s8
- prelude::vqtbx4_u8
- prelude::vqtbx4q_p8
- prelude::vqtbx4q_s8
- prelude::vqtbx4q_u8
- prelude::vraddhn_high_s16
- prelude::vraddhn_high_s32
- prelude::vraddhn_high_s64
- prelude::vraddhn_high_u16
- prelude::vraddhn_high_u32
- prelude::vraddhn_high_u64
- prelude::vraddhn_s16
- prelude::vraddhn_s32
- prelude::vraddhn_s64
- prelude::vraddhn_u16
- prelude::vraddhn_u32
- prelude::vraddhn_u64
- prelude::vrax1q_u64
- prelude::vrbit_p8
- prelude::vrbit_s8
- prelude::vrbit_u8
- prelude::vrbitq_p8
- prelude::vrbitq_s8
- prelude::vrbitq_u8
- prelude::vrecpe_f16
- prelude::vrecpe_f32
- prelude::vrecpe_f64
- prelude::vrecpe_u32
- prelude::vrecped_f64
- prelude::vrecpeh_f16
- prelude::vrecpeq_f16
- prelude::vrecpeq_f32
- prelude::vrecpeq_f64
- prelude::vrecpeq_u32
- prelude::vrecpes_f32
- prelude::vrecps_f16
- prelude::vrecps_f32
- prelude::vrecps_f64
- prelude::vrecpsd_f64
- prelude::vrecpsh_f16
- prelude::vrecpsq_f16
- prelude::vrecpsq_f32
- prelude::vrecpsq_f64
- prelude::vrecpss_f32
- prelude::vrecpxd_f64
- prelude::vrecpxh_f16
- prelude::vrecpxs_f32
- prelude::vreinterpret_f16_f32
- prelude::vreinterpret_f16_f64
- prelude::vreinterpret_f16_p16
- prelude::vreinterpret_f16_p64
- prelude::vreinterpret_f16_p8
- prelude::vreinterpret_f16_s16
- prelude::vreinterpret_f16_s32
- prelude::vreinterpret_f16_s64
- prelude::vreinterpret_f16_s8
- prelude::vreinterpret_f16_u16
- prelude::vreinterpret_f16_u32
- prelude::vreinterpret_f16_u64
- prelude::vreinterpret_f16_u8
- prelude::vreinterpret_f32_f16
- prelude::vreinterpret_f32_f64
- prelude::vreinterpret_f32_p16
- prelude::vreinterpret_f32_p64
- prelude::vreinterpret_f32_p8
- prelude::vreinterpret_f32_s16
- prelude::vreinterpret_f32_s32
- prelude::vreinterpret_f32_s64
- prelude::vreinterpret_f32_s8
- prelude::vreinterpret_f32_u16
- prelude::vreinterpret_f32_u32
- prelude::vreinterpret_f32_u64
- prelude::vreinterpret_f32_u8
- prelude::vreinterpret_f64_f16
- prelude::vreinterpret_f64_f32
- prelude::vreinterpret_f64_p16
- prelude::vreinterpret_f64_p64
- prelude::vreinterpret_f64_p8
- prelude::vreinterpret_f64_s16
- prelude::vreinterpret_f64_s32
- prelude::vreinterpret_f64_s64
- prelude::vreinterpret_f64_s8
- prelude::vreinterpret_f64_u16
- prelude::vreinterpret_f64_u32
- prelude::vreinterpret_f64_u64
- prelude::vreinterpret_f64_u8
- prelude::vreinterpret_p16_f16
- prelude::vreinterpret_p16_f32
- prelude::vreinterpret_p16_f64
- prelude::vreinterpret_p16_p64
- prelude::vreinterpret_p16_p8
- prelude::vreinterpret_p16_s16
- prelude::vreinterpret_p16_s32
- prelude::vreinterpret_p16_s64
- prelude::vreinterpret_p16_s8
- prelude::vreinterpret_p16_u16
- prelude::vreinterpret_p16_u32
- prelude::vreinterpret_p16_u64
- prelude::vreinterpret_p16_u8
- prelude::vreinterpret_p64_f16
- prelude::vreinterpret_p64_f32
- prelude::vreinterpret_p64_f64
- prelude::vreinterpret_p64_p16
- prelude::vreinterpret_p64_p8
- prelude::vreinterpret_p64_s16
- prelude::vreinterpret_p64_s32
- prelude::vreinterpret_p64_s64
- prelude::vreinterpret_p64_s8
- prelude::vreinterpret_p64_u16
- prelude::vreinterpret_p64_u32
- prelude::vreinterpret_p64_u64
- prelude::vreinterpret_p64_u8
- prelude::vreinterpret_p8_f16
- prelude::vreinterpret_p8_f32
- prelude::vreinterpret_p8_f64
- prelude::vreinterpret_p8_p16
- prelude::vreinterpret_p8_p64
- prelude::vreinterpret_p8_s16
- prelude::vreinterpret_p8_s32
- prelude::vreinterpret_p8_s64
- prelude::vreinterpret_p8_s8
- prelude::vreinterpret_p8_u16
- prelude::vreinterpret_p8_u32
- prelude::vreinterpret_p8_u64
- prelude::vreinterpret_p8_u8
- prelude::vreinterpret_s16_f16
- prelude::vreinterpret_s16_f32
- prelude::vreinterpret_s16_f64
- prelude::vreinterpret_s16_p16
- prelude::vreinterpret_s16_p64
- prelude::vreinterpret_s16_p8
- prelude::vreinterpret_s16_s32
- prelude::vreinterpret_s16_s64
- prelude::vreinterpret_s16_s8
- prelude::vreinterpret_s16_u16
- prelude::vreinterpret_s16_u32
- prelude::vreinterpret_s16_u64
- prelude::vreinterpret_s16_u8
- prelude::vreinterpret_s32_f16
- prelude::vreinterpret_s32_f32
- prelude::vreinterpret_s32_f64
- prelude::vreinterpret_s32_p16
- prelude::vreinterpret_s32_p64
- prelude::vreinterpret_s32_p8
- prelude::vreinterpret_s32_s16
- prelude::vreinterpret_s32_s64
- prelude::vreinterpret_s32_s8
- prelude::vreinterpret_s32_u16
- prelude::vreinterpret_s32_u32
- prelude::vreinterpret_s32_u64
- prelude::vreinterpret_s32_u8
- prelude::vreinterpret_s64_f16
- prelude::vreinterpret_s64_f32
- prelude::vreinterpret_s64_f64
- prelude::vreinterpret_s64_p16
- prelude::vreinterpret_s64_p64
- prelude::vreinterpret_s64_p8
- prelude::vreinterpret_s64_s16
- prelude::vreinterpret_s64_s32
- prelude::vreinterpret_s64_s8
- prelude::vreinterpret_s64_u16
- prelude::vreinterpret_s64_u32
- prelude::vreinterpret_s64_u64
- prelude::vreinterpret_s64_u8
- prelude::vreinterpret_s8_f16
- prelude::vreinterpret_s8_f32
- prelude::vreinterpret_s8_f64
- prelude::vreinterpret_s8_p16
- prelude::vreinterpret_s8_p64
- prelude::vreinterpret_s8_p8
- prelude::vreinterpret_s8_s16
- prelude::vreinterpret_s8_s32
- prelude::vreinterpret_s8_s64
- prelude::vreinterpret_s8_u16
- prelude::vreinterpret_s8_u32
- prelude::vreinterpret_s8_u64
- prelude::vreinterpret_s8_u8
- prelude::vreinterpret_u16_f16
- prelude::vreinterpret_u16_f32
- prelude::vreinterpret_u16_f64
- prelude::vreinterpret_u16_p16
- prelude::vreinterpret_u16_p64
- prelude::vreinterpret_u16_p8
- prelude::vreinterpret_u16_s16
- prelude::vreinterpret_u16_s32
- prelude::vreinterpret_u16_s64
- prelude::vreinterpret_u16_s8
- prelude::vreinterpret_u16_u32
- prelude::vreinterpret_u16_u64
- prelude::vreinterpret_u16_u8
- prelude::vreinterpret_u32_f16
- prelude::vreinterpret_u32_f32
- prelude::vreinterpret_u32_f64
- prelude::vreinterpret_u32_p16
- prelude::vreinterpret_u32_p64
- prelude::vreinterpret_u32_p8
- prelude::vreinterpret_u32_s16
- prelude::vreinterpret_u32_s32
- prelude::vreinterpret_u32_s64
- prelude::vreinterpret_u32_s8
- prelude::vreinterpret_u32_u16
- prelude::vreinterpret_u32_u64
- prelude::vreinterpret_u32_u8
- prelude::vreinterpret_u64_f16
- prelude::vreinterpret_u64_f32
- prelude::vreinterpret_u64_f64
- prelude::vreinterpret_u64_p16
- prelude::vreinterpret_u64_p64
- prelude::vreinterpret_u64_p8
- prelude::vreinterpret_u64_s16
- prelude::vreinterpret_u64_s32
- prelude::vreinterpret_u64_s64
- prelude::vreinterpret_u64_s8
- prelude::vreinterpret_u64_u16
- prelude::vreinterpret_u64_u32
- prelude::vreinterpret_u64_u8
- prelude::vreinterpret_u8_f16
- prelude::vreinterpret_u8_f32
- prelude::vreinterpret_u8_f64
- prelude::vreinterpret_u8_p16
- prelude::vreinterpret_u8_p64
- prelude::vreinterpret_u8_p8
- prelude::vreinterpret_u8_s16
- prelude::vreinterpret_u8_s32
- prelude::vreinterpret_u8_s64
- prelude::vreinterpret_u8_s8
- prelude::vreinterpret_u8_u16
- prelude::vreinterpret_u8_u32
- prelude::vreinterpret_u8_u64
- prelude::vreinterpretq_f16_f32
- prelude::vreinterpretq_f16_f64
- prelude::vreinterpretq_f16_p128
- prelude::vreinterpretq_f16_p16
- prelude::vreinterpretq_f16_p64
- prelude::vreinterpretq_f16_p8
- prelude::vreinterpretq_f16_s16
- prelude::vreinterpretq_f16_s32
- prelude::vreinterpretq_f16_s64
- prelude::vreinterpretq_f16_s8
- prelude::vreinterpretq_f16_u16
- prelude::vreinterpretq_f16_u32
- prelude::vreinterpretq_f16_u64
- prelude::vreinterpretq_f16_u8
- prelude::vreinterpretq_f32_f16
- prelude::vreinterpretq_f32_f64
- prelude::vreinterpretq_f32_p128
- prelude::vreinterpretq_f32_p16
- prelude::vreinterpretq_f32_p64
- prelude::vreinterpretq_f32_p8
- prelude::vreinterpretq_f32_s16
- prelude::vreinterpretq_f32_s32
- prelude::vreinterpretq_f32_s64
- prelude::vreinterpretq_f32_s8
- prelude::vreinterpretq_f32_u16
- prelude::vreinterpretq_f32_u32
- prelude::vreinterpretq_f32_u64
- prelude::vreinterpretq_f32_u8
- prelude::vreinterpretq_f64_f16
- prelude::vreinterpretq_f64_f32
- prelude::vreinterpretq_f64_p128
- prelude::vreinterpretq_f64_p16
- prelude::vreinterpretq_f64_p64
- prelude::vreinterpretq_f64_p8
- prelude::vreinterpretq_f64_s16
- prelude::vreinterpretq_f64_s32
- prelude::vreinterpretq_f64_s64
- prelude::vreinterpretq_f64_s8
- prelude::vreinterpretq_f64_u16
- prelude::vreinterpretq_f64_u32
- prelude::vreinterpretq_f64_u64
- prelude::vreinterpretq_f64_u8
- prelude::vreinterpretq_p128_f16
- prelude::vreinterpretq_p128_f32
- prelude::vreinterpretq_p128_f64
- prelude::vreinterpretq_p128_p16
- prelude::vreinterpretq_p128_p64
- prelude::vreinterpretq_p128_p8
- prelude::vreinterpretq_p128_s16
- prelude::vreinterpretq_p128_s32
- prelude::vreinterpretq_p128_s64
- prelude::vreinterpretq_p128_s8
- prelude::vreinterpretq_p128_u16
- prelude::vreinterpretq_p128_u32
- prelude::vreinterpretq_p128_u64
- prelude::vreinterpretq_p128_u8
- prelude::vreinterpretq_p16_f16
- prelude::vreinterpretq_p16_f32
- prelude::vreinterpretq_p16_f64
- prelude::vreinterpretq_p16_p128
- prelude::vreinterpretq_p16_p64
- prelude::vreinterpretq_p16_p8
- prelude::vreinterpretq_p16_s16
- prelude::vreinterpretq_p16_s32
- prelude::vreinterpretq_p16_s64
- prelude::vreinterpretq_p16_s8
- prelude::vreinterpretq_p16_u16
- prelude::vreinterpretq_p16_u32
- prelude::vreinterpretq_p16_u64
- prelude::vreinterpretq_p16_u8
- prelude::vreinterpretq_p64_f16
- prelude::vreinterpretq_p64_f32
- prelude::vreinterpretq_p64_f64
- prelude::vreinterpretq_p64_p128
- prelude::vreinterpretq_p64_p16
- prelude::vreinterpretq_p64_p8
- prelude::vreinterpretq_p64_s16
- prelude::vreinterpretq_p64_s32
- prelude::vreinterpretq_p64_s64
- prelude::vreinterpretq_p64_s8
- prelude::vreinterpretq_p64_u16
- prelude::vreinterpretq_p64_u32
- prelude::vreinterpretq_p64_u64
- prelude::vreinterpretq_p64_u8
- prelude::vreinterpretq_p8_f16
- prelude::vreinterpretq_p8_f32
- prelude::vreinterpretq_p8_f64
- prelude::vreinterpretq_p8_p128
- prelude::vreinterpretq_p8_p16
- prelude::vreinterpretq_p8_p64
- prelude::vreinterpretq_p8_s16
- prelude::vreinterpretq_p8_s32
- prelude::vreinterpretq_p8_s64
- prelude::vreinterpretq_p8_s8
- prelude::vreinterpretq_p8_u16
- prelude::vreinterpretq_p8_u32
- prelude::vreinterpretq_p8_u64
- prelude::vreinterpretq_p8_u8
- prelude::vreinterpretq_s16_f16
- prelude::vreinterpretq_s16_f32
- prelude::vreinterpretq_s16_f64
- prelude::vreinterpretq_s16_p128
- prelude::vreinterpretq_s16_p16
- prelude::vreinterpretq_s16_p64
- prelude::vreinterpretq_s16_p8
- prelude::vreinterpretq_s16_s32
- prelude::vreinterpretq_s16_s64
- prelude::vreinterpretq_s16_s8
- prelude::vreinterpretq_s16_u16
- prelude::vreinterpretq_s16_u32
- prelude::vreinterpretq_s16_u64
- prelude::vreinterpretq_s16_u8
- prelude::vreinterpretq_s32_f16
- prelude::vreinterpretq_s32_f32
- prelude::vreinterpretq_s32_f64
- prelude::vreinterpretq_s32_p128
- prelude::vreinterpretq_s32_p16
- prelude::vreinterpretq_s32_p64
- prelude::vreinterpretq_s32_p8
- prelude::vreinterpretq_s32_s16
- prelude::vreinterpretq_s32_s64
- prelude::vreinterpretq_s32_s8
- prelude::vreinterpretq_s32_u16
- prelude::vreinterpretq_s32_u32
- prelude::vreinterpretq_s32_u64
- prelude::vreinterpretq_s32_u8
- prelude::vreinterpretq_s64_f16
- prelude::vreinterpretq_s64_f32
- prelude::vreinterpretq_s64_f64
- prelude::vreinterpretq_s64_p128
- prelude::vreinterpretq_s64_p16
- prelude::vreinterpretq_s64_p64
- prelude::vreinterpretq_s64_p8
- prelude::vreinterpretq_s64_s16
- prelude::vreinterpretq_s64_s32
- prelude::vreinterpretq_s64_s8
- prelude::vreinterpretq_s64_u16
- prelude::vreinterpretq_s64_u32
- prelude::vreinterpretq_s64_u64
- prelude::vreinterpretq_s64_u8
- prelude::vreinterpretq_s8_f16
- prelude::vreinterpretq_s8_f32
- prelude::vreinterpretq_s8_f64
- prelude::vreinterpretq_s8_p128
- prelude::vreinterpretq_s8_p16
- prelude::vreinterpretq_s8_p64
- prelude::vreinterpretq_s8_p8
- prelude::vreinterpretq_s8_s16
- prelude::vreinterpretq_s8_s32
- prelude::vreinterpretq_s8_s64
- prelude::vreinterpretq_s8_u16
- prelude::vreinterpretq_s8_u32
- prelude::vreinterpretq_s8_u64
- prelude::vreinterpretq_s8_u8
- prelude::vreinterpretq_u16_f16
- prelude::vreinterpretq_u16_f32
- prelude::vreinterpretq_u16_f64
- prelude::vreinterpretq_u16_p128
- prelude::vreinterpretq_u16_p16
- prelude::vreinterpretq_u16_p64
- prelude::vreinterpretq_u16_p8
- prelude::vreinterpretq_u16_s16
- prelude::vreinterpretq_u16_s32
- prelude::vreinterpretq_u16_s64
- prelude::vreinterpretq_u16_s8
- prelude::vreinterpretq_u16_u32
- prelude::vreinterpretq_u16_u64
- prelude::vreinterpretq_u16_u8
- prelude::vreinterpretq_u32_f16
- prelude::vreinterpretq_u32_f32
- prelude::vreinterpretq_u32_f64
- prelude::vreinterpretq_u32_p128
- prelude::vreinterpretq_u32_p16
- prelude::vreinterpretq_u32_p64
- prelude::vreinterpretq_u32_p8
- prelude::vreinterpretq_u32_s16
- prelude::vreinterpretq_u32_s32
- prelude::vreinterpretq_u32_s64
- prelude::vreinterpretq_u32_s8
- prelude::vreinterpretq_u32_u16
- prelude::vreinterpretq_u32_u64
- prelude::vreinterpretq_u32_u8
- prelude::vreinterpretq_u64_f16
- prelude::vreinterpretq_u64_f32
- prelude::vreinterpretq_u64_f64
- prelude::vreinterpretq_u64_p128
- prelude::vreinterpretq_u64_p16
- prelude::vreinterpretq_u64_p64
- prelude::vreinterpretq_u64_p8
- prelude::vreinterpretq_u64_s16
- prelude::vreinterpretq_u64_s32
- prelude::vreinterpretq_u64_s64
- prelude::vreinterpretq_u64_s8
- prelude::vreinterpretq_u64_u16
- prelude::vreinterpretq_u64_u32
- prelude::vreinterpretq_u64_u8
- prelude::vreinterpretq_u8_f16
- prelude::vreinterpretq_u8_f32
- prelude::vreinterpretq_u8_f64
- prelude::vreinterpretq_u8_p128
- prelude::vreinterpretq_u8_p16
- prelude::vreinterpretq_u8_p64
- prelude::vreinterpretq_u8_p8
- prelude::vreinterpretq_u8_s16
- prelude::vreinterpretq_u8_s32
- prelude::vreinterpretq_u8_s64
- prelude::vreinterpretq_u8_s8
- prelude::vreinterpretq_u8_u16
- prelude::vreinterpretq_u8_u32
- prelude::vreinterpretq_u8_u64
- prelude::vrev16_p8
- prelude::vrev16_s8
- prelude::vrev16_u8
- prelude::vrev16q_p8
- prelude::vrev16q_s8
- prelude::vrev16q_u8
- prelude::vrev32_p16
- prelude::vrev32_p8
- prelude::vrev32_s16
- prelude::vrev32_s8
- prelude::vrev32_u16
- prelude::vrev32_u8
- prelude::vrev32q_p16
- prelude::vrev32q_p8
- prelude::vrev32q_s16
- prelude::vrev32q_s8
- prelude::vrev32q_u16
- prelude::vrev32q_u8
- prelude::vrev64_f16
- prelude::vrev64_f32
- prelude::vrev64_p16
- prelude::vrev64_p8
- prelude::vrev64_s16
- prelude::vrev64_s32
- prelude::vrev64_s8
- prelude::vrev64_u16
- prelude::vrev64_u32
- prelude::vrev64_u8
- prelude::vrev64q_f16
- prelude::vrev64q_f32
- prelude::vrev64q_p16
- prelude::vrev64q_p8
- prelude::vrev64q_s16
- prelude::vrev64q_s32
- prelude::vrev64q_s8
- prelude::vrev64q_u16
- prelude::vrev64q_u32
- prelude::vrev64q_u8
- prelude::vrhadd_s16
- prelude::vrhadd_s32
- prelude::vrhadd_s8
- prelude::vrhadd_u16
- prelude::vrhadd_u32
- prelude::vrhadd_u8
- prelude::vrhaddq_s16
- prelude::vrhaddq_s32
- prelude::vrhaddq_s8
- prelude::vrhaddq_u16
- prelude::vrhaddq_u32
- prelude::vrhaddq_u8
- prelude::vrnd32x_f32
- prelude::vrnd32x_f64
- prelude::vrnd32xq_f32
- prelude::vrnd32xq_f64
- prelude::vrnd32z_f32
- prelude::vrnd32z_f64
- prelude::vrnd32zq_f32
- prelude::vrnd32zq_f64
- prelude::vrnd64x_f32
- prelude::vrnd64x_f64
- prelude::vrnd64xq_f32
- prelude::vrnd64xq_f64
- prelude::vrnd64z_f32
- prelude::vrnd64z_f64
- prelude::vrnd64zq_f32
- prelude::vrnd64zq_f64
- prelude::vrnd_f16
- prelude::vrnd_f32
- prelude::vrnd_f64
- prelude::vrnda_f16
- prelude::vrnda_f32
- prelude::vrnda_f64
- prelude::vrndah_f16
- prelude::vrndaq_f16
- prelude::vrndaq_f32
- prelude::vrndaq_f64
- prelude::vrndh_f16
- prelude::vrndi_f16
- prelude::vrndi_f32
- prelude::vrndi_f64
- prelude::vrndih_f16
- prelude::vrndiq_f16
- prelude::vrndiq_f32
- prelude::vrndiq_f64
- prelude::vrndm_f16
- prelude::vrndm_f32
- prelude::vrndm_f64
- prelude::vrndmh_f16
- prelude::vrndmq_f16
- prelude::vrndmq_f32
- prelude::vrndmq_f64
- prelude::vrndn_f16
- prelude::vrndn_f32
- prelude::vrndn_f64
- prelude::vrndnh_f16
- prelude::vrndnq_f16
- prelude::vrndnq_f32
- prelude::vrndnq_f64
- prelude::vrndns_f32
- prelude::vrndp_f16
- prelude::vrndp_f32
- prelude::vrndp_f64
- prelude::vrndph_f16
- prelude::vrndpq_f16
- prelude::vrndpq_f32
- prelude::vrndpq_f64
- prelude::vrndq_f16
- prelude::vrndq_f32
- prelude::vrndq_f64
- prelude::vrndx_f16
- prelude::vrndx_f32
- prelude::vrndx_f64
- prelude::vrndxh_f16
- prelude::vrndxq_f16
- prelude::vrndxq_f32
- prelude::vrndxq_f64
- prelude::vrshl_s16
- prelude::vrshl_s32
- prelude::vrshl_s64
- prelude::vrshl_s8
- prelude::vrshl_u16
- prelude::vrshl_u32
- prelude::vrshl_u64
- prelude::vrshl_u8
- prelude::vrshld_s64
- prelude::vrshld_u64
- prelude::vrshlq_s16
- prelude::vrshlq_s32
- prelude::vrshlq_s64
- prelude::vrshlq_s8
- prelude::vrshlq_u16
- prelude::vrshlq_u32
- prelude::vrshlq_u64
- prelude::vrshlq_u8
- prelude::vrshr_n_s16
- prelude::vrshr_n_s32
- prelude::vrshr_n_s64
- prelude::vrshr_n_s8
- prelude::vrshr_n_u16
- prelude::vrshr_n_u32
- prelude::vrshr_n_u64
- prelude::vrshr_n_u8
- prelude::vrshrd_n_s64
- prelude::vrshrd_n_u64
- prelude::vrshrn_high_n_s16
- prelude::vrshrn_high_n_s32
- prelude::vrshrn_high_n_s64
- prelude::vrshrn_high_n_u16
- prelude::vrshrn_high_n_u32
- prelude::vrshrn_high_n_u64
- prelude::vrshrn_n_s16
- prelude::vrshrn_n_s32
- prelude::vrshrn_n_s64
- prelude::vrshrn_n_u16
- prelude::vrshrn_n_u32
- prelude::vrshrn_n_u64
- prelude::vrshrq_n_s16
- prelude::vrshrq_n_s32
- prelude::vrshrq_n_s64
- prelude::vrshrq_n_s8
- prelude::vrshrq_n_u16
- prelude::vrshrq_n_u32
- prelude::vrshrq_n_u64
- prelude::vrshrq_n_u8
- prelude::vrsqrte_f16
- prelude::vrsqrte_f32
- prelude::vrsqrte_f64
- prelude::vrsqrte_u32
- prelude::vrsqrted_f64
- prelude::vrsqrteh_f16
- prelude::vrsqrteq_f16
- prelude::vrsqrteq_f32
- prelude::vrsqrteq_f64
- prelude::vrsqrteq_u32
- prelude::vrsqrtes_f32
- prelude::vrsqrts_f16
- prelude::vrsqrts_f32
- prelude::vrsqrts_f64
- prelude::vrsqrtsd_f64
- prelude::vrsqrtsh_f16
- prelude::vrsqrtsq_f16
- prelude::vrsqrtsq_f32
- prelude::vrsqrtsq_f64
- prelude::vrsqrtss_f32
- prelude::vrsra_n_s16
- prelude::vrsra_n_s32
- prelude::vrsra_n_s64
- prelude::vrsra_n_s8
- prelude::vrsra_n_u16
- prelude::vrsra_n_u32
- prelude::vrsra_n_u64
- prelude::vrsra_n_u8
- prelude::vrsrad_n_s64
- prelude::vrsrad_n_u64
- prelude::vrsraq_n_s16
- prelude::vrsraq_n_s32
- prelude::vrsraq_n_s64
- prelude::vrsraq_n_s8
- prelude::vrsraq_n_u16
- prelude::vrsraq_n_u32
- prelude::vrsraq_n_u64
- prelude::vrsraq_n_u8
- prelude::vrsubhn_high_s16
- prelude::vrsubhn_high_s32
- prelude::vrsubhn_high_s64
- prelude::vrsubhn_high_u16
- prelude::vrsubhn_high_u32
- prelude::vrsubhn_high_u64
- prelude::vrsubhn_s16
- prelude::vrsubhn_s32
- prelude::vrsubhn_s64
- prelude::vrsubhn_u16
- prelude::vrsubhn_u32
- prelude::vrsubhn_u64
- prelude::vscale_f16
- prelude::vscale_f32
- prelude::vscaleq_f16
- prelude::vscaleq_f32
- prelude::vscaleq_f64
- prelude::vset_lane_f16
- prelude::vset_lane_f32
- prelude::vset_lane_f64
- prelude::vset_lane_p16
- prelude::vset_lane_p64
- prelude::vset_lane_p8
- prelude::vset_lane_s16
- prelude::vset_lane_s32
- prelude::vset_lane_s64
- prelude::vset_lane_s8
- prelude::vset_lane_u16
- prelude::vset_lane_u32
- prelude::vset_lane_u64
- prelude::vset_lane_u8
- prelude::vsetq_lane_f16
- prelude::vsetq_lane_f32
- prelude::vsetq_lane_f64
- prelude::vsetq_lane_p16
- prelude::vsetq_lane_p64
- prelude::vsetq_lane_p8
- prelude::vsetq_lane_s16
- prelude::vsetq_lane_s32
- prelude::vsetq_lane_s64
- prelude::vsetq_lane_s8
- prelude::vsetq_lane_u16
- prelude::vsetq_lane_u32
- prelude::vsetq_lane_u64
- prelude::vsetq_lane_u8
- prelude::vsha1cq_u32
- prelude::vsha1h_u32
- prelude::vsha1mq_u32
- prelude::vsha1pq_u32
- prelude::vsha1su0q_u32
- prelude::vsha1su1q_u32
- prelude::vsha256h2q_u32
- prelude::vsha256hq_u32
- prelude::vsha256su0q_u32
- prelude::vsha256su1q_u32
- prelude::vsha512h2q_u64
- prelude::vsha512hq_u64
- prelude::vsha512su0q_u64
- prelude::vsha512su1q_u64
- prelude::vshl_n_s16
- prelude::vshl_n_s32
- prelude::vshl_n_s64
- prelude::vshl_n_s8
- prelude::vshl_n_u16
- prelude::vshl_n_u32
- prelude::vshl_n_u64
- prelude::vshl_n_u8
- prelude::vshl_s16
- prelude::vshl_s32
- prelude::vshl_s64
- prelude::vshl_s8
- prelude::vshl_u16
- prelude::vshl_u32
- prelude::vshl_u64
- prelude::vshl_u8
- prelude::vshld_n_s64
- prelude::vshld_n_u64
- prelude::vshld_s64
- prelude::vshld_u64
- prelude::vshll_high_n_s16
- prelude::vshll_high_n_s32
- prelude::vshll_high_n_s8
- prelude::vshll_high_n_u16
- prelude::vshll_high_n_u32
- prelude::vshll_high_n_u8
- prelude::vshll_n_s16
- prelude::vshll_n_s32
- prelude::vshll_n_s8
- prelude::vshll_n_u16
- prelude::vshll_n_u32
- prelude::vshll_n_u8
- prelude::vshlq_n_s16
- prelude::vshlq_n_s32
- prelude::vshlq_n_s64
- prelude::vshlq_n_s8
- prelude::vshlq_n_u16
- prelude::vshlq_n_u32
- prelude::vshlq_n_u64
- prelude::vshlq_n_u8
- prelude::vshlq_s16
- prelude::vshlq_s32
- prelude::vshlq_s64
- prelude::vshlq_s8
- prelude::vshlq_u16
- prelude::vshlq_u32
- prelude::vshlq_u64
- prelude::vshlq_u8
- prelude::vshr_n_s16
- prelude::vshr_n_s32
- prelude::vshr_n_s64
- prelude::vshr_n_s8
- prelude::vshr_n_u16
- prelude::vshr_n_u32
- prelude::vshr_n_u64
- prelude::vshr_n_u8
- prelude::vshrd_n_s64
- prelude::vshrd_n_u64
- prelude::vshrn_high_n_s16
- prelude::vshrn_high_n_s32
- prelude::vshrn_high_n_s64
- prelude::vshrn_high_n_u16
- prelude::vshrn_high_n_u32
- prelude::vshrn_high_n_u64
- prelude::vshrn_n_s16
- prelude::vshrn_n_s32
- prelude::vshrn_n_s64
- prelude::vshrn_n_u16
- prelude::vshrn_n_u32
- prelude::vshrn_n_u64
- prelude::vshrq_n_s16
- prelude::vshrq_n_s32
- prelude::vshrq_n_s64
- prelude::vshrq_n_s8
- prelude::vshrq_n_u16
- prelude::vshrq_n_u32
- prelude::vshrq_n_u64
- prelude::vshrq_n_u8
- prelude::vsli_n_p16
- prelude::vsli_n_p64
- prelude::vsli_n_p8
- prelude::vsli_n_s16
- prelude::vsli_n_s32
- prelude::vsli_n_s64
- prelude::vsli_n_s8
- prelude::vsli_n_u16
- prelude::vsli_n_u32
- prelude::vsli_n_u64
- prelude::vsli_n_u8
- prelude::vslid_n_s64
- prelude::vslid_n_u64
- prelude::vsliq_n_p16
- prelude::vsliq_n_p64
- prelude::vsliq_n_p8
- prelude::vsliq_n_s16
- prelude::vsliq_n_s32
- prelude::vsliq_n_s64
- prelude::vsliq_n_s8
- prelude::vsliq_n_u16
- prelude::vsliq_n_u32
- prelude::vsliq_n_u64
- prelude::vsliq_n_u8
- prelude::vsm3partw1q_u32
- prelude::vsm3partw2q_u32
- prelude::vsm3ss1q_u32
- prelude::vsm3tt1aq_u32
- prelude::vsm3tt1bq_u32
- prelude::vsm3tt2aq_u32
- prelude::vsm3tt2bq_u32
- prelude::vsm4ekeyq_u32
- prelude::vsm4eq_u32
- prelude::vsqadd_u16
- prelude::vsqadd_u32
- prelude::vsqadd_u64
- prelude::vsqadd_u8
- prelude::vsqaddb_u8
- prelude::vsqaddd_u64
- prelude::vsqaddh_u16
- prelude::vsqaddq_u16
- prelude::vsqaddq_u32
- prelude::vsqaddq_u64
- prelude::vsqaddq_u8
- prelude::vsqadds_u32
- prelude::vsqrt_f16
- prelude::vsqrt_f32
- prelude::vsqrt_f64
- prelude::vsqrth_f16
- prelude::vsqrtq_f16
- prelude::vsqrtq_f32
- prelude::vsqrtq_f64
- prelude::vsra_n_s16
- prelude::vsra_n_s32
- prelude::vsra_n_s64
- prelude::vsra_n_s8
- prelude::vsra_n_u16
- prelude::vsra_n_u32
- prelude::vsra_n_u64
- prelude::vsra_n_u8
- prelude::vsrad_n_s64
- prelude::vsrad_n_u64
- prelude::vsraq_n_s16
- prelude::vsraq_n_s32
- prelude::vsraq_n_s64
- prelude::vsraq_n_s8
- prelude::vsraq_n_u16
- prelude::vsraq_n_u32
- prelude::vsraq_n_u64
- prelude::vsraq_n_u8
- prelude::vsri_n_p16
- prelude::vsri_n_p64
- prelude::vsri_n_p8
- prelude::vsri_n_s16
- prelude::vsri_n_s32
- prelude::vsri_n_s64
- prelude::vsri_n_s8
- prelude::vsri_n_u16
- prelude::vsri_n_u32
- prelude::vsri_n_u64
- prelude::vsri_n_u8
- prelude::vsrid_n_s64
- prelude::vsrid_n_u64
- prelude::vsriq_n_p16
- prelude::vsriq_n_p64
- prelude::vsriq_n_p8
- prelude::vsriq_n_s16
- prelude::vsriq_n_s32
- prelude::vsriq_n_s64
- prelude::vsriq_n_s8
- prelude::vsriq_n_u16
- prelude::vsriq_n_u32
- prelude::vsriq_n_u64
- prelude::vsriq_n_u8
- prelude::vst1_f16
- prelude::vst1_f16_x2
- prelude::vst1_f16_x3
- prelude::vst1_f16_x4
- prelude::vst1_f32
- prelude::vst1_f32_x2
- prelude::vst1_f32_x3
- prelude::vst1_f32_x4
- prelude::vst1_f64
- prelude::vst1_f64_x2
- prelude::vst1_f64_x3
- prelude::vst1_f64_x4
- prelude::vst1_lane_f16
- prelude::vst1_lane_f32
- prelude::vst1_lane_f64
- prelude::vst1_lane_p16
- prelude::vst1_lane_p64
- prelude::vst1_lane_p8
- prelude::vst1_lane_s16
- prelude::vst1_lane_s32
- prelude::vst1_lane_s64
- prelude::vst1_lane_s8
- prelude::vst1_lane_u16
- prelude::vst1_lane_u32
- prelude::vst1_lane_u64
- prelude::vst1_lane_u8
- prelude::vst1_p16
- prelude::vst1_p16_x2
- prelude::vst1_p16_x3
- prelude::vst1_p16_x4
- prelude::vst1_p64
- prelude::vst1_p64_x2
- prelude::vst1_p64_x3
- prelude::vst1_p64_x4
- prelude::vst1_p8
- prelude::vst1_p8_x2
- prelude::vst1_p8_x3
- prelude::vst1_p8_x4
- prelude::vst1_s16
- prelude::vst1_s16_x2
- prelude::vst1_s16_x3
- prelude::vst1_s16_x4
- prelude::vst1_s32
- prelude::vst1_s32_x2
- prelude::vst1_s32_x3
- prelude::vst1_s32_x4
- prelude::vst1_s64
- prelude::vst1_s64_x2
- prelude::vst1_s64_x3
- prelude::vst1_s64_x4
- prelude::vst1_s8
- prelude::vst1_s8_x2
- prelude::vst1_s8_x3
- prelude::vst1_s8_x4
- prelude::vst1_u16
- prelude::vst1_u16_x2
- prelude::vst1_u16_x3
- prelude::vst1_u16_x4
- prelude::vst1_u32
- prelude::vst1_u32_x2
- prelude::vst1_u32_x3
- prelude::vst1_u32_x4
- prelude::vst1_u64
- prelude::vst1_u64_x2
- prelude::vst1_u64_x3
- prelude::vst1_u64_x4
- prelude::vst1_u8
- prelude::vst1_u8_x2
- prelude::vst1_u8_x3
- prelude::vst1_u8_x4
- prelude::vst1q_f16
- prelude::vst1q_f16_x2
- prelude::vst1q_f16_x3
- prelude::vst1q_f16_x4
- prelude::vst1q_f32
- prelude::vst1q_f32_x2
- prelude::vst1q_f32_x3
- prelude::vst1q_f32_x4
- prelude::vst1q_f64
- prelude::vst1q_f64_x2
- prelude::vst1q_f64_x3
- prelude::vst1q_f64_x4
- prelude::vst1q_lane_f16
- prelude::vst1q_lane_f32
- prelude::vst1q_lane_f64
- prelude::vst1q_lane_p16
- prelude::vst1q_lane_p64
- prelude::vst1q_lane_p8
- prelude::vst1q_lane_s16
- prelude::vst1q_lane_s32
- prelude::vst1q_lane_s64
- prelude::vst1q_lane_s8
- prelude::vst1q_lane_u16
- prelude::vst1q_lane_u32
- prelude::vst1q_lane_u64
- prelude::vst1q_lane_u8
- prelude::vst1q_p16
- prelude::vst1q_p16_x2
- prelude::vst1q_p16_x3
- prelude::vst1q_p16_x4
- prelude::vst1q_p64
- prelude::vst1q_p64_x2
- prelude::vst1q_p64_x3
- prelude::vst1q_p64_x4
- prelude::vst1q_p8
- prelude::vst1q_p8_x2
- prelude::vst1q_p8_x3
- prelude::vst1q_p8_x4
- prelude::vst1q_s16
- prelude::vst1q_s16_x2
- prelude::vst1q_s16_x3
- prelude::vst1q_s16_x4
- prelude::vst1q_s32
- prelude::vst1q_s32_x2
- prelude::vst1q_s32_x3
- prelude::vst1q_s32_x4
- prelude::vst1q_s64
- prelude::vst1q_s64_x2
- prelude::vst1q_s64_x3
- prelude::vst1q_s64_x4
- prelude::vst1q_s8
- prelude::vst1q_s8_x2
- prelude::vst1q_s8_x3
- prelude::vst1q_s8_x4
- prelude::vst1q_u16
- prelude::vst1q_u16_x2
- prelude::vst1q_u16_x3
- prelude::vst1q_u16_x4
- prelude::vst1q_u32
- prelude::vst1q_u32_x2
- prelude::vst1q_u32_x3
- prelude::vst1q_u32_x4
- prelude::vst1q_u64
- prelude::vst1q_u64_x2
- prelude::vst1q_u64_x3
- prelude::vst1q_u64_x4
- prelude::vst1q_u8
- prelude::vst1q_u8_x2
- prelude::vst1q_u8_x3
- prelude::vst1q_u8_x4
- prelude::vst2_f16
- prelude::vst2_f32
- prelude::vst2_f64
- prelude::vst2_lane_f16
- prelude::vst2_lane_f32
- prelude::vst2_lane_f64
- prelude::vst2_lane_p16
- prelude::vst2_lane_p64
- prelude::vst2_lane_p8
- prelude::vst2_lane_s16
- prelude::vst2_lane_s32
- prelude::vst2_lane_s64
- prelude::vst2_lane_s8
- prelude::vst2_lane_u16
- prelude::vst2_lane_u32
- prelude::vst2_lane_u64
- prelude::vst2_lane_u8
- prelude::vst2_p16
- prelude::vst2_p64
- prelude::vst2_p8
- prelude::vst2_s16
- prelude::vst2_s32
- prelude::vst2_s64
- prelude::vst2_s8
- prelude::vst2_u16
- prelude::vst2_u32
- prelude::vst2_u64
- prelude::vst2_u8
- prelude::vst2q_f16
- prelude::vst2q_f32
- prelude::vst2q_f64
- prelude::vst2q_lane_f16
- prelude::vst2q_lane_f32
- prelude::vst2q_lane_f64
- prelude::vst2q_lane_p16
- prelude::vst2q_lane_p64
- prelude::vst2q_lane_p8
- prelude::vst2q_lane_s16
- prelude::vst2q_lane_s32
- prelude::vst2q_lane_s64
- prelude::vst2q_lane_s8
- prelude::vst2q_lane_u16
- prelude::vst2q_lane_u32
- prelude::vst2q_lane_u64
- prelude::vst2q_lane_u8
- prelude::vst2q_p16
- prelude::vst2q_p64
- prelude::vst2q_p8
- prelude::vst2q_s16
- prelude::vst2q_s32
- prelude::vst2q_s64
- prelude::vst2q_s8
- prelude::vst2q_u16
- prelude::vst2q_u32
- prelude::vst2q_u64
- prelude::vst2q_u8
- prelude::vst3_f16
- prelude::vst3_f32
- prelude::vst3_f64
- prelude::vst3_lane_f16
- prelude::vst3_lane_f32
- prelude::vst3_lane_f64
- prelude::vst3_lane_p16
- prelude::vst3_lane_p64
- prelude::vst3_lane_p8
- prelude::vst3_lane_s16
- prelude::vst3_lane_s32
- prelude::vst3_lane_s64
- prelude::vst3_lane_s8
- prelude::vst3_lane_u16
- prelude::vst3_lane_u32
- prelude::vst3_lane_u64
- prelude::vst3_lane_u8
- prelude::vst3_p16
- prelude::vst3_p64
- prelude::vst3_p8
- prelude::vst3_s16
- prelude::vst3_s32
- prelude::vst3_s64
- prelude::vst3_s8
- prelude::vst3_u16
- prelude::vst3_u32
- prelude::vst3_u64
- prelude::vst3_u8
- prelude::vst3q_f16
- prelude::vst3q_f32
- prelude::vst3q_f64
- prelude::vst3q_lane_f16
- prelude::vst3q_lane_f32
- prelude::vst3q_lane_f64
- prelude::vst3q_lane_p16
- prelude::vst3q_lane_p64
- prelude::vst3q_lane_p8
- prelude::vst3q_lane_s16
- prelude::vst3q_lane_s32
- prelude::vst3q_lane_s64
- prelude::vst3q_lane_s8
- prelude::vst3q_lane_u16
- prelude::vst3q_lane_u32
- prelude::vst3q_lane_u64
- prelude::vst3q_lane_u8
- prelude::vst3q_p16
- prelude::vst3q_p64
- prelude::vst3q_p8
- prelude::vst3q_s16
- prelude::vst3q_s32
- prelude::vst3q_s64
- prelude::vst3q_s8
- prelude::vst3q_u16
- prelude::vst3q_u32
- prelude::vst3q_u64
- prelude::vst3q_u8
- prelude::vst4_f16
- prelude::vst4_f32
- prelude::vst4_f64
- prelude::vst4_lane_f16
- prelude::vst4_lane_f32
- prelude::vst4_lane_f64
- prelude::vst4_lane_p16
- prelude::vst4_lane_p64
- prelude::vst4_lane_p8
- prelude::vst4_lane_s16
- prelude::vst4_lane_s32
- prelude::vst4_lane_s64
- prelude::vst4_lane_s8
- prelude::vst4_lane_u16
- prelude::vst4_lane_u32
- prelude::vst4_lane_u64
- prelude::vst4_lane_u8
- prelude::vst4_p16
- prelude::vst4_p64
- prelude::vst4_p8
- prelude::vst4_s16
- prelude::vst4_s32
- prelude::vst4_s64
- prelude::vst4_s8
- prelude::vst4_u16
- prelude::vst4_u32
- prelude::vst4_u64
- prelude::vst4_u8
- prelude::vst4q_f16
- prelude::vst4q_f32
- prelude::vst4q_f64
- prelude::vst4q_lane_f16
- prelude::vst4q_lane_f32
- prelude::vst4q_lane_f64
- prelude::vst4q_lane_p16
- prelude::vst4q_lane_p64
- prelude::vst4q_lane_p8
- prelude::vst4q_lane_s16
- prelude::vst4q_lane_s32
- prelude::vst4q_lane_s64
- prelude::vst4q_lane_s8
- prelude::vst4q_lane_u16
- prelude::vst4q_lane_u32
- prelude::vst4q_lane_u64
- prelude::vst4q_lane_u8
- prelude::vst4q_p16
- prelude::vst4q_p64
- prelude::vst4q_p8
- prelude::vst4q_s16
- prelude::vst4q_s32
- prelude::vst4q_s64
- prelude::vst4q_s8
- prelude::vst4q_u16
- prelude::vst4q_u32
- prelude::vst4q_u64
- prelude::vst4q_u8
- prelude::vstl1_lane_f64
- prelude::vstl1_lane_p64
- prelude::vstl1_lane_s64
- prelude::vstl1_lane_u64
- prelude::vstl1q_lane_f64
- prelude::vstl1q_lane_p64
- prelude::vstl1q_lane_s64
- prelude::vstl1q_lane_u64
- prelude::vstrq_p128
- prelude::vsub_f16
- prelude::vsub_f32
- prelude::vsub_f64
- prelude::vsub_s16
- prelude::vsub_s32
- prelude::vsub_s64
- prelude::vsub_s8
- prelude::vsub_u16
- prelude::vsub_u32
- prelude::vsub_u64
- prelude::vsub_u8
- prelude::vsubd_s64
- prelude::vsubd_u64
- prelude::vsubh_f16
- prelude::vsubhn_high_s16
- prelude::vsubhn_high_s32
- prelude::vsubhn_high_s64
- prelude::vsubhn_high_u16
- prelude::vsubhn_high_u32
- prelude::vsubhn_high_u64
- prelude::vsubhn_s16
- prelude::vsubhn_s32
- prelude::vsubhn_s64
- prelude::vsubhn_u16
- prelude::vsubhn_u32
- prelude::vsubhn_u64
- prelude::vsubl_high_s16
- prelude::vsubl_high_s32
- prelude::vsubl_high_s8
- prelude::vsubl_high_u16
- prelude::vsubl_high_u32
- prelude::vsubl_high_u8
- prelude::vsubl_s16
- prelude::vsubl_s32
- prelude::vsubl_s8
- prelude::vsubl_u16
- prelude::vsubl_u32
- prelude::vsubl_u8
- prelude::vsubq_f16
- prelude::vsubq_f32
- prelude::vsubq_f64
- prelude::vsubq_s16
- prelude::vsubq_s32
- prelude::vsubq_s64
- prelude::vsubq_s8
- prelude::vsubq_u16
- prelude::vsubq_u32
- prelude::vsubq_u64
- prelude::vsubq_u8
- prelude::vsubw_high_s16
- prelude::vsubw_high_s32
- prelude::vsubw_high_s8
- prelude::vsubw_high_u16
- prelude::vsubw_high_u32
- prelude::vsubw_high_u8
- prelude::vsubw_s16
- prelude::vsubw_s32
- prelude::vsubw_s8
- prelude::vsubw_u16
- prelude::vsubw_u32
- prelude::vsubw_u8
- prelude::vsudot_lane_s32
- prelude::vsudot_laneq_s32
- prelude::vsudotq_lane_s32
- prelude::vsudotq_laneq_s32
- prelude::vtbl1_p8
- prelude::vtbl1_s8
- prelude::vtbl1_u8
- prelude::vtbl2_p8
- prelude::vtbl2_s8
- prelude::vtbl2_u8
- prelude::vtbl3_p8
- prelude::vtbl3_s8
- prelude::vtbl3_u8
- prelude::vtbl4_p8
- prelude::vtbl4_s8
- prelude::vtbl4_u8
- prelude::vtbx1_p8
- prelude::vtbx1_s8
- prelude::vtbx1_u8
- prelude::vtbx2_p8
- prelude::vtbx2_s8
- prelude::vtbx2_u8
- prelude::vtbx3_p8
- prelude::vtbx3_s8
- prelude::vtbx3_u8
- prelude::vtbx4_p8
- prelude::vtbx4_s8
- prelude::vtbx4_u8
- prelude::vtrn1_f16
- prelude::vtrn1_f32
- prelude::vtrn1_p16
- prelude::vtrn1_p8
- prelude::vtrn1_s16
- prelude::vtrn1_s32
- prelude::vtrn1_s8
- prelude::vtrn1_u16
- prelude::vtrn1_u32
- prelude::vtrn1_u8
- prelude::vtrn1q_f16
- prelude::vtrn1q_f32
- prelude::vtrn1q_f64
- prelude::vtrn1q_p16
- prelude::vtrn1q_p64
- prelude::vtrn1q_p8
- prelude::vtrn1q_s16
- prelude::vtrn1q_s32
- prelude::vtrn1q_s64
- prelude::vtrn1q_s8
- prelude::vtrn1q_u16
- prelude::vtrn1q_u32
- prelude::vtrn1q_u64
- prelude::vtrn1q_u8
- prelude::vtrn2_f16
- prelude::vtrn2_f32
- prelude::vtrn2_p16
- prelude::vtrn2_p8
- prelude::vtrn2_s16
- prelude::vtrn2_s32
- prelude::vtrn2_s8
- prelude::vtrn2_u16
- prelude::vtrn2_u32
- prelude::vtrn2_u8
- prelude::vtrn2q_f16
- prelude::vtrn2q_f32
- prelude::vtrn2q_f64
- prelude::vtrn2q_p16
- prelude::vtrn2q_p64
- prelude::vtrn2q_p8
- prelude::vtrn2q_s16
- prelude::vtrn2q_s32
- prelude::vtrn2q_s64
- prelude::vtrn2q_s8
- prelude::vtrn2q_u16
- prelude::vtrn2q_u32
- prelude::vtrn2q_u64
- prelude::vtrn2q_u8
- prelude::vtrn_f16
- prelude::vtrn_f32
- prelude::vtrn_p16
- prelude::vtrn_p8
- prelude::vtrn_s16
- prelude::vtrn_s32
- prelude::vtrn_s8
- prelude::vtrn_u16
- prelude::vtrn_u32
- prelude::vtrn_u8
- prelude::vtrnq_f16
- prelude::vtrnq_f32
- prelude::vtrnq_p16
- prelude::vtrnq_p8
- prelude::vtrnq_s16
- prelude::vtrnq_s32
- prelude::vtrnq_s8
- prelude::vtrnq_u16
- prelude::vtrnq_u32
- prelude::vtrnq_u8
- prelude::vtst_p16
- prelude::vtst_p64
- prelude::vtst_p8
- prelude::vtst_s16
- prelude::vtst_s32
- prelude::vtst_s64
- prelude::vtst_s8
- prelude::vtst_u16
- prelude::vtst_u32
- prelude::vtst_u64
- prelude::vtst_u8
- prelude::vtstd_s64
- prelude::vtstd_u64
- prelude::vtstq_p16
- prelude::vtstq_p64
- prelude::vtstq_p8
- prelude::vtstq_s16
- prelude::vtstq_s32
- prelude::vtstq_s64
- prelude::vtstq_s8
- prelude::vtstq_u16
- prelude::vtstq_u32
- prelude::vtstq_u64
- prelude::vtstq_u8
- prelude::vuqadd_s16
- prelude::vuqadd_s32
- prelude::vuqadd_s64
- prelude::vuqadd_s8
- prelude::vuqaddb_s8
- prelude::vuqaddd_s64
- prelude::vuqaddh_s16
- prelude::vuqaddq_s16
- prelude::vuqaddq_s32
- prelude::vuqaddq_s64
- prelude::vuqaddq_s8
- prelude::vuqadds_s32
- prelude::vusdot_lane_s32
- prelude::vusdot_laneq_s32
- prelude::vusdot_s32
- prelude::vusdotq_lane_s32
- prelude::vusdotq_laneq_s32
- prelude::vusdotq_s32
- prelude::vusmmlaq_s32
- prelude::vuzp1_f16
- prelude::vuzp1_f32
- prelude::vuzp1_p16
- prelude::vuzp1_p8
- prelude::vuzp1_s16
- prelude::vuzp1_s32
- prelude::vuzp1_s8
- prelude::vuzp1_u16
- prelude::vuzp1_u32
- prelude::vuzp1_u8
- prelude::vuzp1q_f16
- prelude::vuzp1q_f32
- prelude::vuzp1q_f64
- prelude::vuzp1q_p16
- prelude::vuzp1q_p64
- prelude::vuzp1q_p8
- prelude::vuzp1q_s16
- prelude::vuzp1q_s32
- prelude::vuzp1q_s64
- prelude::vuzp1q_s8
- prelude::vuzp1q_u16
- prelude::vuzp1q_u32
- prelude::vuzp1q_u64
- prelude::vuzp1q_u8
- prelude::vuzp2_f16
- prelude::vuzp2_f32
- prelude::vuzp2_p16
- prelude::vuzp2_p8
- prelude::vuzp2_s16
- prelude::vuzp2_s32
- prelude::vuzp2_s8
- prelude::vuzp2_u16
- prelude::vuzp2_u32
- prelude::vuzp2_u8
- prelude::vuzp2q_f16
- prelude::vuzp2q_f32
- prelude::vuzp2q_f64
- prelude::vuzp2q_p16
- prelude::vuzp2q_p64
- prelude::vuzp2q_p8
- prelude::vuzp2q_s16
- prelude::vuzp2q_s32
- prelude::vuzp2q_s64
- prelude::vuzp2q_s8
- prelude::vuzp2q_u16
- prelude::vuzp2q_u32
- prelude::vuzp2q_u64
- prelude::vuzp2q_u8
- prelude::vuzp_f16
- prelude::vuzp_f32
- prelude::vuzp_p16
- prelude::vuzp_p8
- prelude::vuzp_s16
- prelude::vuzp_s32
- prelude::vuzp_s8
- prelude::vuzp_u16
- prelude::vuzp_u32
- prelude::vuzp_u8
- prelude::vuzpq_f16
- prelude::vuzpq_f32
- prelude::vuzpq_p16
- prelude::vuzpq_p8
- prelude::vuzpq_s16
- prelude::vuzpq_s32
- prelude::vuzpq_s8
- prelude::vuzpq_u16
- prelude::vuzpq_u32
- prelude::vuzpq_u8
- prelude::vxarq_u64
- prelude::vzip1_f16
- prelude::vzip1_f32
- prelude::vzip1_p16
- prelude::vzip1_p8
- prelude::vzip1_s16
- prelude::vzip1_s32
- prelude::vzip1_s8
- prelude::vzip1_u16
- prelude::vzip1_u32
- prelude::vzip1_u8
- prelude::vzip1q_f16
- prelude::vzip1q_f32
- prelude::vzip1q_f64
- prelude::vzip1q_p16
- prelude::vzip1q_p64
- prelude::vzip1q_p8
- prelude::vzip1q_s16
- prelude::vzip1q_s32
- prelude::vzip1q_s64
- prelude::vzip1q_s8
- prelude::vzip1q_u16
- prelude::vzip1q_u32
- prelude::vzip1q_u64
- prelude::vzip1q_u8
- prelude::vzip2_f16
- prelude::vzip2_f32
- prelude::vzip2_p16
- prelude::vzip2_p8
- prelude::vzip2_s16
- prelude::vzip2_s32
- prelude::vzip2_s8
- prelude::vzip2_u16
- prelude::vzip2_u32
- prelude::vzip2_u8
- prelude::vzip2q_f16
- prelude::vzip2q_f32
- prelude::vzip2q_f64
- prelude::vzip2q_p16
- prelude::vzip2q_p64
- prelude::vzip2q_p8
- prelude::vzip2q_s16
- prelude::vzip2q_s32
- prelude::vzip2q_s64
- prelude::vzip2q_s8
- prelude::vzip2q_u16
- prelude::vzip2q_u32
- prelude::vzip2q_u64
- prelude::vzip2q_u8
- prelude::vzip_f16
- prelude::vzip_f32
- prelude::vzip_p16
- prelude::vzip_p8
- prelude::vzip_s16
- prelude::vzip_s32
- prelude::vzip_s8
- prelude::vzip_u16
- prelude::vzip_u32
- prelude::vzip_u8
- prelude::vzipq_f16
- prelude::vzipq_f32
- prelude::vzipq_p16
- prelude::vzipq_p8
- prelude::vzipq_s16
- prelude::vzipq_s32
- prelude::vzipq_s8
- prelude::vzipq_u16
- prelude::vzipq_u32
- prelude::vzipq_u8
- testing::for_each_token_permutation
- testing::lock_token_testing
- tokens::dangerously_disable_tokens_except_wasm
Type Aliases
- tokens::Arm64
- tokens::Avx2FmaToken
- tokens::Avx512ModernToken
- tokens::Avx512Token
- tokens::Desktop64
- tokens::Server64
- tokens::Sse2Token
Constants
- intrinsics::aarch64::_PREFETCH_LOCALITY0
- intrinsics::aarch64::_PREFETCH_LOCALITY1
- intrinsics::aarch64::_PREFETCH_LOCALITY2
- intrinsics::aarch64::_PREFETCH_LOCALITY3
- intrinsics::aarch64::_PREFETCH_READ
- intrinsics::aarch64::_PREFETCH_WRITE
- prelude::_PREFETCH_LOCALITY0
- prelude::_PREFETCH_LOCALITY1
- prelude::_PREFETCH_LOCALITY2
- prelude::_PREFETCH_LOCALITY3
- prelude::_PREFETCH_READ
- prelude::_PREFETCH_WRITE