amdgpu_sysfs/gpu_handle/
power_levels.rs

1#[cfg(feature = "serde")]
2use serde::{Deserialize, Serialize};
3
4/// List of power levels.
5#[derive(Debug, Clone, PartialEq, Eq, Default)]
6#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
7pub struct PowerLevels<T> {
8    /// List of possible levels.
9    pub levels: Vec<PowerLevel<T>>,
10    /// The currently active level.
11    pub active: Option<PowerLevelId>,
12}
13
14impl<T> PowerLevels<T> {
15    /// Gets the currently active level value.
16    pub fn active_level(&self) -> Option<&T> {
17        self.active.and_then(|active| {
18            self.levels
19                .iter()
20                .find(|level| level.id == active)
21                .map(|level| &level.value)
22        })
23    }
24}
25
26/// Single power level row.
27#[derive(Debug, Clone, PartialEq, Eq)]
28#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
29pub struct PowerLevel<T> {
30    /// Printed sysfs level identifier.
31    pub id: PowerLevelId,
32    /// Level value.
33    pub value: T,
34}
35
36macro_rules! impl_get_clocks_levels {
37    ($name:ident, $level:expr, $out:ty) => {
38        /// Gets clocks levels.
39        pub fn $name(&self) -> Result<PowerLevels<$out>> {
40            self.get_clock_levels($level)
41        }
42    };
43}
44
45/// Identifier of a power level.
46#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
47#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
48pub enum PowerLevelId {
49    /// Numeric power level index.
50    Index(u8),
51    /// Deep sleep power level.
52    Sleep,
53}
54
55/// Type of a power level.
56#[allow(missing_docs)]
57#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
58#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
59#[cfg_attr(feature = "serde", serde(rename_all = "snake_case"))]
60pub enum PowerLevelKind {
61    CoreClock,
62    MemoryClock,
63    SOCClock,
64    FabricClock,
65    DCEFClock,
66    PcieSpeed,
67}
68
69impl PowerLevelKind {
70    /// Gets the filename of a given power level kind.
71    pub fn filename(&self) -> &str {
72        use PowerLevelKind::*;
73        match self {
74            CoreClock => "pp_dpm_sclk",
75            MemoryClock => "pp_dpm_mclk",
76            SOCClock => "pp_dpm_socclk",
77            FabricClock => "pp_dpm_fclk",
78            DCEFClock => "pp_dpm_dcefclk",
79            PcieSpeed => "pp_dpm_pcie",
80        }
81    }
82
83    /// Suffix of the power level value
84    pub fn value_suffix(&self) -> Option<&str> {
85        use PowerLevelKind::*;
86        match self {
87            CoreClock | MemoryClock | SOCClock | FabricClock | DCEFClock => Some("mhz"),
88            PcieSpeed => None,
89        }
90    }
91}
amdgpu_sysfs/gpu_handle/power_levels.rs

amdgpu_sysfs/gpu_handle/
power_levels.rs
