amdgpu_sysfs/gpu_handle/
power_levels.rs1#[cfg(feature = "serde")]
2use serde::{Deserialize, Serialize};
3
4#[derive(Debug, Clone, PartialEq, Eq, Default)]
6#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
7pub struct PowerLevels<T> {
8 pub levels: Vec<T>,
10 pub active: Option<usize>,
12}
13
14impl<T> PowerLevels<T> {
15 pub fn active_level(&self) -> Option<&T> {
17 self.active.and_then(|active| self.levels.get(active))
18 }
19}
20
21macro_rules! impl_get_clocks_levels {
22 ($name:ident, $level:expr, $out:ty) => {
23 pub fn $name(&self) -> Result<PowerLevels<$out>> {
25 self.get_clock_levels($level)
26 }
27 };
28}
29
30#[allow(missing_docs)]
32#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
33#[cfg_attr(feature = "serde", derive(Serialize, Deserialize))]
34#[cfg_attr(feature = "serde", serde(rename_all = "snake_case"))]
35pub enum PowerLevelKind {
36 CoreClock,
37 MemoryClock,
38 SOCClock,
39 FabricClock,
40 DCEFClock,
41 PcieSpeed,
42}
43
44impl PowerLevelKind {
45 pub fn filename(&self) -> &str {
47 use PowerLevelKind::*;
48 match self {
49 CoreClock => "pp_dpm_sclk",
50 MemoryClock => "pp_dpm_mclk",
51 SOCClock => "pp_dpm_socclk",
52 FabricClock => "pp_dpm_fclk",
53 DCEFClock => "pp_dpm_dcefclk",
54 PcieSpeed => "pp_dpm_pcie",
55 }
56 }
57
58 pub fn value_suffix(&self) -> Option<&str> {
60 use PowerLevelKind::*;
61 match self {
62 CoreClock | MemoryClock | SOCClock | FabricClock | DCEFClock => Some("mhz"),
63 PcieSpeed => None,
64 }
65 }
66}