ambiq_apollo4p_pac/crypto/
opcode.rs

1#[doc = "Register `OPCODE` reader"]
2pub type R = crate::R<OpcodeSpec>;
3#[doc = "Register `OPCODE` writer"]
4pub type W = crate::W<OpcodeSpec>;
5#[doc = "Field `TAG` reader - Holds the operations tag or the operand C virtual address."]
6pub type TagR = crate::FieldReader;
7#[doc = "Field `TAG` writer - Holds the operations tag or the operand C virtual address."]
8pub type TagW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
9#[doc = "Field `REGR` reader - Result register virtual address 0-15."]
10pub type RegrR = crate::FieldReader;
11#[doc = "Field `REGR` writer - Result register virtual address 0-15."]
12pub type RegrW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
13#[doc = "Field `REGB` reader - Operand B virtual address 0-15."]
14pub type RegbR = crate::FieldReader;
15#[doc = "Field `REGB` writer - Operand B virtual address 0-15."]
16pub type RegbW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
17#[doc = "Field `REGA` reader - Operand A virtual address 0-15."]
18pub type RegaR = crate::FieldReader;
19#[doc = "Field `REGA` writer - Operand A virtual address 0-15."]
20pub type RegaW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
21#[doc = "Field `LEN` reader - The length of the operation. The value serves as a pointer to PKA length register, for example, if the value is 0, PKA_L0 holds the size of the operation."]
22pub type LenR = crate::FieldReader;
23#[doc = "Field `LEN` writer - The length of the operation. The value serves as a pointer to PKA length register, for example, if the value is 0, PKA_L0 holds the size of the operation."]
24pub type LenW<'a, REG> = crate::FieldWriter<'a, REG, 3>;
25#[doc = "Defines the PKA operation:\n\nValue on reset: 0"]
26#[derive(Clone, Copy, Debug, PartialEq, Eq)]
27#[repr(u8)]
28pub enum Opcode {
29    #[doc = "4: Add,Inc opcode"]
30    Add = 4,
31    #[doc = "5: Sub,Dec,Neg opcode"]
32    Sub = 5,
33    #[doc = "6: ModAdd,ModInc opcode"]
34    Modadd = 6,
35    #[doc = "7: ModSub,ModDec,ModNeg opcode"]
36    Modsub = 7,
37    #[doc = "8: AND,TST0,CLR0 opcode"]
38    And = 8,
39    #[doc = "9: OR,COPY,SET0 opcode"]
40    Or = 9,
41    #[doc = "10: XOR,FLIP0,INVERT,COMPARE opcode"]
42    Xor = 10,
43    #[doc = "12: SHR0 opcode"]
44    Shr0 = 12,
45    #[doc = "13: SHR1 opcode"]
46    Shr1 = 13,
47    #[doc = "14: SHL0 opcode"]
48    Shl0 = 14,
49    #[doc = "15: SHL1 opcode"]
50    Shl1 = 15,
51    #[doc = "16: MulLow opcode"]
52    Mullow = 16,
53    #[doc = "17: ModMul opcode"]
54    Modmul = 17,
55    #[doc = "18: ModMulN opcode"]
56    Modmuln = 18,
57    #[doc = "19: ModExp opcode"]
58    Modexp = 19,
59    #[doc = "20: Division opcode"]
60    Division = 20,
61    #[doc = "21: Div opcode"]
62    Div = 21,
63    #[doc = "22: ModDiv opcode"]
64    Moddiv = 22,
65    #[doc = "0: Terminate opcode"]
66    Terminate = 0,
67}
68impl From<Opcode> for u8 {
69    #[inline(always)]
70    fn from(variant: Opcode) -> Self {
71        variant as _
72    }
73}
74impl crate::FieldSpec for Opcode {
75    type Ux = u8;
76}
77impl crate::IsEnum for Opcode {}
78#[doc = "Field `OPCODE` reader - Defines the PKA operation:"]
79pub type OpcodeR = crate::FieldReader<Opcode>;
80impl OpcodeR {
81    #[doc = "Get enumerated values variant"]
82    #[inline(always)]
83    pub const fn variant(&self) -> Option<Opcode> {
84        match self.bits {
85            4 => Some(Opcode::Add),
86            5 => Some(Opcode::Sub),
87            6 => Some(Opcode::Modadd),
88            7 => Some(Opcode::Modsub),
89            8 => Some(Opcode::And),
90            9 => Some(Opcode::Or),
91            10 => Some(Opcode::Xor),
92            12 => Some(Opcode::Shr0),
93            13 => Some(Opcode::Shr1),
94            14 => Some(Opcode::Shl0),
95            15 => Some(Opcode::Shl1),
96            16 => Some(Opcode::Mullow),
97            17 => Some(Opcode::Modmul),
98            18 => Some(Opcode::Modmuln),
99            19 => Some(Opcode::Modexp),
100            20 => Some(Opcode::Division),
101            21 => Some(Opcode::Div),
102            22 => Some(Opcode::Moddiv),
103            0 => Some(Opcode::Terminate),
104            _ => None,
105        }
106    }
107    #[doc = "Add,Inc opcode"]
108    #[inline(always)]
109    pub fn is_add(&self) -> bool {
110        *self == Opcode::Add
111    }
112    #[doc = "Sub,Dec,Neg opcode"]
113    #[inline(always)]
114    pub fn is_sub(&self) -> bool {
115        *self == Opcode::Sub
116    }
117    #[doc = "ModAdd,ModInc opcode"]
118    #[inline(always)]
119    pub fn is_modadd(&self) -> bool {
120        *self == Opcode::Modadd
121    }
122    #[doc = "ModSub,ModDec,ModNeg opcode"]
123    #[inline(always)]
124    pub fn is_modsub(&self) -> bool {
125        *self == Opcode::Modsub
126    }
127    #[doc = "AND,TST0,CLR0 opcode"]
128    #[inline(always)]
129    pub fn is_and(&self) -> bool {
130        *self == Opcode::And
131    }
132    #[doc = "OR,COPY,SET0 opcode"]
133    #[inline(always)]
134    pub fn is_or(&self) -> bool {
135        *self == Opcode::Or
136    }
137    #[doc = "XOR,FLIP0,INVERT,COMPARE opcode"]
138    #[inline(always)]
139    pub fn is_xor(&self) -> bool {
140        *self == Opcode::Xor
141    }
142    #[doc = "SHR0 opcode"]
143    #[inline(always)]
144    pub fn is_shr0(&self) -> bool {
145        *self == Opcode::Shr0
146    }
147    #[doc = "SHR1 opcode"]
148    #[inline(always)]
149    pub fn is_shr1(&self) -> bool {
150        *self == Opcode::Shr1
151    }
152    #[doc = "SHL0 opcode"]
153    #[inline(always)]
154    pub fn is_shl0(&self) -> bool {
155        *self == Opcode::Shl0
156    }
157    #[doc = "SHL1 opcode"]
158    #[inline(always)]
159    pub fn is_shl1(&self) -> bool {
160        *self == Opcode::Shl1
161    }
162    #[doc = "MulLow opcode"]
163    #[inline(always)]
164    pub fn is_mullow(&self) -> bool {
165        *self == Opcode::Mullow
166    }
167    #[doc = "ModMul opcode"]
168    #[inline(always)]
169    pub fn is_modmul(&self) -> bool {
170        *self == Opcode::Modmul
171    }
172    #[doc = "ModMulN opcode"]
173    #[inline(always)]
174    pub fn is_modmuln(&self) -> bool {
175        *self == Opcode::Modmuln
176    }
177    #[doc = "ModExp opcode"]
178    #[inline(always)]
179    pub fn is_modexp(&self) -> bool {
180        *self == Opcode::Modexp
181    }
182    #[doc = "Division opcode"]
183    #[inline(always)]
184    pub fn is_division(&self) -> bool {
185        *self == Opcode::Division
186    }
187    #[doc = "Div opcode"]
188    #[inline(always)]
189    pub fn is_div(&self) -> bool {
190        *self == Opcode::Div
191    }
192    #[doc = "ModDiv opcode"]
193    #[inline(always)]
194    pub fn is_moddiv(&self) -> bool {
195        *self == Opcode::Moddiv
196    }
197    #[doc = "Terminate opcode"]
198    #[inline(always)]
199    pub fn is_terminate(&self) -> bool {
200        *self == Opcode::Terminate
201    }
202}
203#[doc = "Field `OPCODE` writer - Defines the PKA operation:"]
204pub type OpcodeW<'a, REG> = crate::FieldWriter<'a, REG, 5, Opcode>;
205impl<'a, REG> OpcodeW<'a, REG>
206where
207    REG: crate::Writable + crate::RegisterSpec,
208    REG::Ux: From<u8>,
209{
210    #[doc = "Add,Inc opcode"]
211    #[inline(always)]
212    pub fn add(self) -> &'a mut crate::W<REG> {
213        self.variant(Opcode::Add)
214    }
215    #[doc = "Sub,Dec,Neg opcode"]
216    #[inline(always)]
217    pub fn sub(self) -> &'a mut crate::W<REG> {
218        self.variant(Opcode::Sub)
219    }
220    #[doc = "ModAdd,ModInc opcode"]
221    #[inline(always)]
222    pub fn modadd(self) -> &'a mut crate::W<REG> {
223        self.variant(Opcode::Modadd)
224    }
225    #[doc = "ModSub,ModDec,ModNeg opcode"]
226    #[inline(always)]
227    pub fn modsub(self) -> &'a mut crate::W<REG> {
228        self.variant(Opcode::Modsub)
229    }
230    #[doc = "AND,TST0,CLR0 opcode"]
231    #[inline(always)]
232    pub fn and(self) -> &'a mut crate::W<REG> {
233        self.variant(Opcode::And)
234    }
235    #[doc = "OR,COPY,SET0 opcode"]
236    #[inline(always)]
237    pub fn or(self) -> &'a mut crate::W<REG> {
238        self.variant(Opcode::Or)
239    }
240    #[doc = "XOR,FLIP0,INVERT,COMPARE opcode"]
241    #[inline(always)]
242    pub fn xor(self) -> &'a mut crate::W<REG> {
243        self.variant(Opcode::Xor)
244    }
245    #[doc = "SHR0 opcode"]
246    #[inline(always)]
247    pub fn shr0(self) -> &'a mut crate::W<REG> {
248        self.variant(Opcode::Shr0)
249    }
250    #[doc = "SHR1 opcode"]
251    #[inline(always)]
252    pub fn shr1(self) -> &'a mut crate::W<REG> {
253        self.variant(Opcode::Shr1)
254    }
255    #[doc = "SHL0 opcode"]
256    #[inline(always)]
257    pub fn shl0(self) -> &'a mut crate::W<REG> {
258        self.variant(Opcode::Shl0)
259    }
260    #[doc = "SHL1 opcode"]
261    #[inline(always)]
262    pub fn shl1(self) -> &'a mut crate::W<REG> {
263        self.variant(Opcode::Shl1)
264    }
265    #[doc = "MulLow opcode"]
266    #[inline(always)]
267    pub fn mullow(self) -> &'a mut crate::W<REG> {
268        self.variant(Opcode::Mullow)
269    }
270    #[doc = "ModMul opcode"]
271    #[inline(always)]
272    pub fn modmul(self) -> &'a mut crate::W<REG> {
273        self.variant(Opcode::Modmul)
274    }
275    #[doc = "ModMulN opcode"]
276    #[inline(always)]
277    pub fn modmuln(self) -> &'a mut crate::W<REG> {
278        self.variant(Opcode::Modmuln)
279    }
280    #[doc = "ModExp opcode"]
281    #[inline(always)]
282    pub fn modexp(self) -> &'a mut crate::W<REG> {
283        self.variant(Opcode::Modexp)
284    }
285    #[doc = "Division opcode"]
286    #[inline(always)]
287    pub fn division(self) -> &'a mut crate::W<REG> {
288        self.variant(Opcode::Division)
289    }
290    #[doc = "Div opcode"]
291    #[inline(always)]
292    pub fn div(self) -> &'a mut crate::W<REG> {
293        self.variant(Opcode::Div)
294    }
295    #[doc = "ModDiv opcode"]
296    #[inline(always)]
297    pub fn moddiv(self) -> &'a mut crate::W<REG> {
298        self.variant(Opcode::Moddiv)
299    }
300    #[doc = "Terminate opcode"]
301    #[inline(always)]
302    pub fn terminate(self) -> &'a mut crate::W<REG> {
303        self.variant(Opcode::Terminate)
304    }
305}
306impl R {
307    #[doc = "Bits 0:5 - Holds the operations tag or the operand C virtual address."]
308    #[inline(always)]
309    pub fn tag(&self) -> TagR {
310        TagR::new((self.bits & 0x3f) as u8)
311    }
312    #[doc = "Bits 6:11 - Result register virtual address 0-15."]
313    #[inline(always)]
314    pub fn regr(&self) -> RegrR {
315        RegrR::new(((self.bits >> 6) & 0x3f) as u8)
316    }
317    #[doc = "Bits 12:17 - Operand B virtual address 0-15."]
318    #[inline(always)]
319    pub fn regb(&self) -> RegbR {
320        RegbR::new(((self.bits >> 12) & 0x3f) as u8)
321    }
322    #[doc = "Bits 18:23 - Operand A virtual address 0-15."]
323    #[inline(always)]
324    pub fn rega(&self) -> RegaR {
325        RegaR::new(((self.bits >> 18) & 0x3f) as u8)
326    }
327    #[doc = "Bits 24:26 - The length of the operation. The value serves as a pointer to PKA length register, for example, if the value is 0, PKA_L0 holds the size of the operation."]
328    #[inline(always)]
329    pub fn len(&self) -> LenR {
330        LenR::new(((self.bits >> 24) & 7) as u8)
331    }
332    #[doc = "Bits 27:31 - Defines the PKA operation:"]
333    #[inline(always)]
334    pub fn opcode(&self) -> OpcodeR {
335        OpcodeR::new(((self.bits >> 27) & 0x1f) as u8)
336    }
337}
338impl W {
339    #[doc = "Bits 0:5 - Holds the operations tag or the operand C virtual address."]
340    #[inline(always)]
341    #[must_use]
342    pub fn tag(&mut self) -> TagW<OpcodeSpec> {
343        TagW::new(self, 0)
344    }
345    #[doc = "Bits 6:11 - Result register virtual address 0-15."]
346    #[inline(always)]
347    #[must_use]
348    pub fn regr(&mut self) -> RegrW<OpcodeSpec> {
349        RegrW::new(self, 6)
350    }
351    #[doc = "Bits 12:17 - Operand B virtual address 0-15."]
352    #[inline(always)]
353    #[must_use]
354    pub fn regb(&mut self) -> RegbW<OpcodeSpec> {
355        RegbW::new(self, 12)
356    }
357    #[doc = "Bits 18:23 - Operand A virtual address 0-15."]
358    #[inline(always)]
359    #[must_use]
360    pub fn rega(&mut self) -> RegaW<OpcodeSpec> {
361        RegaW::new(self, 18)
362    }
363    #[doc = "Bits 24:26 - The length of the operation. The value serves as a pointer to PKA length register, for example, if the value is 0, PKA_L0 holds the size of the operation."]
364    #[inline(always)]
365    #[must_use]
366    pub fn len(&mut self) -> LenW<OpcodeSpec> {
367        LenW::new(self, 24)
368    }
369    #[doc = "Bits 27:31 - Defines the PKA operation:"]
370    #[inline(always)]
371    #[must_use]
372    pub fn opcode(&mut self) -> OpcodeW<OpcodeSpec> {
373        OpcodeW::new(self, 27)
374    }
375}
376#[doc = "This register holds the PKAs OPCODE.\n\nYou can [`read`](crate::Reg::read) this register and get [`opcode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`opcode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
377pub struct OpcodeSpec;
378impl crate::RegisterSpec for OpcodeSpec {
379    type Ux = u32;
380}
381#[doc = "`read()` method returns [`opcode::R`](R) reader structure"]
382impl crate::Readable for OpcodeSpec {}
383#[doc = "`write(|w| ..)` method takes [`opcode::W`](W) writer structure"]
384impl crate::Writable for OpcodeSpec {
385    type Safety = crate::Unsafe;
386    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
387    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
388}
389#[doc = "`reset()` method sets OPCODE to value 0"]
390impl crate::Resettable for OpcodeSpec {
391    const RESET_VALUE: u32 = 0;
392}
ambiq_apollo4p_pac/crypto/opcode.rs

ambiq_apollo4p_pac/crypto/
opcode.rs
