[−][src]Module ambiq_apollo3p_pac::mspi0::cfg

MSPI Transfer Configuration

Structs

ASIZE_W	Write proxy for field `ASIZE`
CPHA_W	Write proxy for field `CPHA`
CPOL_W	Write proxy for field `CPOL`
DEVCFG_W	Write proxy for field `DEVCFG`
ISIZE_W	Write proxy for field `ISIZE`
SEPIO_W	Write proxy for field `SEPIO`
TURNAROUND_W	Write proxy for field `TURNAROUND`
WRITELATENCY_W	Write proxy for field `WRITELATENCY`

ASIZE_A	Address Size. Address bytes to send from ADDR register
CPHA_A	Serial clock phase.
CPOL_A	Serial clock polarity.
DEVCFG_A	Flash configuration for XIP and AUTO DMA operations. Controls value for SER (Slave Enable) for XIP operations and address generation for DMA/XIP modes. Also used to configure SPIFRF (frame format).

ASIZE_R	Reader of field `ASIZE`
CPHA_R	Reader of field `CPHA`
CPOL_R	Reader of field `CPOL`
DEVCFG_R	Reader of field `DEVCFG`
ISIZE_R	Reader of field `ISIZE`
R	Reader of register CFG
SEPIO_R	Reader of field `SEPIO`
TURNAROUND_R	Reader of field `TURNAROUND`
W	Writer for register CFG
WRITELATENCY_R	Reader of field `WRITELATENCY`