ambiq_apollo3_pac/cachectrl/ctrl/
mod.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CTRL {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct FLASH1_SLM_ENABLER {
47 bits: bool,
48}
49impl FLASH1_SLM_ENABLER {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Value of the field"]
67pub struct FLASH1_SLM_DISABLER {
68 bits: bool,
69}
70impl FLASH1_SLM_DISABLER {
71 #[doc = r" Value of the field as raw bits"]
72 #[inline]
73 pub fn bit(&self) -> bool {
74 self.bits
75 }
76 #[doc = r" Returns `true` if the bit is clear (0)"]
77 #[inline]
78 pub fn bit_is_clear(&self) -> bool {
79 !self.bit()
80 }
81 #[doc = r" Returns `true` if the bit is set (1)"]
82 #[inline]
83 pub fn bit_is_set(&self) -> bool {
84 self.bit()
85 }
86}
87#[doc = r" Value of the field"]
88pub struct FLASH1_SLM_STATUSR {
89 bits: bool,
90}
91impl FLASH1_SLM_STATUSR {
92 #[doc = r" Value of the field as raw bits"]
93 #[inline]
94 pub fn bit(&self) -> bool {
95 self.bits
96 }
97 #[doc = r" Returns `true` if the bit is clear (0)"]
98 #[inline]
99 pub fn bit_is_clear(&self) -> bool {
100 !self.bit()
101 }
102 #[doc = r" Returns `true` if the bit is set (1)"]
103 #[inline]
104 pub fn bit_is_set(&self) -> bool {
105 self.bit()
106 }
107}
108#[doc = r" Value of the field"]
109pub struct FLASH0_SLM_ENABLER {
110 bits: bool,
111}
112impl FLASH0_SLM_ENABLER {
113 #[doc = r" Value of the field as raw bits"]
114 #[inline]
115 pub fn bit(&self) -> bool {
116 self.bits
117 }
118 #[doc = r" Returns `true` if the bit is clear (0)"]
119 #[inline]
120 pub fn bit_is_clear(&self) -> bool {
121 !self.bit()
122 }
123 #[doc = r" Returns `true` if the bit is set (1)"]
124 #[inline]
125 pub fn bit_is_set(&self) -> bool {
126 self.bit()
127 }
128}
129#[doc = r" Value of the field"]
130pub struct FLASH0_SLM_DISABLER {
131 bits: bool,
132}
133impl FLASH0_SLM_DISABLER {
134 #[doc = r" Value of the field as raw bits"]
135 #[inline]
136 pub fn bit(&self) -> bool {
137 self.bits
138 }
139 #[doc = r" Returns `true` if the bit is clear (0)"]
140 #[inline]
141 pub fn bit_is_clear(&self) -> bool {
142 !self.bit()
143 }
144 #[doc = r" Returns `true` if the bit is set (1)"]
145 #[inline]
146 pub fn bit_is_set(&self) -> bool {
147 self.bit()
148 }
149}
150#[doc = r" Value of the field"]
151pub struct FLASH0_SLM_STATUSR {
152 bits: bool,
153}
154impl FLASH0_SLM_STATUSR {
155 #[doc = r" Value of the field as raw bits"]
156 #[inline]
157 pub fn bit(&self) -> bool {
158 self.bits
159 }
160 #[doc = r" Returns `true` if the bit is clear (0)"]
161 #[inline]
162 pub fn bit_is_clear(&self) -> bool {
163 !self.bit()
164 }
165 #[doc = r" Returns `true` if the bit is set (1)"]
166 #[inline]
167 pub fn bit_is_set(&self) -> bool {
168 self.bit()
169 }
170}
171#[doc = r" Value of the field"]
172pub struct CACHE_READYR {
173 bits: bool,
174}
175impl CACHE_READYR {
176 #[doc = r" Value of the field as raw bits"]
177 #[inline]
178 pub fn bit(&self) -> bool {
179 self.bits
180 }
181 #[doc = r" Returns `true` if the bit is clear (0)"]
182 #[inline]
183 pub fn bit_is_clear(&self) -> bool {
184 !self.bit()
185 }
186 #[doc = r" Returns `true` if the bit is set (1)"]
187 #[inline]
188 pub fn bit_is_set(&self) -> bool {
189 self.bit()
190 }
191}
192#[doc = "Possible values of the field `RESET_STAT`"]
193#[derive(Clone, Copy, Debug, PartialEq)]
194pub enum RESET_STATR {
195 #[doc = "Clear Cache Stats value."]
196 CLEAR,
197 #[doc = r" Reserved"]
198 _Reserved(bool),
199}
200impl RESET_STATR {
201 #[doc = r" Returns `true` if the bit is clear (0)"]
202 #[inline]
203 pub fn bit_is_clear(&self) -> bool {
204 !self.bit()
205 }
206 #[doc = r" Returns `true` if the bit is set (1)"]
207 #[inline]
208 pub fn bit_is_set(&self) -> bool {
209 self.bit()
210 }
211 #[doc = r" Value of the field as raw bits"]
212 #[inline]
213 pub fn bit(&self) -> bool {
214 match *self {
215 RESET_STATR::CLEAR => true,
216 RESET_STATR::_Reserved(bits) => bits,
217 }
218 }
219 #[allow(missing_docs)]
220 #[doc(hidden)]
221 #[inline]
222 pub fn _from(value: bool) -> RESET_STATR {
223 match value {
224 true => RESET_STATR::CLEAR,
225 i => RESET_STATR::_Reserved(i),
226 }
227 }
228 #[doc = "Checks if the value of the field is `CLEAR`"]
229 #[inline]
230 pub fn is_clear(&self) -> bool {
231 *self == RESET_STATR::CLEAR
232 }
233}
234#[doc = r" Value of the field"]
235pub struct INVALIDATER {
236 bits: bool,
237}
238impl INVALIDATER {
239 #[doc = r" Value of the field as raw bits"]
240 #[inline]
241 pub fn bit(&self) -> bool {
242 self.bits
243 }
244 #[doc = r" Returns `true` if the bit is clear (0)"]
245 #[inline]
246 pub fn bit_is_clear(&self) -> bool {
247 !self.bit()
248 }
249 #[doc = r" Returns `true` if the bit is set (1)"]
250 #[inline]
251 pub fn bit_is_set(&self) -> bool {
252 self.bit()
253 }
254}
255#[doc = r" Proxy"]
256pub struct _FLASH1_SLM_ENABLEW<'a> {
257 w: &'a mut W,
258}
259impl<'a> _FLASH1_SLM_ENABLEW<'a> {
260 #[doc = r" Sets the field bit"]
261 pub fn set_bit(self) -> &'a mut W {
262 self.bit(true)
263 }
264 #[doc = r" Clears the field bit"]
265 pub fn clear_bit(self) -> &'a mut W {
266 self.bit(false)
267 }
268 #[doc = r" Writes raw bits to the field"]
269 #[inline]
270 pub fn bit(self, value: bool) -> &'a mut W {
271 const MASK: bool = true;
272 const OFFSET: u8 = 10;
273 self.w.bits &= !((MASK as u32) << OFFSET);
274 self.w.bits |= ((value & MASK) as u32) << OFFSET;
275 self.w
276 }
277}
278#[doc = r" Proxy"]
279pub struct _FLASH1_SLM_DISABLEW<'a> {
280 w: &'a mut W,
281}
282impl<'a> _FLASH1_SLM_DISABLEW<'a> {
283 #[doc = r" Sets the field bit"]
284 pub fn set_bit(self) -> &'a mut W {
285 self.bit(true)
286 }
287 #[doc = r" Clears the field bit"]
288 pub fn clear_bit(self) -> &'a mut W {
289 self.bit(false)
290 }
291 #[doc = r" Writes raw bits to the field"]
292 #[inline]
293 pub fn bit(self, value: bool) -> &'a mut W {
294 const MASK: bool = true;
295 const OFFSET: u8 = 9;
296 self.w.bits &= !((MASK as u32) << OFFSET);
297 self.w.bits |= ((value & MASK) as u32) << OFFSET;
298 self.w
299 }
300}
301#[doc = r" Proxy"]
302pub struct _FLASH1_SLM_STATUSW<'a> {
303 w: &'a mut W,
304}
305impl<'a> _FLASH1_SLM_STATUSW<'a> {
306 #[doc = r" Sets the field bit"]
307 pub fn set_bit(self) -> &'a mut W {
308 self.bit(true)
309 }
310 #[doc = r" Clears the field bit"]
311 pub fn clear_bit(self) -> &'a mut W {
312 self.bit(false)
313 }
314 #[doc = r" Writes raw bits to the field"]
315 #[inline]
316 pub fn bit(self, value: bool) -> &'a mut W {
317 const MASK: bool = true;
318 const OFFSET: u8 = 8;
319 self.w.bits &= !((MASK as u32) << OFFSET);
320 self.w.bits |= ((value & MASK) as u32) << OFFSET;
321 self.w
322 }
323}
324#[doc = r" Proxy"]
325pub struct _FLASH0_SLM_ENABLEW<'a> {
326 w: &'a mut W,
327}
328impl<'a> _FLASH0_SLM_ENABLEW<'a> {
329 #[doc = r" Sets the field bit"]
330 pub fn set_bit(self) -> &'a mut W {
331 self.bit(true)
332 }
333 #[doc = r" Clears the field bit"]
334 pub fn clear_bit(self) -> &'a mut W {
335 self.bit(false)
336 }
337 #[doc = r" Writes raw bits to the field"]
338 #[inline]
339 pub fn bit(self, value: bool) -> &'a mut W {
340 const MASK: bool = true;
341 const OFFSET: u8 = 6;
342 self.w.bits &= !((MASK as u32) << OFFSET);
343 self.w.bits |= ((value & MASK) as u32) << OFFSET;
344 self.w
345 }
346}
347#[doc = r" Proxy"]
348pub struct _FLASH0_SLM_DISABLEW<'a> {
349 w: &'a mut W,
350}
351impl<'a> _FLASH0_SLM_DISABLEW<'a> {
352 #[doc = r" Sets the field bit"]
353 pub fn set_bit(self) -> &'a mut W {
354 self.bit(true)
355 }
356 #[doc = r" Clears the field bit"]
357 pub fn clear_bit(self) -> &'a mut W {
358 self.bit(false)
359 }
360 #[doc = r" Writes raw bits to the field"]
361 #[inline]
362 pub fn bit(self, value: bool) -> &'a mut W {
363 const MASK: bool = true;
364 const OFFSET: u8 = 5;
365 self.w.bits &= !((MASK as u32) << OFFSET);
366 self.w.bits |= ((value & MASK) as u32) << OFFSET;
367 self.w
368 }
369}
370#[doc = r" Proxy"]
371pub struct _FLASH0_SLM_STATUSW<'a> {
372 w: &'a mut W,
373}
374impl<'a> _FLASH0_SLM_STATUSW<'a> {
375 #[doc = r" Sets the field bit"]
376 pub fn set_bit(self) -> &'a mut W {
377 self.bit(true)
378 }
379 #[doc = r" Clears the field bit"]
380 pub fn clear_bit(self) -> &'a mut W {
381 self.bit(false)
382 }
383 #[doc = r" Writes raw bits to the field"]
384 #[inline]
385 pub fn bit(self, value: bool) -> &'a mut W {
386 const MASK: bool = true;
387 const OFFSET: u8 = 4;
388 self.w.bits &= !((MASK as u32) << OFFSET);
389 self.w.bits |= ((value & MASK) as u32) << OFFSET;
390 self.w
391 }
392}
393#[doc = r" Proxy"]
394pub struct _CACHE_READYW<'a> {
395 w: &'a mut W,
396}
397impl<'a> _CACHE_READYW<'a> {
398 #[doc = r" Sets the field bit"]
399 pub fn set_bit(self) -> &'a mut W {
400 self.bit(true)
401 }
402 #[doc = r" Clears the field bit"]
403 pub fn clear_bit(self) -> &'a mut W {
404 self.bit(false)
405 }
406 #[doc = r" Writes raw bits to the field"]
407 #[inline]
408 pub fn bit(self, value: bool) -> &'a mut W {
409 const MASK: bool = true;
410 const OFFSET: u8 = 2;
411 self.w.bits &= !((MASK as u32) << OFFSET);
412 self.w.bits |= ((value & MASK) as u32) << OFFSET;
413 self.w
414 }
415}
416#[doc = "Values that can be written to the field `RESET_STAT`"]
417pub enum RESET_STATW {
418 #[doc = "Clear Cache Stats value."]
419 CLEAR,
420}
421impl RESET_STATW {
422 #[allow(missing_docs)]
423 #[doc(hidden)]
424 #[inline]
425 pub fn _bits(&self) -> bool {
426 match *self {
427 RESET_STATW::CLEAR => true,
428 }
429 }
430}
431#[doc = r" Proxy"]
432pub struct _RESET_STATW<'a> {
433 w: &'a mut W,
434}
435impl<'a> _RESET_STATW<'a> {
436 #[doc = r" Writes `variant` to the field"]
437 #[inline]
438 pub fn variant(self, variant: RESET_STATW) -> &'a mut W {
439 {
440 self.bit(variant._bits())
441 }
442 }
443 #[doc = "Clear Cache Stats value."]
444 #[inline]
445 pub fn clear(self) -> &'a mut W {
446 self.variant(RESET_STATW::CLEAR)
447 }
448 #[doc = r" Sets the field bit"]
449 pub fn set_bit(self) -> &'a mut W {
450 self.bit(true)
451 }
452 #[doc = r" Clears the field bit"]
453 pub fn clear_bit(self) -> &'a mut W {
454 self.bit(false)
455 }
456 #[doc = r" Writes raw bits to the field"]
457 #[inline]
458 pub fn bit(self, value: bool) -> &'a mut W {
459 const MASK: bool = true;
460 const OFFSET: u8 = 1;
461 self.w.bits &= !((MASK as u32) << OFFSET);
462 self.w.bits |= ((value & MASK) as u32) << OFFSET;
463 self.w
464 }
465}
466#[doc = r" Proxy"]
467pub struct _INVALIDATEW<'a> {
468 w: &'a mut W,
469}
470impl<'a> _INVALIDATEW<'a> {
471 #[doc = r" Sets the field bit"]
472 pub fn set_bit(self) -> &'a mut W {
473 self.bit(true)
474 }
475 #[doc = r" Clears the field bit"]
476 pub fn clear_bit(self) -> &'a mut W {
477 self.bit(false)
478 }
479 #[doc = r" Writes raw bits to the field"]
480 #[inline]
481 pub fn bit(self, value: bool) -> &'a mut W {
482 const MASK: bool = true;
483 const OFFSET: u8 = 0;
484 self.w.bits &= !((MASK as u32) << OFFSET);
485 self.w.bits |= ((value & MASK) as u32) << OFFSET;
486 self.w
487 }
488}
489impl R {
490 #[doc = r" Value of the register as raw bits"]
491 #[inline]
492 pub fn bits(&self) -> u32 {
493 self.bits
494 }
495 #[doc = "Bit 10 - Enable Flash Sleep Mode. Write to 1 to put flash 1 into sleep mode. NOTE: there is a 5us latency after waking flash until the first access will be returned."]
496 #[inline]
497 pub fn flash1_slm_enable(&self) -> FLASH1_SLM_ENABLER {
498 let bits = {
499 const MASK: bool = true;
500 const OFFSET: u8 = 10;
501 ((self.bits >> OFFSET) & MASK as u32) != 0
502 };
503 FLASH1_SLM_ENABLER { bits }
504 }
505 #[doc = "Bit 9 - Disable Flash Sleep Mode. Write 1 to wake flash1 from sleep mode (reading the array will also automatically wake it)."]
506 #[inline]
507 pub fn flash1_slm_disable(&self) -> FLASH1_SLM_DISABLER {
508 let bits = {
509 const MASK: bool = true;
510 const OFFSET: u8 = 9;
511 ((self.bits >> OFFSET) & MASK as u32) != 0
512 };
513 FLASH1_SLM_DISABLER { bits }
514 }
515 #[doc = "Bit 8 - Flash Sleep Mode Status. 1 indicates that flash1 is in sleep mode, 0 indicates flash1 is in normal mode."]
516 #[inline]
517 pub fn flash1_slm_status(&self) -> FLASH1_SLM_STATUSR {
518 let bits = {
519 const MASK: bool = true;
520 const OFFSET: u8 = 8;
521 ((self.bits >> OFFSET) & MASK as u32) != 0
522 };
523 FLASH1_SLM_STATUSR { bits }
524 }
525 #[doc = "Bit 6 - Enable Flash Sleep Mode. Write to 1 to put flash 0 into sleep mode. NOTE: there is a 5us latency after waking flash until the first access will be returned."]
526 #[inline]
527 pub fn flash0_slm_enable(&self) -> FLASH0_SLM_ENABLER {
528 let bits = {
529 const MASK: bool = true;
530 const OFFSET: u8 = 6;
531 ((self.bits >> OFFSET) & MASK as u32) != 0
532 };
533 FLASH0_SLM_ENABLER { bits }
534 }
535 #[doc = "Bit 5 - Disable Flash Sleep Mode. Write 1 to wake flash0 from sleep mode (reading the array will also automatically wake it)."]
536 #[inline]
537 pub fn flash0_slm_disable(&self) -> FLASH0_SLM_DISABLER {
538 let bits = {
539 const MASK: bool = true;
540 const OFFSET: u8 = 5;
541 ((self.bits >> OFFSET) & MASK as u32) != 0
542 };
543 FLASH0_SLM_DISABLER { bits }
544 }
545 #[doc = "Bit 4 - Flash Sleep Mode Status. 1 indicates that flash0 is in sleep mode, 0 indicates flash0 is in normal mode."]
546 #[inline]
547 pub fn flash0_slm_status(&self) -> FLASH0_SLM_STATUSR {
548 let bits = {
549 const MASK: bool = true;
550 const OFFSET: u8 = 4;
551 ((self.bits >> OFFSET) & MASK as u32) != 0
552 };
553 FLASH0_SLM_STATUSR { bits }
554 }
555 #[doc = "Bit 2 - Cache Ready Status (enabled and not processing an invalidate operation)"]
556 #[inline]
557 pub fn cache_ready(&self) -> CACHE_READYR {
558 let bits = {
559 const MASK: bool = true;
560 const OFFSET: u8 = 2;
561 ((self.bits >> OFFSET) & MASK as u32) != 0
562 };
563 CACHE_READYR { bits }
564 }
565 #[doc = "Bit 1 - Reset Cache Statistics. When written to a 1, the cache monitor counters will be cleared. The monitor counters can be reset only when the CACHECFG.ENABLE_MONITOR bit is set."]
566 #[inline]
567 pub fn reset_stat(&self) -> RESET_STATR {
568 RESET_STATR::_from({
569 const MASK: bool = true;
570 const OFFSET: u8 = 1;
571 ((self.bits >> OFFSET) & MASK as u32) != 0
572 })
573 }
574 #[doc = "Bit 0 - Writing a 1 to this bitfield invalidates the flash cache contents."]
575 #[inline]
576 pub fn invalidate(&self) -> INVALIDATER {
577 let bits = {
578 const MASK: bool = true;
579 const OFFSET: u8 = 0;
580 ((self.bits >> OFFSET) & MASK as u32) != 0
581 };
582 INVALIDATER { bits }
583 }
584}
585impl W {
586 #[doc = r" Reset value of the register"]
587 #[inline]
588 pub fn reset_value() -> W {
589 W { bits: 0 }
590 }
591 #[doc = r" Writes raw bits to the register"]
592 #[inline]
593 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
594 self.bits = bits;
595 self
596 }
597 #[doc = "Bit 10 - Enable Flash Sleep Mode. Write to 1 to put flash 1 into sleep mode. NOTE: there is a 5us latency after waking flash until the first access will be returned."]
598 #[inline]
599 pub fn flash1_slm_enable(&mut self) -> _FLASH1_SLM_ENABLEW {
600 _FLASH1_SLM_ENABLEW { w: self }
601 }
602 #[doc = "Bit 9 - Disable Flash Sleep Mode. Write 1 to wake flash1 from sleep mode (reading the array will also automatically wake it)."]
603 #[inline]
604 pub fn flash1_slm_disable(&mut self) -> _FLASH1_SLM_DISABLEW {
605 _FLASH1_SLM_DISABLEW { w: self }
606 }
607 #[doc = "Bit 8 - Flash Sleep Mode Status. 1 indicates that flash1 is in sleep mode, 0 indicates flash1 is in normal mode."]
608 #[inline]
609 pub fn flash1_slm_status(&mut self) -> _FLASH1_SLM_STATUSW {
610 _FLASH1_SLM_STATUSW { w: self }
611 }
612 #[doc = "Bit 6 - Enable Flash Sleep Mode. Write to 1 to put flash 0 into sleep mode. NOTE: there is a 5us latency after waking flash until the first access will be returned."]
613 #[inline]
614 pub fn flash0_slm_enable(&mut self) -> _FLASH0_SLM_ENABLEW {
615 _FLASH0_SLM_ENABLEW { w: self }
616 }
617 #[doc = "Bit 5 - Disable Flash Sleep Mode. Write 1 to wake flash0 from sleep mode (reading the array will also automatically wake it)."]
618 #[inline]
619 pub fn flash0_slm_disable(&mut self) -> _FLASH0_SLM_DISABLEW {
620 _FLASH0_SLM_DISABLEW { w: self }
621 }
622 #[doc = "Bit 4 - Flash Sleep Mode Status. 1 indicates that flash0 is in sleep mode, 0 indicates flash0 is in normal mode."]
623 #[inline]
624 pub fn flash0_slm_status(&mut self) -> _FLASH0_SLM_STATUSW {
625 _FLASH0_SLM_STATUSW { w: self }
626 }
627 #[doc = "Bit 2 - Cache Ready Status (enabled and not processing an invalidate operation)"]
628 #[inline]
629 pub fn cache_ready(&mut self) -> _CACHE_READYW {
630 _CACHE_READYW { w: self }
631 }
632 #[doc = "Bit 1 - Reset Cache Statistics. When written to a 1, the cache monitor counters will be cleared. The monitor counters can be reset only when the CACHECFG.ENABLE_MONITOR bit is set."]
633 #[inline]
634 pub fn reset_stat(&mut self) -> _RESET_STATW {
635 _RESET_STATW { w: self }
636 }
637 #[doc = "Bit 0 - Writing a 1 to this bitfield invalidates the flash cache contents."]
638 #[inline]
639 pub fn invalidate(&mut self) -> _INVALIDATEW {
640 _INVALIDATEW { w: self }
641 }
642}