Struct ambiq_apollo3_pac::bleif::dmastat::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn dmaerr(&self) -> DMAERRR

Bit 2 - DMA Error. This active high bit signals that an error was encountered during the DMA operation.

pub fn dmacpl(&self) -> DMACPLR

Bit 1 - DMA Transfer Complete. This signals the end of the DMA operation. This bit can be cleared by writing to 0.

pub fn dmatip(&self) -> DMATIPR

Bit 0 - DMA Transfer In Progress indicator. 1 will indicate that a DMA transfer is active. The DMA transfer may be waiting on data, transferring data, or waiting for priority. All of these will be indicated with a 1. A 0 will indicate that the DMA is fully complete and no further transactions will be done. This bit is read only.