Expand description
Peripheral access API for APOLLO2 microcontrollers (generated using svd2rust v0.17.0)
You can find an overview of the API here.
Modules§
- adc
- Analog Digital Converter Control
- cachectrl
- Flash Cache Controller
- clkgen
- Clock Generator
- ctimer
- Counter/Timer
- generic
- Common register and bit access and modify traits
- gpio
- General Purpose IO
- iomstr0
- I2C/SPI Master
- ioslave
- I2C/SPI Slave
- mcuctrl
- MCU Miscellaneous Control Logic
- pdm
- PDM Audio
- pwrctrl
- PWR Controller Register Bank
- rstgen
- MCU Reset Generator
- rtc
- Real Time Clock
- uart0
- Serial UART
- vcomp
- Voltage Comparator
- wdt
- Watchdog Timer
Structs§
- ADC
- Analog Digital Converter Control
- CACHECTRL
- Flash Cache Controller
- CBP
- Cache and branch predictor maintenance operations
- CLKGEN
- Clock Generator
- CPUID
- CPUID
- CTIMER
- Counter/Timer
- Core
Peripherals - Core peripherals
- DCB
- Debug Control Block
- DWT
- Data Watchpoint and Trace unit
- FPB
- Flash Patch and Breakpoint unit
- FPU
- Floating Point Unit
- GPIO
- General Purpose IO
- IOMSTR0
- I2C/SPI Master
- IOMSTR1
- I2C/SPI Master
- IOMSTR2
- I2C/SPI Master
- IOMSTR3
- I2C/SPI Master
- IOMSTR4
- I2C/SPI Master
- IOMSTR5
- I2C/SPI Master
- IOSLAVE
- I2C/SPI Slave
- ITM
- Instrumentation Trace Macrocell
- MCUCTRL
- MCU Miscellaneous Control Logic
- MPU
- Memory Protection Unit
- NVIC
- Nested Vector Interrupt Controller
- PDM
- PDM Audio
- PWRCTRL
- PWR Controller Register Bank
- Peripherals
- All the peripherals
- RSTGEN
- MCU Reset Generator
- RTC
- Real Time Clock
- SCB
- System Control Block
- SYST
- SysTick: System Timer
- TPIU
- Trace Port Interface Unit
- UART0
- Serial UART
- UART1
- Serial UART
- VCOMP
- Voltage Comparator
- WDT
- Watchdog Timer
Enums§
- Interrupt
- Enumeration of all the interrupts
Constants§
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority