[−][src]Module ambiq_apollo2_pac::cachectrl::ctrl

Cache Control

Structs

CACHE_READY_W	Write proxy for field `CACHE_READY`
FLASH0_SLM_ENABLE_W	Write proxy for field `FLASH0_SLM_ENABLE`
FLASH0_SLM_STATUS_W	Write proxy for field `FLASH0_SLM_STATUS`
FLASH0_SLM_DISABLE_W	Write proxy for field `FLASH0_SLM_DISABLE`
FLASH1_SLM_ENABLE_W	Write proxy for field `FLASH1_SLM_ENABLE`
FLASH1_SLM_DISABLE_W	Write proxy for field `FLASH1_SLM_DISABLE`
FLASH1_SLM_STATUS_W	Write proxy for field `FLASH1_SLM_STATUS`
INVALIDATE_W	Write proxy for field `INVALIDATE`
RESET_STAT_W	Write proxy for field `RESET_STAT`

INVALIDATE_A	Writing a 1 to this bitfield invalidates the flash cache contents.
RESET_STAT_A	Writing a 1 to this bitfield will reset the cache monitor statistics (DMON0-3, IMON0-3). Statistic gathering can be paused/stopped by disabling the MONITOR_ENABLE bit in CACHECFG, which will maintain the count values until the stats are reset by writing this bitfield.

CACHE_READY_R	Reader of field `CACHE_READY`
FLASH0_SLM_ENABLE_R	Reader of field `FLASH0_SLM_ENABLE`
FLASH0_SLM_STATUS_R	Reader of field `FLASH0_SLM_STATUS`
FLASH0_SLM_DISABLE_R	Reader of field `FLASH0_SLM_DISABLE`
FLASH1_SLM_ENABLE_R	Reader of field `FLASH1_SLM_ENABLE`
FLASH1_SLM_DISABLE_R	Reader of field `FLASH1_SLM_DISABLE`
FLASH1_SLM_STATUS_R	Reader of field `FLASH1_SLM_STATUS`
INVALIDATE_R	Reader of field `INVALIDATE`
R	Reader of register CTRL
RESET_STAT_R	Reader of field `RESET_STAT`
W	Writer for register CTRL