[−][src]Module ambiq_apollo2_pac::pwrctrl::memen
Disables individual banks of the MEMORY array
Structs
| CACHEB0_W | Write proxy for field |
| CACHEB2_W | Write proxy for field |
| FLASH0_W | Write proxy for field |
| FLASH1_W | Write proxy for field |
| SRAMEN_W | Write proxy for field |
Enums
| CACHEB0_A | Enable CACHE BANK 0 |
| CACHEB2_A | Enable CACHE BANK 2 |
| FLASH0_A | Enable FLASH 0 |
| FLASH1_A | Enable FLASH1 |
| SRAMEN_A | Enables power for selected SRAM banks (else an access to its address space to generate a Hard Fault). |
Type Definitions
| CACHEB0_R | Reader of field |
| CACHEB2_R | Reader of field |
| FLASH0_R | Reader of field |
| FLASH1_R | Reader of field |
| R | Reader of register MEMEN |
| SRAMEN_R | Reader of field |
| W | Writer for register MEMEN |