Module ambiq_apollo2_pac::pwrctrl

PWR Controller Register Bank

Modules

adcstatus	Power Status Register for ADC Block
deviceen	DEVICE ENABLES for SHELBY
memen	Disables individual banks of the MEMORY array
miscopt	Power Optimization Control Bits
powerstatus	Power Status Register for MCU supplies and peripherals
pwronstatus	POWER ON Status
sramctrl	SRAM Control register
srampwdinsleep	Powerdown an SRAM Banks in Deep Sleep mode
supplysrc	Memory and Core Voltage Supply Source Select Register

Structs

RegisterBlock

Register block

Type Definitions

ADCSTATUS	Power Status Register for ADC Block
DEVICEEN	DEVICE ENABLES for SHELBY
MEMEN	Disables individual banks of the MEMORY array
MISCOPT	Power Optimization Control Bits
POWERSTATUS	Power Status Register for MCU supplies and peripherals
PWRONSTATUS	POWER ON Status
SRAMCTRL	SRAM Control register
SRAMPWDINSLEEP	Powerdown an SRAM Banks in Deep Sleep mode
SUPPLYSRC	Memory and Core Voltage Supply Source Select Register