[][src]Type Definition ambiq_apollo1_pac::uart::mis::W

type W = W<u32, MIS>;

Writer for register MIS

Methods

impl W[src]

pub fn oemis(&mut self) -> OEMIS_W[src]

Bit 10 - This bit holds the overflow interrupt status masked.

pub fn bemis(&mut self) -> BEMIS_W[src]

Bit 9 - This bit holds the break error interrupt status masked.

pub fn pemis(&mut self) -> PEMIS_W[src]

Bit 8 - This bit holds the parity error interrupt status masked.

pub fn femis(&mut self) -> FEMIS_W[src]

Bit 7 - This bit holds the framing error interrupt status masked.

pub fn rtmis(&mut self) -> RTMIS_W[src]

Bit 6 - This bit holds the receive timeout interrupt status masked.

pub fn txmis(&mut self) -> TXMIS_W[src]

Bit 5 - This bit holds the transmit interrupt status masked.

pub fn rxmis(&mut self) -> RXMIS_W[src]

Bit 4 - This bit holds the receive interrupt status masked.

pub fn dsrmmis(&mut self) -> DSRMMIS_W[src]

Bit 3 - This bit holds the modem DSR interrupt status masked.

pub fn dcdmmis(&mut self) -> DCDMMIS_W[src]

Bit 2 - This bit holds the modem DCD interrupt status masked.

pub fn ctsmmis(&mut self) -> CTSMMIS_W[src]

Bit 1 - This bit holds the modem CTS interrupt status masked.

pub fn rimmis(&mut self) -> RIMMIS_W[src]

Bit 0 - This bit holds the modem RI interrupt status masked.