[][src]Type Definition ambiq_apollo1_pac::gpio::cfgb::R

type R = R<u32, CFGB>;

Reader of register CFGB

Methods

impl R[src]

pub fn gpio15intd(&self) -> GPIO15INTD_R[src]

Bit 31 - GPIO15 interrupt direction.

pub fn gpio15outcfg(&self) -> GPIO15OUTCFG_R[src]

Bits 29:30 - GPIO15 output configuration.

pub fn gpio15incfg(&self) -> GPIO15INCFG_R[src]

Bit 28 - GPIO15 input enable.

pub fn gpio14intd(&self) -> GPIO14INTD_R[src]

Bit 27 - GPIO14 interrupt direction.

pub fn gpio14outcfg(&self) -> GPIO14OUTCFG_R[src]

Bits 25:26 - GPIO14 output configuration.

pub fn gpio14incfg(&self) -> GPIO14INCFG_R[src]

Bit 24 - GPIO14 input enable.

pub fn gpio13intd(&self) -> GPIO13INTD_R[src]

Bit 23 - GPIO13 interrupt direction.

pub fn gpio13outcfg(&self) -> GPIO13OUTCFG_R[src]

Bits 21:22 - GPIO13 output configuration.

pub fn gpio13incfg(&self) -> GPIO13INCFG_R[src]

Bit 20 - GPIO13 input enable.

pub fn gpio12intd(&self) -> GPIO12INTD_R[src]

Bit 19 - GPIO12 interrupt direction.

pub fn gpio12outcfg(&self) -> GPIO12OUTCFG_R[src]

Bits 17:18 - GPIO12 output configuration.

pub fn gpio12incfg(&self) -> GPIO12INCFG_R[src]

Bit 16 - GPIO12 input enable.

pub fn gpio11intd(&self) -> GPIO11INTD_R[src]

Bit 15 - GPIO11 interrupt direction.

pub fn gpio11outcfg(&self) -> GPIO11OUTCFG_R[src]

Bits 13:14 - GPIO11 output configuration.

pub fn gpio11incfg(&self) -> GPIO11INCFG_R[src]

Bit 12 - GPIO11 input enable.

pub fn gpio10intd(&self) -> GPIO10INTD_R[src]

Bit 11 - GPIO10 interrupt direction.

pub fn gpio10outcfg(&self) -> GPIO10OUTCFG_R[src]

Bits 9:10 - GPIO10 output configuration.

pub fn gpio10incfg(&self) -> GPIO10INCFG_R[src]

Bit 8 - GPIO10 input enable.

pub fn gpio9intd(&self) -> GPIO9INTD_R[src]

Bit 7 - GPIO9 interrupt direction.

pub fn gpio9outcfg(&self) -> GPIO9OUTCFG_R[src]

Bits 5:6 - GPIO9 output configuration.

pub fn gpio9incfg(&self) -> GPIO9INCFG_R[src]

Bit 4 - GPIO9 input enable.

pub fn gpio8intd(&self) -> GPIO8INTD_R[src]

Bit 3 - GPIO8 interrupt direction.

pub fn gpio8outcfg(&self) -> GPIO8OUTCFG_R[src]

Bits 1:2 - GPIO8 output configuration.

pub fn gpio8incfg(&self) -> GPIO8INCFG_R[src]

Bit 0 - GPIO8 input enable.