[−][src]Type Definition ambiq_apollo1_pac::gpio::cfga::R
type R = R<u32, CFGA>;
Reader of register CFGA
Methods
impl R
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pub fn gpio7intd(&self) -> GPIO7INTD_R
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Bit 31 - GPIO7 interrupt direction.
pub fn gpio7outcfg(&self) -> GPIO7OUTCFG_R
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Bits 29:30 - GPIO7 output configuration.
pub fn gpio7incfg(&self) -> GPIO7INCFG_R
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Bit 28 - GPIO7 input enable.
pub fn gpio6intd(&self) -> GPIO6INTD_R
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Bit 27 - GPIO6 interrupt direction.
pub fn gpio6outcfg(&self) -> GPIO6OUTCFG_R
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Bits 25:26 - GPIO6 output configuration.
pub fn gpio6incfg(&self) -> GPIO6INCFG_R
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Bit 24 - GPIO6 input enable.
pub fn gpio5intd(&self) -> GPIO5INTD_R
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Bit 23 - GPIO5 interrupt direction.
pub fn gpio5outcfg(&self) -> GPIO5OUTCFG_R
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Bits 21:22 - GPIO5 output configuration.
pub fn gpio5incfg(&self) -> GPIO5INCFG_R
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Bit 20 - GPIO5 input enable.
pub fn gpio4intd(&self) -> GPIO4INTD_R
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Bit 19 - GPIO4 interrupt direction.
pub fn gpio4outcfg(&self) -> GPIO4OUTCFG_R
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Bits 17:18 - GPIO4 output configuration.
pub fn gpio4incfg(&self) -> GPIO4INCFG_R
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Bit 16 - GPIO4 input enable.
pub fn gpio3intd(&self) -> GPIO3INTD_R
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Bit 15 - GPIO3 interrupt direction.
pub fn gpio3outcfg(&self) -> GPIO3OUTCFG_R
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Bits 13:14 - GPIO3 output configuration.
pub fn gpio3incfg(&self) -> GPIO3INCFG_R
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Bit 12 - GPIO3 input enable.
pub fn gpio2intd(&self) -> GPIO2INTD_R
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Bit 11 - GPIO2 interrupt direction.
pub fn gpio2outcfg(&self) -> GPIO2OUTCFG_R
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Bits 9:10 - GPIO2 output configuration.
pub fn gpio2incfg(&self) -> GPIO2INCFG_R
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Bit 8 - GPIO2 input enable.
pub fn gpio1intd(&self) -> GPIO1INTD_R
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Bit 7 - GPIO1 interrupt direction.
pub fn gpio1outcfg(&self) -> GPIO1OUTCFG_R
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Bits 5:6 - GPIO1 output configuration.
pub fn gpio1incfg(&self) -> GPIO1INCFG_R
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Bit 4 - GPIO1 input enable.
pub fn gpio0intd(&self) -> GPIO0INTD_R
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Bit 3 - GPIO0 interrupt direction.
pub fn gpio0outcfg(&self) -> GPIO0OUTCFG_R
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Bits 1:2 - GPIO0 output configuration.
pub fn gpio0incfg(&self) -> GPIO0INCFG_R
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Bit 0 - GPIO0 input enable.