[][src]Struct ambiq_apollo1_pac::adc::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub cfg: CFG,
    pub stat: STAT,
    pub swt: SWT,
    pub sl0cfg: SL0CFG,
    pub sl1cfg: SL1CFG,
    pub sl2cfg: SL2CFG,
    pub sl3cfg: SL3CFG,
    pub sl4cfg: SL4CFG,
    pub sl5cfg: SL5CFG,
    pub sl6cfg: SL6CFG,
    pub sl7cfg: SL7CFG,
    pub wlim: WLIM,
    pub fifo: FIFO,
    pub inten: INTEN,
    pub intstat: INTSTAT,
    pub intclr: INTCLR,
    pub intset: INTSET,
    // some fields omitted
}

Register block

Fields

cfg: CFG

0x00 - Configuration Register

stat: STAT

0x04 - ADC Power Status

swt: SWT

0x08 - Software trigger

sl0cfg: SL0CFG

0x0c - Slot 0 Configuration Register

sl1cfg: SL1CFG

0x10 - Slot 1 Configuration Register

sl2cfg: SL2CFG

0x14 - Slot 2 Configuration Register

sl3cfg: SL3CFG

0x18 - Slot 3 Configuration Register

sl4cfg: SL4CFG

0x1c - Slot 4 Configuration Register

sl5cfg: SL5CFG

0x20 - Slot 5 Configuration Register

sl6cfg: SL6CFG

0x24 - Slot 6 Configuration Register

sl7cfg: SL7CFG

0x28 - Slot 7 Configuration Register

wlim: WLIM

0x2c - Window Comparator Limits Register

fifo: FIFO

0x30 - FIFO Data and Valid Count Register

inten: INTEN

0x200 - ADC Interrupt registers: Enable

intstat: INTSTAT

0x204 - ADC Interrupt registers: Status

intclr: INTCLR

0x208 - ADC Interrupt registers: Clear

intset: INTSET

0x20c - ADC Interrupt registers: Set

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