Struct alt_stm32f30x_hal::rcc::CFGR

pub struct CFGR { /* fields omitted */ }

Clock configuration

Methods

impl CFGR

pub fn hse<F>(self, freq: F, divider: HseDivider, bypass: HseBypass) -> Self where
    F: Into<Hertz<u32>>, 

Sets a HseConfig that checks that the HSE divider is valid and if the clock is in bypass mode

pub fn hclk<F>(self, freq: F) -> Self where
    F: Into<Hertz<u32>>, 

Sets a frequency for the AHB bus

pub fn pclk1<F>(self, freq: F) -> Self where
    F: Into<Hertz<u32>>, 

Sets a frequency for the APB1 bus

pub fn pclk2<F>(self, freq: F) -> Self where
    F: Into<Hertz<u32>>, 

Sets a frequency for the APB2 bus

pub fn sysclk<F>(self, freq: F) -> Self where
    F: Into<Hertz<u32>>, 

Sets the system (core) frequency

pub fn freeze(self, acr: &mut ACR) -> Clocks

Freezes the clock configuration, making it effective