air001_pac/gpiob/
brr.rs

1#[doc = "Register `BRR` writer"]
2pub type W = crate::W<BRR_SPEC>;
3#[doc = "Field `BR0` writer - Port Reset bit"]
4pub type BR0_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
5#[doc = "Field `BR1` writer - Port Reset bit"]
6pub type BR1_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
7#[doc = "Field `BR2` writer - Port Reset bit"]
8pub type BR2_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
9#[doc = "Field `BR3` writer - Port Reset bit"]
10pub type BR3_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
11#[doc = "Field `BR4` writer - Port Reset bit"]
12pub type BR4_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
13#[doc = "Field `BR5` writer - Port Reset bit"]
14pub type BR5_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
15#[doc = "Field `BR6` writer - Port Reset bit"]
16pub type BR6_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
17#[doc = "Field `BR7` writer - Port Reset bit"]
18pub type BR7_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
19#[doc = "Field `BR8` writer - Port Reset bit"]
20pub type BR8_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
21impl W {
22    #[doc = "Bit 0 - Port Reset bit"]
23    #[inline(always)]
24    #[must_use]
25    pub fn br0(&mut self) -> BR0_W<BRR_SPEC, 0> {
26        BR0_W::new(self)
27    }
28    #[doc = "Bit 1 - Port Reset bit"]
29    #[inline(always)]
30    #[must_use]
31    pub fn br1(&mut self) -> BR1_W<BRR_SPEC, 1> {
32        BR1_W::new(self)
33    }
34    #[doc = "Bit 2 - Port Reset bit"]
35    #[inline(always)]
36    #[must_use]
37    pub fn br2(&mut self) -> BR2_W<BRR_SPEC, 2> {
38        BR2_W::new(self)
39    }
40    #[doc = "Bit 3 - Port Reset bit"]
41    #[inline(always)]
42    #[must_use]
43    pub fn br3(&mut self) -> BR3_W<BRR_SPEC, 3> {
44        BR3_W::new(self)
45    }
46    #[doc = "Bit 4 - Port Reset bit"]
47    #[inline(always)]
48    #[must_use]
49    pub fn br4(&mut self) -> BR4_W<BRR_SPEC, 4> {
50        BR4_W::new(self)
51    }
52    #[doc = "Bit 5 - Port Reset bit"]
53    #[inline(always)]
54    #[must_use]
55    pub fn br5(&mut self) -> BR5_W<BRR_SPEC, 5> {
56        BR5_W::new(self)
57    }
58    #[doc = "Bit 6 - Port Reset bit"]
59    #[inline(always)]
60    #[must_use]
61    pub fn br6(&mut self) -> BR6_W<BRR_SPEC, 6> {
62        BR6_W::new(self)
63    }
64    #[doc = "Bit 7 - Port Reset bit"]
65    #[inline(always)]
66    #[must_use]
67    pub fn br7(&mut self) -> BR7_W<BRR_SPEC, 7> {
68        BR7_W::new(self)
69    }
70    #[doc = "Bit 8 - Port Reset bit"]
71    #[inline(always)]
72    #[must_use]
73    pub fn br8(&mut self) -> BR8_W<BRR_SPEC, 8> {
74        BR8_W::new(self)
75    }
76    #[doc = r" Writes raw bits to the register."]
77    #[doc = r""]
78    #[doc = r" # Safety"]
79    #[doc = r""]
80    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
81    #[inline(always)]
82    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
83        self.bits = bits;
84        self
85    }
86}
87#[doc = "port bit reset register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
88pub struct BRR_SPEC;
89impl crate::RegisterSpec for BRR_SPEC {
90    type Ux = u32;
91}
92#[doc = "`write(|w| ..)` method takes [`brr::W`](W) writer structure"]
93impl crate::Writable for BRR_SPEC {
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
96}
97#[doc = "`reset()` method sets BRR to value 0"]
98impl crate::Resettable for BRR_SPEC {
99    const RESET_VALUE: Self::Ux = 0;
100}
air001_pac/gpiob/brr.rs

air001_pac/gpiob/
brr.rs
