Describes a difference in the mapping of an ISA interrupt to how it’s mapped in other interrupt
models. For example, if a device is connected to ISA IRQ 0 and IOAPIC input 2, an override will
appear mapping source 0 to GSI 2. Currently these will only be created for ISA interrupt
sources.
Indicates which local interrupt line will be utilized by an external interrupt. Specifically,
these lines directly correspond to their requisite LVT entries in a processor’s APIC.