Expand description
Composable and generic RISC-V interpreter.
This interpreter is designed to work with abstractions from ab-riscv-primitives crate and is
similarly composable with a powerful macro system and trait abstractions over handling of
memory, syscalls, etc.
The immediate needs dictate the current set of available instructions and extensions. Consider contributing if you need something not yet available.
ab-riscv-interpreter-compliance-tests crate in the repository contains complementary
compliance tests against https://github.com/riscv-non-isa/riscv-arch-test for many
instructions from both base ISA and various extensions on top of the tests contained in this
crate.
Does not require a standard library (no_std) or an allocator.
Modules§
- rv64
- Part of the interpreter responsible for RISC-V RV64 base instruction set
Structs§
- Basic
Instruction Fetcher - Basic instruction fetcher implementation
Enums§
- Execution
Error - Execution errors
- Fetch
Instruction Result - Result of
InstructionFetcher::fetch_instruction()call - Program
Counter Error - Program counter errors
- Virtual
Memory Error - Errors for
VirtualMemory
Traits§
- Basic
Int - Basic integer types that can be read and written to/from memory freely
- Executable
Instruction - Trait for executable instructions
- Instruction
Fetcher - Generic instruction fetcher
- Program
Counter - Generic program counter
- Virtual
Memory - Virtual memory interface