Expand description
aarch64 架构以及一些配置定义
Structs§
- Ptregs
- aarch64 pt 寄存器
Constants§
- BOOT_
CPU_ MODE_ EL1 - boot 在 el1
- BOOT_
CPU_ MODE_ EL2 - boot 在 el2
- BUG_
BRK_ IMM BUG_BRK_IMM- CRm_
mask - CRm_
shift - CRn_
mask - CRn_
shift - CurrentEL_
EL2 - el2 级别标识
- DISR_
EL1_ ESR_ MASK - DISR_
EL1_ IDS - ENDIAN_
SET_ EL1 - el1 小端
- ENDIAN_
SET_ EL2 - el2 小端
- ESR_
ELx_ AET - ESR_
ELx_ AET_ CE - ESR_
ELx_ AET_ SHIFT - ESR_
ELx_ AET_ UC - ESR_
ELx_ AET_ UEO - ESR_
ELx_ AET_ UER - ESR_
ELx_ AET_ UEU - ESR_
ELx_ AR - ESR_
ELx_ AR_ SHIFT - ESR_
ELx_ CM - ESR_
ELx_ CM_ SHIFT - ESR_
ELx_ COND_ MASK - ESR_
ELx_ COND_ SHIFT - ESR_
ELx_ CP15_ 32_ ISS_ CRM_ MASK - ESR_
ELx_ CP15_ 32_ ISS_ CRM_ SHIFT - ESR_
ELx_ CP15_ 32_ ISS_ CRN_ MASK - ESR_
ELx_ CP15_ 32_ ISS_ CRN_ SHIFT - ESR_
ELx_ CP15_ 32_ ISS_ DIR_ MASK - ESR_
ELx_ CP15_ 32_ ISS_ DIR_ READ - ESR_
ELx_ CP15_ 32_ ISS_ DIR_ WRITE - ESR_
ELx_ CP15_ 32_ ISS_ OP1_ MASK - ESR_
ELx_ CP15_ 32_ ISS_ OP1_ SHIFT - ESR_
ELx_ CP15_ 32_ ISS_ OP2_ MASK - ESR_
ELx_ CP15_ 32_ ISS_ OP2_ SHIFT - ESR_
ELx_ CP15_ 32_ ISS_ RT_ MASK - ESR_
ELx_ CP15_ 32_ ISS_ RT_ SHIFT - ESR_
ELx_ CP15_ 32_ ISS_ SYS_ CNTFRQ - ESR_
ELx_ CP15_ 32_ ISS_ SYS_ MASK - ESR_
ELx_ CP15_ 64_ ISS_ CRM_ MASK - ESR_
ELx_ CP15_ 64_ ISS_ CRM_ SHIFT - ESR_
ELx_ CP15_ 64_ ISS_ DIR_ MASK - ESR_
ELx_ CP15_ 64_ ISS_ DIR_ READ - ESR_
ELx_ CP15_ 64_ ISS_ DIR_ WRITE - ESR_
ELx_ CP15_ 64_ ISS_ OP1_ MASK - ESR_
ELx_ CP15_ 64_ ISS_ OP1_ SHIFT - ESR_
ELx_ CP15_ 64_ ISS_ RT2_ MASK - ESR_
ELx_ CP15_ 64_ ISS_ RT2_ SHIFT - ESR_
ELx_ CP15_ 64_ ISS_ RT_ MASK - ESR_
ELx_ CP15_ 64_ ISS_ RT_ SHIFT - ESR_
ELx_ CP15_ 64_ ISS_ SYS_ CNTVCT - ESR_
ELx_ CP15_ 64_ ISS_ SYS_ MASK - ESR_
ELx_ CV - ESR_
ELx_ EA - ESR_
ELx_ EA_ SHIFT - ESR_
ELx_ EC_ BKPT32 - ESR_
ELx_ EC_ BREAKPT_ CUR - ESR_
ELx_ EC_ BREAKPT_ LOW - ESR_
ELx_ EC_ BRK64 - ESR_
ELx_ EC_ CP10_ ID - ESR_
ELx_ EC_ CP14_ 64 - ESR_
ELx_ EC_ CP14_ LS - ESR_
ELx_ EC_ CP14_ MR - ESR_
ELx_ EC_ CP15_ 32 - ESR_
ELx_ EC_ CP15_ 64 - ESR_
ELx_ EC_ DABT_ CUR - ESR_
ELx_ EC_ DABT_ LOW - ESR_
ELx_ EC_ FP_ ASIMD - ESR_
ELx_ EC_ FP_ EXC32 - ESR_
ELx_ EC_ FP_ EXC64 - ESR_
ELx_ EC_ HVC32 - ESR_
ELx_ EC_ HVC64 - ESR_
ELx_ EC_ IABT_ CUR - ESR_
ELx_ EC_ IABT_ LOW - ESR_
ELx_ EC_ ILL - ESR_
ELx_ EC_ IMP_ DEF - ESR_
ELx_ EC_ MASK - ESR_
ELx_ EC_ MAX - ESR_
ELx_ EC_ PAC - ESR_
ELx_ EC_ PC_ ALIGN - ESR_
ELx_ EC_ SERROR - ESR_
ELx_ EC_ SHIFT - ESR_
ELx_ EC_ SMC32 - ESR_
ELx_ EC_ SMC64 - ESR_
ELx_ EC_ SOFTSTP_ CUR - ESR_
ELx_ EC_ SOFTSTP_ LOW - ESR_
ELx_ EC_ SP_ ALIGN - ESR_
ELx_ EC_ SVC32 - ESR_
ELx_ EC_ SVC64 - ESR_
ELx_ EC_ SVE - ESR_
ELx_ EC_ SYS64 - ESR_
ELx_ EC_ UNKNOWN - ESR_
ELx_ EC_ VECTO R32 - ESR_
ELx_ EC_ WATCHPT_ CUR - ESR_
ELx_ EC_ WATCHPT_ LOW - ESR_
ELx_ EC_ WFx - ESR_
ELx_ FP_ EXC_ TFV - ESR_
ELx_ FSC - ESR_
ELx_ FSC_ ACCESS - ESR_
ELx_ FSC_ EXTABT - ESR_
ELx_ FSC_ FAT - ESR_
ELx_ FSC_ PERM - ESR_
ELx_ FSC_ SERROR - ESR_
ELx_ FSC_ TYPE - ESR_
ELx_ FnV - ESR_
ELx_ FnV_ SHIFT - ESR_
ELx_ IDS - ESR_
ELx_ IDS_ SHIFT - ESR_
ELx_ IL - ESR_
ELx_ IL_ SHIFT - ESR_
ELx_ ISS_ MASK - ESR_
ELx_ ISV - ESR_
ELx_ ISV_ SHIFT - ESR_
ELx_ S1PTW - ESR_
ELx_ S1PTW_ SHIFT - ESR_
ELx_ SAS - ESR_
ELx_ SAS_ SHIFT - ESR_
ELx_ SET_ MASK - ESR_
ELx_ SET_ SHIFT - ESR_
ELx_ SF - ESR_
ELx_ SF_ SHIFT - ESR_
ELx_ SRT_ MASK - ESR_
ELx_ SRT_ SHIFT - ESR_
ELx_ SSE - ESR_
ELx_ SSE_ SHIFT - ESR_
ELx_ SYS64_ ISS_ CRM_ DC_ CIVAC - ESR_
ELx_ SYS64_ ISS_ CRM_ DC_ CVAC - ESR_
ELx_ SYS64_ ISS_ CRM_ DC_ CVAP - ESR_
ELx_ SYS64_ ISS_ CRM_ DC_ CVAU - ESR_
ELx_ SYS64_ ISS_ CRM_ IC_ IVAU - ESR_
ELx_ SYS64_ ISS_ CRM_ MASK - ESR_
ELx_ SYS64_ ISS_ CRM_ SHIFT - ESR_
ELx_ SYS64_ ISS_ CRN_ MASK - ESR_
ELx_ SYS64_ ISS_ CRN_ SHIFT - ESR_
ELx_ SYS64_ ISS_ DIR_ MASK - ESR_
ELx_ SYS64_ ISS_ DIR_ READ - ESR_
ELx_ SYS64_ ISS_ DIR_ WRITE - ESR_
ELx_ SYS64_ ISS_ EL0_ CACHE_ OP_ MASK - ESR_
ELx_ SYS64_ ISS_ EL0_ CACHE_ OP_ VAL - ESR_
ELx_ SYS64_ ISS_ OP0_ MASK - ESR_
ELx_ SYS64_ ISS_ OP0_ SHIFT - ESR_
ELx_ SYS64_ ISS_ OP1_ MASK - ESR_
ELx_ SYS64_ ISS_ OP1_ SHIFT - ESR_
ELx_ SYS64_ ISS_ OP2_ MASK - ESR_
ELx_ SYS64_ ISS_ OP2_ SHIFT - ESR_
ELx_ SYS64_ ISS_ RES0_ MASK - ESR_
ELx_ SYS64_ ISS_ RES0_ SHIFT - ESR_
ELx_ SYS64_ ISS_ RT_ MASK - ESR_
ELx_ SYS64_ ISS_ RT_ SHIFT - ESR_
ELx_ SYS64_ ISS_ SYS_ CNTFRQ - ESR_
ELx_ SYS64_ ISS_ SYS_ CNTVCT - ESR_
ELx_ SYS64_ ISS_ SYS_ CTR - ESR_
ELx_ SYS64_ ISS_ SYS_ CTR_ READ - ESR_
ELx_ SYS64_ ISS_ SYS_ MASK - ESR_
ELx_ SYS64_ ISS_ SYS_ MRS_ OP_ MASK - ESR_
ELx_ SYS64_ ISS_ SYS_ MRS_ OP_ VAL - ESR_
ELx_ SYS64_ ISS_ SYS_ OP_ MASK - ESR_
ELx_ WFx_ ISS_ TI - ESR_
ELx_ WFx_ ISS_ WFE - ESR_
ELx_ WFx_ ISS_ WFI - ESR_
ELx_ WFx_ MASK - ESR_
ELx_ WFx_ WFI_ VAL - ESR_
ELx_ WNR - ESR_
ELx_ WNR_ SHIFT - ESR_
ELx_ xVC_ IMM_ MASK - ID_
AA64MMF R0_ PARANGE_ 48 ID_AA64MMFR0_PARANGE_48- ID_
AA64MMF R0_ PARANGE_ MAX ID_AA64MMFR0_PARANGE_MAX- ID_
AA64MMF R0_ PARANGE_ SHIFT ID_AA64MMFR0_PARANGE_SHIFT- ID_
AA64MMF R0_ TGRA N4_ SHIFT ID_AA64MMFR0_TGRAN4_SHIFT- ID_
AA64MMF R0_ TGRA N4_ SUPPORTED ID_AA64MMFR0_TGRAN4_SUPPORTED- ID_
AA64MMF R0_ TGRAN_ SHIFT ID_AA64MMFR0_TGRAN_SHIFT- ID_
AA64MMF R0_ TGRAN_ SUPPORTED ID_AA64MMFR0_TGRAN_SUPPORTED- KERNEL_
DS KERNEL_DS- KIMAGE_
START - 内核起始虚拟地址
- KIO_
VADDR - 内核 io 空间起始地址
- KIO_
VADDR_ END - 内核 io 空间结束地址
- KMEM_
VADDR - 内核线性空间起始地址
- KMEM_
VADDR_ END - 内核线性空间结束地址
- KPAGE_
VADDR - 内核页结构空间起始地址
- KPAGE_
VADDR_ END - 内核页结构空间结束地址
- MAIR_
ATTR - 内存域属性
- MT_
DEVICE_ GRE - GRE
- MT_
DEVICE_ nGnRE - nGnRE
- MT_
DEVICE_ nGnRnE - nGnRnE
- MT_
NORMAL - NORMAL
- MT_
NORMAL_ NC - NC
- MT_
NORMAL_ WT - WT
- NO_
SYSCALL NO_SYSCALL- Op0_
mask - Op0_
shift - Op1_
mask - Op1_
shift - Op2_
mask - Op2_
shift - PAGE_
SIZE - 页大小
- PA_BITS
- 物理地址 bit 数
- PGD_
MASK - pgd mask
- PGD_
SHIFT - pgd 偏移
- PGD_
SIZE - pgd 大小 512G
- PGD_
TABLE_ PXN - pgd 页表特权级不可执行
- PGD_
TABLE_ UXN - pgd 页表非特权级不可执行
- PGD_
TYPE_ TABLE - pgd 页表 type
- PMD_
MASK - pmd mask
- PMD_
SHIFT - pmd 偏移
- PMD_
SIZE - pmd 大小 2M
- PMD_
TABLE_ PXN - pmd 页表特权级不可执行
- PMD_
TABLE_ UXN - pmd 页表非特权级不可执行
- PMD_
TYPE_ TABLE - pmd 页表 type
- PSR_
A_ BIT - SPSR bit A
- PSR_
D_ BIT - SPSR bit D
- PSR_
F_ BIT - SPSR bit F
- PSR_
I_ BIT - SPSR bit I
- PSR_
MODE32_ BIT - psr mode32
- PSR_
MODE_ EL0t - psr el0t
- PSR_
MODE_ EL1h - psr el1h
- PSR_
MODE_ EL1t - psr el1t
- PSR_
MODE_ EL2h - psr el2h
- PSR_
MODE_ EL2t - psr el2t
- PSR_
MODE_ EL3h - psr el3h
- PSR_
MODE_ EL3t - psr el3t
- PSR_
MODE_ MASK - psr mask
- PTE_
MASK - pte mask
- PTE_
SHIFT - pte 偏移
- PTE_
SIZE - pte 大小 4K
- PTRS_
PER_ PGD - pgd 数量
- PTRS_
PER_ PMD - pmd 数量
- PTRS_
PER_ PTE - pte 数量
- PTRS_
PER_ PUD - pud 数量
- PUD_
MASK - pud mask
- PUD_
SECT_ S - pud
- PUD_
SHIFT - pud 偏移
- PUD_
SIZE - pud 大小 1G
- PUD_
TABLE_ PXN - pud 页表特权级不可执行
- PUD_
TABLE_ UXN - pud 页表非特权级不可执行
- PUD_
TYPE_ AF - pud af
- PUD_
TYPE_ SECT - pud 段
- PUD_
TYPE_ TABLE - pud 页表 type
- SCTLR_
EL1_ CP15BEN SCTLR_EL1_CP15BEN- SCTLR_
EL1_ DZE SCTLR_EL1_DZE- SCTLR_
EL1_ E0E SCTLR_EL1_E0E- SCTLR_
EL1_ ITD SCTLR_EL1_ITD- SCTLR_
EL1_ NTWE SCTLR_EL1_NTWE- SCTLR_
EL1_ NTWI SCTLR_EL1_NTWI- SCTLR_
EL1_ RES1 - el1 系统寄存器预留1
- SCTLR_
EL1_ SA0 SCTLR_EL1_SA0- SCTLR_
EL1_ SED SCTLR_EL1_SED- SCTLR_
EL1_ SET SCTLR_EL1_SET- SCTLR_
EL1_ SPAN SCTLR_EL1_SPAN- SCTLR_
EL1_ UCI SCTLR_EL1_UCI- SCTLR_
EL1_ UCT SCTLR_EL1_UCT- SCTLR_
EL1_ UMA SCTLR_EL1_UMA- SCTLR_
EL2_ RES1 - el2 系统寄存器预留2
- SCTLR_
ELx_ A SCTLR_ELx_A- SCTLR_
ELx_ C SCTLR_ELx_C- SCTLR_
ELx_ DSSBS SCTLR_ELx_DSSBS- SCTLR_
ELx_ EE SCTLR_ELx_EE- SCTLR_
ELx_ ENDA SCTLR_ELx_ENDA- SCTLR_
ELx_ ENDB SCTLR_ELx_ENDB- SCTLR_
ELx_ ENIA SCTLR_ELx_ENIA- SCTLR_
ELx_ ENIB SCTLR_ELx_ENIB- SCTLR_
ELx_ I SCTLR_ELx_I- SCTLR_
ELx_ IESB SCTLR_ELx_IESB- SCTLR_
ELx_ M SCTLR_ELx_M- SCTLR_
ELx_ SA SCTLR_ELx_SA- SCTLR_
ELx_ WXN SCTLR_ELx_WXN- SWAPPER_
MM_ IOFLAGS - 默认的 mmu flags, NC IO 读写
- SWAPPER_
MM_ NORMALFLAGS - 默认的 mmu flags, 可读可写可执行
- SWAPPER_
PUD_ FLAGS - pud flags
- S_
FRAME_ SIZE - 帧栈总大小
- S_LR
- lr 寄存器偏移
- S_
ORIG_ ADDR_ LIMIT - 原始地址限制存储偏移
- S_
ORIG_ X0 - 原始 x0 数据存储偏移
- S_PC
- pc 寄存器偏移
- S_
PSTATE - pstate 寄存器偏移
- S_SP
- sp 寄存器偏移
- S_
STACKFRAME - 栈帧地址偏移
- S_
SYSCALLNO - 原始系统调用号偏移
- S_X0
- x0 寄存器偏移
- S_X1
- x1 寄存器偏移
- S_X2
- x2 寄存器偏移
- S_X3
- x3 寄存器偏移
- S_X4
- x4 寄存器偏移
- S_X5
- x5 寄存器偏移
- S_X6
- x6 寄存器偏移
- S_X7
- x7 寄存器偏移
- S_X8
- x8 寄存器偏移
- S_X9
- x9 寄存器偏移
- S_X10
- x10 寄存器偏移
- S_X11
- x11 寄存器偏移
- S_X12
- x12 寄存器偏移
- S_X13
- x13 寄存器偏移
- S_X14
- x14 寄存器偏移
- S_X15
- x15 寄存器偏移
- S_X16
- x16 寄存器偏移
- S_X17
- x17 寄存器偏移
- S_X18
- x18 寄存器偏移
- S_X19
- x19 寄存器偏移
- S_X20
- x20 寄存器偏移
- S_X21
- x21 寄存器偏移
- S_X22
- x22 寄存器偏移
- S_X23
- x23 寄存器偏移
- S_X24
- x24 寄存器偏移
- S_X25
- x25 寄存器偏移
- S_X26
- x26 寄存器偏移
- S_X27
- x27 寄存器偏移
- S_X28
- x28 寄存器偏移
- S_X29
- x29 寄存器偏移
- TCR_A1
TCR_A1- TCR_
ASID16 TCR_ASID16- TCR_
CACHE_ FLAGS TCR_CACHE_FLAGS- TCR_
IPS_ SHIFT TCR_IPS_SHIFT- TCR_
IRGN0_ SHIFT TCR_IRGN0_SHIFT- TCR_
IRGN0_ WBWA TCR_IRGN0_WBWA- TCR_
IRGN1_ SHIFT TCR_IRGN1_SHIFT- TCR_
IRGN1_ WBWA TCR_IRGN1_WBWA- TCR_
IRGN_ WBWA TCR_IRGN_WBWA- TCR_
ORGN0_ SHIFT TCR_ORGN0_SHIFT- TCR_
ORGN0_ WBWA TCR_ORGN0_WBWA- TCR_
ORGN1_ SHIFT TCR_ORGN1_SHIFT- TCR_
ORGN1_ WBWA TCR_ORGN1_WBWA- TCR_
ORGN_ WBWA TCR_ORGN_WBWA- TCR_
SH0_ INNER TCR_SH0_INNER- TCR_
SH0_ SHIFT TCR_SH0_SHIFT- TCR_
SH1_ INNER TCR_SH1_INNER- TCR_
SH1_ SHIFT TCR_SH1_SHIFT- TCR_
SHARED TCR_SHARED- TCR_
SMP_ FLAGS TCR_SMP_FLAGS- TCR_
T0SZ TCR_T0SZ- TCR_
T0SZ_ OFFSET TCR_T0SZ_OFFSET- TCR_
T1SZ TCR_T1SZ- TCR_
T1SZ_ OFFSET TCR_T1SZ_OFFSET- TCR_
TBI0 TCR_TBI0- TCR_
TG0_ 4K TCR_TG0_4K- TCR_
TG0_ SHIFT TCR_TG0_SHIFT- TCR_
TG1_ 4K TCR_TG1_4K- TCR_
TG1_ SHIFT TCR_TG1_SHIFT- TCR_
TG_ FLAGS TCR_TG_FLAGS- TCR_
TxSZ TCR_TxSZ- TCR_
TxSZ_ WIDTH TCR_TxSZ_WIDTH- THREAD_
STACK_ SIZE - 线程栈大小(包括 irq 栈) 16K
- TIF_
NEED_ RESCHED TIF_NEED_RESCHED- USER_DS
USER_DS- VA_BITS
- 虚拟地址 bit 数
- _TIF_
WORK_ MASK _TIF_WORK_MASK